add watchdog&rtc_deinit when rtc init

Signed-off-by: huhui <huhui@sharkgulf.com>

Application/app/sox/iostate.c

@@ -44,9 +44,6 @@ void io_state_init(void){
 	shark_timer_post(&dcdc_pwr_io._timer, io_detect_intv_time);
 
 	small_current_short_irq_enable(1);
-//	charger_detect_irq_enable(1);
-//	hall_1_detect_irq_enable(1);
-//	hall_2_detect_irq_enable(1);
 
 	bms_message_update_insert(_io_state.hall_detect);
 	

Application/bsp/bsp.c

@@ -11,6 +11,9 @@ const char iap_board_name[] __attribute__((at(0x08002800))) = "SP600";
 #endif
 const char iap_fw_version[] __attribute__((at(0x08002A00))) = "1.0";
 const char iap_fw_name[] __attribute__((at(0x08002C00))) = "App";
+
+#define CONFIG_DEBUG 0
+
 extern void system_clock_config(void);
 extern void SystemCoreClockUpdate(void);
 #define ALARM_TEST 1
@@ -28,11 +31,40 @@ void bsp_init(void){
 	AT24CXX_Init();
 }
 
+/* timeout:1-25 */
 void wdog_start(int timeout){
+#if CONFIG_DEBUG == 0
+	/* enable IRC40K */
+	rcu_osci_on(RCU_IRC40K);
+	/* wait till IRC40K is ready */
+	while(SUCCESS != rcu_osci_stab_wait(RCU_IRC40K)){
+	}  
+	
+	/* confiure FWDGT counter clock: 40KHz(IRC40K) / 256 = 0.15625 KHz */
+	fwdgt_config(timeout*40000UL/256, FWDGT_PSC_DIV256);  
+	/* after 4 seconds to generate a reset */
+	fwdgt_enable();
+#endif   
 
 }
 
 void wdog_reload(void){
+#if CONFIG_DEBUG == 0
+	fwdgt_counter_reload();
+#endif 
+}
 
+void  wdog_set_timeout(int timeout)
+{  
+#if CONFIG_DEBUG == 0
+    /* enable write access to FWDGT_PSC,and FWDGT_RLD */
+    FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
+
+    FWDGT_RLD = RLD_RLD(timeout*40000UL/256);
+
+    /* reload the counter */
+    FWDGT_CTL = FWDGT_KEY_RELOAD;
+#endif	
 }
 
+

Application/bsp/mcu_power_sleep.c

@@ -25,14 +25,16 @@ uint32_t get_system_sleep_time(void){
 }
 
 static void enable_wakeup_irq(void){
-	//charger_detect_irq_enable(1);
-	//hall_1_detect_irq_enable(1);
+	charger_detect_irq_enable(1);
+	hall_1_detect_irq_enable(1);
 	//hall_2_detect_irq_enable(1);
+	shark_rtc_start_alarm(RTC_ALARM_FOR_SLEEP);
 }
 
 static void disable_wakeup_irq(void){
-	//charger_detect_irq_enable(0);
-	//hall_1_detect_irq_enable(0);
+	shark_rtc_stop_alarm();
+	charger_detect_irq_enable(0);
+	hall_1_detect_irq_enable(0);
 	//hall_2_detect_irq_enable(0);
 }
 
@@ -62,7 +64,7 @@ static void pre_deepsleep(void){
 		return;
 	}
 	
-	wdog_start(WDOG_TIME_FOR_SLEEP);
+	wdog_set_timeout(WDOG_TIME_FOR_SLEEP);
 }
 
 static void post_deepsleep(void){
@@ -79,7 +81,7 @@ static void post_deepsleep(void){
 
 	gd32_i2c_init(0, 100* 1000);
 	adc_init();
-	wdog_start(4);
+	wdog_set_timeout(4);
 	current_calibrate();
 	wdog_reload();
 	printf("Sleep Exit, Total sleep time = %d s\n", _sleep_second_time);
@@ -89,7 +91,6 @@ void mcu_enter_deepsleep(void){
 
 	pre_deepsleep();
 	enable_wakeup_irq();
-	shark_rtc_start_alarm(RTC_ALARM_FOR_SLEEP);
 	u32 start_time = shark_rtc_get_second();
 	pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, WFI_CMD);
 	u32 end_time = shark_rtc_get_second();
@@ -98,7 +99,6 @@ void mcu_enter_deepsleep(void){
 	}else { //rtc second wrap
 		_sleep_second_time += (60 - start_time + end_time);
 	}
-	shark_rtc_stop_alarm();
 	disable_wakeup_irq();
 	post_deepsleep();
 }

Application/bsp/shark_bsp.h

@@ -34,4 +34,6 @@
 void bsp_init(void);
 void wdog_start(int timeout);
 void wdog_reload(void);
+void  wdog_set_timeout(int timeout);
+
 

Application/bsp/shark_rtc.c

@@ -18,6 +18,8 @@ void shark_rtc_init(void){
 	
 	rtc_register_sync_wait();
 
+	rtc_deinit();
+
 	rtc_parameter_struct rtc_initpara;
 	memset(&rtc_initpara, 0, sizeof(rtc_initpara));
 	rtc_initpara.rtc_factor_asyn = 99;
@@ -70,7 +72,7 @@ int shark_rtc_start_alarm(uint32_t second){
 	rtc_alarm_disable();
 	set_rtc_alarm(second);
 	rtc_interrupt_enable(RTC_INT_ALARM);
-    rtc_alarm_enable();
+	rtc_alarm_enable();
 	exti_init(EXTI_17,EXTI_INTERRUPT,EXTI_TRIG_RISING);
 	nvic_irq_enable(RTC_IRQn,4,0);	
 	return 0;