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@@ -3,6 +3,7 @@
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#include "bsp/gpio.h"
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#include "libs/shark_libs.h"
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#include "libs/shark_task.h"
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+#include "libs/logger.h"
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#define SHARK_UART_BAUDRATE 38400
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@@ -39,17 +40,33 @@
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#define SHARK_UART1_rx_dma_clk RCU_DMA
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// ================================================================================
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+#define ENABLE_RX_DMA 0
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static u8 shark_uart0_tx_cache[SHARK_UART_TX_MEM_SIZE];
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#if UART_NUM==2
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static u8 shark_uart1_tx_cache[SHARK_UART_TX_MEM_SIZE];
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#endif
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-static u8 shark_uart_rx_cache[SHARK_UART_RX_MEM_SIZE];
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+
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+static u8 shark_uart0_rx_cache[SHARK_UART_RX_MEM_SIZE];
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+#if UART_NUM==2
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+static u8 shark_uart1_rx_cache[SHARK_UART_RX_MEM_SIZE];
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+#endif
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+
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static shark_uart_t _shark_uart[UART_NUM];
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static shark_task_t _uart_task;
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static u64 _rx_time;
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+u32 uart_rx_bytes = 0;
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+u32 uart_old_prot = 0;
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+u32 uart_new_prot = 0;
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+u32 uart_tx_bytes = 0;
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+static u32 uart_run_times[2];
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+static u32 uart_irq_times[2];
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///static bool uart_no_data = false;
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+#if ENABLE_RX_DMA==1
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#define update_dma_w_pos(uart) circle_update_write_position(&uart->rx_queue, SHARK_UART_RX_MEM_SIZE - DMA_CHCNT(uart->rx_dma_ch))
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+#else
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+#define update_dma_w_pos(uart){}
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+#endif
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extern void protocol_recv_frame(uart_enum_t uart_no, char *data, int len);
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extern void protocol_old_recv_frame(uart_enum_t uart_no, uint8_t *data, int len);
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extern void health_add_uart_error(uint32_t c, uint32_t l, uint32_t d);
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@@ -77,6 +94,7 @@ static bool shark_uart_on_rx_frame(shark_uart_t *uart)
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static void shark_uart_rx(shark_uart_t *uart){
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while(1) {
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u8 data;
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+ uart_run_times[_uart_index(uart->uart_com)] ++;
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update_dma_w_pos(uart);
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if (circle_get_one_data(&uart->rx_queue, &data) != 1) {
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if (shark_get_mseconds() >= (5 + _rx_time)) {
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@@ -95,6 +113,7 @@ static void shark_uart_rx(shark_uart_t *uart){
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}
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break;
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}
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+ uart_rx_bytes ++;
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_rx_time = shark_get_mseconds();
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uart->rx_frame_old_prot[uart->rx_length_old_prot ++] = data;
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if (uart->rx_length_old_prot == sizeof(uart->rx_frame_old_prot)){
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@@ -181,6 +200,7 @@ static void shark_uart_dma_tx(shark_uart_t *uart)
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static void shark_uart_write(shark_uart_t *uart, const u8 *buff, u16 size)
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{
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+ uart_tx_bytes += size;
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while (size > 0) {
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u16 length = byte_queue_write(&uart->tx_queue, buff, size);
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@@ -226,7 +246,7 @@ static void shark_uart_tx_dma_init(shark_uart_t *uart){
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#endif
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}
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-
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+#if ENABLE_RX_DMA==1
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static void shark_uart_rx_dma_init(shark_uart_t *uart){
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dma_parameter_struct dma_init_struct;
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rcu_periph_clock_enable(_uart_index(uart->uart_com)== SHARK_UART0?SHARK_UART0_rx_dma_clk:SHARK_UART1_rx_dma_clk);
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@@ -246,7 +266,7 @@ static void shark_uart_rx_dma_init(shark_uart_t *uart){
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dma_channel_enable(uart->rx_dma_ch);
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usart_dma_receive_config(uart->uart_com, USART_DENR_ENABLE);
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}
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-
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+#endif
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static void shark_uart_pin_init(shark_uart_t *uart){
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if (_uart_index(uart->uart_com) == SHARK_UART0) {
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rcu_periph_clock_enable(SHARK_UART0_clk);
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@@ -293,7 +313,15 @@ static void shark_uart_device_init(shark_uart_t *uart){
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usart_hardware_flow_cts_config(uart->uart_com, USART_CTS_DISABLE);
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usart_receive_config(uart->uart_com, USART_RECEIVE_ENABLE);
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usart_transmit_config(uart->uart_com, USART_TRANSMIT_ENABLE);
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-
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+
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+#if ENABLE_RX_DMA==0
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+ usart_overrun_disable(uart->uart_com);//must add
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+ usart_lin_mode_disable(uart->uart_com);
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+ usart_receiver_timeout_disable(uart->uart_com);
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+ usart_reception_error_dma_disable(uart->uart_com);
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+
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+ usart_interrupt_enable(uart->uart_com,USART_INT_RBNE);
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+#endif
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}
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static u32 shark_uart_handler(void)
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@@ -313,15 +341,35 @@ static u32 shark_uart_handler(void)
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return 0;
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}
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+void shark_uart_log(void){
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+ shark_uart_t *uart = _shark_uart + SHARK_UART0;
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+ sys_debug("Debug: %d, %d, %d, %d\n", uart_tx_bytes, uart_rx_bytes, uart_new_prot, uart_old_prot);
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+ sys_debug("uart0: %d, %d, %d, %d, %d\n", uart_run_times[0], uart->rx_queue.r_pos, uart->rx_queue.w_pos, uart->rx_queue.buffer_len, uart_irq_times[0]);
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+#if ENABLE_RX_DMA==1
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+ sys_debug("dma0: %d\n", DMA_CHCNT(uart->rx_dma_ch));
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+#endif
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+#if UART_NUM==2
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+ uart = _shark_uart + SHARK_UART1;
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+ sys_debug("uart1: %d, %d, %d, %d, %d\n", uart_run_times[1], uart->rx_queue.r_pos, uart->rx_queue.w_pos, uart->rx_queue.buffer_len, uart_irq_times[1]);
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+#if ENABLE_RX_DMA==1
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+ sys_debug("dma1: %d\n", DMA_CHCNT(uart->rx_dma_ch));
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+#endif
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+#endif
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+}
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+
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void shark_uart_flush(void){
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shark_uart_t *uart = _shark_uart + SHARK_UART0;
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if (uart->uart_com != 0) {
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- shark_uart_dma_tx(uart);
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+ while(!byte_queue_empty(&uart->tx_queue)) {
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+ shark_uart_dma_tx(uart);
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+ }
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}
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#if UART_NUM==2
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uart = _shark_uart + SHARK_UART1;
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if (uart->uart_com != 0) {
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- shark_uart_dma_tx(uart);
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+ while(!byte_queue_empty(&uart->tx_queue)) {
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+ shark_uart_dma_tx(uart);
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+ }
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}
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#endif
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}
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@@ -353,6 +401,15 @@ static u8 *tx_cache_addr(uart_enum_t uart_no){
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#endif
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}
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+static u8 *rx_cache_addr(uart_enum_t uart_no){
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+#if UART_NUM==2
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+ return (uart_no == SHARK_UART0)?shark_uart0_rx_cache:shark_uart1_rx_cache;
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+#else
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+ return shark_uart0_rx_cache;
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+#endif
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+}
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+
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+
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void shark_uart_deinit(uart_enum_t uart_no){
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shark_uart_t *uart = _shark_uart + uart_no;
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if (uart->uart_com != 0) {
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@@ -367,8 +424,14 @@ void shark_uart_deinit(uart_enum_t uart_no){
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}
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if (uart_no == SHARK_UART0) {
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UART0_IR_EN(0);
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+#if ENABLE_RX_DMA==0
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+ nvic_irq_disable(USART0_IRQn);
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+#endif
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}else {
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UART1_IR_EN(0);
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+#if ENABLE_RX_DMA==0
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+ nvic_irq_disable(USART1_IRQn);
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+#endif
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}
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}
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@@ -388,7 +451,7 @@ void shark_uart_init(uart_enum_t uart_no)
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uart->tx_length = 0;
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uart->uart_com = (uart_no == SHARK_UART0)?SHARK_UART0_com:SHARK_UART1_com;
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- circle_buffer_init(&uart->rx_queue, shark_uart_rx_cache, SHARK_UART_TX_MEM_SIZE);
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+ circle_buffer_init(&uart->rx_queue, rx_cache_addr(uart_no), SHARK_UART_RX_MEM_SIZE);
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byte_queue_init(&uart->tx_queue,tx_cache_addr(uart_no), SHARK_UART_TX_MEM_SIZE);
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uart->rx_dma_ch = (uart_no == SHARK_UART0)?SHARK_UART0_rx_dma_ch:SHARK_UART1_rx_dma_ch;
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@@ -396,7 +459,9 @@ void shark_uart_init(uart_enum_t uart_no)
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shark_uart_pin_init(uart);
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shark_uart_device_init(uart);
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+#if ENABLE_RX_DMA==1
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shark_uart_rx_dma_init(uart);
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+#endif
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shark_uart_tx_dma_init(uart);
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usart_enable(uart->uart_com);
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@@ -406,13 +471,39 @@ void shark_uart_init(uart_enum_t uart_no)
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}
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if (uart_no == SHARK_UART0) {
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UART0_IR_EN(1);
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+#if ENABLE_RX_DMA==0
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+ nvic_irq_enable(USART0_IRQn, 3, 0);
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+#endif
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}else {
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UART1_IR_EN(1);
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+#if ENABLE_RX_DMA==0
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+ nvic_irq_enable(USART1_IRQn, 3, 0);
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+#endif
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}
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_rx_time = shark_get_mseconds();
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uart->uart_no_data = false;
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}
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+#if ENABLE_RX_DMA==0
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+void USART0_IRQHandler(void){
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+ if(usart_flag_get(USART0, USART_FLAG_RBNE) == SET){
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+ shark_uart_t *uart = _shark_uart + SHARK_UART0;
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+ uart_irq_times[0] ++;
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+ u8 c = usart_data_receive(USART0);
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+ circle_put_one_data(&uart->rx_queue, c);
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+ }
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+}
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+
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+void USART1_IRQHandler(void){
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+ if(usart_flag_get(USART1, USART_FLAG_RBNE) == SET){
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+ shark_uart_t *uart = _shark_uart + SHARK_UART1;
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+ uart_irq_times[1] ++;
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+ u8 c = usart_data_receive(USART1);
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+ circle_put_one_data(&uart->rx_queue, c);
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+ }
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+}
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+#endif
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+
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static void shark_uart_write_byte_esc(shark_uart_t *uart, u8 value)
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{
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switch (value) {
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