add librarys

Signed-off-by: FuangCao <cavan.cao@foxmail.com>

Application/app/main.c

@@ -1,3 +1,13 @@
-int main(void){
-    return 0;
+#include "shark_task.h"
+#include "uart.h"
+
+const char iap_board_name[] __attribute__((at(0x08002800))) = "SP700";
+const char iap_fw_version[] __attribute__((at(0x08002A00))) = "1.0";
+const char iap_fw_name[] __attribute__((at(0x08002C00))) = "App";
+
+int main(void)
+{
+	shark_uart_init();
+	shark_task_run();
+	return 0;
 }

Application/bsp/shark_bsp.h

@@ -0,0 +1,17 @@
+#pragma once
+
+#define SHARK_BOARD_SP600	1
+#define SHARK_BOARD_SP700	2
+
+#define true				TRUE
+#define false				FALSE
+
+#ifdef CONFIG_BOARD_SP600
+#include "gd32f3x0.h"
+#define CONFIG_BOARD_TYPE	SHARK_BOARD_SP600
+#elif defined(CONFIG_BOARD_SP700)
+#include "gd32f3x0.h"
+#define CONFIG_BOARD_TYPE	SHARK_BOARD_SP700
+#else
+#error "Invalid Board"
+#endif

Application/bsp/uart.c

@@ -0,0 +1,355 @@
+#include "uart.h"
+#include "shark_bsp.h"
+#include "shark_libs.h"
+
+#define SHARK_UART_BAUDRATE				38400
+
+#define SHARK_UART0_com					USART0
+#define SHARK_UART0_tx_port				GPIOA
+#define SHARK_UART0_tx_pin				GPIO_PIN_9
+#define SHARK_UART0_rx_port				GPIOA
+#define SHARK_UART0_rx_pin				GPIO_PIN_10
+#define SHARK_UART0_irq					USART0_IRQn
+#define SHARK_UART0_clk					RCU_USART0
+#define SHARK_UART0_tx_gpio_clk			RCU_GPIOA
+#define SHARK_UART0_rx_gpio_clk			RCU_GPIOA
+#define SHARK_UART0_tx_dma				DMA
+#define SHARK_UART0_tx_dma_ch			DMA_CH1
+#define SHARK_UART0_tx_dma_clk			RCU_DMA
+#define SHARK_UART0_rx_dma				DMA
+#define SHARK_UART0_rx_dma_ch			DMA_CH2
+#define SHARK_UART0_rx_dma_clk			RCU_DMA
+
+#define SHARK_UART1_com					USART1
+#define SHARK_UART1_tx_port				GPIOA
+#define SHARK_UART1_tx_pin				GPIO_PIN_2
+#define SHARK_UART1_rx_port				GPIOA
+#define SHARK_UART1_rx_pin				GPIO_PIN_3
+#define SHARK_UART1_irq					USART1_IRQn
+#define SHARK_UART1_clk					RCU_USART1
+#define SHARK_UART1_tx_gpio_clk			RCU_GPIOA
+#define SHARK_UART1_rx_gpio_clk			RCU_GPIOA
+#define SHARK_UART1_tx_dma				DMA
+#define SHARK_UART1_tx_dma_ch			DMA_CH3
+#define SHARK_UART1_tx_dma_clk			RCU_DMA
+#define SHARK_UART1_rx_dma				DMA
+#define SHARK_UART1_rx_dma_ch			DMA_CH4
+#define SHARK_UART1_rx_dma_clk			RCU_DMA
+
+#define SHARK_UART_com					SHARK_UART0_com
+#define SHARK_UART_tx_port				SHARK_UART0_tx_port
+#define SHARK_UART_tx_pin				SHARK_UART0_tx_pin
+#define SHARK_UART_rx_port				SHARK_UART0_rx_port
+#define SHARK_UART_rx_pin				SHARK_UART0_rx_pin
+#define SHARK_UART_irq					SHARK_UART0_irq
+#define SHARK_UART_clk					SHARK_UART0_clk
+#define SHARK_UART_tx_gpio_clk			SHARK_UART0_tx_gpio_clk
+#define SHARK_UART_rx_gpio_clk			SHARK_UART0_rx_gpio_clk
+// #define SHARK_UART_tx_dma				SHARK_UART0_tx_dma
+#define SHARK_UART_tx_dma_ch			SHARK_UART0_tx_dma_ch
+#define SHARK_UART_tx_dma_clk			SHARK_UART0_tx_dma_clk
+// #define SHARK_UART_rx_dma				SHARK_UART0_rx_dma
+#define SHARK_UART_rx_dma_ch			SHARK_UART0_rx_dma_ch
+#define SHARK_UART_rx_dma_clk			SHARK_UART0_rx_dma_clk
+
+// ================================================================================
+
+#define SHARK_UART_CACHE_SIZE \
+	(SHARK_UART_TX_MEM_SIZE + SHARK_UART_RX_MEM_SIZE)
+
+#define SHARK_UART_DMA_ADDR(index) \
+	(SHARK_UART_com + 0x04)
+
+#define SHARK_UART_DMA_CHCTL_TX() \
+	DMA_CHCTL(SHARK_UART_tx_dma_ch)
+
+#define SHARK_UART_DMA_CHCNT_TX() \
+	DMA_CHCNT(SHARK_UART_tx_dma_ch)
+
+#define SHARK_UART_DMA_CHMADDR_TX() \
+	DMA_CHMADDR(SHARK_UART_tx_dma_ch)
+
+#define SHARK_UART_DMA_CHCTL_RX() \
+	DMA_CHCTL(SHARK_UART_rx_dma_ch)
+
+#define SHARK_UART_DMA_CHCNT_RX() \
+	DMA_CHCNT(SHARK_UART_rx_dma_ch)
+
+#define SHARK_UART_DMA_CHMADDR_RX() \
+	DMA_CHMADDR(SHARK_UART_rx_dma_ch)
+
+// ================================================================================
+
+static u8 shark_uart_tx_cache[SHARK_UART_TX_MEM_SIZE];
+static u8 shark_uart_rx_cache[SHARK_UART_RX_MEM_SIZE];
+
+static u16 shark_uart_tx_length;
+static u16 shark_uart_tx_crc16;
+
+static u16 shark_uart_rx_index;
+static byte_queue_t shark_uart_tx_queue;
+
+// ================================================================================
+
+static bool shark_uart_on_frame_received(u8 *buff, u16 length)
+{
+	u16 crc0 = shark_decode_u16(buff + length);
+	u16 crc1 = shark_crc16_check(buff, length);
+
+	if (crc0 != crc1) {
+		return false;
+	}
+
+	return true;
+}
+
+static void shark_uart_on_data_received(u8 *buff, u16 size)
+{
+	static bool escape = false;
+	static u8 length = 0xFF;
+	static u8 frame[16];
+	u8 *buff_end;
+
+	for (buff_end = buff + size; buff < buff_end; buff++) {
+		u8 value = *buff;
+
+		switch (value) {
+		case CH_START:
+			length = 0;
+			escape = false;
+			break;
+
+		case CH_END:
+			if (length > 2 && length != 0xFF) {
+				shark_uart_on_frame_received(frame, length - 2);
+			}
+
+			length = 0xFF;
+			break;
+
+		case CH_ESC:
+			escape = true;
+			break;
+
+		default:
+			if (escape) {
+				escape = false;
+
+				switch (value) {
+				case CH_ESC_START:
+					value = CH_START;
+					break;
+
+				case CH_ESC_END:
+					value = CH_END;
+					break;
+
+				case CH_ESC_ESC:
+					value = CH_ESC;
+					break;
+
+				default:
+					length = 0xFF;
+				}
+			}
+
+			if (length < sizeof(frame)) {
+				frame[length] = value;
+				length++;
+			} else {
+				length = 0xFF;
+			}
+		}
+	}
+}
+
+static void shark_uart_dma_tx(void)
+{
+	u32 value = SHARK_UART_DMA_CHCTL_TX();
+
+	if (value & DMA_CHXCTL_CHEN) {
+		if (SET != dma_flag_get(SHARK_UART_tx_dma_ch, DMA_FLAG_FTF)) {
+			return;
+		}
+
+		byte_queue_skip(&shark_uart_tx_queue, shark_uart_tx_length);
+		SHARK_UART_DMA_CHCTL_TX() = value & (~DMA_CHXCTL_CHEN);
+	}
+
+	shark_uart_tx_length = byte_queue_peek(&shark_uart_tx_queue);
+	if (shark_uart_tx_length > 0) {
+		SHARK_UART_DMA_CHCNT_TX() = shark_uart_tx_length;
+		SHARK_UART_DMA_CHMADDR_TX() = (u32) byte_queue_head(&shark_uart_tx_queue);
+
+		dma_flag_clear(SHARK_UART_tx_dma_ch, DMA_FLAG_FTF);
+		SHARK_UART_DMA_CHCTL_TX() = value | DMA_CHXCTL_CHEN;
+	}
+}
+
+static void shark_uart_dma_rx(void)
+{
+	u16 index = shark_uart_rx_index;
+
+	shark_uart_rx_index = sizeof(shark_uart_rx_cache) - SHARK_UART_DMA_CHCNT_RX();
+
+	if (shark_uart_rx_index < index) {
+		shark_uart_on_data_received(shark_uart_rx_cache + index, sizeof(shark_uart_rx_cache) - index);
+		shark_uart_on_data_received(shark_uart_rx_cache, shark_uart_rx_index);
+	} else {
+		shark_uart_on_data_received(shark_uart_rx_cache + index, shark_uart_rx_index - index);
+	}
+}
+
+void shark_uart_write(const u8 *buff, u16 size)
+{
+	while (size > 0) {
+		u16 length = byte_queue_write(&shark_uart_tx_queue, buff, size);
+
+		if (length == size) {
+			break;
+		}
+
+		shark_uart_dma_tx();
+		buff += length;
+		size -= length;
+	}
+}
+
+void shark_uart_write_byte(u8 value)
+{
+	shark_uart_write(&value, 1);
+}
+
+void shark_uart_dma_init(dma_channel_enum channelx, u8 direction, u32 periph_addr, void *memory_addr, u16 length)
+{
+	u32 ctl;
+
+	DMA_CHCTL(channelx) &= ~DMA_CHXCTL_CHEN;
+
+	/* configure peripheral base address */
+	DMA_CHPADDR(channelx) = periph_addr;
+
+	/* configure memory base address */
+	DMA_CHMADDR(channelx) = (u32) memory_addr;
+
+	/* configure the number of remaining data to be transferred */
+	DMA_CHCNT(channelx) = length;
+
+	/* configure peripheral transfer width,memory transfer width and priority */
+	ctl = DMA_CHCTL(channelx);
+	ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO);
+	ctl |= (DMA_PERIPHERAL_WIDTH_8BIT | DMA_MEMORY_WIDTH_8BIT | DMA_PRIORITY_ULTRA_HIGH);
+	DMA_CHCTL(channelx) = ctl;
+
+	/* configure peripheral increasing mode */
+	DMA_CHCTL(channelx) &= ~DMA_CHXCTL_PNAGA;
+
+	/* configure memory increasing mode */
+	DMA_CHCTL(channelx) |= DMA_CHXCTL_MNAGA;
+
+	/* configure the direction of data transfer */
+	if (DMA_PERIPHERAL_TO_MEMORY == direction) {
+		DMA_CHCTL(channelx) &= ~DMA_CHXCTL_DIR;
+	} else {
+		DMA_CHCTL(channelx) |= DMA_CHXCTL_DIR;
+	}
+}
+
+
+static u32 shark_uart_handler(void)
+{
+	shark_uart_dma_rx();
+	shark_uart_dma_tx();
+	return 0;
+}
+
+static shark_task_t shark_uart_task = {
+	.handler = shark_uart_handler
+};
+
+void shark_uart_init(void)
+{
+	byte_queue_init(&shark_uart_tx_queue, shark_uart_tx_cache, sizeof(shark_uart_tx_cache));
+
+	rcu_periph_clock_enable(SHARK_UART_clk);
+	rcu_periph_clock_enable(SHARK_UART_rx_gpio_clk);
+	rcu_periph_clock_enable(SHARK_UART_tx_gpio_clk);
+
+	gpio_mode_set(SHARK_UART_tx_port, GPIO_MODE_AF, GPIO_PUPD_NONE, SHARK_UART_tx_pin);
+	gpio_mode_set(SHARK_UART_rx_port, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, SHARK_UART_rx_pin);
+
+	usart_deinit(SHARK_UART_com);
+	usart_baudrate_set(SHARK_UART_com, SHARK_UART_BAUDRATE);
+
+	usart_word_length_set(SHARK_UART_com, USART_WL_8BIT);
+	usart_stop_bit_set(SHARK_UART_com, USART_STB_1BIT);
+	usart_parity_config(SHARK_UART_com, USART_PM_NONE);
+	usart_hardware_flow_rts_config(SHARK_UART_com, USART_RTS_DISABLE);
+	usart_hardware_flow_cts_config(SHARK_UART_com, USART_CTS_DISABLE);
+	usart_receive_config(SHARK_UART_com, USART_RECEIVE_ENABLE);
+	usart_transmit_config(SHARK_UART_com, USART_TRANSMIT_ENABLE);
+
+	rcu_periph_clock_enable(SHARK_UART_tx_dma_clk);
+	shark_uart_dma_init(SHARK_UART_tx_dma_ch, DMA_MEMORY_TO_PERIPHERAL, SHARK_UART_DMA_ADDR(), shark_uart_tx_cache, 0);
+	dma_circulation_disable(SHARK_UART_tx_dma_ch);
+	usart_dma_transmit_config(SHARK_UART_com, USART_DENT_ENABLE);
+
+	rcu_periph_clock_enable(SHARK_UART_rx_dma_clk);
+	shark_uart_dma_init(SHARK_UART_rx_dma_ch, DMA_PERIPHERAL_TO_MEMORY, SHARK_UART_DMA_ADDR(), shark_uart_rx_cache, sizeof(shark_uart_rx_cache));
+	dma_circulation_enable(SHARK_UART_rx_dma_ch);
+	dma_channel_enable(SHARK_UART_rx_dma_ch);
+	usart_dma_receive_config(SHARK_UART_com, USART_DENR_ENABLE);
+
+	usart_enable(SHARK_UART_com);
+
+	shark_task_add(&shark_uart_task);
+}
+
+void shark_uart_write_byte_esc(u8 value)
+{
+	switch (value) {
+	case CH_START:
+		shark_uart_write_byte(CH_ESC);
+		value = CH_ESC_START;
+		break;
+
+	case CH_END:
+		shark_uart_write_byte(CH_ESC);
+		value = CH_ESC_END;
+		break;
+
+	case CH_ESC:
+		shark_uart_write_byte(CH_ESC);
+		value = CH_ESC_ESC;
+		break;
+	}
+
+	shark_uart_write_byte(value);
+}
+
+void shark_uart_write_esc(const u8 *buff, u16 length)
+{
+	const u8 *buff_end;
+
+	for (buff_end = buff + length; buff < buff_end; buff++) {
+		shark_uart_write_byte_esc(*buff);
+	}
+}
+
+void shark_uart_tx_start(void)
+{
+	shark_uart_write_byte(CH_START);
+	shark_uart_tx_crc16 = 0;
+}
+
+void shark_uart_tx_continue(const void *buff, u16 length)
+{
+	shark_uart_write_esc((const u8 *) buff, length);
+	shark_uart_tx_crc16 = shark_crc16_update(shark_uart_tx_crc16, (const u8 *) buff, length);
+}
+
+void shark_uart_tx_end(void)
+{
+	shark_uart_write_esc((u8 *) &shark_uart_tx_crc16, sizeof(shark_uart_tx_crc16));
+	shark_uart_write_byte(CH_END);
+}

Application/bsp/uart.h

@@ -0,0 +1,21 @@
+#pragma once
+
+#include "shark_libs.h"
+#include "byte_queue.h"
+
+#define CH_START						0xF5
+#define CH_END							0xF6
+#define CH_ESC							0xF7
+#define CH_ESC_START					0x05
+#define CH_ESC_END						0x06
+#define CH_ESC_ESC						0x07
+
+#define SHARK_UART_TX_MEM_SIZE			512
+#define SHARK_UART_RX_MEM_SIZE			512
+
+void shark_uart_init(void);
+void shark_uart_tx_start(void);
+void shark_uart_tx_continue(const void *buff, u16 length);
+void shark_uart_tx_end(void);
+bool shark_uart_tx_frame(u32 efid, const void *data);
+bool shark_uart_tx_command(u8 command, const void *args, u16 length);

Application/libs/byte_queue.c

@@ -0,0 +1,174 @@
+#include "byte_queue.h"
+
+static u16 byte_queue_add(const byte_queue_t *queue, u16 value1, u16 value2)
+{
+	return (value1 + value2) % queue->size;
+}
+
+static u16 byte_queue_tail_add(const byte_queue_t *queue, u16 value)
+{
+	return byte_queue_add(queue, queue->tail, value);
+}
+
+static u16 byte_queue_head_add(const byte_queue_t *queue, u16 value)
+{
+	return byte_queue_add(queue, queue->head, value);
+}
+
+u8 *byte_queue_head(byte_queue_t *queue)
+{
+	return queue->buff + queue->head;
+}
+
+bool byte_queue_empty(const byte_queue_t *queue)
+{
+	return (bool) (queue->head == queue->tail);
+}
+
+bool byte_queue_readable(const byte_queue_t *queue)
+{
+	return (bool) (queue->head != queue->tail);
+}
+
+bool byte_queue_full(const byte_queue_t *queue)
+{
+	return (bool) (byte_queue_tail_add(queue, 1) == queue->head);
+}
+
+bool byte_queue_writeable(const byte_queue_t *queue)
+{
+	return (bool) (byte_queue_tail_add(queue, 1) != queue->head);
+}
+
+u16 byte_queue_get_used(const byte_queue_t *queue)
+{
+	if (queue->head <= queue->tail) {
+		return queue->tail - queue->head;
+	}
+
+	return queue->size - (queue->head - queue->tail) - 1;
+}
+
+u16 byte_queue_get_free(const byte_queue_t *queue)
+{
+	if (queue->tail < queue->head) {
+		return queue->head - queue->tail;
+	}
+
+	return queue->size - (queue->tail - queue->head) - 1;
+}
+
+void byte_queue_reset(byte_queue_t *queue)
+{
+	queue->head = queue->tail = 0;
+}
+
+void byte_queue_init(byte_queue_t *queue, u8 *buff, u16 size)
+{
+	queue->buff = buff;
+	queue->size = size;
+	queue->head = queue->tail = 0;
+}
+
+u16 byte_queue_write(byte_queue_t *queue, const u8 *buff, u16 size)
+{
+	const u8 *buff_bak = buff;
+	const u8 *buff_end;
+
+	for (buff_end = buff + size; buff < buff_end; buff++) {
+		u16 tail = byte_queue_tail_add(queue, 1);
+
+		if (tail == queue->head) {
+			return buff - buff_bak;
+		}
+
+		queue->buff[queue->tail] = *buff;
+		queue->tail = tail;
+	}
+
+	return size;
+}
+
+u16 byte_queue_write_byte(byte_queue_t *queue, u8 byte)
+{
+	return byte_queue_write(queue, &byte, 1);
+}
+
+u16 byte_queue_read(byte_queue_t *queue, u8 *buff, u16 size)
+{
+	u8 *buff_bak = buff;
+	u8 *buff_end;
+
+	for (buff_end = buff + size; buff < buff_end; buff++) {
+		if (queue->head == queue->tail) {
+			return buff - buff_bak;
+		}
+
+		*buff = queue->buff[queue->head];
+		queue->head = byte_queue_head_add(queue, 1);
+	}
+
+	return size;
+}
+
+void byte_queue_fill(byte_queue_t *queue, u8 *buff, u16 size)
+{
+	while (size > 0) {
+		u16 length = byte_queue_read(queue, buff, size);
+		size -= length;
+		buff += size;
+	}
+}
+
+void byte_queue_skip(byte_queue_t *queue, u16 length)
+{
+	queue->head = byte_queue_head_add(queue, length);
+}
+
+u16 byte_queue_peek(byte_queue_t *queue)
+{
+	if (queue->tail < queue->head) {
+		return queue->size - queue->head;
+	} else {
+		return queue->tail - queue->head;
+	}
+}
+
+// ================================================================================
+
+void byte_queue_alloc_init(byte_queue_t *queue, u8 *buff, u8 size)
+{
+	queue->buff = buff;
+	queue->size = size;
+	byte_queue_alloc_reset(queue);
+}
+
+void byte_queue_alloc_reset(byte_queue_t *queue)
+{
+	u8 *buff = queue->buff;
+	u8 size = queue->size;
+	u8 index;
+
+	for (index = 0; index < size; index++) {
+		buff[index] = index;
+	}
+
+	queue->tail = size - 1;
+	queue->head = 0;
+}
+
+u8 byte_queue_alloc(byte_queue_t *queue)
+{
+	u8 index;
+
+	if (byte_queue_read(queue, &index, 1) > 0) {
+		return index;
+	}
+
+	return 0xFF;
+}
+
+void byte_queue_free(byte_queue_t *queue, u8 index)
+{
+	byte_queue_write(queue, &index, 1);
+}

Application/libs/byte_queue.h

@@ -0,0 +1,33 @@
+#pragma once
+
+#include "shark_types.h"
+#include "shark_bsp.h"
+
+typedef struct {
+	u8 *buff;
+	u16 size;
+	u16 head;
+	u16 tail;
+} byte_queue_t;
+
+u8 *byte_queue_head(byte_queue_t *queue);
+bool byte_queue_empty(const byte_queue_t *queue);
+bool byte_queue_readable(const byte_queue_t *queue);
+bool byte_queue_full(const byte_queue_t *queue);
+bool byte_queue_writeable(const byte_queue_t *queue);
+u16 byte_queue_get_used(const byte_queue_t *queue);
+u16 byte_queue_get_free(const byte_queue_t *queue);
+
+void byte_queue_reset(byte_queue_t *queue);
+void byte_queue_init(byte_queue_t *queue, u8 *buff, u16 size);
+u16 byte_queue_write(byte_queue_t *queue, const u8 *buff, u16 size);
+u16 byte_queue_write_byte(byte_queue_t *queue, u8 byte);
+u16 byte_queue_read(byte_queue_t *queue, u8 *buff, u16 size);
+void byte_queue_fill(byte_queue_t *queue, u8 *buff, u16 size);
+void byte_queue_skip(byte_queue_t *queue, u16 length);
+u16 byte_queue_peek(byte_queue_t *queue);
+
+void byte_queue_alloc_init(byte_queue_t *queue, u8 *buff, u8 size);
+void byte_queue_alloc_reset(byte_queue_t *queue);
+u8 byte_queue_alloc(byte_queue_t *queue);
+void byte_queue_free(byte_queue_t *queue, u8 index);

Application/libs/shark_libs.h

@@ -0,0 +1,5 @@
+#pragma once
+
+#include "shark_types.h"
+#include "shark_utils.h"
+#include "shark_task.h"

Application/libs/shark_task.c

@@ -0,0 +1,52 @@
+#include "shark_task.h"
+#include "shark_bsp.h"
+
+static u64 shark_mseconds;
+
+void SysTick_Handler(void)
+{
+	shark_mseconds++;
+}
+
+u64 shark_get_mseconds(void)
+{
+	return shark_mseconds;
+}
+
+static u32 shark_task_timer(void)
+{
+	return 1000;
+}
+
+static shark_task_t shark_task_head = {
+	.next = &shark_task_head,
+	.handler = shark_task_timer
+};
+
+void shark_task_add(shark_task_t *task)
+{
+	task->next = shark_task_head.next;
+	shark_task_head.next = task;
+}
+
+void shark_task_run(void)
+{
+	shark_task_t *head = &shark_task_head;
+
+	/* setup systick timer for 1000Hz interrupts */
+	SysTick_Config(SystemCoreClock / 1000);
+	/* configure the systick handler priority */
+	NVIC_SetPriority(SysTick_IRQn, 0x00U);
+
+	while (1) {
+		shark_task_t *next = head->next;
+		u64 time = shark_mseconds;
+
+		if (head->time <= time) {
+			head->time = time + head->handler();
+		}
+
+		head = next;
+		fwdgt_counter_reload();
+	}
+}

Application/libs/shark_task.h

@@ -0,0 +1,20 @@
+#pragma once
+
+#include "shark_types.h"
+
+typedef struct shark_task {
+	u64 time;
+	struct shark_task *next;
+	u32 (*handler)(void);
+} shark_task_t;
+
+typedef struct shark_timer {
+	u64 time;
+	struct shark_timer *prev;
+	struct shark_timer *next;
+	void (*handler)(void);
+} shark_timer_t;
+
+u64 shark_get_mseconds(void);
+void shark_task_add(shark_task_t *task);
+void shark_task_run(void);

Application/libs/shark_types.h

@@ -0,0 +1,30 @@
+#pragma once
+
+#include "stdint.h"
+#include "stdio.h"
+
+#define NELEM(a)	(sizeof(a) / sizeof((a)[0]))
+
+#define U8(value)	((u8) (value))
+#define U16(value)	((u16) (value))
+#define U32(value)	((u32) (value))
+#define U64(value)	((u64) (value))
+
+#define S8(value)	((s8) (value))
+#define S16(value)	((s16) (value))
+#define S32(value)	((s32) (value))
+#define S64(value)	((s64) (value))
+
+typedef uint8_t u8;
+typedef uint16_t u16;
+typedef uint32_t u24;
+typedef uint32_t u32;
+typedef uint64_t u64;
+
+typedef int8_t s8;
+typedef int16_t s16;
+typedef int32_t s24;
+typedef int32_t s32;
+typedef int64_t s64;
+
+typedef enum { shark_false, shark_true } shark_bool;

Application/libs/shark_utils.c

@@ -0,0 +1,85 @@
+#include "shark_utils.h"
+
+const u16 shark_crc16_table[] = {
+	0x0000, 0x1189, 0x2312, 0x329B, 0x4624, 0x57AD, 0x6536, 0x74BF, 0x8C48, 0x9DC1,
+	0xAF5A, 0xBED3, 0xCA6C, 0xDBE5, 0xE97E, 0xF8F7, 0x1081, 0x0108, 0x3393, 0x221A,
+	0x56A5, 0x472C, 0x75B7, 0x643E, 0x9CC9, 0x8D40, 0xBFDB, 0xAE52, 0xDAED, 0xCB64,
+	0xF9FF, 0xE876, 0x2102, 0x308B, 0x0210, 0x1399, 0x6726, 0x76AF, 0x4434, 0x55BD,
+	0xAD4A, 0xBCC3, 0x8E58, 0x9FD1, 0xEB6E, 0xFAE7, 0xC87C, 0xD9F5, 0x3183, 0x200A,
+	0x1291, 0x0318, 0x77A7, 0x662E, 0x54B5, 0x453C, 0xBDCB, 0xAC42, 0x9ED9, 0x8F50,
+	0xFBEF, 0xEA66, 0xD8FD, 0xC974, 0x4204, 0x538D, 0x6116, 0x709F, 0x0420, 0x15A9,
+	0x2732, 0x36BB, 0xCE4C, 0xDFC5, 0xED5E, 0xFCD7, 0x8868, 0x99E1, 0xAB7A, 0xBAF3,
+	0x5285, 0x430C, 0x7197, 0x601E, 0x14A1, 0x0528, 0x37B3, 0x263A, 0xDECD, 0xCF44,
+	0xFDDF, 0xEC56, 0x98E9, 0x8960, 0xBBFB, 0xAA72, 0x6306, 0x728F, 0x4014, 0x519D,
+	0x2522, 0x34AB, 0x0630, 0x17B9, 0xEF4E, 0xFEC7, 0xCC5C, 0xDDD5, 0xA96A, 0xB8E3,
+	0x8A78, 0x9BF1, 0x7387, 0x620E, 0x5095, 0x411C, 0x35A3, 0x242A, 0x16B1, 0x0738,
+	0xFFCF, 0xEE46, 0xDCDD, 0xCD54, 0xB9EB, 0xA862, 0x9AF9, 0x8B70, 0x8408, 0x9581,
+	0xA71A, 0xB693, 0xC22C, 0xD3A5, 0xE13E, 0xF0B7, 0x0840, 0x19C9, 0x2B52, 0x3ADB,
+	0x4E64, 0x5FED, 0x6D76, 0x7CFF, 0x9489, 0x8500, 0xB79B, 0xA612, 0xD2AD, 0xC324,
+	0xF1BF, 0xE036, 0x18C1, 0x0948, 0x3BD3, 0x2A5A, 0x5EE5, 0x4F6C, 0x7DF7, 0x6C7E,
+	0xA50A, 0xB483, 0x8618, 0x9791, 0xE32E, 0xF2A7, 0xC03C, 0xD1B5, 0x2942, 0x38CB,
+	0x0A50, 0x1BD9, 0x6F66, 0x7EEF, 0x4C74, 0x5DFD, 0xB58B, 0xA402, 0x9699, 0x8710,
+	0xF3AF, 0xE226, 0xD0BD, 0xC134, 0x39C3, 0x284A, 0x1AD1, 0x0B58, 0x7FE7, 0x6E6E,
+	0x5CF5, 0x4D7C, 0xC60C, 0xD785, 0xE51E, 0xF497, 0x8028, 0x91A1, 0xA33A, 0xB2B3,
+	0x4A44, 0x5BCD, 0x6956, 0x78DF, 0x0C60, 0x1DE9, 0x2F72, 0x3EFB, 0xD68D, 0xC704,
+	0xF59F, 0xE416, 0x90A9, 0x8120, 0xB3BB, 0xA232, 0x5AC5, 0x4B4C, 0x79D7, 0x685E,
+	0x1CE1, 0x0D68, 0x3FF3, 0x2E7A, 0xE70E, 0xF687, 0xC41C, 0xD595, 0xA12A, 0xB0A3,
+	0x8238, 0x93B1, 0x6B46, 0x7ACF, 0x4854, 0x59DD, 0x2D62, 0x3CEB, 0x0E70, 0x1FF9,
+	0xF78F, 0xE606, 0xD49D, 0xC514, 0xB1AB, 0xA022, 0x92B9, 0x8330, 0x7BC7, 0x6A4E,
+	0x58D5, 0x495C, 0x3DE3, 0x2C6A, 0x1EF1, 0x0F78
+};
+
+u16 shark_crc16_update_byte(u16 crc, u8 value)
+{
+	return shark_crc16_table[(crc ^ value) & 0xFF] ^ (crc >> 8);
+}
+
+u16 shark_crc16_update(u16 crc, const u8 *data, u16 size)
+{
+	const u8 *end;
+
+	for (end = data + size; data < end; data++) {
+		crc = shark_crc16_update_byte(crc, *data);
+	}
+
+	return crc;
+}
+
+u16 shark_crc16_check(const u8 *data, u16 size)
+{
+	return shark_crc16_update(0, data, size);
+}
+
+u16 shark_decode_u16(const u8 *buff)
+{
+	return DECODE_U16(buff);
+}
+
+u32 shark_decode_u24(const u8 *buff)
+{
+	return DECODE_U24(buff);
+}
+
+u32 shark_decode_u32(const u8 *buff)
+{
+	return DECODE_U32(buff);
+}
+
+void shark_encode_u16(u8 *buff, u16 value)
+{
+	buff[0] = value;
+	buff[1] = value >> 8;
+}
+
+void shark_encode_u24(u8 *buff, u32 value)
+{
+	shark_encode_u16(buff, value);
+	buff[2] = value >> 16;
+}
+
+void shark_encode_u32(u8 *buff, u32 value)
+{
+	shark_encode_u24(buff, value);
+	buff[3] = value >> 24;
+}
+

Application/libs/shark_utils.h

@@ -0,0 +1,23 @@
+#pragma once
+
+#include "shark_types.h"
+
+#define DECODE_U16(buff) \
+	(U16(buff[1]) << 8 | buff[0])
+
+#define DECODE_U24(buff) \
+	(U32(buff[2]) << 16 | DECODE_U16(buff))
+
+#define DECODE_U32(buff) \
+	(U32(buff[3]) << 24 | DECODE_U24(buff))
+
+u16 shark_crc16_update_byte(u16 crc, u8 value);
+u16 shark_crc16_update(u16 crc, const u8 *data, u16 size);
+u16 shark_crc16_check(const u8 *data, u16 size);
+u16 shark_decode_u16(const u8 *buff);
+u32 shark_decode_u24(const u8 *buff);
+u32 shark_decode_u32(const u8 *buff);
+void shark_encode_u16(u8 *buff, u16 value);
+void shark_encode_u24(u8 *buff, u32 value);
+void shark_encode_u32(u8 *buff, u32 value);
+

Librarys/CMSIS/GD32F3x0/Source/system_gd32f3x0.c

@@ -192,9 +192,9 @@ void SystemInit (void)
     system_clock_config();
     
 #ifdef VECT_TAB_SRAM
-    nvic_vector_table_set(NVIC_VECTTAB_RAM,VECT_TAB_OFFSET);
+    // nvic_vector_table_set(NVIC_VECTTAB_RAM,VECT_TAB_OFFSET);
 #else
-    nvic_vector_table_set(NVIC_VECTTAB_FLASH,VECT_TAB_OFFSET);
+    // nvic_vector_table_set(NVIC_VECTTAB_FLASH,VECT_TAB_OFFSET);
 #endif
 }
 

Project/BMS.uvoptx

@@ -103,7 +103,7 @@
         <bEvRecOn>1</bEvRecOn>
         <bSchkAxf>0</bSchkAxf>
         <bTchkAxf>0</bTchkAxf>
-        <nTsel>0</nTsel>
+        <nTsel>4</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -114,9 +114,34 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile></tIfile>
-        <pMon>BIN\UL2CM3.DLL</pMon>
+        <pMon>Segger\JL2CM3.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U20080643 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0GD32F3x0.FLM -FS08000000 -FL010000 -FP0($$Device:GD32F330C8$Flash\GD32F3x0.FLM)</Name>
+        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
@@ -130,12 +155,12 @@
       <DebugFlag>
         <trace>0</trace>
         <periodic>1</periodic>
-        <aLwin>0</aLwin>
+        <aLwin>1</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
         <aSer2>0</aSer2>
         <aPa>0</aPa>
-        <viewmode>0</viewmode>
+        <viewmode>1</viewmode>
         <vrSel>0</vrSel>
         <aSym>0</aSym>
         <aTbox>0</aTbox>

Project/BMS.uvprojx

@@ -10,14 +10,14 @@
       <TargetName>GD32F330C8</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
       <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>GD32F330C8</Device>
           <Vendor>GigaDevice</Vendor>
           <PackID>GigaDevice.GD32F3x0_DFP.2.0.0</PackID>
-          <PackURL>http://gd32mcu.com/data/documents/pack/</PackURL>
+          <PackURL>http://gd32mcu.21ic.com/data/documents/yingyongruanjian/</PackURL>
           <Cpu>IRAM(0x20000000,0x02000) IROM(0x08000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
@@ -184,8 +184,6 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
-            <RvdsMve>0</RvdsMve>
-            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -352,7 +350,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <ClangAsOpt>1</ClangAsOpt>
+            <uClangAs>0</uClangAs>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -578,19 +576,4 @@
     <files/>
   </RTE>
 
-  <LayerInfo>
-    <Layers>
-      <Layer>
-        <LayName>&lt;Project Info&gt;</LayName>
-        <LayDesc></LayDesc>
-        <LayUrl></LayUrl>
-        <LayKeys></LayKeys>
-        <LayCat></LayCat>
-        <LayLic></LayLic>
-        <LayTarg>0</LayTarg>
-        <LayPrjMark>1</LayPrjMark>
-      </Layer>
-    </Layers>
-  </LayerInfo>
-
 </Project>

Project/JLinkSettings.ini

@@ -0,0 +1,34 @@
+[BREAKPOINTS]
+ShowInfoWin = 1
+EnableFlashBP = 2
+BPDuringExecution = 0
+[CFI]
+CFISize = 0x00
+CFIAddr = 0x00
+[CPU]
+OverrideMemMap = 0
+AllowSimulation = 1
+ScriptFile=""
+[FLASH]
+CacheExcludeSize = 0x00
+CacheExcludeAddr = 0x00
+MinNumBytesFlashDL = 0
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 1
+Device="Cortex-M4"
+[GENERAL]
+WorkRAMSize = 0x00
+WorkRAMAddr = 0x00
+RAMUsageLimit = 0x00
+[SWO]
+SWOLogFile=""
+[MEM]
+RdOverrideOrMask = 0x00
+RdOverrideAndMask = 0xFFFFFFFF
+RdOverrideAddr = 0xFFFFFFFF
+WrOverrideOrMask = 0x00
+WrOverrideAndMask = 0xFFFFFFFF
+WrOverrideAddr = 0xFFFFFFFF

Project/SP700.uvoptx

@@ -0,0 +1,681 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>GD32F330C8</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\Listings\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>4</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U20080643 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0GD32F3x0.FLM -FS08000000 -FL010000 -FP0($$Device:GD32F330C8$Flash\GD32F3x0.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0GD32F3x0 -FL010000 -FS08000000 -FP0($$Device:GD32F330C8$Flash\GD32F3x0.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
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Project/SP700.uvprojx

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+          <PackID>GigaDevice.GD32F3x0_DFP.2.0.0</PackID>
+          <PackURL>http://gd32mcu.21ic.com/data/documents/yingyongruanjian/</PackURL>
+          <Cpu>IRAM(0x20000000,0x02000) IROM(0x08000000,0x10000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F3x0 -FS08000000 -FL010000 -FP0($$Device:GD32F330C8$Flash\GD32F3x0.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:GD32F330C8$Device\Include\gd32f3x0.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:GD32F330C8$SVD\GD32F3x0.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\Output\</OutputDirectory>
+          <OutputName>BMS</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\Listings\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> -REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> -MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x2000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x10000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8002000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x2000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>1</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>0</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>CONFIG_BOARD_SP700</Define>
+              <Undefine></Undefine>
+              <IncludePath>..\Librarys\CMSIS\5.7.0\Include;..\Librarys\CMSIS\GD32F3x0\Include;..\Librarys\GD32F3x0_Drivers\include;..\Application\app;..\Application\bsp;..\Application\libs</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\app\main.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>BSP</GroupName>
+          <Files>
+            <File>
+              <FileName>gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\bsp\gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>irqs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\bsp\irqs.c</FilePath>
+            </File>
+            <File>
+              <FileName>spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\bsp\spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>cs1180.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\bsp\cs1180.c</FilePath>
+            </File>
+            <File>
+              <FileName>ml5238.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\bsp\ml5238.c</FilePath>
+            </File>
+            <File>
+              <FileName>AT24CXX.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\bsp\AT24CXX.c</FilePath>
+            </File>
+            <File>
+              <FileName>i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\bsp\i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\bsp\uart.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Libs</GroupName>
+          <Files>
+            <File>
+              <FileName>shark_task.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\libs\shark_task.c</FilePath>
+            </File>
+            <File>
+              <FileName>byte_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\libs\byte_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>shark_utils.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Application\libs\shark_utils.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>GD32F30x_Drivers</GroupName>
+          <Files>
+            <File>
+              <FileName>gd32f3x0_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_cec.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_cec.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_cmp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_cmp.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_crc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_crc.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_ctc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_ctc.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_dac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_dac.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_dbg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_dbg.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_fmc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_fmc.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_fwdgt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_fwdgt.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_misc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_misc.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_pmu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_pmu.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_rcu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_rcu.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_syscfg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_syscfg.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_tsi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_tsi.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_usart.c</FilePath>
+            </File>
+            <File>
+              <FileName>gd32f3x0_wwdgt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\GD32F3x0_Drivers\Source\gd32f3x0_wwdgt.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>StartUp</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_gd32f3x0.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\Librarys\CMSIS\GD32F3x0\Source\startup_gd32f3x0.s</FilePath>
+            </File>
+            <File>
+              <FileName>system_gd32f3x0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\CMSIS\GD32F3x0\Source\system_gd32f3x0.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>