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PS100_bootloader.htm

PS100_bootloader.htm 65 KB
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  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [.\bootloader\PS100_bootloader.axf]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image .\bootloader\PS100_bootloader.axf</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060020: Last Updated: Thu Nov 14 17:42:27 2019
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =        228 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. main &rArr; s600_can_poll &rArr; s600_can_process_command &rArr; s600_can_send_response &rArr; s600_can_send_packet &rArr; s600_can_transmit &rArr; byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
    15. 

  15.  <LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
    16. 

  16.  <LI><a href="#[3]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">MemManage_Handler</a><BR>
    17. 

  17.  <LI><a href="#[4]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">BusFault_Handler</a><BR>
    18. 

  18.  <LI><a href="#[5]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">UsageFault_Handler</a><BR>
    19. 

  19.  <LI><a href="#[6]">SVC_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[6]">SVC_Handler</a><BR>
    20. 

  20.  <LI><a href="#[7]">DebugMon_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[7]">DebugMon_Handler</a><BR>
    21. 

  21.  <LI><a href="#[8]">PendSV_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[8]">PendSV_Handler</a><BR>
    22. 

  22.  <LI><a href="#[1c]">ADC0_1_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC0_1_IRQHandler</a><BR>
    23. 

  23. </UL>
    24. 

  24. <P>
    25. 

  25. <H3>
    26. 

  26. Function Pointers
    27. 

  27. </H3><UL>
    28. 

  28.  <LI><a href="#[1c]">ADC0_1_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    29. 

  29.  <LI><a href="#[4]">BusFault_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    30. 

  30.  <LI><a href="#[20]">CAN0_EWMC_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    31. 

  31.  <LI><a href="#[1f]">CAN0_RX1_IRQHandler</a> from s600_can.o(i.CAN0_RX1_IRQHandler) referenced from startup_gd32f10x_md.o(RESET)
    32. 

  32.  <LI><a href="#[15]">DMA0_Channel0_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    33. 

  33.  <LI><a href="#[16]">DMA0_Channel1_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    34. 

  34.  <LI><a href="#[17]">DMA0_Channel2_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    35. 

  35.  <LI><a href="#[18]">DMA0_Channel3_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    36. 

  36.  <LI><a href="#[19]">DMA0_Channel4_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    37. 

  37.  <LI><a href="#[1a]">DMA0_Channel5_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    38. 

  38.  <LI><a href="#[1b]">DMA0_Channel6_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    39. 

  39.  <LI><a href="#[7]">DebugMon_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    40. 

  40.  <LI><a href="#[35]">EXMC_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    41. 

  41.  <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    42. 

  42.  <LI><a href="#[32]">EXTI10_15_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    43. 

  43.  <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    44. 

  44.  <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    45. 

  45.  <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    46. 

  46.  <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    47. 

  47.  <LI><a href="#[21]">EXTI5_9_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    48. 

  48.  <LI><a href="#[e]">FMC_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    49. 

  49.  <LI><a href="#[2]">HardFault_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    50. 

  50.  <LI><a href="#[2a]">I2C0_ER_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    51. 

  51.  <LI><a href="#[29]">I2C0_EV_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    52. 

  52.  <LI><a href="#[2c]">I2C1_ER_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    53. 

  53.  <LI><a href="#[2b]">I2C1_EV_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    54. 

  54.  <LI><a href="#[b]">LVD_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    55. 

  55.  <LI><a href="#[3]">MemManage_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    56. 

  56.  <LI><a href="#[1]">NMI_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    57. 

  57.  <LI><a href="#[8]">PendSV_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    58. 

  58.  <LI><a href="#[f]">RCU_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    59. 

  59.  <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    60. 

  60.  <LI><a href="#[d]">RTC_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    61. 

  61.  <LI><a href="#[0]">Reset_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    62. 

  62.  <LI><a href="#[2d]">SPI0_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    63. 

  63.  <LI><a href="#[2e]">SPI1_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    64. 

  64.  <LI><a href="#[6]">SVC_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    65. 

  65.  <LI><a href="#[9]">SysTick_Handler</a> from main.o(i.SysTick_Handler) referenced from startup_gd32f10x_md.o(RESET)
    66. 

  66.  <LI><a href="#[37]">SystemInit</a> from system_gd32f10x.o(i.SystemInit) referenced from startup_gd32f10x_md.o(.text)
    67. 

  67.  <LI><a href="#[c]">TAMPER_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    68. 

  68.  <LI><a href="#[22]">TIMER0_BRK_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    69. 

  69.  <LI><a href="#[25]">TIMER0_Channel_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    70. 

  70.  <LI><a href="#[24]">TIMER0_TRG_CMT_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    71. 

  71.  <LI><a href="#[23]">TIMER0_UP_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    72. 

  72.  <LI><a href="#[26]">TIMER1_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    73. 

  73.  <LI><a href="#[27]">TIMER2_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    74. 

  74.  <LI><a href="#[28]">TIMER3_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    75. 

  75.  <LI><a href="#[2f]">USART0_IRQHandler</a> from bl_drv_usart.o(i.USART0_IRQHandler) referenced from startup_gd32f10x_md.o(RESET)
    76. 

  76.  <LI><a href="#[30]">USART1_IRQHandler</a> from bl_drv_usart_2.o(i.USART1_IRQHandler) referenced from startup_gd32f10x_md.o(RESET)
    77. 

  77.  <LI><a href="#[31]">USART2_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    78. 

  78.  <LI><a href="#[1d]">USBD_HP_CAN0_TX_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    79. 

  79.  <LI><a href="#[1e]">USBD_LP_CAN0_RX0_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    80. 

  80.  <LI><a href="#[34]">USBD_WKUP_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    81. 

  81.  <LI><a href="#[5]">UsageFault_Handler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    82. 

  82.  <LI><a href="#[a]">WWDGT_IRQHandler</a> from startup_gd32f10x_md.o(.text) referenced from startup_gd32f10x_md.o(RESET)
    83. 

  83.  <LI><a href="#[38]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_gd32f10x_md.o(.text)
    84. 

  84.  <LI><a href="#[36]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
    85. 

  85. </UL>
    86. 

  86. <P>
    87. 

  87. <H3>
    88. 

  88. Global Symbols
    89. 

  89. </H3>
    90. 

  90. <P><STRONG><a name="[38]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    91. 

  91. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(.text)
    92. 

  92. </UL>
    93. 

  93. <P><STRONG><a name="[95]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
    94. 

  94. 

  95. <P><STRONG><a name="[39]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    96. 

  96. <BR><BR>[Calls]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    97. 

  97. </UL>
    98. 

  98. 

  99. <P><STRONG><a name="[3b]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    100. 

  100. <BR><BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    101. 

  101. </UL>
    102. 

  102. 

  103. <P><STRONG><a name="[96]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
    104. 

  104. 

  105. <P><STRONG><a name="[97]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
    106. 

  106. 

  107. <P><STRONG><a name="[98]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
    108. 

  108. 

  109. <P><STRONG><a name="[99]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
    110. 

  110. 

  111. <P><STRONG><a name="[9a]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
    112. 

  112. 

  113. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    114. 

  114. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    115. 

  115. </UL>
    116. 

  116. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    117. 

  117. <BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
    118. 

  118. </UL>
    119. 

  119. <BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
    120. 

  120. </UL>
    121. 

  121. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    122. 

  122. </UL>
    123. 

  123. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    124. 

  124. <BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
    125. 

  125. </UL>
    126. 

  126. <BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
    127. 

  127. </UL>
    128. 

  128. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    129. 

  129. </UL>
    130. 

  130. <P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    131. 

  131. <BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
    132. 

  132. </UL>
    133. 

  133. <BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
    134. 

  134. </UL>
    135. 

  135. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    136. 

  136. </UL>
    137. 

  137. <P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    138. 

  138. <BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
    139. 

  139. </UL>
    140. 

  140. <BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
    141. 

  141. </UL>
    142. 

  142. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    143. 

  143. </UL>
    144. 

  144. <P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    145. 

  145. <BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
    146. 

  146. </UL>
    147. 

  147. <BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
    148. 

  148. </UL>
    149. 

  149. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    150. 

  150. </UL>
    151. 

  151. <P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    152. 

  152. <BR><BR>[Calls]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
    153. 

  153. </UL>
    154. 

  154. <BR>[Called By]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
    155. 

  155. </UL>
    156. 

  156. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    157. 

  157. </UL>
    158. 

  158. <P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    159. 

  159. <BR><BR>[Calls]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
    160. 

  160. </UL>
    161. 

  161. <BR>[Called By]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
    162. 

  162. </UL>
    163. 

  163. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    164. 

  164. </UL>
    165. 

  165. <P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    166. 

  166. <BR><BR>[Calls]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
    167. 

  167. </UL>
    168. 

  168. <BR>[Called By]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
    169. 

  169. </UL>
    170. 

  170. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    171. 

  171. </UL>
    172. 

  172. <P><STRONG><a name="[1c]"></a>ADC0_1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    173. 

  173. <BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
    174. 

  174. </UL>
    175. 

  175. <BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
    176. 

  176. </UL>
    177. 

  177. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    178. 

  178. </UL>
    179. 

  179. <P><STRONG><a name="[20]"></a>CAN0_EWMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    180. 

  180. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    181. 

  181. </UL>
    182. 

  182. <P><STRONG><a name="[15]"></a>DMA0_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    183. 

  183. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    184. 

  184. </UL>
    185. 

  185. <P><STRONG><a name="[16]"></a>DMA0_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    186. 

  186. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    187. 

  187. </UL>
    188. 

  188. <P><STRONG><a name="[17]"></a>DMA0_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    189. 

  189. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    190. 

  190. </UL>
    191. 

  191. <P><STRONG><a name="[18]"></a>DMA0_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    192. 

  192. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    193. 

  193. </UL>
    194. 

  194. <P><STRONG><a name="[19]"></a>DMA0_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    195. 

  195. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    196. 

  196. </UL>
    197. 

  197. <P><STRONG><a name="[1a]"></a>DMA0_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    198. 

  198. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    199. 

  199. </UL>
    200. 

  200. <P><STRONG><a name="[1b]"></a>DMA0_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    201. 

  201. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    202. 

  202. </UL>
    203. 

  203. <P><STRONG><a name="[35]"></a>EXMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    204. 

  204. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    205. 

  205. </UL>
    206. 

  206. <P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    207. 

  207. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    208. 

  208. </UL>
    209. 

  209. <P><STRONG><a name="[32]"></a>EXTI10_15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    210. 

  210. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    211. 

  211. </UL>
    212. 

  212. <P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    213. 

  213. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    214. 

  214. </UL>
    215. 

  215. <P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    216. 

  216. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    217. 

  217. </UL>
    218. 

  218. <P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    219. 

  219. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    220. 

  220. </UL>
    221. 

  221. <P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    222. 

  222. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    223. 

  223. </UL>
    224. 

  224. <P><STRONG><a name="[21]"></a>EXTI5_9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    225. 

  225. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    226. 

  226. </UL>
    227. 

  227. <P><STRONG><a name="[e]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    228. 

  228. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    229. 

  229. </UL>
    230. 

  230. <P><STRONG><a name="[2a]"></a>I2C0_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    231. 

  231. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    232. 

  232. </UL>
    233. 

  233. <P><STRONG><a name="[29]"></a>I2C0_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    234. 

  234. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    235. 

  235. </UL>
    236. 

  236. <P><STRONG><a name="[2c]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    237. 

  237. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    238. 

  238. </UL>
    239. 

  239. <P><STRONG><a name="[2b]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    240. 

  240. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    241. 

  241. </UL>
    242. 

  242. <P><STRONG><a name="[b]"></a>LVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    243. 

  243. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    244. 

  244. </UL>
    245. 

  245. <P><STRONG><a name="[f]"></a>RCU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    246. 

  246. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    247. 

  247. </UL>
    248. 

  248. <P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    249. 

  249. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    250. 

  250. </UL>
    251. 

  251. <P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    252. 

  252. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    253. 

  253. </UL>
    254. 

  254. <P><STRONG><a name="[2d]"></a>SPI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    255. 

  255. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    256. 

  256. </UL>
    257. 

  257. <P><STRONG><a name="[2e]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    258. 

  258. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    259. 

  259. </UL>
    260. 

  260. <P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    261. 

  261. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    262. 

  262. </UL>
    263. 

  263. <P><STRONG><a name="[22]"></a>TIMER0_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    264. 

  264. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    265. 

  265. </UL>
    266. 

  266. <P><STRONG><a name="[25]"></a>TIMER0_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    267. 

  267. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    268. 

  268. </UL>
    269. 

  269. <P><STRONG><a name="[24]"></a>TIMER0_TRG_CMT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    270. 

  270. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    271. 

  271. </UL>
    272. 

  272. <P><STRONG><a name="[23]"></a>TIMER0_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    273. 

  273. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    274. 

  274. </UL>
    275. 

  275. <P><STRONG><a name="[26]"></a>TIMER1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    276. 

  276. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    277. 

  277. </UL>
    278. 

  278. <P><STRONG><a name="[27]"></a>TIMER2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    279. 

  279. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    280. 

  280. </UL>
    281. 

  281. <P><STRONG><a name="[28]"></a>TIMER3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    282. 

  282. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    283. 

  283. </UL>
    284. 

  284. <P><STRONG><a name="[31]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    285. 

  285. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    286. 

  286. </UL>
    287. 

  287. <P><STRONG><a name="[1d]"></a>USBD_HP_CAN0_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    288. 

  288. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    289. 

  289. </UL>
    290. 

  290. <P><STRONG><a name="[1e]"></a>USBD_LP_CAN0_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    291. 

  291. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    292. 

  292. </UL>
    293. 

  293. <P><STRONG><a name="[34]"></a>USBD_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    294. 

  294. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    295. 

  295. </UL>
    296. 

  296. <P><STRONG><a name="[a]"></a>WWDGT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_md.o(.text))
    297. 

  297. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    298. 

  298. </UL>
    299. 

  299. <P><STRONG><a name="[3e]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text))
    300. 

  300. <BR><BR>[Called By]<UL><LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Data_RS485
    301. 

  301. <LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Data_2_RS485
    302. 

  302. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write
    303. 

  303. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_packet
    304. 

  304. </UL>
    305. 

  305. 

  306. <P><STRONG><a name="[9b]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
    307. 

  307. 

  308. <P><STRONG><a name="[9c]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
    309. 

  309. 

  310. <P><STRONG><a name="[8a]"></a>strcmp</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, strcmp.o(.text))
    311. 

  311. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = strcmp
    312. 

  312. </UL>
    313. 

  313. <BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    314. 

  314. </UL>
    315. 

  315. 

  316. <P><STRONG><a name="[3a]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
    317. 

  317. <BR><BR>[Calls]<UL><LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
    318. 

  318. </UL>
    319. 

  319. <BR>[Called By]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
    320. 

  320. </UL>
    321. 

  321. 

  322. <P><STRONG><a name="[9d]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
    323. 

  323. 

  324. <P><STRONG><a name="[1f]"></a>CAN0_RX1_IRQHandler</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, s600_can.o(i.CAN0_RX1_IRQHandler))
    325. 

  325. <BR><BR>[Stack]<UL><LI>Max Depth = 140<LI>Call Chain = CAN0_RX1_IRQHandler &rArr; s600_can_rx_packet &rArr; s600_can_rx_front_get &rArr; byte_queue_alloc &rArr; byte_queue_read &rArr; byte_queue_head_add &rArr; byte_queue_add
    326. 

  326. </UL>
    327. 

  327. <BR>[Calls]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_rx_packet
    328. 

  328. </UL>
    329. 

  329. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    330. 

  330. </UL>
    331. 

  331. <P><STRONG><a name="[45]"></a>Enable_Uart1_Timer</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, bl_drv_usart.o(i.Enable_Uart1_Timer))
    332. 

  332. <BR><BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    333. 

  333. </UL>
    334. 

  334. 

  335. <P><STRONG><a name="[48]"></a>Enable_Uart2_Timer</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, bl_drv_usart_2.o(i.Enable_Uart2_Timer))
    336. 

  336. <BR><BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
    337. 

  337. </UL>
    338. 

  338. 

  339. <P><STRONG><a name="[3d]"></a>Send_Data_2_RS485</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, bl_drv_usart_2.o(i.Send_Data_2_RS485))
    340. 

  340. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = Send_Data_2_RS485 &rArr; usart_interrupt_enable
    341. 

  341. </UL>
    342. 

  342. <BR>[Calls]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
    343. 

  343. <LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    344. 

  344. </UL>
    345. 

  345. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    346. 

  346. </UL>
    347. 

  347. 

  348. <P><STRONG><a name="[40]"></a>Send_Data_RS485</STRONG> (Thumb, 62 bytes, Stack size 16 bytes, bl_drv_usart.o(i.Send_Data_RS485))
    349. 

  349. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = Send_Data_RS485 &rArr; usart_interrupt_flag_get
    350. 

  350. </UL>
    351. 

  351. <BR>[Calls]<UL><LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_flag_get
    352. 

  352. <LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
    353. 

  353. <LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    354. 

  354. </UL>
    355. 

  355. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    356. 

  356. </UL>
    357. 

  357. 

  358. <P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 78 bytes, Stack size 0 bytes, main.o(i.SysTick_Handler))
    359. 

  359. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    360. 

  360. </UL>
    361. 

  361. <P><STRONG><a name="[37]"></a>SystemInit</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, system_gd32f10x.o(i.SystemInit))
    362. 

  362. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SystemInit &rArr; system_clock_config
    363. 

  363. </UL>
    364. 

  364. <BR>[Calls]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
    365. 

  365. </UL>
    366. 

  366. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(.text)
    367. 

  367. </UL>
    368. 

  368. <P><STRONG><a name="[2f]"></a>USART0_IRQHandler</STRONG> (Thumb, 126 bytes, Stack size 8 bytes, bl_drv_usart.o(i.USART0_IRQHandler))
    369. 

  369. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = USART0_IRQHandler &rArr; usart_interrupt_disable
    370. 

  370. </UL>
    371. 

  371. <BR>[Calls]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_disable
    372. 

  372. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
    373. 

  373. <LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
    374. 

  374. <LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_receive
    375. 

  375. <LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Enable_Uart1_Timer
    376. 

  376. </UL>
    377. 

  377. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    378. 

  378. </UL>
    379. 

  379. <P><STRONG><a name="[30]"></a>USART1_IRQHandler</STRONG> (Thumb, 126 bytes, Stack size 8 bytes, bl_drv_usart_2.o(i.USART1_IRQHandler))
    380. 

  380. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = USART1_IRQHandler &rArr; usart_interrupt_disable
    381. 

  381. </UL>
    382. 

  382. <BR>[Calls]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_disable
    383. 

  383. <LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
    384. 

  384. <LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
    385. 

  385. <LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_receive
    386. 

  386. <LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Enable_Uart2_Timer
    387. 

  387. </UL>
    388. 

  388. <BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_md.o(RESET)
    389. 

  389. </UL>
    390. 

  390. <P><STRONG><a name="[49]"></a>Usart1_Initial</STRONG> (Thumb, 152 bytes, Stack size 8 bytes, bl_drv_usart.o(i.Usart1_Initial))
    391. 

  391. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = Usart1_Initial &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
    392. 

  392. </UL>
    393. 

  393. <BR>[Calls]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    394. 

  394. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
    395. 

  395. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    396. 

  396. <LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    397. 

  397. <LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_word_length_set
    398. 

  398. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_transmit_config
    399. 

  399. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_stop_bit_set
    400. 

  400. <LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_receive_config
    401. 

  401. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_parity_config
    402. 

  402. <LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_rts_config
    403. 

  403. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_cts_config
    404. 

  404. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_enable
    405. 

  405. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    406. 

  406. <LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
    407. 

  407. </UL>
    408. 

  408. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    409. 

  409. </UL>
    410. 

  410. 

  411. <P><STRONG><a name="[58]"></a>Usart2_Initial</STRONG> (Thumb, 148 bytes, Stack size 8 bytes, bl_drv_usart_2.o(i.Usart2_Initial))
    412. 

  412. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = Usart2_Initial &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
    413. 

  413. </UL>
    414. 

  414. <BR>[Calls]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    415. 

  415. <LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
    416. 

  416. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    417. 

  417. <LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    418. 

  418. <LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_word_length_set
    419. 

  419. <LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_transmit_config
    420. 

  420. <LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_stop_bit_set
    421. 

  421. <LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_receive_config
    422. 

  422. <LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_parity_config
    423. 

  423. <LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_rts_config
    424. 

  424. <LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_cts_config
    425. 

  425. <LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_enable
    426. 

  426. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    427. 

  427. <LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
    428. 

  428. </UL>
    429. 

  429. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    430. 

  430. </UL>
    431. 

  431. 

  432. <P><STRONG><a name="[9e]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
    433. 

  433. 

  434. <P><STRONG><a name="[9f]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
    435. 

  435. 

  436. <P><STRONG><a name="[a0]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
    437. 

  437. 

  438. <P><STRONG><a name="[59]"></a>byte_queue_alloc</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, byte_queue.o(i.byte_queue_alloc))
    439. 

  439. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = byte_queue_alloc &rArr; byte_queue_read &rArr; byte_queue_head_add &rArr; byte_queue_add
    440. 

  440. </UL>
    441. 

  441. <BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_read
    442. 

  442. </UL>
    443. 

  443. <BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_packet
    444. 

  444. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_rx_front_get
    445. 

  445. </UL>
    446. 

  446. 

  447. <P><STRONG><a name="[5b]"></a>byte_queue_alloc_init</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, byte_queue.o(i.byte_queue_alloc_init))
    448. 

  448. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = byte_queue_alloc_init &rArr; byte_queue_alloc_reset
    449. 

  449. </UL>
    450. 

  450. <BR>[Calls]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_alloc_reset
    451. 

  451. </UL>
    452. 

  452. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    453. 

  453. </UL>
    454. 

  454. 

  455. <P><STRONG><a name="[5c]"></a>byte_queue_alloc_reset</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, byte_queue.o(i.byte_queue_alloc_reset))
    456. 

  456. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = byte_queue_alloc_reset
    457. 

  457. </UL>
    458. 

  458. <BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_alloc_init
    459. 

  459. </UL>
    460. 

  460. 

  461. <P><STRONG><a name="[5d]"></a>byte_queue_free</STRONG> (Thumb, 16 bytes, Stack size 16 bytes, byte_queue.o(i.byte_queue_free))
    462. 

  462. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    463. 

  463. </UL>
    464. 

  464. <BR>[Calls]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_write
    465. 

  465. </UL>
    466. 

  466. <BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_poll
    467. 

  467. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_transmit
    468. 

  468. </UL>
    469. 

  469. 

  470. <P><STRONG><a name="[5a]"></a>byte_queue_read</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, byte_queue.o(i.byte_queue_read))
    471. 

  471. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = byte_queue_read &rArr; byte_queue_head_add &rArr; byte_queue_add
    472. 

  472. </UL>
    473. 

  473. <BR>[Calls]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_head_add
    474. 

  474. </UL>
    475. 

  475. <BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_poll
    476. 

  476. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_alloc
    477. 

  477. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_transmit
    478. 

  478. </UL>
    479. 

  479. 

  480. <P><STRONG><a name="[5e]"></a>byte_queue_write</STRONG> (Thumb, 64 bytes, Stack size 32 bytes, byte_queue.o(i.byte_queue_write))
    481. 

  481. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    482. 

  482. </UL>
    483. 

  483. <BR>[Calls]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_tail_add
    484. 

  484. </UL>
    485. 

  485. <BR>[Called By]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_write_byte
    486. 

  486. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_free
    487. 

  487. </UL>
    488. 

  488. 

  489. <P><STRONG><a name="[62]"></a>byte_queue_write_byte</STRONG> (Thumb, 16 bytes, Stack size 16 bytes, byte_queue.o(i.byte_queue_write_byte))
    490. 

  490. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = byte_queue_write_byte &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    491. 

  491. </UL>
    492. 

  492. <BR>[Calls]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_write
    493. 

  493. </UL>
    494. 

  494. <BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_packet
    495. 

  495. <LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_rx_packet
    496. 

  496. </UL>
    497. 

  497. 

  498. <P><STRONG><a name="[63]"></a>can_deinit</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, gd32f10x_can.o(i.can_deinit))
    499. 

  499. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = can_deinit
    500. 

  500. </UL>
    501. 

  501. <BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
    502. 

  502. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
    503. 

  503. </UL>
    504. 

  504. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    505. 

  505. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_deinit
    506. 

  506. </UL>
    507. 

  507. 

  508. <P><STRONG><a name="[74]"></a>can_filter_init</STRONG> (Thumb, 262 bytes, Stack size 8 bytes, gd32f10x_can.o(i.can_filter_init))
    509. 

  509. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = can_filter_init
    510. 

  510. </UL>
    511. 

  511. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    512. 

  512. </UL>
    513. 

  513. 

  514. <P><STRONG><a name="[73]"></a>can_init</STRONG> (Thumb, 290 bytes, Stack size 16 bytes, gd32f10x_can.o(i.can_init))
    515. 

  515. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = can_init
    516. 

  516. </UL>
    517. 

  517. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    518. 

  518. </UL>
    519. 

  519. 

  520. <P><STRONG><a name="[75]"></a>can_interrupt_enable</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f10x_can.o(i.can_interrupt_enable))
    521. 

  521. <BR><BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    522. 

  522. </UL>
    523. 

  523. 

  524. <P><STRONG><a name="[66]"></a>fmc_bank0_ready_wait</STRONG> (Thumb, 34 bytes, Stack size 4 bytes, gd32f10x_fmc.o(i.fmc_bank0_ready_wait))
    525. 

  525. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = fmc_bank0_ready_wait
    526. 

  526. </UL>
    527. 

  527. <BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_state_get
    528. 

  528. </UL>
    529. 

  529. <BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    530. 

  530. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    531. 

  531. </UL>
    532. 

  532. 

  533. <P><STRONG><a name="[67]"></a>fmc_bank0_state_get</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_bank0_state_get))
    534. 

  534. <BR><BR>[Called By]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    535. 

  535. </UL>
    536. 

  536. 

  537. <P><STRONG><a name="[68]"></a>fmc_bank1_ready_wait</STRONG> (Thumb, 34 bytes, Stack size 4 bytes, gd32f10x_fmc.o(i.fmc_bank1_ready_wait))
    538. 

  538. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = fmc_bank1_ready_wait
    539. 

  539. </UL>
    540. 

  540. <BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_state_get
    541. 

  541. </UL>
    542. 

  542. <BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    543. 

  543. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    544. 

  544. </UL>
    545. 

  545. 

  546. <P><STRONG><a name="[69]"></a>fmc_bank1_state_get</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_bank1_state_get))
    547. 

  547. <BR><BR>[Called By]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    548. 

  548. </UL>
    549. 

  549. 

  550. <P><STRONG><a name="[8f]"></a>fmc_flag_clear</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_flag_clear))
    551. 

  551. <BR><BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_flag_clear
    552. 

  552. </UL>
    553. 

  553. 

  554. <P><STRONG><a name="[92]"></a>fmc_lock</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_lock))
    555. 

  555. <BR><BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_page
    556. 

  556. </UL>
    557. 

  557. 

  558. <P><STRONG><a name="[6a]"></a>fmc_page_erase</STRONG> (Thumb, 222 bytes, Stack size 12 bytes, gd32f10x_fmc.o(i.fmc_page_erase))
    559. 

  559. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = fmc_page_erase &rArr; fmc_bank0_ready_wait
    560. 

  560. </UL>
    561. 

  561. <BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    562. 

  562. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    563. 

  563. </UL>
    564. 

  564. <BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_page
    565. 

  565. </UL>
    566. 

  566. 

  567. <P><STRONG><a name="[91]"></a>fmc_unlock</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, gd32f10x_fmc.o(i.fmc_unlock))
    568. 

  568. <BR><BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_page
    569. 

  569. </UL>
    570. 

  570. 

  571. <P><STRONG><a name="[6b]"></a>fmc_word_program</STRONG> (Thumb, 178 bytes, Stack size 16 bytes, gd32f10x_fmc.o(i.fmc_word_program))
    572. 

  572. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = fmc_word_program &rArr; fmc_bank0_ready_wait
    573. 

  573. </UL>
    574. 

  574. <BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank0_ready_wait
    575. 

  575. <LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_bank1_ready_wait
    576. 

  576. </UL>
    577. 

  577. <BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_page
    578. 

  578. </UL>
    579. 

  579. 

  580. <P><STRONG><a name="[6e]"></a>gpio_bit_reset</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_gpio.o(i.gpio_bit_reset))
    581. 

  581. <BR><BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    582. 

  582. </UL>
    583. 

  583. 

  584. <P><STRONG><a name="[4b]"></a>gpio_init</STRONG> (Thumb, 172 bytes, Stack size 20 bytes, gd32f10x_gpio.o(i.gpio_init))
    585. 

  585. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_init
    586. 

  586. </UL>
    587. 

  587. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    588. 

  588. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    589. 

  589. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    590. 

  590. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    591. 

  591. </UL>
    592. 

  592. 

  593. <P><STRONG><a name="[72]"></a>gpio_pin_remap_config</STRONG> (Thumb, 138 bytes, Stack size 20 bytes, gd32f10x_gpio.o(i.gpio_pin_remap_config))
    594. 

  594. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_pin_remap_config
    595. 

  595. </UL>
    596. 

  596. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    597. 

  597. </UL>
    598. 

  598. 

  599. <P><STRONG><a name="[36]"></a>main</STRONG> (Thumb, 278 bytes, Stack size 8 bytes, main.o(i.main))
    600. 

  600. <BR><BR>[Stack]<UL><LI>Max Depth = 228<LI>Call Chain = main &rArr; s600_can_poll &rArr; s600_can_process_command &rArr; s600_can_send_response &rArr; s600_can_send_packet &rArr; s600_can_transmit &rArr; byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    601. 

  601. </UL>
    602. 

  602. <BR>[Calls]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    603. 

  603. <LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    604. 

  604. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_reset
    605. 

  605. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_command
    606. 

  606. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_poll
    607. 

  607. <LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    608. 

  608. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    609. 

  609. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    610. 

  610. <LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Data_RS485
    611. 

  611. <LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Data_2_RS485
    612. 

  612. <LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_SetPriority
    613. 

  613. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    614. 

  614. </UL>
    615. 

  615. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
    616. 

  616. </UL>
    617. 

  617. <P><STRONG><a name="[77]"></a>nvic_irq_disable</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_irq_disable))
    618. 

  618. <BR><BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_deinit
    619. 

  619. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    620. 

  620. </UL>
    621. 

  621. 

  622. <P><STRONG><a name="[56]"></a>nvic_irq_enable</STRONG> (Thumb, 162 bytes, Stack size 24 bytes, gd32f10x_misc.o(i.nvic_irq_enable))
    623. 

  623. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = nvic_irq_enable
    624. 

  624. </UL>
    625. 

  625. <BR>[Calls]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
    626. 

  626. </UL>
    627. 

  627. <BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    628. 

  628. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    629. 

  629. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    630. 

  630. </UL>
    631. 

  631. 

  632. <P><STRONG><a name="[55]"></a>nvic_priority_group_set</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_priority_group_set))
    633. 

  633. <BR><BR>[Called By]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    634. 

  634. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    635. 

  635. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    636. 

  636. </UL>
    637. 

  637. 

  638. <P><STRONG><a name="[8d]"></a>nvic_vector_table_set</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_vector_table_set))
    639. 

  639. <BR><BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    640. 

  640. </UL>
    641. 

  641. 

  642. <P><STRONG><a name="[94]"></a>rcu_clock_freq_get</STRONG> (Thumb, 264 bytes, Stack size 80 bytes, gd32f10x_rcu.o(i.rcu_clock_freq_get))
    643. 

  643. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rcu_clock_freq_get
    644. 

  644. </UL>
    645. 

  645. <BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
    646. 

  646. </UL>
    647. 

  647. 

  648. <P><STRONG><a name="[4a]"></a>rcu_periph_clock_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_clock_enable))
    649. 

  649. <BR><BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_config
    650. 

  650. <LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    651. 

  651. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    652. 

  652. <LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    653. 

  653. </UL>
    654. 

  654. 

  655. <P><STRONG><a name="[65]"></a>rcu_periph_reset_disable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_disable))
    656. 

  656. <BR><BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
    657. 

  657. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    658. 

  658. </UL>
    659. 

  659. 

  660. <P><STRONG><a name="[64]"></a>rcu_periph_reset_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_enable))
    661. 

  661. <BR><BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
    662. 

  662. <LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
    663. 

  663. </UL>
    664. 

  664. 

  665. <P><STRONG><a name="[6f]"></a>s600_can_device_config</STRONG> (Thumb, 248 bytes, Stack size 40 bytes, s600_can.o(i.s600_can_device_config))
    666. 

  666. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = s600_can_device_config &rArr; nvic_irq_enable
    667. 

  667. </UL>
    668. 

  668. <BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_interrupt_enable
    669. 

  669. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_init
    670. 

  670. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_filter_init
    671. 

  671. <LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
    672. 

  672. <LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
    673. 

  673. <LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
    674. 

  674. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_pin_remap_config
    675. 

  675. <LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
    676. 

  676. <LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_alloc_init
    677. 

  677. </UL>
    678. 

  678. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    679. 

  679. </UL>
    680. 

  680. 

  681. <P><STRONG><a name="[76]"></a>s600_can_device_deinit</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, s600_can.o(i.s600_can_device_deinit))
    682. 

  682. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = s600_can_device_deinit &rArr; can_deinit
    683. 

  683. </UL>
    684. 

  684. <BR>[Calls]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
    685. 

  685. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_disable
    686. 

  686. </UL>
    687. 

  687. <BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    688. 

  688. </UL>
    689. 

  689. 

  690. <P><STRONG><a name="[85]"></a>s600_can_find_mailbox</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, s600_can.o(i.s600_can_find_mailbox))
    691. 

  691. <BR><BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_tx_packet
    692. 

  692. </UL>
    693. 

  693. 

  694. <P><STRONG><a name="[71]"></a>s600_can_poll</STRONG> (Thumb, 62 bytes, Stack size 16 bytes, s600_can.o(i.s600_can_poll))
    695. 

  695. <BR><BR>[Stack]<UL><LI>Max Depth = 220<LI>Call Chain = s600_can_poll &rArr; s600_can_process_command &rArr; s600_can_send_response &rArr; s600_can_send_packet &rArr; s600_can_transmit &rArr; byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    696. 

  696. </UL>
    697. 

  697. <BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_read
    698. 

  698. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_free
    699. 

  699. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_transmit
    700. 

  700. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    701. 

  701. </UL>
    702. 

  702. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    703. 

  703. </UL>
    704. 

  704. 

  705. <P><STRONG><a name="[3c]"></a>s600_can_rx_packet</STRONG> (Thumb, 200 bytes, Stack size 40 bytes, s600_can.o(i.s600_can_rx_packet))
    706. 

  706. <BR><BR>[Stack]<UL><LI>Max Depth = 132<LI>Call Chain = s600_can_rx_packet &rArr; s600_can_rx_front_get &rArr; byte_queue_alloc &rArr; byte_queue_read &rArr; byte_queue_head_add &rArr; byte_queue_add
    707. 

  707. </UL>
    708. 

  708. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_write_byte
    709. 

  709. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_rx_front_put
    710. 

  710. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_rx_front_get
    711. 

  711. </UL>
    712. 

  712. <BR>[Called By]<UL><LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN0_RX1_IRQHandler
    713. 

  713. </UL>
    714. 

  714. 

  715. <P><STRONG><a name="[70]"></a>s600_can_send_command</STRONG> (Thumb, 24 bytes, Stack size 24 bytes, s600_can.o(i.s600_can_send_command))
    716. 

  716. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = s600_can_send_command &rArr; s600_can_send_packet &rArr; s600_can_transmit &rArr; byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    717. 

  717. </UL>
    718. 

  718. <BR>[Calls]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_packet
    719. 

  719. </UL>
    720. 

  720. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    721. 

  721. </UL>
    722. 

  722. 

  723. <P><STRONG><a name="[86]"></a>s600_can_send_frame</STRONG> (Thumb, 92 bytes, Stack size 16 bytes, s600_can.o(i.s600_can_send_frame))
    724. 

  724. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = s600_can_send_frame
    725. 

  725. </UL>
    726. 

  726. <BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_tx_packet
    727. 

  727. </UL>
    728. 

  728. 

  729. <P><STRONG><a name="[83]"></a>s600_can_send_packet</STRONG> (Thumb, 88 bytes, Stack size 32 bytes, s600_can.o(i.s600_can_send_packet))
    730. 

  730. <BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = s600_can_send_packet &rArr; s600_can_transmit &rArr; byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    731. 

  731. </UL>
    732. 

  732. <BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_write_byte
    733. 

  733. <LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_alloc
    734. 

  734. <LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    735. 

  735. <LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_transmit
    736. 

  736. </UL>
    737. 

  737. <BR>[Called By]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_command
    738. 

  738. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_response
    739. 

  739. </UL>
    740. 

  740. 

  741. <P><STRONG><a name="[80]"></a>s600_can_send_response</STRONG> (Thumb, 24 bytes, Stack size 24 bytes, s600_can.o(i.s600_can_send_response))
    742. 

  742. <BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = s600_can_send_response &rArr; s600_can_send_packet &rArr; s600_can_transmit &rArr; byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    743. 

  743. </UL>
    744. 

  744. <BR>[Calls]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_packet
    745. 

  745. </UL>
    746. 

  746. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    747. 

  747. </UL>
    748. 

  748. 

  749. <P><STRONG><a name="[78]"></a>s600_can_transmit</STRONG> (Thumb, 112 bytes, Stack size 16 bytes, s600_can.o(i.s600_can_transmit))
    750. 

  750. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = s600_can_transmit &rArr; byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    751. 

  751. </UL>
    752. 

  752. <BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_read
    753. 

  753. <LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_free
    754. 

  754. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_tx_packet
    755. 

  755. </UL>
    756. 

  756. <BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_poll
    757. 

  757. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_packet
    758. 

  758. </UL>
    759. 

  759. 

  760. <P><STRONG><a name="[84]"></a>s600_can_tx_packet</STRONG> (Thumb, 130 bytes, Stack size 28 bytes, s600_can.o(i.s600_can_tx_packet))
    761. 

  761. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = s600_can_tx_packet &rArr; s600_can_send_frame
    762. 

  762. </UL>
    763. 

  763. <BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_frame
    764. 

  764. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_find_mailbox
    765. 

  765. </UL>
    766. 

  766. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_transmit
    767. 

  767. </UL>
    768. 

  768. 

  769. <P><STRONG><a name="[7b]"></a>s600_decode_u24</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, s600.o(i.s600_decode_u24))
    770. 

  770. <BR><BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    771. 

  771. </UL>
    772. 

  772. 

  773. <P><STRONG><a name="[7c]"></a>s600_decode_u32</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, s600.o(i.s600_decode_u32))
    774. 

  774. <BR><BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    775. 

  775. </UL>
    776. 

  776. 

  777. <P><STRONG><a name="[87]"></a>s600_encode_u16</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, s600.o(i.s600_encode_u16))
    778. 

  778. <BR><BR>[Called By]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_encode_u24
    779. 

  779. </UL>
    780. 

  780. 

  781. <P><STRONG><a name="[7f]"></a>s600_encode_u24</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, s600.o(i.s600_encode_u24))
    782. 

  782. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = s600_encode_u24
    783. 

  783. </UL>
    784. 

  784. <BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_encode_u16
    785. 

  785. </UL>
    786. 

  786. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    787. 

  787. </UL>
    788. 

  788. 

  789. <P><STRONG><a name="[6c]"></a>s600_iap_boot</STRONG> (Thumb, 180 bytes, Stack size 24 bytes, s600_iap.o(i.s600_iap_boot))
    790. 

  790. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = s600_iap_boot &rArr; s600_iap_write_page &rArr; fmc_word_program &rArr; fmc_bank0_ready_wait
    791. 

  791. </UL>
    792. 

  792. <BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_vector_table_set
    793. 

  793. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_disable
    794. 

  794. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_device_deinit
    795. 

  795. <LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_page
    796. 

  796. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_checksum
    797. 

  797. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_last_page
    798. 

  798. <LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_capacity
    799. 

  799. <LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcmp
    800. 

  800. </UL>
    801. 

  801. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    802. 

  802. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    803. 

  803. </UL>
    804. 

  804. 

  805. <P><STRONG><a name="[8c]"></a>s600_iap_checksum</STRONG> (Thumb, 62 bytes, Stack size 20 bytes, s600_iap.o(i.s600_iap_checksum))
    806. 

  806. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = s600_iap_checksum
    807. 

  807. </UL>
    808. 

  808. <BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_end
    809. 

  809. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    810. 

  810. </UL>
    811. 

  811. 

  812. <P><STRONG><a name="[90]"></a>s600_iap_flush</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, s600_iap.o(i.s600_iap_flush))
    813. 

  813. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = s600_iap_flush &rArr; s600_iap_write_page &rArr; fmc_word_program &rArr; fmc_bank0_ready_wait
    814. 

  814. </UL>
    815. 

  815. <BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_page
    816. 

  816. </UL>
    817. 

  817. <BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_end
    818. 

  818. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write
    819. 

  819. </UL>
    820. 

  820. 

  821. <P><STRONG><a name="[7e]"></a>s600_iap_write</STRONG> (Thumb, 96 bytes, Stack size 16 bytes, s600_iap.o(i.s600_iap_write))
    822. 

  822. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = s600_iap_write &rArr; s600_iap_flush &rArr; s600_iap_write_page &rArr; fmc_word_program &rArr; fmc_bank0_ready_wait
    823. 

  823. </UL>
    824. 

  824. <BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_flush
    825. 

  825. <LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    826. 

  826. </UL>
    827. 

  827. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    828. 

  828. </UL>
    829. 

  829. 

  830. <P><STRONG><a name="[7a]"></a>s600_iap_write_begin</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, s600_iap.o(i.s600_iap_write_begin))
    831. 

  831. <BR><BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    832. 

  832. </UL>
    833. 

  833. 

  834. <P><STRONG><a name="[7d]"></a>s600_iap_write_end</STRONG> (Thumb, 58 bytes, Stack size 24 bytes, s600_iap.o(i.s600_iap_write_end))
    835. 

  835. <BR><BR>[Stack]<UL><LI>Max Depth = 84<LI>Call Chain = s600_iap_write_end &rArr; s600_iap_flush &rArr; s600_iap_write_page &rArr; fmc_word_program &rArr; fmc_bank0_ready_wait
    836. 

  836. </UL>
    837. 

  837. <BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_page
    838. 

  838. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_flush
    839. 

  839. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_checksum
    840. 

  840. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_last_page
    841. 

  841. </UL>
    842. 

  842. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_process_command
    843. 

  843. </UL>
    844. 

  844. 

  845. <P><STRONG><a name="[88]"></a>s600_iap_write_page</STRONG> (Thumb, 92 bytes, Stack size 32 bytes, s600_iap.o(i.s600_iap_write_page))
    846. 

  846. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = s600_iap_write_page &rArr; fmc_word_program &rArr; fmc_bank0_ready_wait
    847. 

  847. </UL>
    848. 

  848. <BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_word_program
    849. 

  849. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_unlock
    850. 

  850. <LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_page_erase
    851. 

  851. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_lock
    852. 

  852. <LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_flag_clear
    853. 

  853. </UL>
    854. 

  854. <BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_end
    855. 

  855. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_flush
    856. 

  856. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    857. 

  857. </UL>
    858. 

  858. 

  859. <P><STRONG><a name="[4d]"></a>usart_baudrate_set</STRONG> (Thumb, 136 bytes, Stack size 32 bytes, gd32f10x_usart.o(i.usart_baudrate_set))
    860. 

  860. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = usart_baudrate_set &rArr; rcu_clock_freq_get
    861. 

  861. </UL>
    862. 

  862. <BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
    863. 

  863. </UL>
    864. 

  864. <BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    865. 

  865. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    866. 

  866. </UL>
    867. 

  867. 

  868. <P><STRONG><a name="[44]"></a>usart_data_receive</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_data_receive))
    869. 

  869. <BR><BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    870. 

  870. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
    871. 

  871. </UL>
    872. 

  872. 

  873. <P><STRONG><a name="[47]"></a>usart_data_transmit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_data_transmit))
    874. 

  874. <BR><BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    875. 

  875. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
    876. 

  876. </UL>
    877. 

  877. 

  878. <P><STRONG><a name="[4c]"></a>usart_deinit</STRONG> (Thumb, 136 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_deinit))
    879. 

  879. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_deinit
    880. 

  880. </UL>
    881. 

  881. <BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
    882. 

  882. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
    883. 

  883. </UL>
    884. 

  884. <BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    885. 

  885. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    886. 

  886. </UL>
    887. 

  887. 

  888. <P><STRONG><a name="[57]"></a>usart_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_enable))
    889. 

  889. <BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    890. 

  890. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    891. 

  891. </UL>
    892. 

  892. 

  893. <P><STRONG><a name="[43]"></a>usart_flag_get</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_flag_get))
    894. 

  894. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_flag_get
    895. 

  895. </UL>
    896. 

  896. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    897. 

  897. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
    898. 

  898. </UL>
    899. 

  899. 

  900. <P><STRONG><a name="[52]"></a>usart_hardware_flow_cts_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_hardware_flow_cts_config))
    901. 

  901. <BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    902. 

  902. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    903. 

  903. </UL>
    904. 

  904. 

  905. <P><STRONG><a name="[51]"></a>usart_hardware_flow_rts_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_hardware_flow_rts_config))
    906. 

  906. <BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    907. 

  907. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    908. 

  908. </UL>
    909. 

  909. 

  910. <P><STRONG><a name="[46]"></a>usart_interrupt_disable</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_interrupt_disable))
    911. 

  911. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_disable
    912. 

  912. </UL>
    913. 

  913. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART0_IRQHandler
    914. 

  914. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
    915. 

  915. </UL>
    916. 

  916. 

  917. <P><STRONG><a name="[3f]"></a>usart_interrupt_enable</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_interrupt_enable))
    918. 

  918. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_enable
    919. 

  919. </UL>
    920. 

  920. <BR>[Called By]<UL><LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Data_RS485
    921. 

  921. <LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Data_2_RS485
    922. 

  922. </UL>
    923. 

  923. 

  924. <P><STRONG><a name="[41]"></a>usart_interrupt_flag_get</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, gd32f10x_usart.o(i.usart_interrupt_flag_get))
    925. 

  925. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = usart_interrupt_flag_get
    926. 

  926. </UL>
    927. 

  927. <BR>[Called By]<UL><LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Send_Data_RS485
    928. 

  928. </UL>
    929. 

  929. 

  930. <P><STRONG><a name="[50]"></a>usart_parity_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_parity_config))
    931. 

  931. <BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    932. 

  932. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    933. 

  933. </UL>
    934. 

  934. 

  935. <P><STRONG><a name="[53]"></a>usart_receive_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_receive_config))
    936. 

  936. <BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    937. 

  937. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    938. 

  938. </UL>
    939. 

  939. 

  940. <P><STRONG><a name="[4f]"></a>usart_stop_bit_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_stop_bit_set))
    941. 

  941. <BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    942. 

  942. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    943. 

  943. </UL>
    944. 

  944. 

  945. <P><STRONG><a name="[54]"></a>usart_transmit_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_transmit_config))
    946. 

  946. <BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    947. 

  947. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    948. 

  948. </UL>
    949. 

  949. 

  950. <P><STRONG><a name="[4e]"></a>usart_word_length_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_word_length_set))
    951. 

  951. <BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart2_Initial
    952. 

  952. <LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Usart1_Initial
    953. 

  953. </UL>
    954. 

  954. <P>
    955. 

  955. <H3>
    956. 

  956. Local Symbols
    957. 

  957. </H3>
    958. 

  958. <P><STRONG><a name="[93]"></a>system_clock_108m_irc8m</STRONG> (Thumb, 160 bytes, Stack size 0 bytes, system_gd32f10x.o(i.system_clock_108m_irc8m))
    959. 

  959. <BR><BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
    960. 

  960. </UL>
    961. 

  961. 

  962. <P><STRONG><a name="[42]"></a>system_clock_config</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_gd32f10x.o(i.system_clock_config))
    963. 

  963. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = system_clock_config
    964. 

  964. </UL>
    965. 

  965. <BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_108m_irc8m
    966. 

  966. </UL>
    967. 

  967. <BR>[Called By]<UL><LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
    968. 

  968. </UL>
    969. 

  969. 

  970. <P><STRONG><a name="[8b]"></a>s600_iap_capacity</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, s600_iap.o(i.s600_iap_capacity))
    971. 

  971. <BR><BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    972. 

  972. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_last_page
    973. 

  973. </UL>
    974. 

  974. 

  975. <P><STRONG><a name="[8e]"></a>s600_iap_flag_clear</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, s600_iap.o(i.s600_iap_flag_clear))
    976. 

  976. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = s600_iap_flag_clear
    977. 

  977. </UL>
    978. 

  978. <BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fmc_flag_clear
    979. 

  979. </UL>
    980. 

  980. <BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_page
    981. 

  981. </UL>
    982. 

  982. 

  983. <P><STRONG><a name="[89]"></a>s600_iap_last_page</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, s600_iap.o(i.s600_iap_last_page))
    984. 

  984. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = s600_iap_last_page
    985. 

  985. </UL>
    986. 

  986. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_capacity
    987. 

  987. </UL>
    988. 

  988. <BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_end
    989. 

  989. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    990. 

  990. </UL>
    991. 

  991. 

  992. <P><STRONG><a name="[60]"></a>byte_queue_add</STRONG> (Thumb, 20 bytes, Stack size 12 bytes, byte_queue.o(i.byte_queue_add))
    993. 

  993. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = byte_queue_add
    994. 

  994. </UL>
    995. 

  995. <BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_tail_add
    996. 

  996. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_head_add
    997. 

  997. </UL>
    998. 

  998. 

  999. <P><STRONG><a name="[5f]"></a>byte_queue_head_add</STRONG> (Thumb, 18 bytes, Stack size 16 bytes, byte_queue.o(i.byte_queue_head_add))
    1000. 

  1000. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = byte_queue_head_add &rArr; byte_queue_add
    1001. 

  1001. </UL>
    1002. 

  1002. <BR>[Calls]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_add
    1003. 

  1003. </UL>
    1004. 

  1004. <BR>[Called By]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_read
    1005. 

  1005. </UL>
    1006. 

  1006. 

  1007. <P><STRONG><a name="[61]"></a>byte_queue_tail_add</STRONG> (Thumb, 18 bytes, Stack size 16 bytes, byte_queue.o(i.byte_queue_tail_add))
    1008. 

  1008. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = byte_queue_tail_add &rArr; byte_queue_add
    1009. 

  1009. </UL>
    1010. 

  1010. <BR>[Calls]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_add
    1011. 

  1011. </UL>
    1012. 

  1012. <BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_write
    1013. 

  1013. </UL>
    1014. 

  1014. 

  1015. <P><STRONG><a name="[6d]"></a>NVIC_SetPriority</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, main.o(i.NVIC_SetPriority))
    1016. 

  1016. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = NVIC_SetPriority
    1017. 

  1017. </UL>
    1018. 

  1018. <BR>[Called By]<UL><LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1019. 

  1019. </UL>
    1020. 

  1020. 

  1021. <P><STRONG><a name="[79]"></a>s600_can_process_command</STRONG> (Thumb, 286 bytes, Stack size 56 bytes, s600_can.o(i.s600_can_process_command))
    1022. 

  1022. <BR><BR>[Stack]<UL><LI>Max Depth = 204<LI>Call Chain = s600_can_process_command &rArr; s600_can_send_response &rArr; s600_can_send_packet &rArr; s600_can_transmit &rArr; byte_queue_free &rArr; byte_queue_write &rArr; byte_queue_tail_add &rArr; byte_queue_add
    1023. 

  1023. </UL>
    1024. 

  1024. <BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_end
    1025. 

  1025. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write_begin
    1026. 

  1026. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_write
    1027. 

  1027. <LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_iap_boot
    1028. 

  1028. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_send_response
    1029. 

  1029. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_encode_u24
    1030. 

  1030. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_decode_u32
    1031. 

  1031. <LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_decode_u24
    1032. 

  1032. </UL>
    1033. 

  1033. <BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_poll
    1034. 

  1034. </UL>
    1035. 

  1035. 

  1036. <P><STRONG><a name="[81]"></a>s600_can_rx_front_get</STRONG> (Thumb, 106 bytes, Stack size 24 bytes, s600_can.o(i.s600_can_rx_front_get))
    1037. 

  1037. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = s600_can_rx_front_get &rArr; byte_queue_alloc &rArr; byte_queue_read &rArr; byte_queue_head_add &rArr; byte_queue_add
    1038. 

  1038. </UL>
    1039. 

  1039. <BR>[Calls]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;byte_queue_alloc
    1040. 

  1040. </UL>
    1041. 

  1041. <BR>[Called By]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_rx_packet
    1042. 

  1042. </UL>
    1043. 

  1043. 

  1044. <P><STRONG><a name="[82]"></a>s600_can_rx_front_put</STRONG> (Thumb, 72 bytes, Stack size 0 bytes, s600_can.o(i.s600_can_rx_front_put))
    1045. 

  1045. <BR><BR>[Called By]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;s600_can_rx_packet
    1046. 

  1046. </UL>
    1047. 

  1047. <P>
    1048. 

  1048. <H3>
    1049. 

  1049. Undefined Global Symbols
    1050. 

  1050. </H3><HR></body></html>
    1051.