stm32f3xx_hal_pcd.h 36 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f3xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F3xx_HAL_PCD_H
  37. #define __STM32F3xx_HAL_PCD_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. #if defined(STM32F302xE) || defined(STM32F303xE) || \
  42. defined(STM32F302xC) || defined(STM32F303xC) || \
  43. defined(STM32F302x8) || \
  44. defined(STM32F373xC)
  45. /* Includes ------------------------------------------------------------------*/
  46. #include "stm32f3xx_hal_def.h"
  47. /** @addtogroup STM32F3xx_HAL_Driver
  48. * @{
  49. */
  50. /** @addtogroup PCD
  51. * @{
  52. */
  53. /* Exported types ------------------------------------------------------------*/
  54. /** @defgroup PCD_Exported_Types PCD Exported Types
  55. * @{
  56. */
  57. /**
  58. * @brief PCD State structure definition
  59. */
  60. typedef enum
  61. {
  62. HAL_PCD_STATE_RESET = 0x00U,
  63. HAL_PCD_STATE_READY = 0x01U,
  64. HAL_PCD_STATE_ERROR = 0x02U,
  65. HAL_PCD_STATE_BUSY = 0x03U,
  66. HAL_PCD_STATE_TIMEOUT = 0x04U
  67. } PCD_StateTypeDef;
  68. /**
  69. * @brief PCD double buffered endpoint direction
  70. */
  71. typedef enum
  72. {
  73. PCD_EP_DBUF_OUT,
  74. PCD_EP_DBUF_IN,
  75. PCD_EP_DBUF_ERR,
  76. }PCD_EP_DBUF_DIR;
  77. /**
  78. * @brief PCD endpoint buffer number
  79. */
  80. typedef enum
  81. {
  82. PCD_EP_NOBUF,
  83. PCD_EP_BUF0,
  84. PCD_EP_BUF1
  85. }PCD_EP_BUF_NUM;
  86. /**
  87. * @brief PCD Initialization Structure definition
  88. */
  89. typedef struct
  90. {
  91. uint32_t dev_endpoints; /*!< Device Endpoints number.
  92. This parameter depends on the used USB core.
  93. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  94. uint32_t speed; /*!< USB Core speed.
  95. This parameter can be any value of @ref PCD_Core_Speed */
  96. uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
  97. This parameter can be any value of @ref PCD_EP0_MPS */
  98. uint32_t phy_itface; /*!< Select the used PHY interface.
  99. This parameter can be any value of @ref PCD_Core_PHY */
  100. uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
  101. This parameter can be set to ENABLE or DISABLE */
  102. uint32_t low_power_enable; /*!< Enable or disable Low Power mode
  103. This parameter can be set to ENABLE or DISABLE */
  104. uint32_t lpm_enable; /*!< Enable or disable the Link Power Management .
  105. This parameter can be set to ENABLE or DISABLE */
  106. uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
  107. This parameter can be set to ENABLE or DISABLE */
  108. }PCD_InitTypeDef;
  109. typedef struct
  110. {
  111. uint8_t num; /*!< Endpoint number
  112. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  113. uint8_t is_in; /*!< Endpoint direction
  114. This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
  115. uint8_t is_stall; /*!< Endpoint stall condition
  116. This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
  117. uint8_t type; /*!< Endpoint type
  118. This parameter can be any value of @ref PCD_EP_Type */
  119. uint16_t pmaadress; /*!< PMA Address
  120. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  121. uint16_t pmaaddr0; /*!< PMA Address0
  122. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  123. uint16_t pmaaddr1; /*!< PMA Address1
  124. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  125. uint8_t doublebuffer; /*!< Double buffer enable
  126. This parameter can be 0 or 1 */
  127. uint32_t maxpacket; /*!< Endpoint Max packet size
  128. This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
  129. uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
  130. uint32_t xfer_len; /*!< Current transfer length */
  131. uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
  132. }PCD_EPTypeDef;
  133. typedef USB_TypeDef PCD_TypeDef;
  134. /**
  135. * @brief PCD Handle Structure definition
  136. */
  137. typedef struct
  138. {
  139. PCD_TypeDef *Instance; /*!< Register base address */
  140. PCD_InitTypeDef Init; /*!< PCD required parameters */
  141. __IO uint8_t USB_Address; /*!< USB Address */
  142. PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */
  143. PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */
  144. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  145. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  146. uint32_t Setup[12]; /*!< Setup packet buffer */
  147. void *pData; /*!< Pointer to upper stack Handler */
  148. } PCD_HandleTypeDef;
  149. /**
  150. * @}
  151. */
  152. /* Include PCD HAL Extension module */
  153. #include "stm32f3xx_hal_pcd_ex.h"
  154. /* Exported constants --------------------------------------------------------*/
  155. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  156. * @{
  157. */
  158. /** @defgroup PCD_Core_Speed PCD Core Speed
  159. * @{
  160. */
  161. #define PCD_SPEED_HIGH 0U /* Not Supported */
  162. #define PCD_SPEED_FULL 2U
  163. /**
  164. * @}
  165. */
  166. /** @defgroup PCD_Core_PHY PCD Core PHY
  167. * @{
  168. */
  169. #define PCD_PHY_EMBEDDED 2U
  170. /**
  171. * @}
  172. */
  173. /**
  174. * @}
  175. */
  176. /* Exported macros -----------------------------------------------------------*/
  177. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  178. * @brief macros to handle interrupts and specific clock configurations
  179. * @{
  180. */
  181. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
  182. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) = (uint16_t)(~(__INTERRUPT__))))
  183. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  184. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  185. #define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__))
  186. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  187. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  188. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\
  189. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
  190. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\
  191. } while(0U)
  192. #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\
  193. EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE);\
  194. EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\
  195. } while(0U)
  196. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
  197. EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\
  198. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
  199. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\
  200. EXTI->FTSR |= USB_WAKEUP_EXTI_LINE;\
  201. } while(0U)
  202. /**
  203. * @}
  204. */
  205. /* Exported functions --------------------------------------------------------*/
  206. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  207. * @{
  208. */
  209. /* Initialization/de-initialization functions ********************************/
  210. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  211. * @{
  212. */
  213. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  214. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  215. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  216. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  217. /**
  218. * @}
  219. */
  220. /* I/O operation functions ***************************************************/
  221. /* Non-Blocking mode: Interrupt */
  222. /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
  223. * @{
  224. */
  225. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  226. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  227. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  228. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  229. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  230. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  231. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  232. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  233. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  234. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  235. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  236. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  237. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  238. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  239. /**
  240. * @}
  241. */
  242. /* Peripheral Control functions **********************************************/
  243. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  244. * @{
  245. */
  246. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  247. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  248. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  249. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  250. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  251. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  252. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  253. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  254. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  255. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  256. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  257. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  258. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  259. /**
  260. * @}
  261. */
  262. /* Peripheral State functions ************************************************/
  263. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  264. * @{
  265. */
  266. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  267. /**
  268. * @}
  269. */
  270. /**
  271. * @}
  272. */
  273. /* Private constants ---------------------------------------------------------*/
  274. /** @defgroup PCD_Private_Constants PCD Private Constants
  275. * @{
  276. */
  277. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  278. * @{
  279. */
  280. #define USB_WAKEUP_EXTI_LINE ((uint32_t)EXTI_IMR_MR18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
  281. /**
  282. * @}
  283. */
  284. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  285. * @{
  286. */
  287. #define DEP0CTL_MPS_64 0U
  288. #define DEP0CTL_MPS_32 1U
  289. #define DEP0CTL_MPS_16 2U
  290. #define DEP0CTL_MPS_8 3U
  291. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  292. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  293. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  294. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  295. /**
  296. * @}
  297. */
  298. /** @defgroup PCD_EP_Type PCD EP Type
  299. * @{
  300. */
  301. #define PCD_EP_TYPE_CTRL 0U
  302. #define PCD_EP_TYPE_ISOC 1U
  303. #define PCD_EP_TYPE_BULK 2U
  304. #define PCD_EP_TYPE_INTR 3U
  305. /**
  306. * @}
  307. */
  308. /** @defgroup PCD_ENDP PCD ENDP
  309. * @{
  310. */
  311. #define PCD_ENDP0 ((uint8_t)0U)
  312. #define PCD_ENDP1 ((uint8_t)1U)
  313. #define PCD_ENDP2 ((uint8_t)2U)
  314. #define PCD_ENDP3 ((uint8_t)3U)
  315. #define PCD_ENDP4 ((uint8_t)4U)
  316. #define PCD_ENDP5 ((uint8_t)5U)
  317. #define PCD_ENDP6 ((uint8_t)6U)
  318. #define PCD_ENDP7 ((uint8_t)7U)
  319. /**
  320. * @}
  321. */
  322. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  323. * @{
  324. */
  325. #define PCD_SNG_BUF 0U
  326. #define PCD_DBL_BUF 1U
  327. /**
  328. * @}
  329. */
  330. /**
  331. * @}
  332. */
  333. /* Internal macros -----------------------------------------------------------*/
  334. /* Private macros ------------------------------------------------------------*/
  335. /** @addtogroup PCD_Private_Macros PCD Private Macros
  336. * @{
  337. */
  338. /* SetENDPOINT */
  339. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
  340. /* GetENDPOINT */
  341. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
  342. /**
  343. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  344. * @param USBx USB peripheral instance register address.
  345. * @param bEpNum Endpoint Number.
  346. * @param wType Endpoint Type.
  347. * @retval None
  348. */
  349. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  350. ((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType)) )))
  351. /**
  352. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  353. * @param USBx USB peripheral instance register address.
  354. * @param bEpNum Endpoint Number.
  355. * @retval Endpoint Type
  356. */
  357. #define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
  358. /**
  359. * @brief free buffer used from the application realizing it to the line
  360. toggles bit SW_BUF in the double buffered endpoint register
  361. * @param USBx USB peripheral instance register address.
  362. * @param bEpNum Endpoint Number.
  363. * @param bDir Direction
  364. * @retval None
  365. */
  366. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  367. {\
  368. if ((bDir) == PCD_EP_DBUF_OUT)\
  369. { /* OUT double buffered endpoint */\
  370. PCD_TX_DTOG((USBx), (bEpNum));\
  371. }\
  372. else if ((bDir) == PCD_EP_DBUF_IN)\
  373. { /* IN double buffered endpoint */\
  374. PCD_RX_DTOG((USBx), (bEpNum));\
  375. }\
  376. }
  377. /**
  378. * @brief gets direction of the double buffered endpoint
  379. * @param USBx: USB peripheral instance register address.
  380. * @param bEpNum: Endpoint Number.
  381. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  382. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  383. */
  384. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  385. {\
  386. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U)\
  387. return(PCD_EP_DBUF_OUT);\
  388. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U)\
  389. return(PCD_EP_DBUF_IN);\
  390. else\
  391. return(PCD_EP_DBUF_ERR);\
  392. }
  393. /**
  394. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  395. * @param USBx USB peripheral instance register address.
  396. * @param bEpNum Endpoint Number.
  397. * @param wState new state
  398. * @retval None
  399. */
  400. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  401. \
  402. _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
  403. /* toggle first bit ? */ \
  404. if((USB_EPTX_DTOG1 & (wState))!= 0U)\
  405. { \
  406. _wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
  407. } \
  408. /* toggle second bit ? */ \
  409. if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
  410. { \
  411. _wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
  412. } \
  413. PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
  414. } /* PCD_SET_EP_TX_STATUS */
  415. /**
  416. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  417. * @param USBx USB peripheral instance register address.
  418. * @param bEpNum Endpoint Number.
  419. * @param wState new state
  420. * @retval None
  421. */
  422. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  423. register uint16_t _wRegVal; \
  424. \
  425. _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
  426. /* toggle first bit ? */ \
  427. if((USB_EPRX_DTOG1 & (wState))!= 0U) \
  428. { \
  429. _wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
  430. } \
  431. /* toggle second bit ? */ \
  432. if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
  433. { \
  434. _wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
  435. } \
  436. PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  437. } /* PCD_SET_EP_RX_STATUS */
  438. /**
  439. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  440. * @param USBx USB peripheral instance register address.
  441. * @param bEpNum Endpoint Number.
  442. * @param wStaterx new state.
  443. * @param wStatetx new state.
  444. * @retval None
  445. */
  446. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  447. register uint32_t _wRegVal; \
  448. \
  449. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  450. /* toggle first bit ? */ \
  451. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
  452. { \
  453. _wRegVal ^= USB_EPRX_DTOG1; \
  454. } \
  455. /* toggle second bit ? */ \
  456. if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  457. { \
  458. _wRegVal ^= USB_EPRX_DTOG2; \
  459. } \
  460. /* toggle first bit ? */ \
  461. if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  462. { \
  463. _wRegVal ^= USB_EPTX_DTOG1; \
  464. } \
  465. /* toggle second bit ? */ \
  466. if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  467. { \
  468. _wRegVal ^= USB_EPTX_DTOG2; \
  469. } \
  470. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  471. } /* PCD_SET_EP_TXRX_STATUS */
  472. /**
  473. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  474. * /STAT_RX[1:0])
  475. * @param USBx USB peripheral instance register address.
  476. * @param bEpNum Endpoint Number.
  477. * @retval status
  478. */
  479. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT)
  480. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT)
  481. /**
  482. * @brief sets directly the VALID tx/rx-status into the endpoint register
  483. * @param USBx USB peripheral instance register address.
  484. * @param bEpNum Endpoint Number.
  485. * @retval None
  486. */
  487. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  488. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  489. /**
  490. * @brief checks stall condition in an endpoint.
  491. * @param USBx USB peripheral instance register address.
  492. * @param bEpNum Endpoint Number.
  493. * @retval TRUE = endpoint in stall condition.
  494. */
  495. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  496. == USB_EP_TX_STALL)
  497. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  498. == USB_EP_RX_STALL)
  499. /**
  500. * @brief set & clear EP_KIND bit.
  501. * @param USBx USB peripheral instance register address.
  502. * @param bEpNum Endpoint Number.
  503. * @retval None
  504. */
  505. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  506. (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
  507. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  508. (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))
  509. /**
  510. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  511. * @param USBx USB peripheral instance register address.
  512. * @param bEpNum Endpoint Number.
  513. * @retval None
  514. */
  515. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  516. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  517. /**
  518. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  519. * @param USBx USB peripheral instance register address.
  520. * @param bEpNum Endpoint Number.
  521. * @retval None
  522. */
  523. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  524. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  525. /**
  526. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  527. * @param USBx USB peripheral instance register address.
  528. * @param bEpNum Endpoint Number.
  529. * @retval None
  530. */
  531. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  532. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
  533. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  534. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
  535. /**
  536. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  537. * @param USBx USB peripheral instance register address.
  538. * @param bEpNum Endpoint Number.
  539. * @retval None
  540. */
  541. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  542. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
  543. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  544. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
  545. /**
  546. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  547. * @param USBx USB peripheral instance register address.
  548. * @param bEpNum Endpoint Number.
  549. * @retval None
  550. */
  551. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
  552. { \
  553. PCD_RX_DTOG((USBx),(bEpNum));\
  554. }
  555. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
  556. {\
  557. PCD_TX_DTOG((USBx),(bEpNum));\
  558. }
  559. /**
  560. * @brief Sets address in an endpoint register.
  561. * @param USBx USB peripheral instance register address.
  562. * @param bEpNum Endpoint Number.
  563. * @param bAddr Address.
  564. * @retval None
  565. */
  566. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  567. USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
  568. /**
  569. * @brief Gets address in an endpoint register.
  570. * @param USBx USB peripheral instance register address.
  571. * @param bEpNum Endpoint Number.
  572. * @retval None
  573. */
  574. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  575. /**
  576. * @brief sets address of the tx/rx buffer.
  577. * @param USBx USB peripheral instance register address.
  578. * @param bEpNum Endpoint Number.
  579. * @param wAddr address to be set (must be word aligned).
  580. * @retval None
  581. */
  582. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
  583. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
  584. /**
  585. * @brief Gets address of the tx/rx buffer.
  586. * @param USBx USB peripheral instance register address.
  587. * @param bEpNum Endpoint Number.
  588. * @retval address of the buffer.
  589. */
  590. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  591. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  592. /**
  593. * @brief Sets counter of rx buffer with no. of blocks.
  594. * @param dwReg Register
  595. * @param wCount Counter.
  596. * @param wNBlocks no. of Blocks.
  597. * @retval None
  598. */
  599. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  600. (wNBlocks) = (wCount) >> 5U;\
  601. if(((wCount) & 0x1fU) == 0U)\
  602. { \
  603. (wNBlocks)--;\
  604. } \
  605. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
  606. }/* PCD_CALC_BLK32 */
  607. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  608. (wNBlocks) = (wCount) >> 1U;\
  609. if(((wCount) & 0x1U) != 0U)\
  610. { \
  611. (wNBlocks)++;\
  612. } \
  613. *pdwReg = (uint16_t)((wNBlocks) << 10U);\
  614. }/* PCD_CALC_BLK2 */
  615. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  616. uint16_t wNBlocks;\
  617. if((wCount) > 62U) \
  618. { \
  619. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
  620. } \
  621. else \
  622. { \
  623. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
  624. } \
  625. }/* PCD_SET_EP_CNT_RX_REG */
  626. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  627. uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  628. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\
  629. }
  630. /**
  631. * @brief sets counter for the tx/rx buffer.
  632. * @param USBx USB peripheral instance register address.
  633. * @param bEpNum Endpoint Number.
  634. * @param wCount Counter value.
  635. * @retval None
  636. */
  637. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  638. /**
  639. * @brief gets counter of the tx buffer.
  640. * @param USBx USB peripheral instance register address.
  641. * @param bEpNum Endpoint Number.
  642. * @retval Counter value
  643. */
  644. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  645. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  646. /**
  647. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  648. * @param USBx USB peripheral instance register address.
  649. * @param bEpNum Endpoint Number.
  650. * @param wBuf0Addr: buffer 0 address.
  651. * @retval Counter value
  652. */
  653. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)))
  654. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)))
  655. /**
  656. * @brief Sets addresses in a double buffer endpoint.
  657. * @param USBx USB peripheral instance register address.
  658. * @param bEpNum Endpoint Number.
  659. * @param wBuf0Addr: buffer 0 address.
  660. * @param wBuf1Addr = buffer 1 address.
  661. * @retval None
  662. */
  663. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  664. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  665. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  666. } /* PCD_SET_EP_DBUF_ADDR */
  667. /**
  668. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  669. * @param USBx USB peripheral instance register address.
  670. * @param bEpNum Endpoint Number.
  671. * @retval None
  672. */
  673. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  674. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  675. /**
  676. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  677. * @param USBx USB peripheral instance register address.
  678. * @param bEpNum Endpoint Number.
  679. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  680. * EP_DBUF_IN = IN
  681. * @param wCount Counter value
  682. * @retval None
  683. */
  684. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  685. if((bDir) == PCD_EP_DBUF_OUT)\
  686. /* OUT endpoint */ \
  687. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \
  688. else if((bDir) == PCD_EP_DBUF_IN)\
  689. { \
  690. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  691. } \
  692. } /* SetEPDblBuf0Count*/
  693. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  694. if((bDir) == PCD_EP_DBUF_OUT)\
  695. {/* OUT endpoint */ \
  696. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)) \
  697. } \
  698. else if((bDir) == PCD_EP_DBUF_IN)\
  699. {/* IN endpoint */ \
  700. *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  701. } \
  702. } /* SetEPDblBuf1Count */
  703. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  704. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \
  705. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \
  706. } /
  707. /**
  708. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  709. * @param USBx USB peripheral instance register address.
  710. * @param bEpNum Endpoint Number.
  711. * @retval None
  712. */
  713. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  714. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  715. /**
  716. * @}
  717. */
  718. /** @defgroup PCD_Instance_definition PCD Instance definition
  719. * @{
  720. */
  721. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  722. /**
  723. * @}
  724. */
  725. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  726. * @{
  727. */
  728. /* Peripheral Control functions ************************************************/
  729. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  730. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  731. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  732. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  733. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  734. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  735. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  736. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  737. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  738. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  739. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  740. HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
  741. HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
  742. /**
  743. * @}
  744. */
  745. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  746. * @{
  747. */
  748. /* Peripheral State functions **************************************************/
  749. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  750. /**
  751. * @}
  752. */
  753. /** @addtogroup PCDEx_Private_Functions PCD Extended Private Functions
  754. * @{
  755. */
  756. void PCD_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
  757. void PCD_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
  758. /**
  759. * @}
  760. */
  761. /**
  762. * @}
  763. */
  764. /**
  765. * @}
  766. */
  767. #endif /* STM32F302xE || STM32F303xE || */
  768. /* STM32F302xC || STM32F303xC || */
  769. /* STM32F302x8 || */
  770. /* STM32F373xC */
  771. #ifdef __cplusplus
  772. }
  773. #endif
  774. #endif /* __STM32F3xx_HAL_PCD_H */
  775. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/