adc.h 2.4 KB

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  1. #ifndef _ADC_H__
  2. #define _ADC_H__
  3. #include "hal/hal.h"
  4. #include "stm32f3xx_ll_adc.h"
  5. #include "libs/types.h"
  6. typedef struct _R3_f3_1_adc_config {
  7. ADC_TypeDef * ADCx; /*!< First ADC peripheral to be used.*/
  8. u32 volatile * ADCDataReg1[6]; /*!< Contains the Address of ADC read value for one phase
  9. and all the 6 sectors */
  10. u32 volatile * ADCDataReg2[6]; /*!< Contains the Address of ADC read value for one phase
  11. and all the 6 sectors */
  12. uint32_t ADCConfig [6] ; /*!< values of JSQR for first ADC for 6 sectors */
  13. }R3_F30x_8_ADC_Config_t;
  14. static const R3_F30x_8_ADC_Config_t adc_config = {
  15. .ADCx = ADC1,
  16. .ADCConfig = {
  17. CURRENT_V_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_W_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
  18. CURRENT_U_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_W_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
  19. CURRENT_W_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_U_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
  20. CURRENT_V_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_U_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
  21. CURRENT_U_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_V_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
  22. CURRENT_W_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_V_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
  23. },
  24. .ADCDataReg1 = {
  25. &ADC1->JDR1,//V
  26. &ADC1->JDR1,//U
  27. &ADC1->JDR2,//U
  28. &ADC1->JDR2,//U
  29. &ADC1->JDR1,//U
  30. &ADC1->JDR2,//V
  31. },
  32. .ADCDataReg2 = {
  33. &ADC1->JDR2, //W
  34. &ADC1->JDR2, //W
  35. &ADC1->JDR1, //W
  36. &ADC1->JDR1, //V
  37. &ADC1->JDR2, //V
  38. &ADC1->JDR1, //W
  39. },
  40. };
  41. void HAL_ADC1_Init(void);
  42. void __inline HAL_ADC1_Inject_Config(u8 sector, u32 inject_flags) {
  43. adc_config.ADCx->JSQR = adc_config.ADCConfig[sector] | inject_flags;
  44. }
  45. void __inline HAL_ADC1_Inject_Read(u8 sector, u32 *v1, u32 *v2) {
  46. *v1 = *adc_config.ADCDataReg1[sector];
  47. *v2 = *adc_config.ADCDataReg2[sector];
  48. }
  49. #endif /* _ADC_H__ */