startup_stm32f373xc.s 18 KB

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  1. ;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f373xc.s
  3. ;* Author : MCD Application Team
  4. ;* Description : STM32F373xB/xC devices vector table for MDK-ARM toolchain.
  5. ;* This module performs:
  6. ;* - Set the initial SP
  7. ;* - Set the initial PC == Reset_Handler
  8. ;* - Set the vector table entries with the exceptions ISR address
  9. ;* - Branches to __main in the C library (which eventually
  10. ;* calls main()).
  11. ;* After Reset the CortexM4 processor is in Thread mode,
  12. ;* priority is Privileged, and the Stack is set to Main.
  13. ;*
  14. ;*******************************************************************************
  15. ;
  16. ;* Redistribution and use in source and binary forms, with or without modification,
  17. ;* are permitted provided that the following conditions are met:
  18. ;* 1. Redistributions of source code must retain the above copyright notice,
  19. ;* this list of conditions and the following disclaimer.
  20. ;* 2. Redistributions in binary form must reproduce the above copyright notice,
  21. ;* this list of conditions and the following disclaimer in the documentation
  22. ;* and/or other materials provided with the distribution.
  23. ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
  24. ;* may be used to endorse or promote products derived from this software
  25. ;* without specific prior written permission.
  26. ;*
  27. ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  28. ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  29. ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  30. ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  31. ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  33. ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  34. ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  35. ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36. ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37. ;
  38. ;*******************************************************************************
  39. ; Amount of memory (in bytes) allocated for Stack
  40. ; Tailor this value to your application needs
  41. ; <h> Stack Configuration
  42. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  43. ; </h>
  44. Stack_Size EQU 0x00000400
  45. AREA STACK, NOINIT, READWRITE, ALIGN=3
  46. Stack_Mem SPACE Stack_Size
  47. __initial_sp
  48. ; <h> Heap Configuration
  49. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  50. ; </h>
  51. Heap_Size EQU 0x00000200
  52. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  53. __heap_base
  54. Heap_Mem SPACE Heap_Size
  55. __heap_limit
  56. PRESERVE8
  57. THUMB
  58. ; Vector Table Mapped to Address 0 at Reset
  59. AREA RESET, DATA, READONLY
  60. EXPORT __Vectors
  61. EXPORT __Vectors_End
  62. EXPORT __Vectors_Size
  63. __Vectors DCD __initial_sp ; Top of Stack
  64. DCD Reset_Handler ; Reset Handler
  65. DCD NMI_Handler ; NMI Handler
  66. DCD HardFault_Handler ; Hard Fault Handler
  67. DCD MemManage_Handler ; MPU Fault Handler
  68. DCD BusFault_Handler ; Bus Fault Handler
  69. DCD UsageFault_Handler ; Usage Fault Handler
  70. DCD 0 ; Reserved
  71. DCD 0 ; Reserved
  72. DCD 0 ; Reserved
  73. DCD 0 ; Reserved
  74. DCD SVC_Handler ; SVCall Handler
  75. DCD DebugMon_Handler ; Debug Monitor Handler
  76. DCD 0 ; Reserved
  77. DCD PendSV_Handler ; PendSV Handler
  78. DCD SysTick_Handler ; SysTick Handler
  79. ; External Interrupts
  80. DCD WWDG_IRQHandler ; Window WatchDog
  81. DCD PVD_IRQHandler ; PVD through EXTI Line detection
  82. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  83. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  84. DCD FLASH_IRQHandler ; FLASH
  85. DCD RCC_IRQHandler ; RCC
  86. DCD EXTI0_IRQHandler ; EXTI Line0
  87. DCD EXTI1_IRQHandler ; EXTI Line1
  88. DCD EXTI2_TSC_IRQHandler ; EXTI Line2 and Touch Sense controller
  89. DCD EXTI3_IRQHandler ; EXTI Line3
  90. DCD EXTI4_IRQHandler ; EXTI Line4
  91. DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
  92. DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
  93. DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
  94. DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
  95. DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
  96. DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
  97. DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
  98. DCD ADC1_IRQHandler ; ADC1
  99. DCD CAN_TX_IRQHandler ; CAN TX
  100. DCD CAN_RX0_IRQHandler ; CAN RX0
  101. DCD CAN_RX1_IRQHandler ; CAN RX1
  102. DCD CAN_SCE_IRQHandler ; CAN SCE
  103. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  104. DCD TIM15_IRQHandler ; TIM15
  105. DCD TIM16_IRQHandler ; TIM16
  106. DCD TIM17_IRQHandler ; TIM17
  107. DCD TIM18_DAC2_IRQHandler ; TIM18 and DAC2
  108. DCD TIM2_IRQHandler ; TIM2
  109. DCD TIM3_IRQHandler ; TIM3
  110. DCD TIM4_IRQHandler ; TIM4
  111. DCD I2C1_EV_IRQHandler ; I2C1 Event
  112. DCD I2C1_ER_IRQHandler ; I2C1 Error
  113. DCD I2C2_EV_IRQHandler ; I2C2 Event
  114. DCD I2C2_ER_IRQHandler ; I2C2 Error
  115. DCD SPI1_IRQHandler ; SPI1
  116. DCD SPI2_IRQHandler ; SPI2
  117. DCD USART1_IRQHandler ; USART1
  118. DCD USART2_IRQHandler ; USART2
  119. DCD USART3_IRQHandler ; USART3
  120. DCD EXTI15_10_IRQHandler ; External Line[15:10]s
  121. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  122. DCD CEC_IRQHandler ; CEC
  123. DCD TIM12_IRQHandler ; TIM12
  124. DCD TIM13_IRQHandler ; TIM13
  125. DCD TIM14_IRQHandler ; TIM14
  126. DCD 0 ; Reserved
  127. DCD 0 ; Reserved
  128. DCD 0 ; Reserved
  129. DCD 0 ; Reserved
  130. DCD TIM5_IRQHandler ; TIM5
  131. DCD SPI3_IRQHandler ; SPI3
  132. DCD 0 ; Reserved
  133. DCD 0 ; Reserved
  134. DCD TIM6_DAC1_IRQHandler ; TIM6 and DAC1 Channel1 & channel2
  135. DCD TIM7_IRQHandler ; TIM7
  136. DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
  137. DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
  138. DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
  139. DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
  140. DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
  141. DCD SDADC1_IRQHandler ; SDADC1
  142. DCD SDADC2_IRQHandler ; SDADC2
  143. DCD SDADC3_IRQHandler ; SDADC3
  144. DCD COMP1_2_IRQHandler ; COMP1 and COMP2 global Interrupt
  145. DCD 0 ; Reserved
  146. DCD 0 ; Reserved
  147. DCD 0 ; Reserved
  148. DCD 0 ; Reserved
  149. DCD 0 ; Reserved
  150. DCD 0 ; Reserved
  151. DCD 0 ; Reserved
  152. DCD 0 ; Reserved
  153. DCD 0 ; Reserved
  154. DCD USB_HP_IRQHandler ; USB High Priority
  155. DCD USB_LP_IRQHandler ; USB Low Priority
  156. DCD USBWakeUp_IRQHandler ; USB Wakeup
  157. DCD 0 ; Reserved
  158. DCD TIM19_IRQHandler ; TIM19
  159. DCD 0 ; Reserved
  160. DCD 0 ; Reserved
  161. DCD FPU_IRQHandler ; FPU
  162. __Vectors_End
  163. __Vectors_Size EQU __Vectors_End - __Vectors
  164. AREA |.text|, CODE, READONLY
  165. ; Reset handler
  166. Reset_Handler PROC
  167. EXPORT Reset_Handler [WEAK]
  168. IMPORT SystemInit
  169. IMPORT __main
  170. LDR R0, =SystemInit
  171. BLX R0
  172. LDR R0, =__main
  173. BX R0
  174. ENDP
  175. ; Dummy Exception Handlers (infinite loops which can be modified)
  176. NMI_Handler PROC
  177. EXPORT NMI_Handler [WEAK]
  178. B .
  179. ENDP
  180. HardFault_Handler\
  181. PROC
  182. EXPORT HardFault_Handler [WEAK]
  183. B .
  184. ENDP
  185. MemManage_Handler\
  186. PROC
  187. EXPORT MemManage_Handler [WEAK]
  188. B .
  189. ENDP
  190. BusFault_Handler\
  191. PROC
  192. EXPORT BusFault_Handler [WEAK]
  193. B .
  194. ENDP
  195. UsageFault_Handler\
  196. PROC
  197. EXPORT UsageFault_Handler [WEAK]
  198. B .
  199. ENDP
  200. SVC_Handler PROC
  201. EXPORT SVC_Handler [WEAK]
  202. B .
  203. ENDP
  204. DebugMon_Handler\
  205. PROC
  206. EXPORT DebugMon_Handler [WEAK]
  207. B .
  208. ENDP
  209. PendSV_Handler PROC
  210. EXPORT PendSV_Handler [WEAK]
  211. B .
  212. ENDP
  213. SysTick_Handler PROC
  214. EXPORT SysTick_Handler [WEAK]
  215. B .
  216. ENDP
  217. Default_Handler PROC
  218. EXPORT WWDG_IRQHandler [WEAK]
  219. EXPORT PVD_IRQHandler [WEAK]
  220. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  221. EXPORT RTC_WKUP_IRQHandler [WEAK]
  222. EXPORT FLASH_IRQHandler [WEAK]
  223. EXPORT RCC_IRQHandler [WEAK]
  224. EXPORT EXTI0_IRQHandler [WEAK]
  225. EXPORT EXTI1_IRQHandler [WEAK]
  226. EXPORT EXTI2_TSC_IRQHandler [WEAK]
  227. EXPORT EXTI3_IRQHandler [WEAK]
  228. EXPORT EXTI4_IRQHandler [WEAK]
  229. EXPORT DMA1_Channel1_IRQHandler [WEAK]
  230. EXPORT DMA1_Channel2_IRQHandler [WEAK]
  231. EXPORT DMA1_Channel3_IRQHandler [WEAK]
  232. EXPORT DMA1_Channel4_IRQHandler [WEAK]
  233. EXPORT DMA1_Channel5_IRQHandler [WEAK]
  234. EXPORT DMA1_Channel6_IRQHandler [WEAK]
  235. EXPORT DMA1_Channel7_IRQHandler [WEAK]
  236. EXPORT ADC1_IRQHandler [WEAK]
  237. EXPORT CAN_TX_IRQHandler [WEAK]
  238. EXPORT CAN_RX0_IRQHandler [WEAK]
  239. EXPORT CAN_RX1_IRQHandler [WEAK]
  240. EXPORT CAN_SCE_IRQHandler [WEAK]
  241. EXPORT EXTI9_5_IRQHandler [WEAK]
  242. EXPORT TIM15_IRQHandler [WEAK]
  243. EXPORT TIM16_IRQHandler [WEAK]
  244. EXPORT TIM17_IRQHandler [WEAK]
  245. EXPORT TIM18_DAC2_IRQHandler [WEAK]
  246. EXPORT TIM2_IRQHandler [WEAK]
  247. EXPORT TIM3_IRQHandler [WEAK]
  248. EXPORT TIM4_IRQHandler [WEAK]
  249. EXPORT I2C1_EV_IRQHandler [WEAK]
  250. EXPORT I2C1_ER_IRQHandler [WEAK]
  251. EXPORT I2C2_EV_IRQHandler [WEAK]
  252. EXPORT I2C2_ER_IRQHandler [WEAK]
  253. EXPORT SPI1_IRQHandler [WEAK]
  254. EXPORT SPI2_IRQHandler [WEAK]
  255. EXPORT USART1_IRQHandler [WEAK]
  256. EXPORT USART2_IRQHandler [WEAK]
  257. EXPORT USART3_IRQHandler [WEAK]
  258. EXPORT EXTI15_10_IRQHandler [WEAK]
  259. EXPORT RTC_Alarm_IRQHandler [WEAK]
  260. EXPORT CEC_IRQHandler [WEAK]
  261. EXPORT TIM12_IRQHandler [WEAK]
  262. EXPORT TIM13_IRQHandler [WEAK]
  263. EXPORT TIM14_IRQHandler [WEAK]
  264. EXPORT TIM5_IRQHandler [WEAK]
  265. EXPORT SPI3_IRQHandler [WEAK]
  266. EXPORT TIM6_DAC1_IRQHandler [WEAK]
  267. EXPORT TIM7_IRQHandler [WEAK]
  268. EXPORT DMA2_Channel1_IRQHandler [WEAK]
  269. EXPORT DMA2_Channel2_IRQHandler [WEAK]
  270. EXPORT DMA2_Channel3_IRQHandler [WEAK]
  271. EXPORT DMA2_Channel4_IRQHandler [WEAK]
  272. EXPORT DMA2_Channel5_IRQHandler [WEAK]
  273. EXPORT SDADC1_IRQHandler [WEAK]
  274. EXPORT SDADC2_IRQHandler [WEAK]
  275. EXPORT SDADC3_IRQHandler [WEAK]
  276. EXPORT COMP1_2_IRQHandler [WEAK]
  277. EXPORT USB_HP_IRQHandler [WEAK]
  278. EXPORT USB_LP_IRQHandler [WEAK]
  279. EXPORT USBWakeUp_IRQHandler [WEAK]
  280. EXPORT TIM19_IRQHandler [WEAK]
  281. EXPORT FPU_IRQHandler [WEAK]
  282. WWDG_IRQHandler
  283. PVD_IRQHandler
  284. TAMP_STAMP_IRQHandler
  285. RTC_WKUP_IRQHandler
  286. FLASH_IRQHandler
  287. RCC_IRQHandler
  288. EXTI0_IRQHandler
  289. EXTI1_IRQHandler
  290. EXTI2_TSC_IRQHandler
  291. EXTI3_IRQHandler
  292. EXTI4_IRQHandler
  293. DMA1_Channel1_IRQHandler
  294. DMA1_Channel2_IRQHandler
  295. DMA1_Channel3_IRQHandler
  296. DMA1_Channel4_IRQHandler
  297. DMA1_Channel5_IRQHandler
  298. DMA1_Channel6_IRQHandler
  299. DMA1_Channel7_IRQHandler
  300. ADC1_IRQHandler
  301. CAN_TX_IRQHandler
  302. CAN_RX0_IRQHandler
  303. CAN_RX1_IRQHandler
  304. CAN_SCE_IRQHandler
  305. EXTI9_5_IRQHandler
  306. TIM15_IRQHandler
  307. TIM16_IRQHandler
  308. TIM17_IRQHandler
  309. TIM18_DAC2_IRQHandler
  310. TIM2_IRQHandler
  311. TIM3_IRQHandler
  312. TIM4_IRQHandler
  313. I2C1_EV_IRQHandler
  314. I2C1_ER_IRQHandler
  315. I2C2_EV_IRQHandler
  316. I2C2_ER_IRQHandler
  317. SPI1_IRQHandler
  318. SPI2_IRQHandler
  319. USART1_IRQHandler
  320. USART2_IRQHandler
  321. USART3_IRQHandler
  322. EXTI15_10_IRQHandler
  323. RTC_Alarm_IRQHandler
  324. CEC_IRQHandler
  325. TIM12_IRQHandler
  326. TIM13_IRQHandler
  327. TIM14_IRQHandler
  328. TIM5_IRQHandler
  329. SPI3_IRQHandler
  330. TIM6_DAC1_IRQHandler
  331. TIM7_IRQHandler
  332. DMA2_Channel1_IRQHandler
  333. DMA2_Channel2_IRQHandler
  334. DMA2_Channel3_IRQHandler
  335. DMA2_Channel4_IRQHandler
  336. DMA2_Channel5_IRQHandler
  337. SDADC1_IRQHandler
  338. SDADC2_IRQHandler
  339. SDADC3_IRQHandler
  340. COMP1_2_IRQHandler
  341. USB_HP_IRQHandler
  342. USB_LP_IRQHandler
  343. USBWakeUp_IRQHandler
  344. TIM19_IRQHandler
  345. FPU_IRQHandler
  346. B .
  347. ENDP
  348. ALIGN
  349. ;*******************************************************************************
  350. ; User Stack and Heap initialization
  351. ;*******************************************************************************
  352. IF :DEF:__MICROLIB
  353. EXPORT __initial_sp
  354. EXPORT __heap_base
  355. EXPORT __heap_limit
  356. ELSE
  357. IMPORT __use_two_region_memory
  358. EXPORT __user_initial_stackheap
  359. __user_initial_stackheap
  360. LDR R0, = Heap_Mem
  361. LDR R1, =(Stack_Mem + Stack_Size)
  362. LDR R2, = (Heap_Mem + Heap_Size)
  363. LDR R3, = Stack_Mem
  364. BX LR
  365. ALIGN
  366. ENDIF
  367. END
  368. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****