stm32f3xx_hal_hrtim.c 298 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f3xx_hal_hrtim.c
  4. * @author MCD Application Team
  5. * @brief TIM HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the High Resolution Timer (HRTIM) peripheral:
  8. * + HRTIM Initialization
  9. * + DLL Calibration Start
  10. * + Timer Time Base Unit Configuration
  11. * + Simple Time Base Start/Stop
  12. * + Simple Time Base Start/Stop Interrupt
  13. * + Simple Time Base Start/Stop DMA Request
  14. * + Simple Output Compare/PWM Channel Configuration
  15. * + Simple Output Compare/PWM Channel Start/Stop Interrupt
  16. * + Simple Output Compare/PWM Channel Start/Stop DMA Request
  17. * + Simple Input Capture Channel Configuration
  18. * + Simple Input Capture Channel Start/Stop Interrupt
  19. * + Simple Input Capture Channel Start/Stop DMA Request
  20. * + Simple One Pulse Channel Configuration
  21. * + Simple One Pulse Channel Start/Stop Interrupt
  22. * + HRTIM External Synchronization Configuration
  23. * + HRTIM Burst Mode Controller Configuration
  24. * + HRTIM Burst Mode Controller Enabling
  25. * + HRTIM External Events Conditioning Configuration
  26. * + HRTIM Faults Conditioning Configuration
  27. * + HRTIM Faults Enabling
  28. * + HRTIM ADC trigger Configuration
  29. * + Waveform Timer Configuration
  30. * + Waveform Event Filtering Configuration
  31. * + Waveform Dead Time Insertion Configuration
  32. * + Waveform Chopper Mode Configuration
  33. * + Waveform Compare Unit Configuration
  34. * + Waveform Capture Unit Configuration
  35. * + Waveform Output Configuration
  36. * + Waveform Counter Start/Stop
  37. * + Waveform Counter Start/Stop Interrupt
  38. * + Waveform Counter Start/Stop DMA Request
  39. * + Waveform Output Enabling
  40. * + Waveform Output Level Set/Get
  41. * + Waveform Output State Get
  42. * + Waveform Burst DMA Operation Configuration
  43. * + Waveform Burst DMA Operation Start
  44. * + Waveform Timer Counter Software Reset
  45. * + Waveform Capture Software Trigger
  46. * + Waveform Burst Mode Controller Software Trigger
  47. * + Waveform Timer Pre-loadable Registers Update Enabling
  48. * + Waveform Timer Pre-loadable Registers Software Update
  49. * + Waveform Timer Delayed Protection Status Get
  50. * + Waveform Timer Burst Status Get
  51. * + Waveform Timer Push-Pull Status Get
  52. * + Peripheral State Get
  53. @verbatim
  54. ==============================================================================
  55. ##### Simple mode v.s. waveform mode #####
  56. ==============================================================================
  57. [..] The HRTIM HAL API is split into 2 categories:
  58. (#)Simple functions: these functions allow for using a HRTIM timer as a
  59. general purpose timer with high resolution capabilities.
  60. HRTIM simple modes are managed through the set of functions named
  61. HAL_HRTIM_Simple<Function>. These functions are similar in name and usage
  62. to the one defined for the TIM peripheral. When a HRTIM timer operates in
  63. simple mode, only a very limited set of HRTIM features are used.
  64. Following simple modes are proposed:
  65. (++)Output compare mode,
  66. (++)PWM output mode,
  67. (++)Input capture mode,
  68. (++)One pulse mode.
  69. (#)Waveform functions: These functions allow taking advantage of the HRTIM
  70. flexibility to produce numerous types of control signal. When a HRTIM timer
  71. operates in waveform mode, all the HRTIM features are accessible without
  72. any restriction. HRTIM waveform modes are managed through the set of
  73. functions named HAL_HRTIM_Waveform<Function>
  74. ##### How to use this driver #####
  75. ==============================================================================
  76. [..]
  77. (#)Initialize the HRTIM low level resources by implementing the
  78. HAL_HRTIM_MspInit() function:
  79. (##)Enable the HRTIM clock source using __HRTIMx_CLK_ENABLE()
  80. (##)Connect HRTIM pins to MCU I/Os
  81. (+++) Enable the clock for the HRTIM GPIOs using the following
  82. function: __HAL_RCC_GPIOx_CLK_ENABLE()
  83. (+++) Configure these GPIO pins in Alternate Function mode using
  84. HAL_GPIO_Init()
  85. (##)When using DMA to control data transfer (e.g HAL_HRTIM_SimpleBaseStart_DMA())
  86. (+++)Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
  87. (+++)Initialize the DMA handle
  88. (+++)Associate the initialized DMA handle to the appropriate DMA
  89. handle of the HRTIM handle using __HAL_LINKDMA()
  90. (+++)Initialize the DMA channel using HAL_DMA_Init()
  91. (+++)Configure the priority and enable the NVIC for the transfer
  92. complete interrupt on the DMA channel using HAL_NVIC_SetPriority()
  93. and HAL_NVIC_EnableIRQ()
  94. (##)In case of using interrupt mode (e.g HAL_HRTIM_SimpleBaseStart_IT())
  95. (+++)Configure the priority and enable the NVIC for the concerned
  96. HRTIM interrupt using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
  97. (#)Initialize the HRTIM HAL using HAL_HRTIM_Init(). The HRTIM configuration
  98. structure (field of the HRTIM handle) specifies which global interrupt of
  99. whole HRTIM must be enabled (Burst mode period, System fault, Faults).
  100. It also contains the HRTIM external synchronization configuration. HRTIM
  101. can act as a master (generating a synchronization signal) or as a slave
  102. (waiting for a trigger to be synchronized).
  103. (#)Start the high resolution unit using HAL_HRTIM_DLLCalibrationStart(). DLL
  104. calibration is executed periodically and compensate for potential voltage
  105. and temperature drifts. DLL calibration period is specified by the
  106. CalibrationRate argument.
  107. (#)HRTIM timers cannot be used until the high resolution unit is ready. This
  108. can be checked using HAL_HRTIM_PollForDLLCalibration(): this function returns
  109. HAL_OK if DLL calibration is completed or HAL_TIMEOUT if the DLL calibration
  110. is still going on when timeout given as argument expires. DLL calibration
  111. can also be started in interrupt mode using HAL_HRTIM_DLLCalibrationStart_IT().
  112. In that case an interrupt is generated when the DLL calibration is completed.
  113. Note that as DLL calibration is executed on a periodic basis an interrupt
  114. will be generated at the end of every DLL calibration operation
  115. (worst case: one interrupt every 14 micro seconds !).
  116. (#) Configure HRTIM resources shared by all HRTIM timers
  117. (##)Burst Mode Controller:
  118. (+++)HAL_HRTIM_BurstModeConfig(): configures the HRTIM burst mode
  119. controller: operating mode (continuous or one-shot mode), clock
  120. (source, prescaler) , trigger(s), period, idle duration.
  121. (##)External Events Conditionning:
  122. (+++)HAL_HRTIM_EventConfig(): configures the conditioning of an
  123. external event channel: source, polarity, edge-sensitivity.
  124. External event can be used as triggers (timer reset, input
  125. capture, burst mode, ADC triggers, delayed protection)
  126. They can also be used to set or reset timer outputs. Up to
  127. 10 event channels are available.
  128. (+++)HAL_HRTIM_EventPrescalerConfig(): configures the external
  129. event sampling clock (used for digital filtering).
  130. (##)Fault Conditionning:
  131. (+++)HAL_HRTIM_FaultConfig(): configures the conditioning of a
  132. fault channel: source, polarity, edge-sensitivity. Fault
  133. channels are used to disable the outputs in case of an
  134. abnormal operation. Up to 5 fault channels are available.
  135. (+++)HAL_HRTIM_FaultPrescalerConfig(): configures the fault
  136. sampling clock (used for digital filtering).
  137. (+++)HAL_HRTIM_FaultModeCtl(): Enables or disables fault input(s)
  138. circuitry. By default all fault inputs are disabled.
  139. (##)ADC trigger:
  140. (+++)HAL_HRTIM_ADCTriggerConfig(): configures the source triggering
  141. the update of the ADC trigger register and the ADC trigger.
  142. 4 independent triggers are available to start both the regular
  143. and the injected sequencers of the 2 ADCs
  144. (#) Configure HRTIM timer time base using HAL_HRTIM_TimeBaseConfig(). This
  145. function must be called whatever the HRTIM timer operating mode is
  146. (simple v.s. waveform). It configures mainly:
  147. (##)The HRTIM timer counter operating mode (continuous v.s. one shot)
  148. (##)The HRTIM timer clock prescaler
  149. (##)The HRTIM timer period
  150. (##)The HRTIM timer repetition counter
  151. *** If the HRTIM timer operates in simple mode ***
  152. ===================================================
  153. [..]
  154. (#) Start or Stop simple timers
  155. (++)Simple time base: HAL_HRTIM_SimpleBaseStart(),HAL_HRTIM_SimpleBaseStop(),
  156. HAL_HRTIM_SimpleBaseStart_IT(),HAL_HRTIM_SimpleBaseStop_IT(),
  157. HAL_HRTIM_SimpleBaseStart_DMA(),HAL_HRTIM_SimpleBaseStop_DMA().
  158. (++)Simple output compare: HAL_HRTIM_SimpleOCChannelConfig(),
  159. HAL_HRTIM_SimpleOCStart(),HAL_HRTIM_SimpleOCStop(),
  160. HAL_HRTIM_SimpleOCStart_IT(),HAL_HRTIM_SimpleOCStop_IT(),
  161. HAL_HRTIM_SimpleOCStart_DMA(),HAL_HRTIM_SimpleOCStop_DMA(),
  162. (++)Simple PWM output: HAL_HRTIM_SimplePWMChannelConfig(),
  163. HAL_HRTIM_SimplePWMStart(),HAL_HRTIM_SimplePWMStop(),
  164. HAL_HRTIM_SimplePWMStart_IT(),HAL_HRTIM_SimplePWMStop_IT(),
  165. HAL_HRTIM_SimplePWMStart_DMA(),HAL_HRTIM_SimplePWMStop_DMA(),
  166. (++)Simple input capture: HAL_HRTIM_SimpleCaptureChannelConfig(),
  167. HAL_HRTIM_SimpleCaptureStart(),HAL_HRTIM_SimpleCaptureStop(),
  168. HAL_HRTIM_SimpleCaptureStart_IT(),HAL_HRTIM_SimpleCaptureStop_IT(),
  169. HAL_HRTIM_SimpleCaptureStart_DMA(),HAL_HRTIM_SimpleCaptureStop_DMA().
  170. (++)Simple one pulse: HAL_HRTIM_SimpleOnePulseChannelConfig(),
  171. HAL_HRTIM_SimpleOnePulseStart(),HAL_HRTIM_SimpleOnePulseStop(),
  172. HAL_HRTIM_SimpleOnePulseStart_IT(),HAL_HRTIM_SimpleOnePulseStop_It().
  173. *** If the HRTIM timer operates in waveform mode ***
  174. ====================================================
  175. [..]
  176. (#) Completes waveform timer configuration
  177. (++)HAL_HRTIM_WaveformTimerConfig(): configuration of a HRTIM timer
  178. operating in wave form mode mainly consists in:
  179. (+++)Enabling the HRTIM timer interrupts and DMA requests.
  180. (+++)Enabling the half mode for the HRTIM timer.
  181. (+++)Defining how the HRTIM timer reacts to external synchronization input.
  182. (+++)Enabling the push-pull mode for the HRTIM timer.
  183. (+++)Enabling the fault channels for the HRTIM timer.
  184. (+++)Enabling the dead-time insertion for the HRTIM timer.
  185. (+++)Setting the delayed protection mode for the HRTIM timer (source and outputs
  186. on which the delayed protection are applied).
  187. (+++)Specifying the HRTIM timer update and reset triggers.
  188. (+++)Specifying the HRTIM timer registers update policy (e.g. pre-load enabling).
  189. (++)HAL_HRTIM_TimerEventFilteringConfig(): configures external
  190. event blanking and windowing circuitry of a HRTIM timer:
  191. (+++)Blanking: to mask external events during a defined time period a defined time period
  192. (+++)Windowing, to enable external events only during a defined time period
  193. (++)HAL_HRTIM_DeadTimeConfig(): configures the dead-time insertion
  194. unit for a HRTIM timer. Allows to generate a couple of
  195. complementary signals from a single reference waveform,
  196. with programmable delays between active state.
  197. (++)HAL_HRTIM_ChopperModeConfig(): configures the parameters of
  198. the high-frequency carrier signal added on top of the timing
  199. unit output. Chopper mode can be enabled or disabled for each
  200. timer output separately (see HAL_HRTIM_WaveformOutputConfig()).
  201. (++)HAL_HRTIM_BurstDMAConfig(): configures the burst DMA burst
  202. controller. Allows having multiple HRTIM registers updated
  203. with a single DMA request. The burst DMA operation is started
  204. by calling HAL_HRTIM_BurstDMATransfer().
  205. (++)HAL_HRTIM_WaveformCompareConfig():configures the compare unit
  206. of a HRTIM timer. This operation consists in setting the
  207. compare value and possibly specifying the auto delayed mode
  208. for compare units 2 and 4 (allows to have compare events
  209. generated relatively to capture events). Note that when auto
  210. delayed mode is needed, the capture unit associated to the
  211. compare unit must be configured separately.
  212. (++)HAL_HRTIM_WaveformCaptureConfig(): configures the capture unit
  213. of a HRTIM timer. This operation consists in specifying the
  214. source(s) triggering the capture (timer register update event,
  215. external event, timer output set/reset event, other HRTIM
  216. timer related events).
  217. (++)HAL_HRTIM_WaveformOutputConfig(): configuration of a HRTIM timer
  218. output mainly consists in:
  219. (+++)Setting the output polarity (active high or active low),
  220. (+++)Defining the set/reset crossbar for the output,
  221. (+++)Specifying the fault level (active or inactive) in IDLE and FAULT states.,
  222. (#) Set waveform timer output(s) level
  223. (++)HAL_HRTIM_WaveformSetOutputLevel(): forces the output to its
  224. active or inactive level. For example, when deadtime insertion
  225. is enabled it is necessary to force the output level by software
  226. to have the outputs in a complementary state as soon as the RUN mode is entered.
  227. (#) Enable or Disable waveform timer output(s)
  228. (++)HAL_HRTIM_WaveformOutputStart(),HAL_HRTIM_WaveformOutputStop().
  229. (#) Start or Stop waveform HRTIM timer(s).
  230. (++)HAL_HRTIM_WaveformCounterStart(),HAL_HRTIM_WaveformCounterStop(),
  231. (++)HAL_HRTIM_WaveformCounterStart_IT(),HAL_HRTIM_WaveformCounterStop_IT(),
  232. (++)HAL_HRTIM_WaveformCounterStart()_DMA,HAL_HRTIM_WaveformCounterStop_DMA(),
  233. (#) Burst mode controller enabling:
  234. (++)HAL_HRTIM_BurstModeCtl(): activates or de-activates the
  235. burst mode controller.
  236. (#) Some HRTIM operations can be triggered by software:
  237. (++)HAL_HRTIM_BurstModeSoftwareTrigger(): calling this function
  238. trigs the burst operation.
  239. (++)HAL_HRTIM_SoftwareCapture(): calling this function trigs the
  240. capture of the HRTIM timer counter.
  241. (++)HAL_HRTIM_SoftwareUpdate(): calling this function trigs the
  242. update of the pre-loadable registers of the HRTIM timer
  243. (++)HAL_HRTIM_SoftwareReset():calling this function resets the
  244. HRTIM timer counter.
  245. (#) Some functions can be used any time to retrieve HRTIM timer related
  246. information
  247. (++)HAL_HRTIM_GetCapturedValue(): returns actual value of the
  248. capture register of the designated capture unit.
  249. (++)HAL_HRTIM_WaveformGetOutputLevel(): returns actual level
  250. (ACTIVE/INACTIVE) of the designated timer output.
  251. (++)HAL_HRTIM_WaveformGetOutputState():returns actual state
  252. (IDLE/RUN/FAULT) of the designated timer output.
  253. (++)HAL_HRTIM_GetDelayedProtectionStatus():returns actual level
  254. (ACTIVE/INACTIVE) of the designated output when the delayed
  255. protection was triggered.
  256. (++)HAL_HRTIM_GetBurstStatus(): returns the actual status
  257. (ACTIVE/INACTIVE) of the burst mode controller.
  258. (++)HAL_HRTIM_GetCurrentPushPullStatus(): when the push-pull mode
  259. is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
  260. the push-pull status indicates on which output the signal is currently
  261. active (e.g signal applied on output 1 and output 2 forced
  262. inactive or vice versa).
  263. (++)HAL_HRTIM_GetIdlePushPullStatus(): when the push-pull mode
  264. is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
  265. the idle push-pull status indicates during which period the
  266. delayed protection request occurred (e.g. protection occurred
  267. when the output 1 was active and output 2 forced inactive or
  268. vice versa).
  269. (#) Some functions can be used any time to retrieve actual HRTIM status
  270. (++)HAL_HRTIM_GetState(): returns actual HRTIM instance HAL state.
  271. @endverbatim
  272. ******************************************************************************
  273. * @attention
  274. *
  275. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  276. *
  277. * Redistribution and use in source and binary forms, with or without modification,
  278. * are permitted provided that the following conditions are met:
  279. * 1. Redistributions of source code must retain the above copyright notice,
  280. * this list of conditions and the following disclaimer.
  281. * 2. Redistributions in binary form must reproduce the above copyright notice,
  282. * this list of conditions and the following disclaimer in the documentation
  283. * and/or other materials provided with the distribution.
  284. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  285. * may be used to endorse or promote products derived from this software
  286. * without specific prior written permission.
  287. *
  288. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  289. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  290. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  291. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  292. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  293. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  294. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  295. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  296. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  297. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  298. *
  299. ******************************************************************************
  300. */
  301. /* Includes ------------------------------------------------------------------*/
  302. #include "stm32f3xx_hal.h"
  303. /** @addtogroup STM32F3xx_HAL_Driver
  304. * @{
  305. */
  306. #ifdef HAL_HRTIM_MODULE_ENABLED
  307. #if defined(STM32F334x8)
  308. /** @defgroup HRTIM HRTIM
  309. * @brief HRTIM HAL module driver
  310. * @{
  311. */
  312. /* Private typedef -----------------------------------------------------------*/
  313. /* Private define ------------------------------------------------------------*/
  314. /** @defgroup HRTIM_Private_Defines HRTIM Private Define
  315. * @{
  316. */
  317. #define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN |\
  318. HRTIM_FLTR_FLT2EN |\
  319. HRTIM_FLTR_FLT3EN |\
  320. HRTIM_FLTR_FLT4EN | \
  321. HRTIM_FLTR_FLT5EN)
  322. #define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER |\
  323. HRTIM_TIMUPDATETRIGGER_TIMER_A |\
  324. HRTIM_TIMUPDATETRIGGER_TIMER_B |\
  325. HRTIM_TIMUPDATETRIGGER_TIMER_C |\
  326. HRTIM_TIMUPDATETRIGGER_TIMER_D |\
  327. HRTIM_TIMUPDATETRIGGER_TIMER_E)
  328. /**
  329. * @}
  330. */
  331. /* Private macro -------------------------------------------------------------*/
  332. /* Private variables ---------------------------------------------------------*/
  333. /** @defgroup HRTIM_Private_Variables HRTIM Private Variables
  334. * @{
  335. */
  336. static uint32_t TimerIdxToTimerId[] =
  337. {
  338. HRTIM_TIMERID_TIMER_A,
  339. HRTIM_TIMERID_TIMER_B,
  340. HRTIM_TIMERID_TIMER_C,
  341. HRTIM_TIMERID_TIMER_D,
  342. HRTIM_TIMERID_TIMER_E,
  343. HRTIM_TIMERID_MASTER,
  344. };
  345. /**
  346. * @}
  347. */
  348. /* Private function prototypes -----------------------------------------------*/
  349. /** @defgroup HRTIM_Private_Functions HRTIM Private Functions
  350. * @{
  351. */
  352. static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
  353. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
  354. static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
  355. uint32_t TimerIdx,
  356. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
  357. static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  358. HRTIM_TimerCfgTypeDef * pTimerCfg);
  359. static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  360. uint32_t TimerIdx,
  361. HRTIM_TimerCfgTypeDef * pTimerCfg);
  362. static void HRTIM_CompareUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  363. uint32_t TimerIdx,
  364. uint32_t CompareUnit,
  365. HRTIM_CompareCfgTypeDef * pCompareCfg);
  366. static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  367. uint32_t TimerIdx,
  368. uint32_t CaptureUnit,
  369. uint32_t Event);
  370. static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
  371. uint32_t TimerIdx,
  372. uint32_t Output,
  373. HRTIM_OutputCfgTypeDef * pOutputCfg);
  374. static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  375. uint32_t Event,
  376. HRTIM_EventCfgTypeDef * pEventCfg);
  377. static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
  378. uint32_t TimerIdx,
  379. uint32_t Event);
  380. static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim,
  381. uint32_t TimerIdx,
  382. uint32_t OCChannel);
  383. static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim,
  384. uint32_t TimerIdx,
  385. uint32_t OCChannel);
  386. static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim,
  387. uint32_t TimerIdx);
  388. static uint32_t GetTimerIdxFromDMAHandle(DMA_HandleTypeDef *hdma);
  389. static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
  390. uint32_t TimerIdx);
  391. static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim);
  392. static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim);
  393. static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
  394. uint32_t TimerIdx);
  395. static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma);
  396. static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma);
  397. static void HRTIM_DMAError(DMA_HandleTypeDef *hdma);
  398. static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma);
  399. /**
  400. * @}
  401. */
  402. /* Exported functions ---------------------------------------------------------*/
  403. /** @defgroup HRTIM_Exported_Functions HRTIM Exported Functions
  404. * @{
  405. */
  406. /** @defgroup HRTIM_Exported_Functions_Group1 Initialization and de-initialization functions
  407. * @brief Initialization and Configuration functions
  408. @verbatim
  409. ===============================================================================
  410. ##### Initialization and Time Base Configuration functions #####
  411. ===============================================================================
  412. [..] This section provides functions allowing to:
  413. (+) Initialize a HRTIM instance
  414. (+) De-initialize a HRTIM instance
  415. (+) Initialize the HRTIM MSP
  416. (+) De-initialize the HRTIM MSP
  417. (+) Start the high-resolution unit (start DLL calibration)
  418. (+) Check that the high resolution unit is ready (DLL calibration done)
  419. (+) Configure the time base unit of a HRTIM timer
  420. @endverbatim
  421. * @{
  422. */
  423. /**
  424. * @brief Initializes a HRTIM instance
  425. * @param hhrtim pointer to HAL HRTIM handle
  426. * @retval HAL status
  427. */
  428. HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
  429. {
  430. uint8_t timer_idx;
  431. uint32_t hrtim_mcr;
  432. /* Check the HRTIM handle allocation */
  433. if(hhrtim == NULL)
  434. {
  435. return HAL_ERROR;
  436. }
  437. /* Check the parameters */
  438. assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
  439. assert_param(IS_HRTIM_IT(hhrtim->Init.HRTIMInterruptResquests));
  440. /* Set the HRTIM state */
  441. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  442. /* Initialize the DMA handles */
  443. hhrtim->hdmaMaster = (DMA_HandleTypeDef *)NULL;
  444. hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)NULL;
  445. hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)NULL;
  446. hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)NULL;
  447. hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)NULL;
  448. hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)NULL;
  449. /* HRTIM output synchronization configuration (if required) */
  450. if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != RESET)
  451. {
  452. /* Check parameters */
  453. assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(hhrtim->Init.SyncOutputSource));
  454. assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(hhrtim->Init.SyncOutputPolarity));
  455. /* The synchronization output initialization procedure must be done prior
  456. to the configuration of the MCU outputs (done within HAL_HRTIM_MspInit)
  457. */
  458. if (hhrtim->Instance == HRTIM1)
  459. {
  460. /* Enable the HRTIM peripheral clock */
  461. __HAL_RCC_HRTIM1_CLK_ENABLE();
  462. }
  463. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  464. /* Set the event to be sent on the synchronization output */
  465. hrtim_mcr &= ~(HRTIM_MCR_SYNC_SRC);
  466. hrtim_mcr |= (hhrtim->Init.SyncOutputSource & HRTIM_MCR_SYNC_SRC);
  467. /* Set the polarity of the synchronization output */
  468. hrtim_mcr &= ~(HRTIM_MCR_SYNC_OUT);
  469. hrtim_mcr |= (hhrtim->Init.SyncOutputPolarity & HRTIM_MCR_SYNC_OUT);
  470. /* Update the HRTIM registers */
  471. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  472. }
  473. /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  474. HAL_HRTIM_MspInit(hhrtim);
  475. /* HRTIM input synchronization configuration (if required) */
  476. if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_SLAVE) != RESET)
  477. {
  478. /* Check parameters */
  479. assert_param(IS_HRTIM_SYNCINPUTSOURCE(hhrtim->Init.SyncInputSource));
  480. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  481. /* Set the synchronization input source */
  482. hrtim_mcr &= ~(HRTIM_MCR_SYNC_IN);
  483. hrtim_mcr |= (hhrtim->Init.SyncInputSource & HRTIM_MCR_SYNC_IN);
  484. /* Update the HRTIM registers */
  485. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  486. }
  487. /* Initialize the HRTIM state*/
  488. hhrtim->State = HAL_HRTIM_STATE_READY;
  489. /* Initialize the lock status of the HRTIM HAL API */
  490. __HAL_UNLOCK(hhrtim);
  491. /* Tnitialize timer related parameters */
  492. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  493. timer_idx <= HRTIM_TIMERINDEX_MASTER ;
  494. timer_idx++)
  495. {
  496. hhrtim->TimerParam[timer_idx].CaptureTrigger1 = HRTIM_CAPTURETRIGGER_NONE;
  497. hhrtim->TimerParam[timer_idx].CaptureTrigger2 = HRTIM_CAPTURETRIGGER_NONE;
  498. hhrtim->TimerParam[timer_idx].InterruptRequests = HRTIM_IT_NONE;
  499. hhrtim->TimerParam[timer_idx].DMARequests = HRTIM_IT_NONE;
  500. hhrtim->TimerParam[timer_idx].DMASrcAddress = 0U;
  501. hhrtim->TimerParam[timer_idx].DMASize = 0U;
  502. }
  503. return HAL_OK;
  504. }
  505. /**
  506. * @brief De-initializes a HRTIM instance
  507. * @param hhrtim pointer to HAL HRTIM handle
  508. * @retval HAL status
  509. */
  510. HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim)
  511. {
  512. /* Check the HRTIM handle allocation */
  513. if(hhrtim == NULL)
  514. {
  515. return HAL_ERROR;
  516. }
  517. /* Check the parameters */
  518. assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
  519. /* Set the HRTIM state */
  520. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  521. /* DeInit the low level hardware */
  522. HAL_HRTIM_MspDeInit(hhrtim);
  523. hhrtim->State = HAL_HRTIM_STATE_READY;
  524. return HAL_OK;
  525. }
  526. /**
  527. * @brief MSP initialization for a HRTIM instance
  528. * @param hhrtim pointer to HAL HRTIM handle
  529. * @retval None
  530. */
  531. __weak void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef * hhrtim)
  532. {
  533. /* Prevent unused argument(s) compilation warning */
  534. UNUSED(hhrtim);
  535. /* NOTE: This function should not be modified, when the callback is needed,
  536. the HAL_HRTIM_MspInit could be implemented in the user file
  537. */
  538. }
  539. /**
  540. * @brief MSP de-initialization for a for a HRTIM instance
  541. * @param hhrtim pointer to HAL HRTIM handle
  542. * @retval None
  543. */
  544. __weak void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef * hhrtim)
  545. {
  546. /* Prevent unused argument(s) compilation warning */
  547. UNUSED(hhrtim);
  548. /* NOTE: This function should not be modified, when the callback is needed,
  549. the HAL_HRTIM_MspDeInit could be implemented in the user file
  550. */
  551. }
  552. /**
  553. * @brief Starts the DLL calibration
  554. * @param hhrtim pointer to HAL HRTIM handle
  555. * @param CalibrationRate DLL calibration period
  556. * This parameter can be one of the following values:
  557. * @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration
  558. * @arg HRTIM_CALIBRATIONRATE_7300: Periodic DLL calibration. T=7.3 ms
  559. * @arg HRTIM_CALIBRATIONRATE_910: Periodic DLL calibration. T=910 us
  560. * @arg HRTIM_CALIBRATIONRATE_114: Periodic DLL calibration. T=114 us
  561. * @arg HRTIM_CALIBRATIONRATE_14: Periodic DLL calibration. T=14 us
  562. * @retval HAL status
  563. * @note This function locks the HRTIM instance. HRTIM instance is unlocked
  564. * within the HAL_HRTIM_PollForDLLCalibration function, just before
  565. * exiting the function.
  566. */
  567. HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart(HRTIM_HandleTypeDef * hhrtim,
  568. uint32_t CalibrationRate)
  569. {
  570. uint32_t hrtim_dllcr;
  571. /* Check the parameters */
  572. assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate));
  573. /* Process Locked */
  574. __HAL_LOCK(hhrtim);
  575. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  576. /* Configure DLL Calibration */
  577. hrtim_dllcr = hhrtim->Instance->sCommonRegs.DLLCR;
  578. if (CalibrationRate == HRTIM_SINGLE_CALIBRATION)
  579. {
  580. /* One shot DLL calibration */
  581. hrtim_dllcr &= ~(HRTIM_DLLCR_CALEN);
  582. hrtim_dllcr |= HRTIM_DLLCR_CAL;
  583. }
  584. else
  585. {
  586. /* Periodic DLL calibration */
  587. hrtim_dllcr &= ~(HRTIM_DLLCR_CALRTE | HRTIM_DLLCR_CAL);
  588. hrtim_dllcr |= (CalibrationRate | HRTIM_DLLCR_CALEN);
  589. }
  590. /* Update HRTIM register */
  591. hhrtim->Instance->sCommonRegs.DLLCR = hrtim_dllcr;
  592. return HAL_OK;
  593. }
  594. /**
  595. * @brief Starts the DLL calibration.
  596. * DLL ready interrupt is enabled
  597. * @param hhrtim pointer to HAL HRTIM handle
  598. * @param CalibrationRate DLL calibration period
  599. * This parameter can be one of the following values:
  600. * @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration
  601. * @arg HRTIM_CALIBRATIONRATE_7300: Periodic DLL calibration. T=7.3 ms
  602. * @arg HRTIM_CALIBRATIONRATE_910: Periodic DLL calibration. T=910 us
  603. * @arg HRTIM_CALIBRATIONRATE_114: Periodic DLL calibration. T=114 us
  604. * @arg HRTIM_CALIBRATIONRATE_14: Periodic DLL calibration. T=14 us
  605. * @retval HAL status
  606. * @note This function locks the HRTIM instance. HRTIM instance is unlocked
  607. * within the IRQ processing function when processing the DLL ready
  608. * interrupt.
  609. * @note If this function is called for periodic calibration, the DLLRDY
  610. * interrupt is generated every time the calibration completes which
  611. * will significantly increases the overall interrupt rate.
  612. */
  613. HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart_IT(HRTIM_HandleTypeDef * hhrtim,
  614. uint32_t CalibrationRate)
  615. {
  616. uint32_t hrtim_dllcr;
  617. /* Check the parameters */
  618. assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate));
  619. /* Process Locked */
  620. __HAL_LOCK(hhrtim);
  621. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  622. /* Enable DLL Ready interrupt flag */
  623. __HAL_HRTIM_ENABLE_IT(hhrtim, HRTIM_IT_DLLRDY);
  624. /* Configure DLL Calibration */
  625. hrtim_dllcr = hhrtim->Instance->sCommonRegs.DLLCR;
  626. if (CalibrationRate == HRTIM_SINGLE_CALIBRATION)
  627. {
  628. /* One shot DLL calibration */
  629. hrtim_dllcr &= ~(HRTIM_DLLCR_CALEN);
  630. hrtim_dllcr |= HRTIM_DLLCR_CAL;
  631. }
  632. else
  633. {
  634. /* Periodic DLL calibration */
  635. hrtim_dllcr &= ~(HRTIM_DLLCR_CALRTE | HRTIM_DLLCR_CAL);
  636. hrtim_dllcr |= (CalibrationRate | HRTIM_DLLCR_CALEN);
  637. }
  638. /* Update HRTIM register */
  639. hhrtim->Instance->sCommonRegs.DLLCR = hrtim_dllcr;
  640. return HAL_OK;
  641. }
  642. /**
  643. * @brief Polls the DLL calibration ready flag and returns when the flag is
  644. * set (DLL calibration completed) or upon timeout expiration
  645. * @param hhrtim pointer to HAL HRTIM handle
  646. * @param Timeout Timeout duration in millisecond
  647. * @retval HAL status
  648. */
  649. HAL_StatusTypeDef HAL_HRTIM_PollForDLLCalibration(HRTIM_HandleTypeDef * hhrtim,
  650. uint32_t Timeout)
  651. {
  652. uint32_t tickstart=0U;
  653. tickstart = HAL_GetTick();
  654. /* Check End of conversion flag */
  655. while(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_IT_DLLRDY) == RESET)
  656. {
  657. if (Timeout != HAL_MAX_DELAY)
  658. {
  659. if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
  660. {
  661. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  662. return HAL_TIMEOUT;
  663. }
  664. }
  665. }
  666. /* Set HRTIM State */
  667. hhrtim->State = HAL_HRTIM_STATE_READY;
  668. /* Process unlocked */
  669. __HAL_UNLOCK(hhrtim);
  670. return HAL_OK;
  671. }
  672. /**
  673. * @brief Configures the time base unit of a timer
  674. * @param hhrtim pointer to HAL HRTIM handle
  675. * @param TimerIdx Timer index
  676. * This parameter can be one of the following values:
  677. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  678. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  679. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  680. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  681. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  682. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  683. * @param pTimeBaseCfg pointer to the time base configuration structure
  684. * @note This function must be called prior starting the timer
  685. * @note The time-base unit initialization parameters specify:
  686. * The timer counter operating mode (continuous, one shot),
  687. * The timer clock prescaler,
  688. * The timer period ,
  689. * The timer repetition counter.
  690. * @retval HAL status
  691. */
  692. HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim,
  693. uint32_t TimerIdx,
  694. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  695. {
  696. /* Check the parameters */
  697. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  698. assert_param(IS_HRTIM_PRESCALERRATIO(pTimeBaseCfg->PrescalerRatio));
  699. assert_param(IS_HRTIM_MODE(pTimeBaseCfg->Mode));
  700. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  701. {
  702. return HAL_BUSY;
  703. }
  704. /* Set the HRTIM state */
  705. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  706. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  707. {
  708. /* Configure master timer time base unit */
  709. HRTIM_MasterBase_Config(hhrtim, pTimeBaseCfg);
  710. }
  711. else
  712. {
  713. /* Configure timing unit time base unit */
  714. HRTIM_TimingUnitBase_Config(hhrtim, TimerIdx, pTimeBaseCfg);
  715. }
  716. /* Set HRTIM state */
  717. hhrtim->State = HAL_HRTIM_STATE_READY;
  718. return HAL_OK;
  719. }
  720. /**
  721. * @}
  722. */
  723. /** @defgroup HRTIM_Exported_Functions_Group2 Simple time base mode functions
  724. * @brief Simple time base mode functions.
  725. @verbatim
  726. ===============================================================================
  727. ##### Simple time base mode functions #####
  728. ===============================================================================
  729. [..] This section provides functions allowing to:
  730. (+) Start simple time base
  731. (+) Stop simple time base
  732. (+) Start simple time base and enable interrupt
  733. (+) Stop simple time base and disable interrupt
  734. (+) Start simple time base and enable DMA transfer
  735. (+) Stop simple time base and disable DMA transfer
  736. -@- When a HRTIM timer operates in simple time base mode, the timer
  737. counter counts from 0 to the period value.
  738. @endverbatim
  739. * @{
  740. */
  741. /**
  742. * @brief Starts the counter of a timer operating in simple time base mode.
  743. * @param hhrtim pointer to HAL HRTIM handle
  744. * @param TimerIdx Timer index.
  745. * This parameter can be one of the following values:
  746. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  747. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  748. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  749. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  750. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  751. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  752. * @retval HAL status
  753. */
  754. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef * hhrtim,
  755. uint32_t TimerIdx)
  756. {
  757. /* Check the parameters */
  758. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  759. /* Process Locked */
  760. __HAL_LOCK(hhrtim);
  761. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  762. /* Enable the timer counter */
  763. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  764. hhrtim->State = HAL_HRTIM_STATE_READY;
  765. /* Process Unlocked */
  766. __HAL_UNLOCK(hhrtim);
  767. return HAL_OK;
  768. }
  769. /**
  770. * @brief Stops the counter of a timer operating in simple time base mode.
  771. * @param hhrtim pointer to HAL HRTIM handle
  772. * @param TimerIdx Timer index.
  773. * This parameter can be one of the following values:
  774. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  775. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  776. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  777. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  778. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  779. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  780. * @retval HAL status
  781. */
  782. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef * hhrtim,
  783. uint32_t TimerIdx)
  784. {
  785. /* Check the parameters */
  786. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  787. /* Process Locked */
  788. __HAL_LOCK(hhrtim);
  789. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  790. /* Disable the timer counter */
  791. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  792. hhrtim->State = HAL_HRTIM_STATE_READY;
  793. /* Process Unlocked */
  794. __HAL_UNLOCK(hhrtim);
  795. return HAL_OK;
  796. }
  797. /**
  798. * @brief Starts the counter of a timer operating in simple time base mode
  799. * (Timer repetition interrupt is enabled).
  800. * @param hhrtim pointer to HAL HRTIM handle
  801. * @param TimerIdx Timer index.
  802. * This parameter can be one of the following values:
  803. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  804. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  805. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  806. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  807. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  808. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  809. * @retval HAL status
  810. */
  811. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef * hhrtim,
  812. uint32_t TimerIdx)
  813. {
  814. /* Check the parameters */
  815. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  816. /* Process Locked */
  817. __HAL_LOCK(hhrtim);
  818. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  819. /* Enable the repetition interrupt */
  820. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  821. {
  822. __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  823. }
  824. else
  825. {
  826. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  827. }
  828. /* Enable the timer counter */
  829. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  830. hhrtim->State = HAL_HRTIM_STATE_READY;
  831. /* Process Unlocked */
  832. __HAL_UNLOCK(hhrtim);
  833. return HAL_OK;
  834. }
  835. /**
  836. * @brief Stops the counter of a timer operating in simple time base mode
  837. * (Timer repetition interrupt is disabled).
  838. * @param hhrtim pointer to HAL HRTIM handle
  839. * @param TimerIdx Timer index.
  840. * This parameter can be one of the following values:
  841. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  842. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  843. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  844. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  845. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  846. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  847. * @retval HAL status
  848. */
  849. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef * hhrtim,
  850. uint32_t TimerIdx)
  851. {
  852. /* Check the parameters */
  853. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  854. /* Process Locked */
  855. __HAL_LOCK(hhrtim);
  856. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  857. /* Disable the repetition interrupt */
  858. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  859. {
  860. __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  861. }
  862. else
  863. {
  864. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  865. }
  866. /* Disable the timer counter */
  867. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  868. hhrtim->State = HAL_HRTIM_STATE_READY;
  869. /* Process Unlocked */
  870. __HAL_UNLOCK(hhrtim);
  871. return HAL_OK;
  872. }
  873. /**
  874. * @brief Starts the counter of a timer operating in simple time base mode
  875. * (Timer repetition DMA request is enabled).
  876. * @param hhrtim pointer to HAL HRTIM handle
  877. * @param TimerIdx Timer index.
  878. * This parameter can be one of the following values:
  879. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  880. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  881. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  882. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  883. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  884. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  885. * @param SrcAddr DMA transfer source address
  886. * @param DestAddr DMA transfer destination address
  887. * @param Length The length of data items (data size) to be transferred
  888. * from source to destination
  889. */
  890. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  891. uint32_t TimerIdx,
  892. uint32_t SrcAddr,
  893. uint32_t DestAddr,
  894. uint32_t Length)
  895. {
  896. DMA_HandleTypeDef * hdma;
  897. /* Check the parameters */
  898. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  899. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  900. {
  901. return HAL_BUSY;
  902. }
  903. if((hhrtim->State == HAL_HRTIM_STATE_READY))
  904. {
  905. if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
  906. {
  907. return HAL_ERROR;
  908. }
  909. else
  910. {
  911. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  912. }
  913. }
  914. /* Process Locked */
  915. __HAL_LOCK(hhrtim);
  916. /* Get the timer DMA handler */
  917. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  918. if (hdma == NULL)
  919. {
  920. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  921. /* Process Unlocked */
  922. __HAL_UNLOCK(hhrtim);
  923. return HAL_ERROR;
  924. }
  925. /* Set the DMA transfer completed callback */
  926. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  927. {
  928. hdma->XferCpltCallback = HRTIM_DMAMasterCplt;
  929. }
  930. else
  931. {
  932. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  933. }
  934. /* Set the DMA error callback */
  935. hdma->XferErrorCallback = HRTIM_DMAError ;
  936. /* Enable the DMA channel */
  937. HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
  938. /* Enable the timer repetition DMA request */
  939. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  940. {
  941. __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
  942. }
  943. else
  944. {
  945. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
  946. }
  947. /* Enable the timer counter */
  948. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  949. hhrtim->State = HAL_HRTIM_STATE_READY;
  950. /* Process Unlocked */
  951. __HAL_UNLOCK(hhrtim);
  952. return HAL_OK;
  953. }
  954. /**
  955. * @brief Stops the counter of a timer operating in simple time base mode
  956. * (Timer repetition DMA request is disabled).
  957. * @param hhrtim pointer to HAL HRTIM handle
  958. * @param TimerIdx Timer index.
  959. * This parameter can be one of the following values:
  960. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  961. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  962. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  963. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  964. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  965. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  966. * @retval HAL status
  967. */
  968. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  969. uint32_t TimerIdx)
  970. {
  971. DMA_HandleTypeDef * hdma;
  972. /* Check the parameters */
  973. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  974. /* Process Locked */
  975. __HAL_LOCK(hhrtim);
  976. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  977. {
  978. /* Disable the DMA */
  979. HAL_DMA_Abort(hhrtim->hdmaMaster);
  980. /* Disable the timer repetition DMA request */
  981. __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
  982. }
  983. else
  984. {
  985. /* Get the timer DMA handler */
  986. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  987. if (hdma == NULL)
  988. {
  989. /* Disable the timer repetition DMA request */
  990. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
  991. /* Disable the timer counter */
  992. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  993. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  994. /* Process Unlocked */
  995. __HAL_UNLOCK(hhrtim);
  996. return HAL_ERROR;
  997. }
  998. else
  999. {
  1000. /* Disable the DMA */
  1001. HAL_DMA_Abort(hdma);
  1002. /* Disable the timer repetition DMA request */
  1003. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
  1004. }
  1005. }
  1006. /* Disable the timer counter */
  1007. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1008. hhrtim->State = HAL_HRTIM_STATE_READY;
  1009. /* Process Unlocked */
  1010. __HAL_UNLOCK(hhrtim);
  1011. return HAL_OK;
  1012. }
  1013. /**
  1014. * @}
  1015. */
  1016. /** @defgroup HRTIM_Exported_Functions_Group3 Simple output compare mode functions
  1017. * @brief Simple output compare functions
  1018. @verbatim
  1019. ===============================================================================
  1020. ##### Simple output compare functions #####
  1021. ===============================================================================
  1022. [..] This section provides functions allowing to:
  1023. (+) Configure simple output channel
  1024. (+) Start simple output compare
  1025. (+) Stop simple output compare
  1026. (+) Start simple output compare and enable interrupt
  1027. (+) Stop simple output compare and disable interrupt
  1028. (+) Start simple output compare and enable DMA transfer
  1029. (+) Stop simple output compare and disable DMA transfer
  1030. -@- When a HRTIM timer operates in simple output compare mode
  1031. the output level is set to a programmable value when a match
  1032. is found between the compare register and the counter.
  1033. Compare unit 1 is automatically associated to output 1
  1034. Compare unit 2 is automatically associated to output 2
  1035. @endverbatim
  1036. * @{
  1037. */
  1038. /**
  1039. * @brief Configures an output in simple output compare mode
  1040. * @param hhrtim pointer to HAL HRTIM handle
  1041. * @param TimerIdx Timer index
  1042. * This parameter can be one of the following values:
  1043. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1044. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1045. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1046. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1047. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1048. * @param OCChannel Timer output
  1049. * This parameter can be one of the following values:
  1050. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1051. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1052. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1053. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1054. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1055. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1056. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1057. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1058. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1059. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1060. * @param pSimpleOCChannelCfg pointer to the simple output compare output configuration structure
  1061. * @note When the timer operates in simple output compare mode:
  1062. * Output 1 is implicitly controlled by the compare unit 1
  1063. * Output 2 is implicitly controlled by the compare unit 2
  1064. * Output Set/Reset crossbar is set according to the selected output compare mode:
  1065. * Toggle: SETxyR = RSTxyR = CMPy
  1066. * Active: SETxyR = CMPy, RSTxyR = 0
  1067. * Inactive: SETxy =0, RSTxy = CMPy
  1068. * @retval HAL status
  1069. */
  1070. HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  1071. uint32_t TimerIdx,
  1072. uint32_t OCChannel,
  1073. HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg)
  1074. {
  1075. uint32_t CompareUnit = 0xFFFFFFFFU;
  1076. HRTIM_CompareCfgTypeDef CompareCfg = {0};
  1077. HRTIM_OutputCfgTypeDef OutputCfg = {0};
  1078. /* Check parameters */
  1079. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1080. assert_param(IS_HRTIM_BASICOCMODE(pSimpleOCChannelCfg->Mode));
  1081. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOCChannelCfg->Polarity));
  1082. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOCChannelCfg->IdleLevel));
  1083. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  1084. {
  1085. return HAL_BUSY;
  1086. }
  1087. /* Set HRTIM state */
  1088. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1089. /* Configure timer compare unit */
  1090. switch (OCChannel)
  1091. {
  1092. case HRTIM_OUTPUT_TA1:
  1093. case HRTIM_OUTPUT_TB1:
  1094. case HRTIM_OUTPUT_TC1:
  1095. case HRTIM_OUTPUT_TD1:
  1096. case HRTIM_OUTPUT_TE1:
  1097. {
  1098. CompareUnit = HRTIM_COMPAREUNIT_1;
  1099. }
  1100. break;
  1101. case HRTIM_OUTPUT_TA2:
  1102. case HRTIM_OUTPUT_TB2:
  1103. case HRTIM_OUTPUT_TC2:
  1104. case HRTIM_OUTPUT_TD2:
  1105. case HRTIM_OUTPUT_TE2:
  1106. {
  1107. CompareUnit = HRTIM_COMPAREUNIT_2;
  1108. }
  1109. break;
  1110. default:
  1111. break;
  1112. }
  1113. CompareCfg.CompareValue = pSimpleOCChannelCfg->Pulse;
  1114. CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
  1115. CompareCfg.AutoDelayedTimeout = 0U;
  1116. HRTIM_CompareUnitConfig(hhrtim,
  1117. TimerIdx,
  1118. CompareUnit,
  1119. &CompareCfg);
  1120. /* Configure timer output */
  1121. OutputCfg.Polarity = pSimpleOCChannelCfg->Polarity;
  1122. OutputCfg.IdleLevel = pSimpleOCChannelCfg->IdleLevel;
  1123. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  1124. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  1125. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  1126. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  1127. switch (pSimpleOCChannelCfg->Mode)
  1128. {
  1129. case HRTIM_BASICOCMODE_TOGGLE:
  1130. {
  1131. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1132. {
  1133. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  1134. }
  1135. else
  1136. {
  1137. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  1138. }
  1139. OutputCfg.ResetSource = OutputCfg.SetSource;
  1140. }
  1141. break;
  1142. case HRTIM_BASICOCMODE_ACTIVE:
  1143. {
  1144. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1145. {
  1146. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  1147. }
  1148. else
  1149. {
  1150. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  1151. }
  1152. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
  1153. }
  1154. break;
  1155. case HRTIM_BASICOCMODE_INACTIVE:
  1156. {
  1157. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1158. {
  1159. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1;
  1160. }
  1161. else
  1162. {
  1163. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2;
  1164. }
  1165. OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
  1166. }
  1167. break;
  1168. default:
  1169. break;
  1170. }
  1171. HRTIM_OutputConfig(hhrtim,
  1172. TimerIdx,
  1173. OCChannel,
  1174. &OutputCfg);
  1175. /* Set HRTIM state */
  1176. hhrtim->State = HAL_HRTIM_STATE_READY;
  1177. return HAL_OK;
  1178. }
  1179. /**
  1180. * @brief Starts the output compare signal generation on the designed timer output
  1181. * @param hhrtim pointer to HAL HRTIM handle
  1182. * @param TimerIdx Timer index
  1183. * This parameter can be one of the following values:
  1184. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1185. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1186. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1187. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1188. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1189. * @param OCChannel Timer output
  1190. * This parameter can be one of the following values:
  1191. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1192. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1193. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1194. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1195. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1196. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1197. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1198. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1199. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1200. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1201. * @retval HAL status
  1202. */
  1203. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef * hhrtim,
  1204. uint32_t TimerIdx,
  1205. uint32_t OCChannel)
  1206. {
  1207. /* Check the parameters */
  1208. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1209. /* Process Locked */
  1210. __HAL_LOCK(hhrtim);
  1211. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1212. /* Enable the timer output */
  1213. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1214. /* Enable the timer counter */
  1215. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1216. hhrtim->State = HAL_HRTIM_STATE_READY;
  1217. /* Process Unlocked */
  1218. __HAL_UNLOCK(hhrtim);
  1219. return HAL_OK;
  1220. }
  1221. /**
  1222. * @brief Stops the output compare signal generation on the designed timer output
  1223. * @param hhrtim pointer to HAL HRTIM handle
  1224. * @param TimerIdx Timer index
  1225. * This parameter can be one of the following values:
  1226. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1227. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1228. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1229. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1230. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1231. * @param OCChannel Timer output
  1232. * This parameter can be one of the following values:
  1233. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1234. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1235. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1236. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1237. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1238. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1239. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1240. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1241. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1242. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1243. * @retval HAL status
  1244. */
  1245. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef * hhrtim,
  1246. uint32_t TimerIdx,
  1247. uint32_t OCChannel)
  1248. {
  1249. /* Check the parameters */
  1250. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1251. /* Process Locked */
  1252. __HAL_LOCK(hhrtim);
  1253. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1254. /* Disable the timer output */
  1255. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1256. /* Disable the timer counter */
  1257. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1258. hhrtim->State = HAL_HRTIM_STATE_READY;
  1259. /* Process Unlocked */
  1260. __HAL_UNLOCK(hhrtim);
  1261. return HAL_OK;
  1262. }
  1263. /**
  1264. * @brief Starts the output compare signal generation on the designed timer output
  1265. * (Interrupt is enabled (see note note below)).
  1266. * @param hhrtim pointer to HAL HRTIM handle
  1267. * @param TimerIdx Timer index
  1268. * This parameter can be one of the following values:
  1269. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1270. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1271. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1272. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1273. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1274. * @param OCChannel Timer output
  1275. * This parameter can be one of the following values:
  1276. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1277. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1278. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1279. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1280. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1281. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1282. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1283. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1284. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1285. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1286. * @note Interrupt enabling depends on the chosen output compare mode
  1287. * Output toggle: compare match interrupt is enabled
  1288. * Output set active: output set interrupt is enabled
  1289. * Output set inactive: output reset interrupt is enabled
  1290. * @retval HAL status
  1291. */
  1292. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef * hhrtim,
  1293. uint32_t TimerIdx,
  1294. uint32_t OCChannel)
  1295. {
  1296. uint32_t interrupt;
  1297. /* Check the parameters */
  1298. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1299. /* Process Locked */
  1300. __HAL_LOCK(hhrtim);
  1301. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1302. /* Get the interrupt to enable (depends on the output compare mode) */
  1303. interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
  1304. /* Enable the timer output */
  1305. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1306. /* Enable the timer interrupt (depends on the output compare mode) */
  1307. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, interrupt);
  1308. /* Enable the timer counter */
  1309. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1310. hhrtim->State = HAL_HRTIM_STATE_READY;
  1311. /* Process Unlocked */
  1312. __HAL_UNLOCK(hhrtim);
  1313. return HAL_OK;
  1314. }
  1315. /**
  1316. * @brief Stops the output compare signal generation on the designed timer output
  1317. * (Interrupt is disabled).
  1318. * @param hhrtim pointer to HAL HRTIM handle
  1319. * @param TimerIdx Timer index
  1320. * This parameter can be one of the following values:
  1321. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1322. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1323. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1324. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1325. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1326. * @param OCChannel Timer output
  1327. * This parameter can be one of the following values:
  1328. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1329. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1330. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1331. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1332. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1333. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1334. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1335. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1336. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1337. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1338. * @retval HAL status
  1339. */
  1340. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef * hhrtim,
  1341. uint32_t TimerIdx,
  1342. uint32_t OCChannel)
  1343. {
  1344. uint32_t interrupt;
  1345. /* Check the parameters */
  1346. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1347. /* Process Locked */
  1348. __HAL_LOCK(hhrtim);
  1349. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1350. /* Disable the timer output */
  1351. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1352. /* Get the interrupt to disable (depends on the output compare mode) */
  1353. interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
  1354. /* Disable the timer interrupt */
  1355. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, interrupt);
  1356. /* Disable the timer counter */
  1357. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1358. hhrtim->State = HAL_HRTIM_STATE_READY;
  1359. /* Process Unlocked */
  1360. __HAL_UNLOCK(hhrtim);
  1361. return HAL_OK;
  1362. }
  1363. /**
  1364. * @brief Starts the output compare signal generation on the designed timer output
  1365. * (DMA request is enabled (see note below)).
  1366. * @param hhrtim pointer to HAL HRTIM handle
  1367. * @param TimerIdx Timer index
  1368. * This parameter can be one of the following values:
  1369. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1370. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1371. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1372. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1373. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1374. * @param OCChannel Timer output
  1375. * This parameter can be one of the following values:
  1376. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1377. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1378. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1379. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1380. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1381. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1382. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1383. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1384. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1385. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1386. * @param SrcAddr DMA transfer source address
  1387. * @param DestAddr DMA transfer destination address
  1388. * @param Length The length of data items (data size) to be transferred
  1389. * from source to destination
  1390. * @note DMA request enabling depends on the chosen output compare mode
  1391. * Output toggle: compare match DMA request is enabled
  1392. * Output set active: output set DMA request is enabled
  1393. * Output set inactive: output reset DMA request is enabled
  1394. * @retval HAL status
  1395. */
  1396. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  1397. uint32_t TimerIdx,
  1398. uint32_t OCChannel,
  1399. uint32_t SrcAddr,
  1400. uint32_t DestAddr,
  1401. uint32_t Length)
  1402. {
  1403. DMA_HandleTypeDef * hdma;
  1404. uint32_t dma_request;
  1405. /* Check the parameters */
  1406. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1407. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  1408. {
  1409. return HAL_BUSY;
  1410. }
  1411. if((hhrtim->State == HAL_HRTIM_STATE_READY))
  1412. {
  1413. if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
  1414. {
  1415. return HAL_ERROR;
  1416. }
  1417. else
  1418. {
  1419. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1420. }
  1421. }
  1422. /* Process Locked */
  1423. __HAL_LOCK(hhrtim);
  1424. /* Enable the timer output */
  1425. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1426. /* Get the DMA request to enable */
  1427. dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
  1428. /* Get the timer DMA handler */
  1429. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1430. if (hdma == NULL)
  1431. {
  1432. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1433. /* Process Unlocked */
  1434. __HAL_UNLOCK(hhrtim);
  1435. return HAL_ERROR;
  1436. }
  1437. /* Set the DMA error callback */
  1438. hdma->XferErrorCallback = HRTIM_DMAError ;
  1439. /* Set the DMA transfer completed callback */
  1440. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  1441. /* Enable the DMA channel */
  1442. HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
  1443. /* Enable the timer DMA request */
  1444. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, dma_request);
  1445. /* Enable the timer counter */
  1446. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1447. hhrtim->State = HAL_HRTIM_STATE_READY;
  1448. /* Process Unlocked */
  1449. __HAL_UNLOCK(hhrtim);
  1450. return HAL_OK;
  1451. }
  1452. /**
  1453. * @brief Stops the output compare signal generation on the designed timer output
  1454. * (DMA request is disabled).
  1455. * @param hhrtim pointer to HAL HRTIM handle
  1456. * @param TimerIdx Timer index
  1457. * This parameter can be one of the following values:
  1458. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1459. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1460. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1461. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1462. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1463. * @param OCChannel Timer output
  1464. * This parameter can be one of the following values:
  1465. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1466. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1467. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1468. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1469. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1470. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1471. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1472. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1473. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1474. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1475. * @retval HAL status
  1476. */
  1477. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  1478. uint32_t TimerIdx,
  1479. uint32_t OCChannel)
  1480. {
  1481. DMA_HandleTypeDef * hdma;
  1482. uint32_t dma_request;
  1483. /* Check the parameters */
  1484. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1485. /* Process Locked */
  1486. __HAL_LOCK(hhrtim);
  1487. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1488. /* Disable the timer output */
  1489. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1490. /* Get the timer DMA handler */
  1491. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1492. if (hdma == NULL)
  1493. {
  1494. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1495. /* Process Unlocked */
  1496. __HAL_UNLOCK(hhrtim);
  1497. return HAL_ERROR;
  1498. }
  1499. /* Disable the DMA */
  1500. HAL_DMA_Abort(hdma);
  1501. /* Get the DMA request to disable */
  1502. dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
  1503. /* Disable the timer DMA request */
  1504. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, dma_request);
  1505. /* Disable the timer counter */
  1506. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1507. hhrtim->State = HAL_HRTIM_STATE_READY;
  1508. /* Process Unlocked */
  1509. __HAL_UNLOCK(hhrtim);
  1510. return HAL_OK;
  1511. }
  1512. /**
  1513. * @}
  1514. */
  1515. /** @defgroup HRTIM_Exported_Functions_Group4 Simple PWM output mode functions
  1516. * @brief Simple PWM output functions
  1517. @verbatim
  1518. ===============================================================================
  1519. ##### Simple PWM output functions #####
  1520. ===============================================================================
  1521. [..] This section provides functions allowing to:
  1522. (+) Configure simple PWM output channel
  1523. (+) Start simple PWM output
  1524. (+) Stop simple PWM output
  1525. (+) Start simple PWM output and enable interrupt
  1526. (+) Stop simple PWM output and disable interrupt
  1527. (+) Start simple PWM output and enable DMA transfer
  1528. (+) Stop simple PWM output and disable DMA transfer
  1529. -@- When a HRTIM timer operates in simple PWM output mode
  1530. the output level is set to a programmable value when a match is
  1531. found between the compare register and the counter and reset when
  1532. the timer period is reached. Duty cycle is determined by the
  1533. comparison value.
  1534. Compare unit 1 is automatically associated to output 1
  1535. Compare unit 2 is automatically associated to output 2
  1536. @endverbatim
  1537. * @{
  1538. */
  1539. /**
  1540. * @brief Configures an output in simple PWM mode
  1541. * @param hhrtim pointer to HAL HRTIM handle
  1542. * @param TimerIdx Timer index
  1543. * This parameter can be one of the following values:
  1544. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1545. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1546. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1547. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1548. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1549. * @param PWMChannel Timer output
  1550. * This parameter can be one of the following values:
  1551. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1552. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1553. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1554. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1555. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1556. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1557. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1558. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1559. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1560. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1561. * @param pSimplePWMChannelCfg pointer to the simple PWM output configuration structure
  1562. * @note When the timer operates in simple PWM output mode:
  1563. * Output 1 is implicitly controlled by the compare unit 1
  1564. * Output 2 is implicitly controlled by the compare unit 2
  1565. * Output Set/Reset crossbar is set as follows:
  1566. * Output 1: SETx1R = CMP1, RSTx1R = PER
  1567. * Output 2: SETx2R = CMP2, RST2R = PER
  1568. * @note When Simple PWM mode is used the registers preload mechanism is
  1569. * enabled (otherwise the behavior is not guaranteed).
  1570. * @retval HAL status
  1571. */
  1572. HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  1573. uint32_t TimerIdx,
  1574. uint32_t PWMChannel,
  1575. HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg)
  1576. {
  1577. uint32_t CompareUnit = 0xFFFFFFFFU;
  1578. HRTIM_CompareCfgTypeDef CompareCfg;
  1579. HRTIM_OutputCfgTypeDef OutputCfg;
  1580. uint32_t hrtim_timcr;
  1581. /* Check parameters */
  1582. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1583. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimplePWMChannelCfg->Polarity));
  1584. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimplePWMChannelCfg->IdleLevel));
  1585. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  1586. {
  1587. return HAL_BUSY;
  1588. }
  1589. /* Process Locked */
  1590. __HAL_LOCK(hhrtim); hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1591. /* Configure timer compare unit */
  1592. switch (PWMChannel)
  1593. {
  1594. case HRTIM_OUTPUT_TA1:
  1595. case HRTIM_OUTPUT_TB1:
  1596. case HRTIM_OUTPUT_TC1:
  1597. case HRTIM_OUTPUT_TD1:
  1598. case HRTIM_OUTPUT_TE1:
  1599. {
  1600. CompareUnit = HRTIM_COMPAREUNIT_1;
  1601. }
  1602. break;
  1603. case HRTIM_OUTPUT_TA2:
  1604. case HRTIM_OUTPUT_TB2:
  1605. case HRTIM_OUTPUT_TC2:
  1606. case HRTIM_OUTPUT_TD2:
  1607. case HRTIM_OUTPUT_TE2:
  1608. {
  1609. CompareUnit = HRTIM_COMPAREUNIT_2;
  1610. }
  1611. break;
  1612. default:
  1613. break;
  1614. }
  1615. CompareCfg.CompareValue = pSimplePWMChannelCfg->Pulse;
  1616. CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
  1617. CompareCfg.AutoDelayedTimeout = 0U;
  1618. HRTIM_CompareUnitConfig(hhrtim,
  1619. TimerIdx,
  1620. CompareUnit,
  1621. &CompareCfg);
  1622. /* Configure timer output */
  1623. OutputCfg.Polarity = pSimplePWMChannelCfg->Polarity;
  1624. OutputCfg.IdleLevel = pSimplePWMChannelCfg->IdleLevel;
  1625. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  1626. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  1627. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  1628. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  1629. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1630. {
  1631. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  1632. }
  1633. else
  1634. {
  1635. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  1636. }
  1637. OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER;
  1638. HRTIM_OutputConfig(hhrtim,
  1639. TimerIdx,
  1640. PWMChannel,
  1641. &OutputCfg);
  1642. /* Enable the registers preload mechanism */
  1643. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  1644. hrtim_timcr |= HRTIM_TIMCR_PREEN;
  1645. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  1646. hhrtim->State = HAL_HRTIM_STATE_READY;
  1647. /* Process Unlocked */
  1648. __HAL_UNLOCK(hhrtim);
  1649. return HAL_OK;
  1650. }
  1651. /**
  1652. * @brief Starts the PWM output signal generation on the designed timer output
  1653. * @param hhrtim pointer to HAL HRTIM handle
  1654. * @param TimerIdx Timer index
  1655. * This parameter can be one of the following values:
  1656. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1657. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1658. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1659. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1660. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1661. * @param PWMChannel Timer output
  1662. * This parameter can be one of the following values:
  1663. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1664. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1665. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1666. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1667. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1668. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1669. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1670. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1671. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1672. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1673. * @retval HAL status
  1674. */
  1675. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef * hhrtim,
  1676. uint32_t TimerIdx,
  1677. uint32_t PWMChannel)
  1678. {
  1679. /* Check the parameters */
  1680. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1681. /* Process Locked */
  1682. __HAL_LOCK(hhrtim);
  1683. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1684. /* Enable the timer output */
  1685. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  1686. /* Enable the timer counter */
  1687. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1688. hhrtim->State = HAL_HRTIM_STATE_READY;
  1689. /* Process Unlocked */
  1690. __HAL_UNLOCK(hhrtim);
  1691. return HAL_OK;
  1692. }
  1693. /**
  1694. * @brief Stops the PWM output signal generation on the designed timer output
  1695. * @param hhrtim pointer to HAL HRTIM handle
  1696. * @param TimerIdx Timer index
  1697. * This parameter can be one of the following values:
  1698. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1699. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1700. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1701. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1702. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1703. * @param PWMChannel Timer output
  1704. * This parameter can be one of the following values:
  1705. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1706. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1707. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1708. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1709. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1710. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1711. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1712. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1713. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1714. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1715. * @retval HAL status
  1716. */
  1717. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef * hhrtim,
  1718. uint32_t TimerIdx,
  1719. uint32_t PWMChannel)
  1720. {
  1721. /* Check the parameters */
  1722. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1723. /* Process Locked */
  1724. __HAL_LOCK(hhrtim);
  1725. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1726. /* Disable the timer output */
  1727. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  1728. /* Disable the timer counter */
  1729. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1730. hhrtim->State = HAL_HRTIM_STATE_READY;
  1731. /* Process Unlocked */
  1732. __HAL_UNLOCK(hhrtim);
  1733. return HAL_OK;
  1734. }
  1735. /**
  1736. * @brief Starts the PWM output signal generation on the designed timer output
  1737. * (The compare interrupt is enabled).
  1738. * @param hhrtim pointer to HAL HRTIM handle
  1739. * @param TimerIdx Timer index
  1740. * This parameter can be one of the following values:
  1741. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1742. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1743. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1744. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1745. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1746. * @param PWMChannel Timer output
  1747. * This parameter can be one of the following values:
  1748. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1749. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1750. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1751. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1752. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1753. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1754. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1755. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1756. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1757. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1758. * @retval HAL status
  1759. */
  1760. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef * hhrtim,
  1761. uint32_t TimerIdx,
  1762. uint32_t PWMChannel)
  1763. {
  1764. /* Check the parameters */
  1765. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1766. /* Process Locked */
  1767. __HAL_LOCK(hhrtim);
  1768. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1769. /* Enable the timer output */
  1770. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  1771. /* Enable the timer interrupt (depends on the PWM output) */
  1772. switch (PWMChannel)
  1773. {
  1774. case HRTIM_OUTPUT_TA1:
  1775. case HRTIM_OUTPUT_TB1:
  1776. case HRTIM_OUTPUT_TC1:
  1777. case HRTIM_OUTPUT_TD1:
  1778. case HRTIM_OUTPUT_TE1:
  1779. {
  1780. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  1781. }
  1782. break;
  1783. case HRTIM_OUTPUT_TA2:
  1784. case HRTIM_OUTPUT_TB2:
  1785. case HRTIM_OUTPUT_TC2:
  1786. case HRTIM_OUTPUT_TD2:
  1787. case HRTIM_OUTPUT_TE2:
  1788. {
  1789. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  1790. }
  1791. break;
  1792. default:
  1793. break;
  1794. }
  1795. /* Enable the timer counter */
  1796. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1797. hhrtim->State = HAL_HRTIM_STATE_READY;
  1798. /* Process Unlocked */
  1799. __HAL_UNLOCK(hhrtim);
  1800. return HAL_OK;
  1801. }
  1802. /**
  1803. * @brief Stops the PWM output signal generation on the designed timer output
  1804. * (The compare interrupt is disabled).
  1805. * @param hhrtim pointer to HAL HRTIM handle
  1806. * @param TimerIdx Timer index
  1807. * This parameter can be one of the following values:
  1808. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1809. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1810. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1811. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1812. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1813. * @param PWMChannel Timer output
  1814. * This parameter can be one of the following values:
  1815. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1816. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1817. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1818. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1819. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1820. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1821. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1822. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1823. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1824. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1825. * @retval HAL status
  1826. */
  1827. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef * hhrtim,
  1828. uint32_t TimerIdx,
  1829. uint32_t PWMChannel)
  1830. {
  1831. /* Check the parameters */
  1832. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1833. /* Process Locked */
  1834. __HAL_LOCK(hhrtim);
  1835. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1836. /* Disable the timer output */
  1837. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  1838. /* Disable the timer interrupt (depends on the PWM output) */
  1839. switch (PWMChannel)
  1840. {
  1841. case HRTIM_OUTPUT_TA1:
  1842. case HRTIM_OUTPUT_TB1:
  1843. case HRTIM_OUTPUT_TC1:
  1844. case HRTIM_OUTPUT_TD1:
  1845. case HRTIM_OUTPUT_TE1:
  1846. {
  1847. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  1848. }
  1849. break;
  1850. case HRTIM_OUTPUT_TA2:
  1851. case HRTIM_OUTPUT_TB2:
  1852. case HRTIM_OUTPUT_TC2:
  1853. case HRTIM_OUTPUT_TD2:
  1854. case HRTIM_OUTPUT_TE2:
  1855. {
  1856. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  1857. }
  1858. break;
  1859. default:
  1860. break;
  1861. }
  1862. /* Disable the timer counter */
  1863. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1864. hhrtim->State = HAL_HRTIM_STATE_READY;
  1865. /* Process Unlocked */
  1866. __HAL_UNLOCK(hhrtim);
  1867. return HAL_OK;
  1868. }
  1869. /**
  1870. * @brief Starts the PWM output signal generation on the designed timer output
  1871. * (The compare DMA request is enabled).
  1872. * @param hhrtim pointer to HAL HRTIM handle
  1873. * @param TimerIdx Timer index
  1874. * This parameter can be one of the following values:
  1875. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1876. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1877. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1878. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1879. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1880. * @param PWMChannel Timer output
  1881. * This parameter can be one of the following values:
  1882. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1883. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1884. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1885. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1886. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1887. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1888. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1889. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1890. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1891. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1892. * @param SrcAddr DMA transfer source address
  1893. * @param DestAddr DMA transfer destination address
  1894. * @param Length The length of data items (data size) to be transferred
  1895. * from source to destination
  1896. * @retval HAL status
  1897. */
  1898. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  1899. uint32_t TimerIdx,
  1900. uint32_t PWMChannel,
  1901. uint32_t SrcAddr,
  1902. uint32_t DestAddr,
  1903. uint32_t Length)
  1904. {
  1905. DMA_HandleTypeDef * hdma;
  1906. /* Check the parameters */
  1907. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1908. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  1909. {
  1910. return HAL_BUSY;
  1911. }
  1912. if((hhrtim->State == HAL_HRTIM_STATE_READY))
  1913. {
  1914. if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
  1915. {
  1916. return HAL_ERROR;
  1917. }
  1918. else
  1919. {
  1920. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1921. }
  1922. }
  1923. /* Process Locked */
  1924. __HAL_LOCK(hhrtim);
  1925. /* Enable the timer output */
  1926. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  1927. /* Get the timer DMA handler */
  1928. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1929. if (hdma == NULL)
  1930. {
  1931. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1932. /* Process Unlocked */
  1933. __HAL_UNLOCK(hhrtim);
  1934. return HAL_ERROR;
  1935. }
  1936. /* Set the DMA error callback */
  1937. hdma->XferErrorCallback = HRTIM_DMAError ;
  1938. /* Set the DMA transfer completed callback */
  1939. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  1940. /* Enable the DMA channel */
  1941. HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
  1942. /* Enable the timer DMA request */
  1943. switch (PWMChannel)
  1944. {
  1945. case HRTIM_OUTPUT_TA1:
  1946. case HRTIM_OUTPUT_TB1:
  1947. case HRTIM_OUTPUT_TC1:
  1948. case HRTIM_OUTPUT_TD1:
  1949. case HRTIM_OUTPUT_TE1:
  1950. {
  1951. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
  1952. }
  1953. break;
  1954. case HRTIM_OUTPUT_TA2:
  1955. case HRTIM_OUTPUT_TB2:
  1956. case HRTIM_OUTPUT_TC2:
  1957. case HRTIM_OUTPUT_TD2:
  1958. case HRTIM_OUTPUT_TE2:
  1959. {
  1960. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
  1961. }
  1962. break;
  1963. default:
  1964. break;
  1965. }
  1966. /* Enable the timer counter */
  1967. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1968. hhrtim->State = HAL_HRTIM_STATE_READY;
  1969. /* Process Unlocked */
  1970. __HAL_UNLOCK(hhrtim);
  1971. return HAL_OK;
  1972. }
  1973. /**
  1974. * @brief Stops the PWM output signal generation on the designed timer output
  1975. * (The compare DMA request is disabled).
  1976. * @param hhrtim pointer to HAL HRTIM handle
  1977. * @param TimerIdx Timer index
  1978. * This parameter can be one of the following values:
  1979. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1980. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1981. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1982. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1983. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1984. * @param PWMChannel Timer output
  1985. * This parameter can be one of the following values:
  1986. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1987. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1988. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1989. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1990. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1991. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1992. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1993. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1994. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1995. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1996. * @retval HAL status
  1997. */
  1998. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  1999. uint32_t TimerIdx,
  2000. uint32_t PWMChannel)
  2001. {
  2002. DMA_HandleTypeDef * hdma;
  2003. /* Check the parameters */
  2004. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  2005. /* Process Locked */
  2006. __HAL_LOCK(hhrtim);
  2007. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2008. /* Disable the timer output */
  2009. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  2010. /* Get the timer DMA handler */
  2011. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  2012. if (hdma == NULL)
  2013. {
  2014. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2015. /* Process Unlocked */
  2016. __HAL_UNLOCK(hhrtim);
  2017. return HAL_ERROR;
  2018. }
  2019. /* Disable the DMA */
  2020. HAL_DMA_Abort(hdma);
  2021. /* Disable the timer DMA request */
  2022. switch (PWMChannel)
  2023. {
  2024. case HRTIM_OUTPUT_TA1:
  2025. case HRTIM_OUTPUT_TB1:
  2026. case HRTIM_OUTPUT_TC1:
  2027. case HRTIM_OUTPUT_TD1:
  2028. case HRTIM_OUTPUT_TE1:
  2029. {
  2030. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
  2031. }
  2032. break;
  2033. case HRTIM_OUTPUT_TA2:
  2034. case HRTIM_OUTPUT_TB2:
  2035. case HRTIM_OUTPUT_TC2:
  2036. case HRTIM_OUTPUT_TD2:
  2037. case HRTIM_OUTPUT_TE2:
  2038. {
  2039. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
  2040. }
  2041. break;
  2042. default:
  2043. break;
  2044. }
  2045. /* Disable the timer counter */
  2046. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2047. hhrtim->State = HAL_HRTIM_STATE_READY;
  2048. /* Process Unlocked */
  2049. __HAL_UNLOCK(hhrtim);
  2050. return HAL_OK;
  2051. }
  2052. /**
  2053. * @}
  2054. */
  2055. /** @defgroup HRTIM_Exported_Functions_Group5 Simple input capture functions
  2056. * @brief Simple input capture functions
  2057. @verbatim
  2058. ===============================================================================
  2059. ##### Simple input capture functions #####
  2060. ===============================================================================
  2061. [..] This section provides functions allowing to:
  2062. (+) Configure simple input capture channel
  2063. (+) Start simple input capture
  2064. (+) Stop simple input capture
  2065. (+) Start simple input capture and enable interrupt
  2066. (+) Stop simple input capture and disable interrupt
  2067. (+) Start simple input capture and enable DMA transfer
  2068. (+) Stop simple input capture and disable DMA transfer
  2069. -@- When a HRTIM timer operates in simple input capture mode
  2070. the Capture Register (HRTIM_CPT1/2xR) is used to latch the
  2071. value of the timer counter counter after a transition detected
  2072. on a given external event input.
  2073. @endverbatim
  2074. * @{
  2075. */
  2076. /**
  2077. * @brief Configures a simple capture
  2078. * @param hhrtim pointer to HAL HRTIM handle
  2079. * @param TimerIdx Timer index
  2080. * This parameter can be one of the following values:
  2081. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2082. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2083. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2084. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2085. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2086. * @param CaptureChannel Capture unit
  2087. * This parameter can be one of the following values:
  2088. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2089. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2090. * @param pSimpleCaptureChannelCfg pointer to the simple capture configuration structure
  2091. * @note When the timer operates in simple capture mode the capture is trigerred
  2092. * by the designated external event and GPIO input is implicitly used as event source.
  2093. * The cature can be triggered by a rising edge, a falling edge or both
  2094. * edges on event channel.
  2095. * @retval HAL status
  2096. */
  2097. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  2098. uint32_t TimerIdx,
  2099. uint32_t CaptureChannel,
  2100. HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg)
  2101. {
  2102. HRTIM_EventCfgTypeDef EventCfg;
  2103. /* Check parameters */
  2104. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2105. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2106. assert_param(IS_HRTIM_EVENT(pSimpleCaptureChannelCfg->Event));
  2107. assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleCaptureChannelCfg->EventSensitivity,
  2108. pSimpleCaptureChannelCfg->EventPolarity));
  2109. assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleCaptureChannelCfg->EventSensitivity));
  2110. assert_param(IS_HRTIM_EVENTFILTER(pSimpleCaptureChannelCfg->Event,
  2111. pSimpleCaptureChannelCfg->EventFilter));
  2112. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2113. {
  2114. return HAL_BUSY;
  2115. }
  2116. /* Process Locked */
  2117. __HAL_LOCK(hhrtim);
  2118. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2119. /* Configure external event channel */
  2120. EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
  2121. EventCfg.Filter = pSimpleCaptureChannelCfg->EventFilter;
  2122. EventCfg.Polarity = pSimpleCaptureChannelCfg->EventPolarity;
  2123. EventCfg.Sensitivity = pSimpleCaptureChannelCfg->EventSensitivity;
  2124. EventCfg.Source = HRTIM_EVENTSRC_1;
  2125. HRTIM_EventConfig(hhrtim,
  2126. pSimpleCaptureChannelCfg->Event,
  2127. &EventCfg);
  2128. /* Memorize capture trigger (will be configured when the capture is started */
  2129. HRTIM_CaptureUnitConfig(hhrtim,
  2130. TimerIdx,
  2131. CaptureChannel,
  2132. pSimpleCaptureChannelCfg->Event);
  2133. hhrtim->State = HAL_HRTIM_STATE_READY;
  2134. /* Process Unlocked */
  2135. __HAL_UNLOCK(hhrtim);
  2136. return HAL_OK;
  2137. }
  2138. /**
  2139. * @brief Enables a simple capture on the designed capture unit
  2140. * @param hhrtim pointer to HAL HRTIM handle
  2141. * @param TimerIdx Timer index
  2142. * This parameter can be one of the following values:
  2143. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2144. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2145. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2146. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2147. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2148. * @param CaptureChannel Timer output
  2149. * This parameter can be one of the following values:
  2150. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2151. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2152. * @retval HAL status
  2153. * @note The external event triggering the capture is available for all timing
  2154. * units. It can be used directly and is active as soon as the timing
  2155. * unit counter is enabled.
  2156. */
  2157. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef * hhrtim,
  2158. uint32_t TimerIdx,
  2159. uint32_t CaptureChannel)
  2160. {
  2161. /* Check the parameters */
  2162. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2163. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2164. /* Process Locked */
  2165. __HAL_LOCK(hhrtim);
  2166. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2167. /* Set the capture unit trigger */
  2168. switch (CaptureChannel)
  2169. {
  2170. case HRTIM_CAPTUREUNIT_1:
  2171. {
  2172. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  2173. }
  2174. break;
  2175. case HRTIM_CAPTUREUNIT_2:
  2176. {
  2177. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  2178. }
  2179. break;
  2180. default:
  2181. break;
  2182. }
  2183. /* Enable the timer counter */
  2184. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2185. hhrtim->State = HAL_HRTIM_STATE_READY;
  2186. /* Process Unlocked */
  2187. __HAL_UNLOCK(hhrtim);
  2188. return HAL_OK;
  2189. }
  2190. /**
  2191. * @brief Disables a simple capture on the designed capture unit
  2192. * @param hhrtim pointer to HAL HRTIM handle
  2193. * @param TimerIdx Timer index
  2194. * This parameter can be one of the following values:
  2195. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2196. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2197. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2198. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2199. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2200. * @param CaptureChannel Timer output
  2201. * This parameter can be one of the following values:
  2202. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2203. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2204. * @retval HAL status
  2205. */
  2206. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef * hhrtim,
  2207. uint32_t TimerIdx,
  2208. uint32_t CaptureChannel)
  2209. {
  2210. /* Check the parameters */
  2211. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2212. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2213. /* Process Locked */
  2214. __HAL_LOCK(hhrtim);
  2215. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2216. /* Set the capture unit trigger */
  2217. switch (CaptureChannel)
  2218. {
  2219. case HRTIM_CAPTUREUNIT_1:
  2220. {
  2221. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2222. }
  2223. break;
  2224. case HRTIM_CAPTUREUNIT_2:
  2225. {
  2226. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2227. }
  2228. break;
  2229. default:
  2230. break;
  2231. }
  2232. /* Disable the timer counter */
  2233. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
  2234. (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
  2235. {
  2236. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2237. }
  2238. hhrtim->State = HAL_HRTIM_STATE_READY;
  2239. /* Process Unlocked */
  2240. __HAL_UNLOCK(hhrtim);
  2241. return HAL_OK;
  2242. }
  2243. /**
  2244. * @brief Enables a simple capture on the designed capture unit
  2245. * (Capture interrupt is enabled).
  2246. * @param hhrtim pointer to HAL HRTIM handle
  2247. * @param TimerIdx Timer index
  2248. * This parameter can be one of the following values:
  2249. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2250. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2251. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2252. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2253. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2254. * @param CaptureChannel Timer output
  2255. * This parameter can be one of the following values:
  2256. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2257. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2258. * @retval HAL status
  2259. */
  2260. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef * hhrtim,
  2261. uint32_t TimerIdx,
  2262. uint32_t CaptureChannel)
  2263. {
  2264. /* Check the parameters */
  2265. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2266. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2267. /* Process Locked */
  2268. __HAL_LOCK(hhrtim);
  2269. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2270. /* Set the capture unit trigger */
  2271. switch (CaptureChannel)
  2272. {
  2273. case HRTIM_CAPTUREUNIT_1:
  2274. {
  2275. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  2276. /* Enable the capture unit 1 interrupt */
  2277. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  2278. }
  2279. break;
  2280. case HRTIM_CAPTUREUNIT_2:
  2281. {
  2282. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  2283. /* Enable the capture unit 2 interrupt */
  2284. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  2285. }
  2286. break;
  2287. default:
  2288. break;
  2289. }
  2290. /* Enable the timer counter */
  2291. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2292. hhrtim->State = HAL_HRTIM_STATE_READY;
  2293. /* Process Unlocked */
  2294. __HAL_UNLOCK(hhrtim);
  2295. return HAL_OK;
  2296. }
  2297. /**
  2298. * @brief Disables a simple capture on the designed capture unit
  2299. * (Capture interrupt is disabled).
  2300. * @param hhrtim pointer to HAL HRTIM handle
  2301. * @param TimerIdx Timer index
  2302. * This parameter can be one of the following values:
  2303. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2304. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2305. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2306. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2307. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2308. * @param CaptureChannel Timer output
  2309. * This parameter can be one of the following values:
  2310. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2311. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2312. * @retval HAL status
  2313. */
  2314. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef * hhrtim,
  2315. uint32_t TimerIdx,
  2316. uint32_t CaptureChannel)
  2317. {
  2318. /* Check the parameters */
  2319. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2320. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2321. /* Process Locked */
  2322. __HAL_LOCK(hhrtim);
  2323. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2324. /* Set the capture unit trigger */
  2325. switch (CaptureChannel)
  2326. {
  2327. case HRTIM_CAPTUREUNIT_1:
  2328. {
  2329. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2330. /* Disable the capture unit 1 interrupt */
  2331. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  2332. }
  2333. break;
  2334. case HRTIM_CAPTUREUNIT_2:
  2335. {
  2336. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2337. /* Disable the capture unit 2 interrupt */
  2338. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  2339. }
  2340. break;
  2341. default:
  2342. break;
  2343. }
  2344. /* Disable the timer counter */
  2345. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
  2346. (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
  2347. {
  2348. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2349. }
  2350. hhrtim->State = HAL_HRTIM_STATE_READY;
  2351. /* Process Unlocked */
  2352. __HAL_UNLOCK(hhrtim);
  2353. return HAL_OK;
  2354. }
  2355. /**
  2356. * @brief Enables a simple capture on the designed capture unit
  2357. * (Capture DMA request is enabled).
  2358. * @param hhrtim pointer to HAL HRTIM handle
  2359. * @param TimerIdx Timer index
  2360. * This parameter can be one of the following values:
  2361. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2362. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2363. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2364. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2365. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2366. * @param CaptureChannel Timer output
  2367. * This parameter can be one of the following values:
  2368. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2369. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2370. * @param SrcAddr DMA transfer source address
  2371. * @param DestAddr DMA transfer destination address
  2372. * @param Length The length of data items (data size) to be transferred
  2373. * from source to destination
  2374. * @retval HAL status
  2375. */
  2376. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  2377. uint32_t TimerIdx,
  2378. uint32_t CaptureChannel,
  2379. uint32_t SrcAddr,
  2380. uint32_t DestAddr,
  2381. uint32_t Length)
  2382. {
  2383. DMA_HandleTypeDef * hdma;
  2384. /* Check the parameters */
  2385. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2386. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2387. /* Process Locked */
  2388. __HAL_LOCK(hhrtim);
  2389. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2390. /* Get the timer DMA handler */
  2391. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  2392. if (hdma == NULL)
  2393. {
  2394. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2395. /* Process Unlocked */
  2396. __HAL_UNLOCK(hhrtim);
  2397. return HAL_ERROR;
  2398. }
  2399. /* Set the DMA error callback */
  2400. hdma->XferErrorCallback = HRTIM_DMAError ;
  2401. /* Set the DMA transfer completed callback */
  2402. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  2403. /* Enable the DMA channel */
  2404. HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
  2405. switch (CaptureChannel)
  2406. {
  2407. case HRTIM_CAPTUREUNIT_1:
  2408. {
  2409. /* Set the capture unit trigger */
  2410. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  2411. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
  2412. }
  2413. break;
  2414. case HRTIM_CAPTUREUNIT_2:
  2415. {
  2416. /* Set the capture unit trigger */
  2417. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  2418. /* Enable the timer DMA request */
  2419. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
  2420. }
  2421. break;
  2422. default:
  2423. break;
  2424. }
  2425. /* Enable the timer counter */
  2426. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2427. hhrtim->State = HAL_HRTIM_STATE_READY;
  2428. /* Process Unlocked */
  2429. __HAL_UNLOCK(hhrtim);
  2430. return HAL_OK;
  2431. }
  2432. /**
  2433. * @brief Disables a simple capture on the designed capture unit
  2434. * (Capture DMA request is disabled).
  2435. * @param hhrtim pointer to HAL HRTIM handle
  2436. * @param TimerIdx Timer index
  2437. * This parameter can be one of the following values:
  2438. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2439. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2440. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2441. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2442. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2443. * @param CaptureChannel Timer output
  2444. * This parameter can be one of the following values:
  2445. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2446. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2447. * @retval HAL status
  2448. */
  2449. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  2450. uint32_t TimerIdx,
  2451. uint32_t CaptureChannel)
  2452. {
  2453. DMA_HandleTypeDef * hdma;
  2454. /* Check the parameters */
  2455. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2456. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2457. /* Process Locked */
  2458. __HAL_LOCK(hhrtim);
  2459. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2460. /* Get the timer DMA handler */
  2461. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  2462. if (hdma == NULL)
  2463. {
  2464. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2465. /* Process Unlocked */
  2466. __HAL_UNLOCK(hhrtim);
  2467. return HAL_ERROR;
  2468. }
  2469. /* Disable the DMA */
  2470. HAL_DMA_Abort(hdma);
  2471. switch (CaptureChannel)
  2472. {
  2473. case HRTIM_CAPTUREUNIT_1:
  2474. {
  2475. /* Reset the capture unit trigger */
  2476. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2477. /* Disable the capture unit 1 DMA request */
  2478. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
  2479. }
  2480. break;
  2481. case HRTIM_CAPTUREUNIT_2:
  2482. {
  2483. /* Reset the capture unit trigger */
  2484. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2485. /* Disable the capture unit 2 DMA request */
  2486. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
  2487. }
  2488. break;
  2489. default:
  2490. break;
  2491. }
  2492. /* Disable the timer counter */
  2493. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
  2494. (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
  2495. {
  2496. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2497. }
  2498. hhrtim->State = HAL_HRTIM_STATE_READY;
  2499. /* Process Unlocked */
  2500. __HAL_UNLOCK(hhrtim);
  2501. return HAL_OK;
  2502. }
  2503. /**
  2504. * @}
  2505. */
  2506. /** @defgroup HRTIM_Exported_Functions_Group6 Simple one pulse functions
  2507. * @brief Simple one pulse functions
  2508. @verbatim
  2509. ===============================================================================
  2510. ##### Simple one pulse functions #####
  2511. ===============================================================================
  2512. [..] This section provides functions allowing to:
  2513. (+) Configure one pulse channel
  2514. (+) Start one pulse generation
  2515. (+) Stop one pulse generation
  2516. (+) Start one pulse generation and enable interrupt
  2517. (+) Stop one pulse generation and disable interrupt
  2518. -@- When a HRTIM timer operates in simple one pulse mode
  2519. the timer counter is started in response to transition detected
  2520. on a given external event input to generate a pulse with a
  2521. programmable length after a programmable delay.
  2522. @endverbatim
  2523. * @{
  2524. */
  2525. /**
  2526. * @brief Configures an output simple one pulse mode
  2527. * @param hhrtim pointer to HAL HRTIM handle
  2528. * @param TimerIdx Timer index
  2529. * This parameter can be one of the following values:
  2530. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2531. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2532. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2533. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2534. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2535. * @param OnePulseChannel Timer output
  2536. * This parameter can be one of the following values:
  2537. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2538. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2539. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2540. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2541. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2542. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2543. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2544. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2545. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2546. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2547. * @param pSimpleOnePulseChannelCfg pointer to the simple one pulse output configuration structure
  2548. * @note When the timer operates in simple one pulse mode:
  2549. * the timer counter is implicitly started by the reset event,
  2550. * the reset of the timer counter is triggered by the designated external event
  2551. * GPIO input is implicitly used as event source,
  2552. * Output 1 is implicitly controlled by the compare unit 1,
  2553. * Output 2 is implicitly controlled by the compare unit 2.
  2554. * Output Set/Reset crossbar is set as follows:
  2555. * Output 1: SETx1R = CMP1, RSTx1R = PER
  2556. * Output 2: SETx2R = CMP2, RST2R = PER
  2557. * @retval HAL status
  2558. * @note If HAL_HRTIM_SimpleOnePulseChannelConfig is called for both timer
  2559. * outputs, the reset event related configuration data provided in the
  2560. * second call will override the reset event related configuration data
  2561. * provided in the first call.
  2562. */
  2563. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  2564. uint32_t TimerIdx,
  2565. uint32_t OnePulseChannel,
  2566. HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg)
  2567. {
  2568. uint32_t CompareUnit = 0xFFFFFFFFU;
  2569. HRTIM_CompareCfgTypeDef CompareCfg;
  2570. HRTIM_OutputCfgTypeDef OutputCfg;
  2571. HRTIM_EventCfgTypeDef EventCfg;
  2572. /* Check parameters */
  2573. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2574. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOnePulseChannelCfg->OutputPolarity));
  2575. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOnePulseChannelCfg->OutputIdleLevel));
  2576. assert_param(IS_HRTIM_EVENT(pSimpleOnePulseChannelCfg->Event));
  2577. assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleOnePulseChannelCfg->EventSensitivity,
  2578. pSimpleOnePulseChannelCfg->EventPolarity));
  2579. assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleOnePulseChannelCfg->EventSensitivity));
  2580. assert_param(IS_HRTIM_EVENTFILTER(pSimpleOnePulseChannelCfg->Event,
  2581. pSimpleOnePulseChannelCfg->EventFilter));
  2582. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2583. {
  2584. return HAL_BUSY;
  2585. }
  2586. /* Process Locked */
  2587. __HAL_LOCK(hhrtim);
  2588. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2589. /* Configure timer compare unit */
  2590. switch (OnePulseChannel)
  2591. {
  2592. case HRTIM_OUTPUT_TA1:
  2593. case HRTIM_OUTPUT_TB1:
  2594. case HRTIM_OUTPUT_TC1:
  2595. case HRTIM_OUTPUT_TD1:
  2596. case HRTIM_OUTPUT_TE1:
  2597. {
  2598. CompareUnit = HRTIM_COMPAREUNIT_1;
  2599. }
  2600. break;
  2601. case HRTIM_OUTPUT_TA2:
  2602. case HRTIM_OUTPUT_TB2:
  2603. case HRTIM_OUTPUT_TC2:
  2604. case HRTIM_OUTPUT_TD2:
  2605. case HRTIM_OUTPUT_TE2:
  2606. {
  2607. CompareUnit = HRTIM_COMPAREUNIT_2;
  2608. }
  2609. break;
  2610. default:
  2611. break;
  2612. }
  2613. CompareCfg.CompareValue = pSimpleOnePulseChannelCfg->Pulse;
  2614. CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
  2615. CompareCfg.AutoDelayedTimeout = 0U;
  2616. HRTIM_CompareUnitConfig(hhrtim,
  2617. TimerIdx,
  2618. CompareUnit,
  2619. &CompareCfg);
  2620. /* Configure timer output */
  2621. OutputCfg.Polarity = pSimpleOnePulseChannelCfg->OutputPolarity;
  2622. OutputCfg.IdleLevel = pSimpleOnePulseChannelCfg->OutputIdleLevel;
  2623. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  2624. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  2625. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  2626. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  2627. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  2628. {
  2629. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  2630. }
  2631. else
  2632. {
  2633. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  2634. }
  2635. OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER;
  2636. HRTIM_OutputConfig(hhrtim,
  2637. TimerIdx,
  2638. OnePulseChannel,
  2639. &OutputCfg);
  2640. /* Configure external event channel */
  2641. EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
  2642. EventCfg.Filter = pSimpleOnePulseChannelCfg->EventFilter;
  2643. EventCfg.Polarity = pSimpleOnePulseChannelCfg->EventPolarity;
  2644. EventCfg.Sensitivity = pSimpleOnePulseChannelCfg->EventSensitivity;
  2645. EventCfg.Source = HRTIM_EVENTSRC_1;
  2646. HRTIM_EventConfig(hhrtim,
  2647. pSimpleOnePulseChannelCfg->Event,
  2648. &EventCfg);
  2649. /* Configure the timer reset register */
  2650. HRTIM_TIM_ResetConfig(hhrtim,
  2651. TimerIdx,
  2652. pSimpleOnePulseChannelCfg->Event);
  2653. hhrtim->State = HAL_HRTIM_STATE_READY;
  2654. /* Process Unlocked */
  2655. __HAL_UNLOCK(hhrtim);
  2656. return HAL_OK;
  2657. }
  2658. /**
  2659. * @brief Enables the simple one pulse signal generation on the designed output
  2660. * @param hhrtim pointer to HAL HRTIM handle
  2661. * @param TimerIdx Timer index
  2662. * This parameter can be one of the following values:
  2663. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2664. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2665. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2666. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2667. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2668. * @param OnePulseChannel Timer output
  2669. * This parameter can be one of the following values:
  2670. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2671. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2672. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2673. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2674. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2675. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2676. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2677. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2678. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2679. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2680. * @retval HAL status
  2681. */
  2682. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef * hhrtim,
  2683. uint32_t TimerIdx,
  2684. uint32_t OnePulseChannel)
  2685. {
  2686. /* Check the parameters */
  2687. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2688. /* Process Locked */
  2689. __HAL_LOCK(hhrtim);
  2690. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2691. /* Enable the timer output */
  2692. hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;
  2693. /* Enable the timer counter */
  2694. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2695. hhrtim->State = HAL_HRTIM_STATE_READY;
  2696. /* Process Unlocked */
  2697. __HAL_UNLOCK(hhrtim);
  2698. return HAL_OK;
  2699. }
  2700. /**
  2701. * @brief Disables the simple one pulse signal generation on the designed output
  2702. * @param hhrtim pointer to HAL HRTIM handle
  2703. * @param TimerIdx Timer index
  2704. * This parameter can be one of the following values:
  2705. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2706. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2707. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2708. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2709. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2710. * @param OnePulseChannel Timer output
  2711. * This parameter can be one of the following values:
  2712. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2713. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2714. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2715. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2716. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2717. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2718. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2719. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2720. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2721. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2722. * @retval HAL status
  2723. */
  2724. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef * hhrtim,
  2725. uint32_t TimerIdx,
  2726. uint32_t OnePulseChannel)
  2727. {
  2728. /* Check the parameters */
  2729. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2730. /* Process Locked */
  2731. __HAL_LOCK(hhrtim);
  2732. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2733. /* Disable the timer output */
  2734. hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;
  2735. /* Disable the timer counter */
  2736. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2737. hhrtim->State = HAL_HRTIM_STATE_READY;
  2738. /* Process Unlocked */
  2739. __HAL_UNLOCK(hhrtim);
  2740. return HAL_OK;
  2741. }
  2742. /**
  2743. * @brief Enables the simple one pulse signal generation on the designed output
  2744. * (The compare interrupt is enabled (pulse start)).
  2745. * @param hhrtim pointer to HAL HRTIM handle
  2746. * @param TimerIdx Timer index
  2747. * This parameter can be one of the following values:
  2748. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2749. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2750. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2751. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2752. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2753. * @param OnePulseChannel Timer output
  2754. * This parameter can be one of the following values:
  2755. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2756. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2757. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2758. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2759. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2760. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2761. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2762. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2763. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2764. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2765. * @retval HAL status
  2766. */
  2767. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef * hhrtim,
  2768. uint32_t TimerIdx,
  2769. uint32_t OnePulseChannel)
  2770. {
  2771. /* Check the parameters */
  2772. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2773. /* Process Locked */
  2774. __HAL_LOCK(hhrtim);
  2775. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2776. /* Enable the timer output */
  2777. hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;
  2778. /* Enable the timer interrupt (depends on the OnePulse output) */
  2779. switch (OnePulseChannel)
  2780. {
  2781. case HRTIM_OUTPUT_TA1:
  2782. case HRTIM_OUTPUT_TB1:
  2783. case HRTIM_OUTPUT_TC1:
  2784. case HRTIM_OUTPUT_TD1:
  2785. case HRTIM_OUTPUT_TE1:
  2786. {
  2787. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  2788. }
  2789. break;
  2790. case HRTIM_OUTPUT_TA2:
  2791. case HRTIM_OUTPUT_TB2:
  2792. case HRTIM_OUTPUT_TC2:
  2793. case HRTIM_OUTPUT_TD2:
  2794. case HRTIM_OUTPUT_TE2:
  2795. {
  2796. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  2797. }
  2798. break;
  2799. default:
  2800. break;
  2801. }
  2802. /* Enable the timer counter */
  2803. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2804. hhrtim->State = HAL_HRTIM_STATE_READY;
  2805. /* Process Unlocked */
  2806. __HAL_UNLOCK(hhrtim);
  2807. return HAL_OK;
  2808. }
  2809. /**
  2810. * @brief Disables the simple one pulse signal generation on the designed output
  2811. * (The compare interrupt is disabled).
  2812. * @param hhrtim pointer to HAL HRTIM handle
  2813. * @param TimerIdx Timer index
  2814. * This parameter can be one of the following values:
  2815. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2816. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2817. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2818. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2819. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2820. * @param OnePulseChannel Timer output
  2821. * This parameter can be one of the following values:
  2822. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2823. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2824. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2825. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2826. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2827. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2828. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2829. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2830. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2831. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2832. * @retval HAL status
  2833. */
  2834. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef * hhrtim,
  2835. uint32_t TimerIdx,
  2836. uint32_t OnePulseChannel)
  2837. {
  2838. /* Check the parameters */
  2839. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2840. /* Process Locked */
  2841. __HAL_LOCK(hhrtim);
  2842. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2843. /* Disable the timer output */
  2844. hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;
  2845. /* Disable the timer interrupt (depends on the OnePulse output) */
  2846. switch (OnePulseChannel)
  2847. {
  2848. case HRTIM_OUTPUT_TA1:
  2849. case HRTIM_OUTPUT_TB1:
  2850. case HRTIM_OUTPUT_TC1:
  2851. case HRTIM_OUTPUT_TD1:
  2852. case HRTIM_OUTPUT_TE1:
  2853. {
  2854. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  2855. }
  2856. break;
  2857. case HRTIM_OUTPUT_TA2:
  2858. case HRTIM_OUTPUT_TB2:
  2859. case HRTIM_OUTPUT_TC2:
  2860. case HRTIM_OUTPUT_TD2:
  2861. case HRTIM_OUTPUT_TE2:
  2862. {
  2863. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  2864. }
  2865. break;
  2866. default:
  2867. break;
  2868. }
  2869. /* Disable the timer counter */
  2870. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2871. hhrtim->State = HAL_HRTIM_STATE_READY;
  2872. /* Process Unlocked */
  2873. __HAL_UNLOCK(hhrtim);
  2874. return HAL_OK;
  2875. }
  2876. /**
  2877. * @}
  2878. */
  2879. /** @defgroup HRTIM_Exported_Functions_Group7 Configuration functions
  2880. * @brief HRTIM configuration functions
  2881. @verbatim
  2882. ===============================================================================
  2883. ##### HRTIM configuration functions #####
  2884. ===============================================================================
  2885. [..] This section provides functions allowing to configure the HRTIM
  2886. resources shared by all the HRTIM timers operating in waveform mode:
  2887. (+) Configure the burst mode controller
  2888. (+) Configure an external event conditionning
  2889. (+) Configure the external events sampling clock
  2890. (+) Configure a fault conditionning
  2891. (+) Enable or disable fault inputs
  2892. (+) Configure the faults sampling clock
  2893. (+) Configure an ADC trigger
  2894. @endverbatim
  2895. * @{
  2896. */
  2897. /**
  2898. * @brief Configures the burst mode feature of the HRTIM
  2899. * @param hhrtim pointer to HAL HRTIM handle
  2900. * @param pBurstModeCfg pointer to the burst mode configuration structure
  2901. * @retval HAL status
  2902. * @note This function must be called before starting the burst mode
  2903. * controller
  2904. */
  2905. HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef * hhrtim,
  2906. HRTIM_BurstModeCfgTypeDef* pBurstModeCfg)
  2907. {
  2908. uint32_t hrtim_bmcr;
  2909. /* Check parameters */
  2910. assert_param(IS_HRTIM_BURSTMODE(pBurstModeCfg->Mode));
  2911. assert_param(IS_HRTIM_BURSTMODECLOCKSOURCE(pBurstModeCfg->ClockSource));
  2912. assert_param(IS_HRTIM_HRTIM_BURSTMODEPRESCALER(pBurstModeCfg->Prescaler));
  2913. assert_param(IS_HRTIM_BURSTMODEPRELOAD(pBurstModeCfg->PreloadEnable));
  2914. assert_param(IS_HRTIM_BURSTMODETRIGGER(pBurstModeCfg->Trigger));
  2915. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2916. {
  2917. return HAL_BUSY;
  2918. }
  2919. /* Process Locked */
  2920. __HAL_LOCK(hhrtim);
  2921. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2922. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  2923. /* Set the burst mode operating mode */
  2924. hrtim_bmcr &= ~(HRTIM_BMCR_BMOM);
  2925. hrtim_bmcr |= pBurstModeCfg->Mode;
  2926. /* Set the burst mode clock source */
  2927. hrtim_bmcr &= ~(HRTIM_BMCR_BMCLK);
  2928. hrtim_bmcr |= pBurstModeCfg->ClockSource;
  2929. /* Set the burst mode prescaler */
  2930. hrtim_bmcr &= ~(HRTIM_BMCR_BMPRSC);
  2931. hrtim_bmcr |= pBurstModeCfg->Prescaler;
  2932. /* Enable/disable burst mode registers preload */
  2933. hrtim_bmcr &= ~(HRTIM_BMCR_BMPREN);
  2934. hrtim_bmcr |= pBurstModeCfg->PreloadEnable;
  2935. /* Set the burst mode trigger */
  2936. hhrtim->Instance->sCommonRegs.BMTRGR = pBurstModeCfg->Trigger;
  2937. /* Set the burst mode compare value */
  2938. hhrtim->Instance->sCommonRegs.BMCMPR = pBurstModeCfg->IdleDuration;
  2939. /* Set the burst mode period */
  2940. hhrtim->Instance->sCommonRegs.BMPER = pBurstModeCfg->Period;
  2941. /* Update the HRTIM registers */
  2942. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  2943. hhrtim->State = HAL_HRTIM_STATE_READY;
  2944. /* Process Unlocked */
  2945. __HAL_UNLOCK(hhrtim);
  2946. return HAL_OK;
  2947. }
  2948. /**
  2949. * @brief Configures the conditioning of an external event
  2950. * @param hhrtim pointer to HAL HRTIM handle
  2951. * @param Event external event to configure
  2952. * This parameter can be one of the following values:
  2953. * @arg HRTIM_EVENT_1: External event 1
  2954. * @arg HRTIM_EVENT_2: External event 2
  2955. * @arg HRTIM_EVENT_3: External event 3
  2956. * @arg HRTIM_EVENT_4: External event 4
  2957. * @arg HRTIM_EVENT_5: External event 5
  2958. * @arg HRTIM_EVENT_6: External event 6
  2959. * @arg HRTIM_EVENT_7: External event 7
  2960. * @arg HRTIM_EVENT_8: External event 8
  2961. * @arg HRTIM_EVENT_9: External event 9
  2962. * @arg HRTIM_EVENT_10: External event 10
  2963. * @param pEventCfg pointer to the event conditioning configuration structure
  2964. * @note This function must be called before starting the timer
  2965. * @retval HAL status
  2966. */
  2967. HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  2968. uint32_t Event,
  2969. HRTIM_EventCfgTypeDef* pEventCfg)
  2970. {
  2971. /* Check parameters */
  2972. assert_param(IS_HRTIM_EVENTSRC(pEventCfg->Source));
  2973. assert_param(IS_HRTIM_EVENTPOLARITY(pEventCfg->Sensitivity, pEventCfg->Polarity));
  2974. assert_param(IS_HRTIM_EVENTSENSITIVITY(pEventCfg->Sensitivity));
  2975. assert_param(IS_HRTIM_EVENTFASTMODE(Event, pEventCfg->FastMode));
  2976. assert_param(IS_HRTIM_EVENTFILTER(Event, pEventCfg->Filter));
  2977. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2978. {
  2979. return HAL_BUSY;
  2980. }
  2981. /* Process Locked */
  2982. __HAL_LOCK(hhrtim);
  2983. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2984. /* Configure the event channel */
  2985. HRTIM_EventConfig(hhrtim, Event, pEventCfg);
  2986. hhrtim->State = HAL_HRTIM_STATE_READY;
  2987. /* Process Unlocked */
  2988. __HAL_UNLOCK(hhrtim);
  2989. return HAL_OK;
  2990. }
  2991. /**
  2992. * @brief Configures the external event conditioning block prescaler
  2993. * @param hhrtim pointer to HAL HRTIM handle
  2994. * @param Prescaler Prescaler value
  2995. * This parameter can be one of the following values:
  2996. * @arg HRTIM_EVENTPRESCALER_DIV1: fEEVS=fHRTIM
  2997. * @arg HRTIM_EVENTPRESCALER_DIV2: fEEVS=fHRTIM / 2
  2998. * @arg HRTIM_EVENTPRESCALER_DIV4: fEEVS=fHRTIM / 4
  2999. * @arg HRTIM_EVENTPRESCALER_DIV8: fEEVS=fHRTIM / 8
  3000. * @note This function must be called before starting the timer
  3001. * @retval HAL status
  3002. */
  3003. HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
  3004. uint32_t Prescaler)
  3005. {
  3006. uint32_t hrtim_eecr3;
  3007. /* Check parameters */
  3008. assert_param(IS_HRTIM_EVENTPRESCALER(Prescaler));
  3009. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3010. {
  3011. return HAL_BUSY;
  3012. }
  3013. /* Process Locked */
  3014. __HAL_LOCK(hhrtim);
  3015. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3016. /* Set the external event prescaler */
  3017. hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;
  3018. hrtim_eecr3 &= ~(HRTIM_EECR3_EEVSD);
  3019. hrtim_eecr3 |= Prescaler;
  3020. /* Update the HRTIM registers */
  3021. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  3022. hhrtim->State = HAL_HRTIM_STATE_READY;
  3023. /* Process Unlocked */
  3024. __HAL_UNLOCK(hhrtim);
  3025. return HAL_OK;
  3026. }
  3027. /**
  3028. * @brief Configures the conditioning of fault input
  3029. * @param hhrtim pointer to HAL HRTIM handle
  3030. * @param Fault fault input to configure
  3031. * This parameter can be one of the following values:
  3032. * @arg HRTIM_FAULT_1: Fault input 1
  3033. * @arg HRTIM_FAULT_2: Fault input 2
  3034. * @arg HRTIM_FAULT_3: Fault input 3
  3035. * @arg HRTIM_FAULT_4: Fault input 4
  3036. * @arg HRTIM_FAULT_5: Fault input 5
  3037. * @param pFaultCfg pointer to the fault conditioning configuration structure
  3038. * @note This function must be called before starting the timer and before
  3039. * enabling faults inputs
  3040. * @retval HAL status
  3041. */
  3042. HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef * hhrtim,
  3043. uint32_t Fault,
  3044. HRTIM_FaultCfgTypeDef* pFaultCfg)
  3045. {
  3046. uint32_t hrtim_fltinr1;
  3047. uint32_t hrtim_fltinr2;
  3048. /* Check parameters */
  3049. assert_param(IS_HRTIM_FAULT(Fault));
  3050. assert_param(IS_HRTIM_FAULTSOURCE(pFaultCfg->Source));
  3051. assert_param(IS_HRTIM_FAULTPOLARITY(pFaultCfg->Polarity));
  3052. assert_param(IS_HRTIM_FAULTFILTER(pFaultCfg->Filter));
  3053. assert_param(IS_HRTIM_FAULTLOCK(pFaultCfg->Lock));
  3054. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3055. {
  3056. return HAL_BUSY;
  3057. }
  3058. /* Process Locked */
  3059. __HAL_LOCK(hhrtim);
  3060. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3061. /* Configure fault channel */
  3062. hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;
  3063. hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
  3064. switch (Fault)
  3065. {
  3066. case HRTIM_FAULT_1:
  3067. {
  3068. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT1P | HRTIM_FLTINR1_FLT1SRC | HRTIM_FLTINR1_FLT1F | HRTIM_FLTINR1_FLT1LCK);
  3069. hrtim_fltinr1 |= pFaultCfg->Polarity;
  3070. hrtim_fltinr1 |= pFaultCfg->Source;
  3071. hrtim_fltinr1 |= pFaultCfg->Filter;
  3072. hrtim_fltinr1 |= pFaultCfg->Lock;
  3073. }
  3074. break;
  3075. case HRTIM_FAULT_2:
  3076. {
  3077. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT2P | HRTIM_FLTINR1_FLT2SRC | HRTIM_FLTINR1_FLT2F | HRTIM_FLTINR1_FLT2LCK);
  3078. hrtim_fltinr1 |= (pFaultCfg->Polarity << 8U);
  3079. hrtim_fltinr1 |= (pFaultCfg->Source << 8U);
  3080. hrtim_fltinr1 |= (pFaultCfg->Filter << 8U);
  3081. hrtim_fltinr1 |= (pFaultCfg->Lock << 8U);
  3082. }
  3083. break;
  3084. case HRTIM_FAULT_3:
  3085. {
  3086. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT3P | HRTIM_FLTINR1_FLT3SRC | HRTIM_FLTINR1_FLT3F | HRTIM_FLTINR1_FLT3LCK);
  3087. hrtim_fltinr1 |= (pFaultCfg->Polarity << 16U);
  3088. hrtim_fltinr1 |= (pFaultCfg->Source << 16U);
  3089. hrtim_fltinr1 |= (pFaultCfg->Filter << 16U);
  3090. hrtim_fltinr1 |= (pFaultCfg->Lock << 16U);
  3091. }
  3092. break;
  3093. case HRTIM_FAULT_4:
  3094. {
  3095. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT4P | HRTIM_FLTINR1_FLT4SRC | HRTIM_FLTINR1_FLT4F | HRTIM_FLTINR1_FLT4LCK);
  3096. hrtim_fltinr1 |= (pFaultCfg->Polarity << 24U);
  3097. hrtim_fltinr1 |= (pFaultCfg->Source << 24U);
  3098. hrtim_fltinr1 |= (pFaultCfg->Filter << 24U);
  3099. hrtim_fltinr1 |= (pFaultCfg->Lock << 24U);
  3100. }
  3101. break;
  3102. case HRTIM_FAULT_5:
  3103. {
  3104. hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLT5P | HRTIM_FLTINR2_FLT5SRC | HRTIM_FLTINR2_FLT5F | HRTIM_FLTINR2_FLT5LCK);
  3105. hrtim_fltinr2 |= pFaultCfg->Polarity;
  3106. hrtim_fltinr2 |= pFaultCfg->Source;
  3107. hrtim_fltinr2 |= pFaultCfg->Filter;
  3108. hrtim_fltinr2 |= pFaultCfg->Lock;
  3109. }
  3110. break;
  3111. default:
  3112. break;
  3113. }
  3114. /* Update the HRTIM registers */
  3115. hhrtim->Instance->sCommonRegs.FLTINR1 = hrtim_fltinr1;
  3116. hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
  3117. hhrtim->State = HAL_HRTIM_STATE_READY;
  3118. /* Process Unlocked */
  3119. __HAL_UNLOCK(hhrtim);
  3120. return HAL_OK;
  3121. }
  3122. /**
  3123. * @brief Configures the fault conditioning block prescaler
  3124. * @param hhrtim pointer to HAL HRTIM handle
  3125. * @param Prescaler Prescaler value
  3126. * This parameter can be one of the following values:
  3127. * @arg HRTIM_FAULTPRESCALER_DIV1: fFLTS=fHRTIM
  3128. * @arg HRTIM_FAULTPRESCALER_DIV2: fFLTS=fHRTIM / 2
  3129. * @arg HRTIM_FAULTPRESCALER_DIV4: fFLTS=fHRTIM / 4
  3130. * @arg HRTIM_FAULTPRESCALER_DIV8: fFLTS=fHRTIM / 8
  3131. * @retval HAL status
  3132. * @note This function must be called before starting the timer and before
  3133. * enabling faults inputs
  3134. */
  3135. HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
  3136. uint32_t Prescaler)
  3137. {
  3138. uint32_t hrtim_fltinr2;
  3139. /* Check parameters */
  3140. assert_param(IS_HRTIM_FAULTPRESCALER(Prescaler));
  3141. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3142. {
  3143. return HAL_BUSY;
  3144. }
  3145. /* Process Locked */
  3146. __HAL_LOCK(hhrtim);
  3147. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3148. /* Set the external event prescaler */
  3149. hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
  3150. hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLTSD);
  3151. hrtim_fltinr2 |= Prescaler;
  3152. /* Update the HRTIM registers */
  3153. hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
  3154. hhrtim->State = HAL_HRTIM_STATE_READY;
  3155. /* Process Unlocked */
  3156. __HAL_UNLOCK(hhrtim);
  3157. return HAL_OK;
  3158. }
  3159. /**
  3160. * @brief Enables or disables the HRTIMx Fault mode.
  3161. * @param hhrtim pointer to HAL HRTIM handle
  3162. * @param Faults fault input(s) to enable or disable
  3163. * This parameter can be any combination of the following values:
  3164. * @arg HRTIM_FAULT_1: Fault input 1
  3165. * @arg HRTIM_FAULT_2: Fault input 2
  3166. * @arg HRTIM_FAULT_3: Fault input 3
  3167. * @arg HRTIM_FAULT_4: Fault input 4
  3168. * @arg HRTIM_FAULT_5: Fault input 5
  3169. * @param Enable Fault(s) enabling
  3170. * This parameter can be one of the following values:
  3171. * @arg HRTIM_FAULTMODECTL_ENABLED: Fault(s) enabled
  3172. * @arg HRTIM_FAULTMODECTL_DISABLED: Fault(s) disabled
  3173. * @retval None
  3174. */
  3175. void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim,
  3176. uint32_t Faults,
  3177. uint32_t Enable)
  3178. {
  3179. uint32_t hrtim_fltinr1;
  3180. uint32_t hrtim_fltinr2;
  3181. /* Check parameters */
  3182. assert_param(IS_HRTIM_FAULT(Faults));
  3183. assert_param(IS_HRTIM_FAULTMODECTL(Enable));
  3184. /* Configure fault channel */
  3185. hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;
  3186. hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
  3187. if ((Faults & HRTIM_FAULT_1) != RESET)
  3188. {
  3189. hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT1E;
  3190. hrtim_fltinr1 |= Enable;
  3191. }
  3192. if ((Faults & HRTIM_FAULT_2) != RESET)
  3193. {
  3194. hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT2E;
  3195. hrtim_fltinr1 |= (Enable << 8U);
  3196. }
  3197. if ((Faults & HRTIM_FAULT_3) != RESET)
  3198. {
  3199. hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT3E;
  3200. hrtim_fltinr1 |= (Enable << 16U);
  3201. }
  3202. if ((Faults & HRTIM_FAULT_4) != RESET)
  3203. {
  3204. hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT4E;
  3205. hrtim_fltinr1 |= (Enable << 24U);
  3206. }
  3207. if ((Faults & HRTIM_FAULT_5) != RESET)
  3208. {
  3209. hrtim_fltinr2 &= ~HRTIM_FLTINR2_FLT5E;
  3210. hrtim_fltinr2 |= Enable;
  3211. }
  3212. /* Update the HRTIMx registers */
  3213. hhrtim->Instance->sCommonRegs.FLTINR1 = hrtim_fltinr1;
  3214. hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
  3215. }
  3216. /**
  3217. * @brief Configures both the ADC trigger register update source and the ADC
  3218. * trigger source.
  3219. * @param hhrtim pointer to HAL HRTIM handle
  3220. * @param ADCTrigger ADC trigger to configure
  3221. * This parameter can be one of the following values:
  3222. * @arg HRTIM_ADCTRIGGER_1: ADC trigger 1
  3223. * @arg HRTIM_ADCTRIGGER_2: ADC trigger 2
  3224. * @arg HRTIM_ADCTRIGGER_3: ADC trigger 3
  3225. * @arg HRTIM_ADCTRIGGER_4: ADC trigger 4
  3226. * @param pADCTriggerCfg pointer to the ADC trigger configuration structure
  3227. * @retval HAL status
  3228. * @note This function must be called before starting the timer
  3229. */
  3230. HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef * hhrtim,
  3231. uint32_t ADCTrigger,
  3232. HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg)
  3233. {
  3234. uint32_t hrtim_cr1;
  3235. /* Check parameters */
  3236. assert_param(IS_HRTIM_ADCTRIGGER(ADCTrigger));
  3237. assert_param(IS_HRTIM_ADCTRIGGERUPDATE(pADCTriggerCfg->UpdateSource));
  3238. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3239. {
  3240. return HAL_BUSY;
  3241. }
  3242. /* Process Locked */
  3243. __HAL_LOCK(hhrtim);
  3244. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3245. /* Set the ADC trigger update source */
  3246. hrtim_cr1 = hhrtim->Instance->sCommonRegs.CR1;
  3247. switch (ADCTrigger)
  3248. {
  3249. case HRTIM_ADCTRIGGER_1:
  3250. {
  3251. hrtim_cr1 &= ~(HRTIM_CR1_ADC1USRC);
  3252. hrtim_cr1 |= (pADCTriggerCfg->UpdateSource & HRTIM_CR1_ADC1USRC);
  3253. /* Set the ADC trigger 1 source */
  3254. hhrtim->Instance->sCommonRegs.ADC1R = pADCTriggerCfg->Trigger;
  3255. }
  3256. break;
  3257. case HRTIM_ADCTRIGGER_2:
  3258. {
  3259. hrtim_cr1 &= ~(HRTIM_CR1_ADC2USRC);
  3260. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 3U) & HRTIM_CR1_ADC2USRC);
  3261. /* Set the ADC trigger 2 source */
  3262. hhrtim->Instance->sCommonRegs.ADC2R = pADCTriggerCfg->Trigger;
  3263. }
  3264. break;
  3265. case HRTIM_ADCTRIGGER_3:
  3266. {
  3267. hrtim_cr1 &= ~(HRTIM_CR1_ADC3USRC);
  3268. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 6U) & HRTIM_CR1_ADC3USRC);
  3269. /* Set the ADC trigger 3 source */
  3270. hhrtim->Instance->sCommonRegs.ADC3R = pADCTriggerCfg->Trigger;
  3271. }
  3272. break;
  3273. case HRTIM_ADCTRIGGER_4:
  3274. {
  3275. hrtim_cr1 &= ~(HRTIM_CR1_ADC4USRC);
  3276. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 9U) & HRTIM_CR1_ADC4USRC);
  3277. /* Set the ADC trigger 4 source */
  3278. hhrtim->Instance->sCommonRegs.ADC4R = pADCTriggerCfg->Trigger;
  3279. }
  3280. break;
  3281. default:
  3282. break;
  3283. }
  3284. /* Update the HRTIM registers */
  3285. hhrtim->Instance->sCommonRegs.CR1 = hrtim_cr1;
  3286. hhrtim->State = HAL_HRTIM_STATE_READY;
  3287. /* Process Unlocked */
  3288. __HAL_UNLOCK(hhrtim);
  3289. return HAL_OK;
  3290. }
  3291. /**
  3292. * @}
  3293. */
  3294. /** @defgroup HRTIM_Exported_Functions_Group8 Timer waveform configuration and functions
  3295. * @brief HRTIM timer configuration and control functions
  3296. @verbatim
  3297. ===============================================================================
  3298. ##### HRTIM timer configuration and control functions #####
  3299. ===============================================================================
  3300. [..] This section provides functions used to configure and control a
  3301. HRTIM timer operating in waveform mode:
  3302. (+) Configure HRTIM timer general behavior
  3303. (+) Configure HRTIM timer event filtering
  3304. (+) Configure HRTIM timer deadtime insertion
  3305. (+) Configure HRTIM timer chopper mode
  3306. (+) Configure HRTIM timer burst DMA
  3307. (+) Configure HRTIM timer compare unit
  3308. (+) Configure HRTIM timer capture unit
  3309. (+) Configure HRTIM timer output
  3310. (+) Set HRTIM timer output level
  3311. (+) Enable HRTIM timer output
  3312. (+) Disable HRTIM timer output
  3313. (+) Start HRTIM timer
  3314. (+) Stop HRTIM timer
  3315. (+) Start HRTIM timer and enable interrupt
  3316. (+) Stop HRTIM timer and disable interrupt
  3317. (+) Start HRTIM timer and enable DMA transfer
  3318. (+) Stop HRTIM timer and disable DMA transfer
  3319. (+) Enable or disable the burst mode controller
  3320. (+) Start the burst mode controller (by software)
  3321. (+) Trigger a Capture (by software)
  3322. (+) Update the HRTIM timer preloadable registers (by software)
  3323. (+) Reset the HRTIM timer counter (by software)
  3324. (+) Start a burst DMA transfer
  3325. (+) Enable timer register update
  3326. (+) Disable timer register update
  3327. @endverbatim
  3328. * @{
  3329. */
  3330. /**
  3331. * @brief Configures the general behavior of a timer operating in waveform mode
  3332. * @param hhrtim pointer to HAL HRTIM handle
  3333. * @param TimerIdx Timer index
  3334. * This parameter can be one of the following values:
  3335. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3336. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3337. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3338. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3339. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3340. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3341. * @param pTimerCfg pointer to the timer configuration structure
  3342. * @note When the timer operates in waveform mode, all the features supported by
  3343. * the HRTIM are available without any limitation.
  3344. * @retval HAL status
  3345. * @note This function must be called before starting the timer
  3346. */
  3347. HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef * hhrtim,
  3348. uint32_t TimerIdx,
  3349. HRTIM_TimerCfgTypeDef * pTimerCfg)
  3350. {
  3351. /* Check parameters */
  3352. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  3353. /* Relevant for all HRTIM timers, including the master */
  3354. assert_param(IS_HRTIM_HALFMODE(pTimerCfg->HalfModeEnable));
  3355. assert_param(IS_HRTIM_SYNCSTART(pTimerCfg->StartOnSync));
  3356. assert_param(IS_HRTIM_SYNCRESET(pTimerCfg->ResetOnSync));
  3357. assert_param(IS_HHRTIM_DACSYNC(pTimerCfg->DACSynchro));
  3358. assert_param(IS_HRTIM_PRELOAD(pTimerCfg->PreloadEnable));
  3359. assert_param(IS_HRTIM_TIMERBURSTMODE(pTimerCfg->BurstMode));
  3360. assert_param(IS_HRTIM_UPDATEONREPETITION(pTimerCfg->RepetitionUpdate));
  3361. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3362. {
  3363. return HAL_BUSY;
  3364. }
  3365. /* Process Locked */
  3366. __HAL_LOCK(hhrtim);
  3367. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3368. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  3369. {
  3370. /* Check parameters */
  3371. assert_param(IS_HRTIM_UPDATEGATING_MASTER(pTimerCfg->UpdateGating));
  3372. assert_param(IS_HRTIM_MASTER_IT(pTimerCfg->InterruptRequests));
  3373. assert_param(IS_HRTIM_MASTER_DMA(pTimerCfg->DMARequests));
  3374. /* Configure master timer */
  3375. HRTIM_MasterWaveform_Config(hhrtim, pTimerCfg);
  3376. }
  3377. else
  3378. {
  3379. /* Check parameters */
  3380. assert_param(IS_HRTIM_UPDATEGATING_TIM(pTimerCfg->UpdateGating));
  3381. assert_param(IS_HRTIM_TIM_IT(pTimerCfg->InterruptRequests));
  3382. assert_param(IS_HRTIM_TIM_DMA(pTimerCfg->DMARequests));
  3383. assert_param(IS_HRTIM_TIMPUSHPULLMODE(pTimerCfg->PushPull));
  3384. assert_param(IS_HRTIM_TIMFAULTENABLE(pTimerCfg->FaultEnable));
  3385. assert_param(IS_HRTIM_TIMFAULTLOCK(pTimerCfg->FaultLock));
  3386. assert_param(IS_HRTIM_TIMDEADTIMEINSERTION(pTimerCfg->PushPull,
  3387. pTimerCfg->DeadTimeInsertion));
  3388. assert_param(IS_HRTIM_TIMDELAYEDPROTECTION(pTimerCfg->PushPull,
  3389. pTimerCfg->DelayedProtectionMode));
  3390. assert_param(IS_HRTIM_TIMUPDATETRIGGER(pTimerCfg->UpdateTrigger));
  3391. assert_param(IS_HRTIM_TIMRESETTRIGGER(pTimerCfg->ResetTrigger));
  3392. assert_param(IS_HRTIM_TIMUPDATEONRESET(pTimerCfg->ResetUpdate));
  3393. /* Configure timing unit */
  3394. HRTIM_TimingUnitWaveform_Config(hhrtim, TimerIdx, pTimerCfg);
  3395. }
  3396. /* Update timer parameters */
  3397. hhrtim->TimerParam[TimerIdx].InterruptRequests = pTimerCfg->InterruptRequests;
  3398. hhrtim->TimerParam[TimerIdx].DMARequests = pTimerCfg->DMARequests;
  3399. hhrtim->TimerParam[TimerIdx].DMASrcAddress = pTimerCfg->DMASrcAddress;
  3400. hhrtim->TimerParam[TimerIdx].DMADstAddress = pTimerCfg->DMADstAddress;
  3401. hhrtim->TimerParam[TimerIdx].DMASize = pTimerCfg->DMASize;
  3402. /* Force a software update */
  3403. HRTIM_ForceRegistersUpdate(hhrtim, TimerIdx);
  3404. hhrtim->State = HAL_HRTIM_STATE_READY;
  3405. /* Process Unlocked */
  3406. __HAL_UNLOCK(hhrtim);
  3407. return HAL_OK;
  3408. }
  3409. /**
  3410. * @brief Configures the event filtering capabilities of a timer (blanking, windowing)
  3411. * @param hhrtim pointer to HAL HRTIM handle
  3412. * @param TimerIdx Timer index
  3413. * This parameter can be one of the following values:
  3414. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3415. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3416. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3417. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3418. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3419. * @param Event external event for which timer event filtering must be configured
  3420. * This parameter can be one of the following values:
  3421. * @arg HRTIM_EVENT_NONE: Reset timer event filtering configuration
  3422. * @arg HRTIM_EVENT_1: External event 1
  3423. * @arg HRTIM_EVENT_2: External event 2
  3424. * @arg HRTIM_EVENT_3: External event 3
  3425. * @arg HRTIM_EVENT_4: External event 4
  3426. * @arg HRTIM_EVENT_5: External event 5
  3427. * @arg HRTIM_EVENT_6: External event 6
  3428. * @arg HRTIM_EVENT_7: External event 7
  3429. * @arg HRTIM_EVENT_8: External event 8
  3430. * @arg HRTIM_EVENT_9: External event 9
  3431. * @arg HRTIM_EVENT_10: External event 10
  3432. * @param pTimerEventFilteringCfg pointer to the timer event filtering configuration structure
  3433. * @note This function must be called before starting the timer
  3434. * @retval HAL status
  3435. */
  3436. HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef * hhrtim,
  3437. uint32_t TimerIdx,
  3438. uint32_t Event,
  3439. HRTIM_TimerEventFilteringCfgTypeDef* pTimerEventFilteringCfg)
  3440. {
  3441. uint32_t hrtim_eefr;
  3442. /* Check parameters */
  3443. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3444. assert_param(IS_HRTIM_EVENT(Event));
  3445. assert_param(IS_HRTIM_TIMEVENTFILTER(pTimerEventFilteringCfg->Filter));
  3446. assert_param(IS_HRTIM_TIMEVENTLATCH(pTimerEventFilteringCfg->Latch));
  3447. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3448. {
  3449. return HAL_BUSY;
  3450. }
  3451. /* Process Locked */
  3452. __HAL_LOCK(hhrtim);
  3453. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3454. /* Configure timer event filtering capabilities */
  3455. switch (Event)
  3456. {
  3457. case HRTIM_EVENT_NONE:
  3458. {
  3459. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = 0U;
  3460. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = 0U;
  3461. }
  3462. break;
  3463. case HRTIM_EVENT_1:
  3464. {
  3465. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3466. hrtim_eefr &= ~(HRTIM_EEFR1_EE1FLTR | HRTIM_EEFR1_EE1LTCH);
  3467. hrtim_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch);
  3468. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3469. }
  3470. break;
  3471. case HRTIM_EVENT_2:
  3472. {
  3473. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3474. hrtim_eefr &= ~(HRTIM_EEFR1_EE2FLTR | HRTIM_EEFR1_EE2LTCH);
  3475. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6U);
  3476. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3477. }
  3478. break;
  3479. case HRTIM_EVENT_3:
  3480. {
  3481. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3482. hrtim_eefr &= ~(HRTIM_EEFR1_EE3FLTR | HRTIM_EEFR1_EE3LTCH);
  3483. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12U);
  3484. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3485. }
  3486. break;
  3487. case HRTIM_EVENT_4:
  3488. {
  3489. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3490. hrtim_eefr &= ~(HRTIM_EEFR1_EE4FLTR | HRTIM_EEFR1_EE4LTCH);
  3491. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18U);
  3492. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3493. }
  3494. break;
  3495. case HRTIM_EVENT_5:
  3496. {
  3497. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3498. hrtim_eefr &= ~(HRTIM_EEFR1_EE5FLTR | HRTIM_EEFR1_EE5LTCH);
  3499. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24U);
  3500. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3501. }
  3502. break;
  3503. case HRTIM_EVENT_6:
  3504. {
  3505. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3506. hrtim_eefr &= ~(HRTIM_EEFR2_EE6FLTR | HRTIM_EEFR2_EE6LTCH);
  3507. hrtim_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch);
  3508. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3509. }
  3510. break;
  3511. case HRTIM_EVENT_7:
  3512. {
  3513. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3514. hrtim_eefr &= ~(HRTIM_EEFR2_EE7FLTR | HRTIM_EEFR2_EE7LTCH);
  3515. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6U);
  3516. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3517. }
  3518. break;
  3519. case HRTIM_EVENT_8:
  3520. {
  3521. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3522. hrtim_eefr &= ~(HRTIM_EEFR2_EE8FLTR | HRTIM_EEFR2_EE8LTCH);
  3523. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12U);
  3524. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3525. }
  3526. break;
  3527. case HRTIM_EVENT_9:
  3528. {
  3529. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3530. hrtim_eefr &= ~(HRTIM_EEFR2_EE9FLTR | HRTIM_EEFR2_EE9LTCH);
  3531. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18U);
  3532. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3533. }
  3534. break;
  3535. case HRTIM_EVENT_10:
  3536. {
  3537. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3538. hrtim_eefr &= ~(HRTIM_EEFR2_EE10FLTR | HRTIM_EEFR2_EE10LTCH);
  3539. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24U);
  3540. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3541. }
  3542. break;
  3543. default:
  3544. break;
  3545. }
  3546. hhrtim->State = HAL_HRTIM_STATE_READY;
  3547. /* Process Unlocked */
  3548. __HAL_UNLOCK(hhrtim);
  3549. return HAL_OK;
  3550. }
  3551. /**
  3552. * @brief Configures the deadtime insertion feature for a timer
  3553. * @param hhrtim pointer to HAL HRTIM handle
  3554. * @param TimerIdx Timer index
  3555. * This parameter can be one of the following values:
  3556. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3557. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3558. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3559. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3560. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3561. * @param pDeadTimeCfg pointer to the deadtime insertion configuration structure
  3562. * @retval HAL status
  3563. * @note This function must be called before starting the timer
  3564. */
  3565. HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef * hhrtim,
  3566. uint32_t TimerIdx,
  3567. HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg)
  3568. {
  3569. uint32_t hrtim_dtr;
  3570. /* Check parameters */
  3571. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3572. assert_param(IS_HRTIM_TIMDEADTIME_PRESCALERRATIO(pDeadTimeCfg->Prescaler));
  3573. assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGN(pDeadTimeCfg->RisingSign));
  3574. assert_param(IS_HRTIM_TIMDEADTIME_RISINGLOCK(pDeadTimeCfg->RisingLock));
  3575. assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(pDeadTimeCfg->RisingSignLock));
  3576. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGN(pDeadTimeCfg->FallingSign));
  3577. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGLOCK(pDeadTimeCfg->FallingLock));
  3578. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(pDeadTimeCfg->FallingSignLock));
  3579. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3580. {
  3581. return HAL_BUSY;
  3582. }
  3583. /* Process Locked */
  3584. __HAL_LOCK(hhrtim);
  3585. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3586. hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR;
  3587. /* Clear timer deadtime configuration */
  3588. hrtim_dtr &= ~(HRTIM_DTR_DTR | HRTIM_DTR_SDTR | HRTIM_DTR_DTPRSC |
  3589. HRTIM_DTR_DTRSLK | HRTIM_DTR_DTRLK | HRTIM_DTR_DTF |
  3590. HRTIM_DTR_SDTF | HRTIM_DTR_DTFSLK | HRTIM_DTR_DTFLK);
  3591. /* Set timer deadtime configuration */
  3592. hrtim_dtr |= pDeadTimeCfg->Prescaler;
  3593. hrtim_dtr |= pDeadTimeCfg->RisingValue;
  3594. hrtim_dtr |= pDeadTimeCfg->RisingSign;
  3595. hrtim_dtr |= pDeadTimeCfg->RisingSignLock;
  3596. hrtim_dtr |= pDeadTimeCfg->RisingLock;
  3597. hrtim_dtr |= (pDeadTimeCfg->FallingValue << 16U);
  3598. hrtim_dtr |= pDeadTimeCfg->FallingSign;
  3599. hrtim_dtr |= pDeadTimeCfg->FallingSignLock;
  3600. hrtim_dtr |= pDeadTimeCfg->FallingLock;
  3601. /* Update the HRTIM registers */
  3602. hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR = hrtim_dtr;
  3603. hhrtim->State = HAL_HRTIM_STATE_READY;
  3604. /* Process Unlocked */
  3605. __HAL_UNLOCK(hhrtim);
  3606. return HAL_OK;
  3607. }
  3608. /**
  3609. * @brief Configures the chopper mode feature for a timer
  3610. * @param hhrtim pointer to HAL HRTIM handle
  3611. * @param TimerIdx Timer index
  3612. * This parameter can be one of the following values:
  3613. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3614. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3615. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3616. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3617. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3618. * @param pChopperModeCfg pointer to the chopper mode configuration structure
  3619. * @retval HAL status
  3620. * @note This function must be called before configuring the timer output(s)
  3621. */
  3622. HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef * hhrtim,
  3623. uint32_t TimerIdx,
  3624. HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg)
  3625. {
  3626. uint32_t hrtim_chpr;
  3627. /* Check parameters */
  3628. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3629. assert_param(IS_HRTIM_CHOPPER_PRESCALERRATIO(pChopperModeCfg->CarrierFreq));
  3630. assert_param(IS_HRTIM_CHOPPER_DUTYCYCLE(pChopperModeCfg->DutyCycle));
  3631. assert_param(IS_HRTIM_CHOPPER_PULSEWIDTH(pChopperModeCfg->StartPulse));
  3632. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3633. {
  3634. return HAL_BUSY;
  3635. }
  3636. /* Process Locked */
  3637. __HAL_LOCK(hhrtim);
  3638. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3639. hrtim_chpr = hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR;
  3640. /* Clear timer chopper mode configuration */
  3641. hrtim_chpr &= ~(HRTIM_CHPR_CARFRQ | HRTIM_CHPR_CARDTY | HRTIM_CHPR_STRPW);
  3642. /* Set timer choppe mode configuration */
  3643. hrtim_chpr |= pChopperModeCfg->CarrierFreq;
  3644. hrtim_chpr |= (pChopperModeCfg->DutyCycle);
  3645. hrtim_chpr |= (pChopperModeCfg->StartPulse);
  3646. /* Update the HRTIM registers */
  3647. hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR = hrtim_chpr;
  3648. hhrtim->State = HAL_HRTIM_STATE_READY;
  3649. /* Process Unlocked */
  3650. __HAL_UNLOCK(hhrtim);
  3651. return HAL_OK;
  3652. }
  3653. /**
  3654. * @brief Configures the burst DMA controller for a timer
  3655. * @param hhrtim pointer to HAL HRTIM handle
  3656. * @param TimerIdx Timer index
  3657. * This parameter can be one of the following values:
  3658. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3659. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3660. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3661. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3662. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3663. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3664. * @param RegistersToUpdate registers to be written by DMA
  3665. * This parameter can be any combination of the following values:
  3666. * @arg HRTIM_BURSTDMA_CR: HRTIM_MCR or HRTIM_TIMxCR
  3667. * @arg HRTIM_BURSTDMA_ICR: HRTIM_MICR or HRTIM_TIMxICR
  3668. * @arg HRTIM_BURSTDMA_DIER: HRTIM_MDIER or HRTIM_TIMxDIER
  3669. * @arg HRTIM_BURSTDMA_CNT: HRTIM_MCNT or HRTIM_TIMxCNT
  3670. * @arg HRTIM_BURSTDMA_PER: HRTIM_MPER or HRTIM_TIMxPER
  3671. * @arg HRTIM_BURSTDMA_REP: HRTIM_MREP or HRTIM_TIMxREP
  3672. * @arg HRTIM_BURSTDMA_CMP1: HRTIM_MCMP1 or HRTIM_TIMxCMP1
  3673. * @arg HRTIM_BURSTDMA_CMP2: HRTIM_MCMP2 or HRTIM_TIMxCMP2
  3674. * @arg HRTIM_BURSTDMA_CMP3: HRTIM_MCMP3 or HRTIM_TIMxCMP3
  3675. * @arg HRTIM_BURSTDMA_CMP4: HRTIM_MCMP4 or HRTIM_TIMxCMP4
  3676. * @arg HRTIM_BURSTDMA_DTR: HRTIM_TIMxDTR
  3677. * @arg HRTIM_BURSTDMA_SET1R: HRTIM_TIMxSET1R
  3678. * @arg HRTIM_BURSTDMA_RST1R: HRTIM_TIMxRST1R
  3679. * @arg HRTIM_BURSTDMA_SET2R: HRTIM_TIMxSET2R
  3680. * @arg HRTIM_BURSTDMA_RST2R: HRTIM_TIMxRST2R
  3681. * @arg HRTIM_BURSTDMA_EEFR1: HRTIM_TIMxEEFR1
  3682. * @arg HRTIM_BURSTDMA_EEFR2: HRTIM_TIMxEEFR2
  3683. * @arg HRTIM_BURSTDMA_RSTR: HRTIM_TIMxRSTR
  3684. * @arg HRTIM_BURSTDMA_CHPR: HRTIM_TIMxCHPR
  3685. * @arg HRTIM_BURSTDMA_OUTR: HRTIM_TIMxOUTR
  3686. * @arg HRTIM_BURSTDMA_FLTR: HRTIM_TIMxFLTR
  3687. * @retval HAL status
  3688. * @note This function must be called before starting the timer
  3689. */
  3690. HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef * hhrtim,
  3691. uint32_t TimerIdx,
  3692. uint32_t RegistersToUpdate)
  3693. {
  3694. /* Check parameters */
  3695. assert_param(IS_HRTIM_TIMER_BURSTDMA(TimerIdx, RegistersToUpdate));
  3696. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3697. {
  3698. return HAL_BUSY;
  3699. }
  3700. /* Process Locked */
  3701. __HAL_LOCK(hhrtim);
  3702. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3703. /* Set the burst DMA timer update register */
  3704. switch (TimerIdx)
  3705. {
  3706. case HRTIM_TIMERINDEX_TIMER_A:
  3707. {
  3708. hhrtim->Instance->sCommonRegs.BDTAUPR = RegistersToUpdate;
  3709. }
  3710. break;
  3711. case HRTIM_TIMERINDEX_TIMER_B:
  3712. {
  3713. hhrtim->Instance->sCommonRegs.BDTBUPR = RegistersToUpdate;
  3714. }
  3715. break;
  3716. case HRTIM_TIMERINDEX_TIMER_C:
  3717. {
  3718. hhrtim->Instance->sCommonRegs.BDTCUPR = RegistersToUpdate;
  3719. }
  3720. break;
  3721. case HRTIM_TIMERINDEX_TIMER_D:
  3722. {
  3723. hhrtim->Instance->sCommonRegs.BDTDUPR = RegistersToUpdate;
  3724. }
  3725. break;
  3726. case HRTIM_TIMERINDEX_TIMER_E:
  3727. {
  3728. hhrtim->Instance->sCommonRegs.BDTEUPR = RegistersToUpdate;
  3729. }
  3730. break;
  3731. case HRTIM_TIMERINDEX_MASTER:
  3732. {
  3733. hhrtim->Instance->sCommonRegs.BDMUPR = RegistersToUpdate;
  3734. }
  3735. break;
  3736. default:
  3737. break;
  3738. }
  3739. hhrtim->State = HAL_HRTIM_STATE_READY;
  3740. /* Process Unlocked */
  3741. __HAL_UNLOCK(hhrtim);
  3742. return HAL_OK;
  3743. }
  3744. /**
  3745. * @brief Configures the compare unit of a timer operating in waveform mode
  3746. * @param hhrtim pointer to HAL HRTIM handle
  3747. * @param TimerIdx Timer index
  3748. * This parameter can be one of the following values:
  3749. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3750. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3751. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3752. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3753. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3754. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3755. * @param CompareUnit Compare unit to configure
  3756. * This parameter can be one of the following values:
  3757. * @arg HRTIM_COMPAREUNIT_1: Compare unit 1
  3758. * @arg HRTIM_COMPAREUNIT_2: Compare unit 2
  3759. * @arg HRTIM_COMPAREUNIT_3: Compare unit 3
  3760. * @arg HRTIM_COMPAREUNIT_4: Compare unit 4
  3761. * @param pCompareCfg pointer to the compare unit configuration structure
  3762. * @note When auto delayed mode is required for compare unit 2 or compare unit 4,
  3763. * application has to configure separately the capture unit. Capture unit
  3764. * to configure in that case depends on the compare unit auto delayed mode
  3765. * is applied to (see below):
  3766. * Auto delayed on output compare 2: capture unit 1 must be configured
  3767. * Auto delayed on output compare 4: capture unit 2 must be configured
  3768. * @retval HAL status
  3769. * @note This function must be called before starting the timer
  3770. */
  3771. HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef * hhrtim,
  3772. uint32_t TimerIdx,
  3773. uint32_t CompareUnit,
  3774. HRTIM_CompareCfgTypeDef* pCompareCfg)
  3775. {
  3776. /* Check parameters */
  3777. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  3778. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3779. {
  3780. return HAL_BUSY;
  3781. }
  3782. /* Process Locked */
  3783. __HAL_LOCK(hhrtim);
  3784. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3785. /* Configure the compare unit */
  3786. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  3787. {
  3788. switch (CompareUnit)
  3789. {
  3790. case HRTIM_COMPAREUNIT_1:
  3791. {
  3792. hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue;
  3793. }
  3794. break;
  3795. case HRTIM_COMPAREUNIT_2:
  3796. {
  3797. hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue;
  3798. }
  3799. break;
  3800. case HRTIM_COMPAREUNIT_3:
  3801. {
  3802. hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue;
  3803. }
  3804. break;
  3805. case HRTIM_COMPAREUNIT_4:
  3806. {
  3807. hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue;
  3808. }
  3809. break;
  3810. default:
  3811. break;
  3812. }
  3813. }
  3814. else
  3815. {
  3816. switch (CompareUnit)
  3817. {
  3818. case HRTIM_COMPAREUNIT_1:
  3819. {
  3820. /* Set the compare value */
  3821. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
  3822. }
  3823. break;
  3824. case HRTIM_COMPAREUNIT_2:
  3825. {
  3826. /* Check parameters */
  3827. assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
  3828. /* Set the compare value */
  3829. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
  3830. if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
  3831. {
  3832. /* Configure auto-delayed mode */
  3833. /* DELCMP2 bitfield must be reset when reprogrammed from one value */
  3834. /* to the other to reinitialize properly the auto-delayed mechanism */
  3835. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP2;
  3836. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= pCompareCfg->AutoDelayedMode;
  3837. /* Set the compare value for timeout compare unit (if any) */
  3838. if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
  3839. {
  3840. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
  3841. }
  3842. else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
  3843. {
  3844. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
  3845. }
  3846. }
  3847. }
  3848. break;
  3849. case HRTIM_COMPAREUNIT_3:
  3850. {
  3851. /* Set the compare value */
  3852. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
  3853. }
  3854. break;
  3855. case HRTIM_COMPAREUNIT_4:
  3856. {
  3857. /* Check parameters */
  3858. assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
  3859. /* Set the compare value */
  3860. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
  3861. if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
  3862. {
  3863. /* Configure auto-delayed mode */
  3864. /* DELCMP4 bitfield must be reset when reprogrammed from one value */
  3865. /* to the other to reinitialize properly the auto-delayed mechanism */
  3866. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP4;
  3867. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= (pCompareCfg->AutoDelayedMode << 2U);
  3868. /* Set the compare value for timeout compare unit (if any) */
  3869. if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
  3870. {
  3871. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
  3872. }
  3873. else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
  3874. {
  3875. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
  3876. }
  3877. }
  3878. }
  3879. break;
  3880. default:
  3881. break;
  3882. }
  3883. }
  3884. hhrtim->State = HAL_HRTIM_STATE_READY;
  3885. /* Process Unlocked */
  3886. __HAL_UNLOCK(hhrtim);
  3887. return HAL_OK;
  3888. }
  3889. /**
  3890. * @brief Configures the capture unit of a timer operating in waveform mode
  3891. * @param hhrtim pointer to HAL HRTIM handle
  3892. * @param TimerIdx Timer index
  3893. * This parameter can be one of the following values:
  3894. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3895. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3896. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3897. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3898. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3899. * @param CaptureUnit Capture unit to configure
  3900. * This parameter can be one of the following values:
  3901. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  3902. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  3903. * @param pCaptureCfg pointer to the compare unit configuration structure
  3904. * @retval HAL status
  3905. * @note This function must be called before starting the timer
  3906. */
  3907. HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef * hhrtim,
  3908. uint32_t TimerIdx,
  3909. uint32_t CaptureUnit,
  3910. HRTIM_CaptureCfgTypeDef* pCaptureCfg)
  3911. {
  3912. /* Check parameters */
  3913. assert_param(IS_HRTIM_TIMER_CAPTURETRIGGER(TimerIdx, pCaptureCfg->Trigger));
  3914. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3915. {
  3916. return HAL_BUSY;
  3917. }
  3918. /* Process Locked */
  3919. __HAL_LOCK(hhrtim);
  3920. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3921. /* Configure the capture unit */
  3922. switch (CaptureUnit)
  3923. {
  3924. case HRTIM_CAPTUREUNIT_1:
  3925. {
  3926. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = pCaptureCfg->Trigger;
  3927. }
  3928. break;
  3929. case HRTIM_CAPTUREUNIT_2:
  3930. {
  3931. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = pCaptureCfg->Trigger;
  3932. }
  3933. break;
  3934. default:
  3935. break;
  3936. }
  3937. hhrtim->State = HAL_HRTIM_STATE_READY;
  3938. /* Process Unlocked */
  3939. __HAL_UNLOCK(hhrtim);
  3940. return HAL_OK;
  3941. }
  3942. /**
  3943. * @brief Configures the output of a timer operating in waveform mode
  3944. * @param hhrtim pointer to HAL HRTIM handle
  3945. * @param TimerIdx Timer index
  3946. * This parameter can be one of the following values:
  3947. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3948. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3949. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3950. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3951. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3952. * @param Output Timer output
  3953. * This parameter can be one of the following values:
  3954. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  3955. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  3956. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  3957. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  3958. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  3959. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  3960. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  3961. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  3962. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  3963. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  3964. * @param pOutputCfg pointer to the timer output configuration structure
  3965. * @retval HAL status
  3966. * @note This function must be called before configuring the timer and after
  3967. * configuring the deadtime insertion feature (if required).
  3968. */
  3969. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef * hhrtim,
  3970. uint32_t TimerIdx,
  3971. uint32_t Output,
  3972. HRTIM_OutputCfgTypeDef * pOutputCfg)
  3973. {
  3974. /* Check parameters */
  3975. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  3976. assert_param(IS_HRTIM_OUTPUTPOLARITY(pOutputCfg->Polarity));
  3977. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pOutputCfg->IdleLevel));
  3978. assert_param(IS_HRTIM_OUTPUTIDLEMODE(pOutputCfg->IdleMode));
  3979. assert_param(IS_HRTIM_OUTPUTFAULTLEVEL(pOutputCfg->FaultLevel));
  3980. assert_param(IS_HRTIM_OUTPUTCHOPPERMODE(pOutputCfg->ChopperModeEnable));
  3981. assert_param(IS_HRTIM_OUTPUTBURSTMODEENTRY(pOutputCfg->BurstModeEntryDelayed));
  3982. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3983. {
  3984. return HAL_BUSY;
  3985. }
  3986. /* Process Locked */
  3987. __HAL_LOCK(hhrtim);
  3988. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3989. /* Configure the timer output */
  3990. HRTIM_OutputConfig(hhrtim,
  3991. TimerIdx,
  3992. Output,
  3993. pOutputCfg);
  3994. hhrtim->State = HAL_HRTIM_STATE_READY;
  3995. /* Process Unlocked */
  3996. __HAL_UNLOCK(hhrtim);
  3997. return HAL_OK;
  3998. }
  3999. /**
  4000. * @brief Forces the timer output to its active or inactive state
  4001. * @param hhrtim pointer to HAL HRTIM handle
  4002. * @param TimerIdx Timer index
  4003. * This parameter can be one of the following values:
  4004. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4005. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4006. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4007. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4008. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4009. * @param Output Timer output
  4010. * This parameter can be one of the following values:
  4011. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4012. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4013. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4014. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4015. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4016. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4017. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4018. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4019. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4020. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4021. * @param OutputLevel indicates whether the output is forced to its active or inactive level
  4022. * This parameter can be one of the following values:
  4023. * @arg HRTIM_OUTPUTLEVEL_ACTIVE: output is forced to its active level
  4024. * @arg HRTIM_OUTPUTLEVEL_INACTIVE: output is forced to its inactive level
  4025. * @retval HAL status
  4026. * @note The 'software set/reset trigger' bit in the output set/reset registers
  4027. * is automatically reset by hardware
  4028. */
  4029. HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef * hhrtim,
  4030. uint32_t TimerIdx,
  4031. uint32_t Output,
  4032. uint32_t OutputLevel)
  4033. {
  4034. /* Check parameters */
  4035. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  4036. assert_param(IS_HRTIM_OUTPUTLEVEL(OutputLevel));
  4037. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4038. {
  4039. return HAL_BUSY;
  4040. }
  4041. /* Process Locked */
  4042. __HAL_LOCK(hhrtim);
  4043. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4044. /* Force timer output level */
  4045. switch (Output)
  4046. {
  4047. case HRTIM_OUTPUT_TA1:
  4048. case HRTIM_OUTPUT_TB1:
  4049. case HRTIM_OUTPUT_TC1:
  4050. case HRTIM_OUTPUT_TD1:
  4051. case HRTIM_OUTPUT_TE1:
  4052. {
  4053. if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
  4054. {
  4055. /* Force output to its active state */
  4056. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R |= HRTIM_SET1R_SST;
  4057. }
  4058. else
  4059. {
  4060. /* Force output to its inactive state */
  4061. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R |= HRTIM_RST1R_SRT;
  4062. }
  4063. }
  4064. break;
  4065. case HRTIM_OUTPUT_TA2:
  4066. case HRTIM_OUTPUT_TB2:
  4067. case HRTIM_OUTPUT_TC2:
  4068. case HRTIM_OUTPUT_TD2:
  4069. case HRTIM_OUTPUT_TE2:
  4070. {
  4071. if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
  4072. {
  4073. /* Force output to its active state */
  4074. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R |= HRTIM_SET2R_SST;
  4075. }
  4076. else
  4077. {
  4078. /* Force output to its inactive state */
  4079. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R |= HRTIM_RST2R_SRT;
  4080. }
  4081. }
  4082. break;
  4083. default:
  4084. break;
  4085. }
  4086. hhrtim->State = HAL_HRTIM_STATE_READY;
  4087. /* Process Unlocked */
  4088. __HAL_UNLOCK(hhrtim);
  4089. return HAL_OK;
  4090. }
  4091. /**
  4092. * @brief Enables the generation of the waveform signal on the designated output(s)
  4093. * Outputs can be combined (ORed) to allow for simultaneous output enabling.
  4094. * @param hhrtim pointer to HAL HRTIM handle
  4095. * @param OutputsToStart Timer output(s) to enable
  4096. * This parameter can be any combination of the following values:
  4097. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4098. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4099. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4100. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4101. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4102. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4103. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4104. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4105. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4106. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4107. * @retval HAL status
  4108. */
  4109. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef * hhrtim,
  4110. uint32_t OutputsToStart)
  4111. {
  4112. /* Check the parameters */
  4113. assert_param(IS_HRTIM_OUTPUT(OutputsToStart));
  4114. /* Process Locked */
  4115. __HAL_LOCK(hhrtim);
  4116. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4117. /* Enable the HRTIM outputs */
  4118. hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart);
  4119. hhrtim->State = HAL_HRTIM_STATE_READY;
  4120. /* Process Unlocked */
  4121. __HAL_UNLOCK(hhrtim);
  4122. return HAL_OK;
  4123. }
  4124. /**
  4125. * @brief Disables the generation of the waveform signal on the designated output(s)
  4126. * Outputs can be combined (ORed) to allow for simultaneous output disabling.
  4127. * @param hhrtim pointer to HAL HRTIM handle
  4128. * @param OutputsToStop Timer output(s) to disable
  4129. * This parameter can be any combination of the following values:
  4130. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4131. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4132. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4133. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4134. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4135. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4136. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4137. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4138. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4139. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4140. * @retval HAL status
  4141. */
  4142. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef * hhrtim,
  4143. uint32_t OutputsToStop)
  4144. {
  4145. /* Check the parameters */
  4146. assert_param(IS_HRTIM_OUTPUT(OutputsToStop));
  4147. /* Process Locked */
  4148. __HAL_LOCK(hhrtim);
  4149. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4150. /* Enable the HRTIM outputs */
  4151. hhrtim->Instance->sCommonRegs.ODISR |= (OutputsToStop);
  4152. hhrtim->State = HAL_HRTIM_STATE_READY;
  4153. /* Process Unlocked */
  4154. __HAL_UNLOCK(hhrtim);
  4155. return HAL_OK;
  4156. }
  4157. /**
  4158. * @brief Starts the counter of the designated timer(s) operating in waveform mode
  4159. * Timers can be combined (ORed) to allow for simultaneous counter start.
  4160. * @param hhrtim pointer to HAL HRTIM handle
  4161. * @param Timers Timer counter(s) to start
  4162. * This parameter can be any combination of the following values:
  4163. * @arg HRTIM_TIMERID_MASTER
  4164. * @arg HRTIM_TIMERID_TIMER_A
  4165. * @arg HRTIM_TIMERID_TIMER_B
  4166. * @arg HRTIM_TIMERID_TIMER_C
  4167. * @arg HRTIM_TIMERID_TIMER_D
  4168. * @arg HRTIM_TIMERID_TIMER_E
  4169. * @retval HAL status
  4170. */
  4171. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart(HRTIM_HandleTypeDef * hhrtim,
  4172. uint32_t Timers)
  4173. {
  4174. /* Check the parameters */
  4175. assert_param(IS_HRTIM_TIMERID(Timers));
  4176. /* Process Locked */
  4177. __HAL_LOCK(hhrtim);
  4178. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4179. /* Enable timer(s) counter */
  4180. hhrtim->Instance->sMasterRegs.MCR |= (Timers);
  4181. hhrtim->State = HAL_HRTIM_STATE_READY;
  4182. /* Process Unlocked */
  4183. __HAL_UNLOCK(hhrtim);
  4184. return HAL_OK;
  4185. }
  4186. /**
  4187. * @brief Stops the counter of the designated timer(s) operating in waveform mode
  4188. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  4189. * @param hhrtim pointer to HAL HRTIM handle
  4190. * @param Timers Timer counter(s) to stop
  4191. * This parameter can be any combination of the following values:
  4192. * @arg HRTIM_TIMERID_MASTER
  4193. * @arg HRTIM_TIMERID_A
  4194. * @arg HRTIM_TIMERID_B
  4195. * @arg HRTIM_TIMERID_C
  4196. * @arg HRTIM_TIMERID_D
  4197. * @arg HRTIM_TIMERID_E
  4198. * @retval HAL status
  4199. * @note The counter of a timer is stopped only if all timer outputs are disabled
  4200. */
  4201. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop(HRTIM_HandleTypeDef * hhrtim,
  4202. uint32_t Timers)
  4203. {
  4204. /* Check the parameters */
  4205. assert_param(IS_HRTIM_TIMERID(Timers));
  4206. /* Process Locked */
  4207. __HAL_LOCK(hhrtim);
  4208. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4209. /* Disable timer(s) counter */
  4210. hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
  4211. hhrtim->State = HAL_HRTIM_STATE_READY;
  4212. /* Process Unlocked */
  4213. __HAL_UNLOCK(hhrtim);
  4214. return HAL_OK;
  4215. }
  4216. /**
  4217. * @brief Starts the counter of the designated timer(s) operating in waveform mode
  4218. * Timers can be combined (ORed) to allow for simultaneous counter start.
  4219. * @param hhrtim pointer to HAL HRTIM handle
  4220. * @param Timers Timer counter(s) to start
  4221. * This parameter can be any combination of the following values:
  4222. * @arg HRTIM_TIMERID_MASTER
  4223. * @arg HRTIM_TIMERID_A
  4224. * @arg HRTIM_TIMERID_B
  4225. * @arg HRTIM_TIMERID_C
  4226. * @arg HRTIM_TIMERID_D
  4227. * @arg HRTIM_TIMERID_E
  4228. * @note HRTIM interrupts (e.g. faults interrupts) and interrupts related
  4229. * to the timers to start are enabled within this function.
  4230. * Interrupts to enable are selected through HAL_HRTIM_WaveformTimerConfig
  4231. * function.
  4232. * @retval HAL status
  4233. */
  4234. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_IT(HRTIM_HandleTypeDef * hhrtim,
  4235. uint32_t Timers)
  4236. {
  4237. uint8_t timer_idx;
  4238. /* Check the parameters */
  4239. assert_param(IS_HRTIM_TIMERID(Timers));
  4240. /* Process Locked */
  4241. __HAL_LOCK(hhrtim);
  4242. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4243. /* Enable HRTIM interrupts (if required) */
  4244. __HAL_HRTIM_ENABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
  4245. /* Enable master timer related interrupts (if required) */
  4246. if ((Timers & HRTIM_TIMERID_MASTER) != RESET)
  4247. {
  4248. __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim,
  4249. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
  4250. }
  4251. /* Enable timing unit related interrupts (if required) */
  4252. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4253. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4254. timer_idx++)
  4255. {
  4256. if ((Timers & TimerIdxToTimerId[timer_idx]) != RESET)
  4257. {
  4258. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim,
  4259. timer_idx,
  4260. hhrtim->TimerParam[timer_idx].InterruptRequests);
  4261. }
  4262. }
  4263. /* Enable timer(s) counter */
  4264. hhrtim->Instance->sMasterRegs.MCR |= (Timers);
  4265. hhrtim->State = HAL_HRTIM_STATE_READY;
  4266. /* Process Unlocked */
  4267. __HAL_UNLOCK(hhrtim);
  4268. return HAL_OK;}
  4269. /**
  4270. * @brief Stops the counter of the designated timer(s) operating in waveform mode
  4271. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  4272. * @param hhrtim pointer to HAL HRTIM handle
  4273. * @param Timers Timer counter(s) to stop
  4274. * This parameter can be any combination of the following values:
  4275. * @arg HRTIM_TIMERID_MASTER
  4276. * @arg HRTIM_TIMERID_A
  4277. * @arg HRTIM_TIMERID_B
  4278. * @arg HRTIM_TIMERID_C
  4279. * @arg HRTIM_TIMERID_D
  4280. * @arg HRTIM_TIMERID_E
  4281. * @retval HAL status
  4282. * @note The counter of a timer is stopped only if all timer outputs are disabled
  4283. * @note All enabled timer related interrupts are disabled.
  4284. */
  4285. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_IT(HRTIM_HandleTypeDef * hhrtim,
  4286. uint32_t Timers)
  4287. {
  4288. /* ++ WA */
  4289. __IO uint32_t delai = (uint32_t)(0x17FU);
  4290. /* -- WA */
  4291. uint8_t timer_idx;
  4292. /* Check the parameters */
  4293. assert_param(IS_HRTIM_TIMERID(Timers));
  4294. /* Process Locked */
  4295. __HAL_LOCK(hhrtim);
  4296. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4297. /* Disable HRTIM interrupts (if required) */
  4298. __HAL_HRTIM_DISABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
  4299. /* Disable master timer related interrupts (if required) */
  4300. if ((Timers & HRTIM_TIMERID_MASTER) != RESET)
  4301. {
  4302. /* Interrupts enable flag must be cleared one by one */
  4303. __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
  4304. }
  4305. /* Disable timing unit related interrupts (if required) */
  4306. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4307. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4308. timer_idx++)
  4309. {
  4310. if ((Timers & TimerIdxToTimerId[timer_idx]) != RESET)
  4311. {
  4312. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, timer_idx, hhrtim->TimerParam[timer_idx].InterruptRequests);
  4313. }
  4314. }
  4315. /* ++ WA */
  4316. do { delai--; } while (delai != 0U);
  4317. /* -- WA */
  4318. /* Disable timer(s) counter */
  4319. hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
  4320. hhrtim->State = HAL_HRTIM_STATE_READY;
  4321. /* Process Unlocked */
  4322. __HAL_UNLOCK(hhrtim);
  4323. return HAL_OK;
  4324. }
  4325. /**
  4326. * @brief Starts the counter of the designated timer(s) operating in waveform mode
  4327. * Timers can be combined (ORed) to allow for simultaneous counter start.
  4328. * @param hhrtim pointer to HAL HRTIM handle
  4329. * @param Timers Timer counter(s) to start
  4330. * This parameter can be any combination of the following values:
  4331. * HRTIM_TIMERID_MASTER
  4332. * @arg HRTIM_TIMERID_A
  4333. * @arg HRTIM_TIMERID_B
  4334. * @arg HRTIM_TIMERID_C
  4335. * @arg HRTIM_TIMERID_D
  4336. * @arg HRTIM_TIMERID_E
  4337. * @retval HAL status
  4338. * @note This function enables the dma request(s) mentionned in the timer
  4339. * configuration data structure for every timers to start.
  4340. * @note The source memory address, the destination memory address and the
  4341. * size of each DMA transfer are specified at timer configuration time
  4342. * (see HAL_HRTIM_WaveformTimerConfig)
  4343. */
  4344. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  4345. uint32_t Timers)
  4346. {
  4347. uint8_t timer_idx;
  4348. DMA_HandleTypeDef * hdma;
  4349. /* Check the parameters */
  4350. assert_param(IS_HRTIM_TIMERID(Timers));
  4351. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  4352. {
  4353. return HAL_BUSY;
  4354. }
  4355. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4356. /* Process Locked */
  4357. __HAL_LOCK(hhrtim);
  4358. if (((Timers & HRTIM_TIMERID_MASTER) != RESET) &&
  4359. (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0U))
  4360. {
  4361. /* Set the DMA error callback */
  4362. hhrtim->hdmaMaster->XferErrorCallback = HRTIM_DMAError ;
  4363. /* Set the DMA transfer completed callback */
  4364. hhrtim->hdmaMaster->XferCpltCallback = HRTIM_DMAMasterCplt;
  4365. /* Enable the DMA channel */
  4366. HAL_DMA_Start_IT(hhrtim->hdmaMaster,
  4367. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASrcAddress,
  4368. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMADstAddress,
  4369. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASize);
  4370. /* Enable the timer DMA request */
  4371. __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim,
  4372. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
  4373. }
  4374. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4375. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4376. timer_idx++)
  4377. {
  4378. if (((Timers & TimerIdxToTimerId[timer_idx]) != RESET) &&
  4379. (hhrtim->TimerParam[timer_idx].DMARequests != 0U))
  4380. {
  4381. /* Get the timer DMA handler */
  4382. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx);
  4383. if (hdma == NULL)
  4384. {
  4385. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4386. /* Process Unlocked */
  4387. __HAL_UNLOCK(hhrtim);
  4388. return HAL_ERROR;
  4389. }
  4390. /* Set the DMA error callback */
  4391. hdma->XferErrorCallback = HRTIM_DMAError ;
  4392. /* Set the DMA transfer completed callback */
  4393. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  4394. /* Enable the DMA channel */
  4395. HAL_DMA_Start_IT(hdma,
  4396. hhrtim->TimerParam[timer_idx].DMASrcAddress,
  4397. hhrtim->TimerParam[timer_idx].DMADstAddress,
  4398. hhrtim->TimerParam[timer_idx].DMASize);
  4399. /* Enable the timer DMA request */
  4400. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim,
  4401. timer_idx,
  4402. hhrtim->TimerParam[timer_idx].DMARequests);
  4403. }
  4404. }
  4405. /* Enable the timer counter */
  4406. __HAL_HRTIM_ENABLE(hhrtim, Timers);
  4407. hhrtim->State = HAL_HRTIM_STATE_READY;
  4408. /* Process Unlocked */
  4409. __HAL_UNLOCK(hhrtim);
  4410. return HAL_OK;
  4411. }
  4412. /**
  4413. * @brief Stops the counter of the designated timer(s) operating in waveform mode
  4414. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  4415. * @param hhrtim pointer to HAL HRTIM handle
  4416. * @param Timers Timer counter(s) to stop
  4417. * This parameter can be any combination of the following values:
  4418. * @arg HRTIM_TIMERID_MASTER
  4419. * @arg HRTIM_TIMERID_A
  4420. * @arg HRTIM_TIMERID_B
  4421. * @arg HRTIM_TIMERID_C
  4422. * @arg HRTIM_TIMERID_D
  4423. * @arg HRTIM_TIMERID_E
  4424. * @retval HAL status
  4425. * @note The counter of a timer is stopped only if all timer outputs are disabled
  4426. * @note All enabled timer related DMA requests are disabled.
  4427. */
  4428. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  4429. uint32_t Timers)
  4430. {
  4431. uint8_t timer_idx;
  4432. DMA_HandleTypeDef * hdma;
  4433. /* Check the parameters */
  4434. assert_param(IS_HRTIM_TIMERID(Timers));
  4435. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4436. if (((Timers & HRTIM_TIMERID_MASTER) != RESET) &&
  4437. (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0U))
  4438. {
  4439. /* Disable the DMA */
  4440. HAL_DMA_Abort(hhrtim->hdmaMaster);
  4441. /* Disable the DMA request(s) */
  4442. __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim,
  4443. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
  4444. }
  4445. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4446. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4447. timer_idx++)
  4448. {
  4449. if (((Timers & TimerIdxToTimerId[timer_idx]) != RESET) &&
  4450. (hhrtim->TimerParam[timer_idx].DMARequests != 0U))
  4451. {
  4452. /* Get the timer DMA handler */
  4453. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx);
  4454. if (hdma == NULL)
  4455. {
  4456. /* Disable the DMA request(s) */
  4457. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim,
  4458. timer_idx,
  4459. hhrtim->TimerParam[timer_idx].DMARequests);
  4460. /* Disable the timer counter */
  4461. __HAL_HRTIM_DISABLE(hhrtim, Timers);
  4462. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4463. return HAL_ERROR;
  4464. }
  4465. /* Disable the DMA */
  4466. HAL_DMA_Abort(hdma);
  4467. /* Disable the DMA request(s) */
  4468. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim,
  4469. timer_idx,
  4470. hhrtim->TimerParam[timer_idx].DMARequests);
  4471. }
  4472. }
  4473. /* Disable the timer counter */
  4474. __HAL_HRTIM_DISABLE(hhrtim, Timers);
  4475. hhrtim->State = HAL_HRTIM_STATE_READY;
  4476. return HAL_OK;
  4477. }
  4478. /**
  4479. * @brief Enables or disables the HRTIM burst mode controller.
  4480. * @param hhrtim pointer to HAL HRTIM handle
  4481. * @param Enable Burst mode controller enabling
  4482. * This parameter can be one of the following values:
  4483. * @arg HRTIM_BURSTMODECTL_ENABLED: Burst mode enabled
  4484. * @arg HRTIM_BURSTMODECTL_DISABLED: Burst mode disabled
  4485. * @retval HAL status
  4486. * @note This function must be called after starting the timer(s)
  4487. */
  4488. HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef * hhrtim,
  4489. uint32_t Enable)
  4490. {
  4491. uint32_t hrtim_bmcr;
  4492. /* Check parameters */
  4493. assert_param(IS_HRTIM_BURSTMODECTL(Enable));
  4494. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4495. {
  4496. return HAL_BUSY;
  4497. }
  4498. /* Process Locked */
  4499. __HAL_LOCK(hhrtim);
  4500. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4501. /* Enable/Disable the burst mode controller */
  4502. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  4503. hrtim_bmcr &= ~(HRTIM_BMCR_BME);
  4504. hrtim_bmcr |= Enable;
  4505. /* Update the HRTIM registers */
  4506. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  4507. hhrtim->State = HAL_HRTIM_STATE_READY;
  4508. /* Process Unlocked */
  4509. __HAL_UNLOCK(hhrtim);
  4510. return HAL_OK;
  4511. }
  4512. /**
  4513. * @brief Triggers the burst mode operation.
  4514. * @param hhrtim pointer to HAL HRTIM handle
  4515. * @retval HAL status
  4516. */
  4517. HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim)
  4518. {
  4519. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4520. {
  4521. return HAL_BUSY;
  4522. }
  4523. /* Process Locked */
  4524. __HAL_LOCK(hhrtim);
  4525. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4526. /* Software trigger of the burst mode controller */
  4527. hhrtim->Instance->sCommonRegs.BMTRGR |= HRTIM_BMTRGR_SW;
  4528. hhrtim->State = HAL_HRTIM_STATE_READY;
  4529. /* Process Unlocked */
  4530. __HAL_UNLOCK(hhrtim);
  4531. return HAL_OK;
  4532. }
  4533. /**
  4534. * @brief Triggers a software capture on the designed capture unit
  4535. * @param hhrtim pointer to HAL HRTIM handle
  4536. * @param TimerIdx Timer index
  4537. * This parameter can be one of the following values:
  4538. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4539. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4540. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4541. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4542. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4543. * @param CaptureUnit Capture unit to trig
  4544. * This parameter can be one of the following values:
  4545. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  4546. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  4547. * @retval HAL status
  4548. * @note The 'software capture' bit in the capure configuration register is
  4549. * automatically reset by hardware
  4550. */
  4551. HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef * hhrtim,
  4552. uint32_t TimerIdx,
  4553. uint32_t CaptureUnit)
  4554. {
  4555. /* Check parameters */
  4556. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  4557. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
  4558. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4559. {
  4560. return HAL_BUSY;
  4561. }
  4562. /* Process Locked */
  4563. __HAL_LOCK(hhrtim);
  4564. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4565. /* Force a software capture on concerned capture unit */
  4566. switch (CaptureUnit)
  4567. {
  4568. case HRTIM_CAPTUREUNIT_1:
  4569. {
  4570. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR |= HRTIM_CPT1CR_SWCPT;
  4571. }
  4572. break;
  4573. case HRTIM_CAPTUREUNIT_2:
  4574. {
  4575. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR |= HRTIM_CPT2CR_SWCPT;
  4576. }
  4577. break;
  4578. default:
  4579. break;
  4580. }
  4581. hhrtim->State = HAL_HRTIM_STATE_READY;
  4582. /* Process Unlocked */
  4583. __HAL_UNLOCK(hhrtim);
  4584. return HAL_OK;
  4585. }
  4586. /**
  4587. * @brief Triggers the update of the registers of one or several timers
  4588. * @param hhrtim pointer to HAL HRTIM handle
  4589. * @param Timers timers concerned with the software register update
  4590. * This parameter can be any combination of the following values:
  4591. * @arg HRTIM_TIMERUPDATE_MASTER
  4592. * @arg HRTIM_TIMERUPDATE_A
  4593. * @arg HRTIM_TIMERUPDATE_B
  4594. * @arg HRTIM_TIMERUPDATE_C
  4595. * @arg HRTIM_TIMERUPDATE_D
  4596. * @arg HRTIM_TIMERUPDATE_E
  4597. * @retval HAL status
  4598. * @note The 'software update' bits in the HRTIM conrol register 2 register are
  4599. * automatically reset by hardware
  4600. */
  4601. HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef * hhrtim,
  4602. uint32_t Timers)
  4603. {
  4604. /* Check parameters */
  4605. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  4606. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4607. {
  4608. return HAL_BUSY;
  4609. }
  4610. /* Process Locked */
  4611. __HAL_LOCK(hhrtim);
  4612. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4613. /* Force timer(s) registers update */
  4614. hhrtim->Instance->sCommonRegs.CR2 |= Timers;
  4615. hhrtim->State = HAL_HRTIM_STATE_READY;
  4616. /* Process Unlocked */
  4617. __HAL_UNLOCK(hhrtim);
  4618. return HAL_OK;
  4619. }
  4620. /**
  4621. * @brief Triggers the reset of one or several timers
  4622. * @param hhrtim pointer to HAL HRTIM handle
  4623. * @param Timers timers concerned with the software counter reset
  4624. * This parameter can be any combination of the following values:
  4625. * @arg HRTIM_TIMERRESET_MASTER
  4626. * @arg HRTIM_TIMERRESET_TIMER_A
  4627. * @arg HRTIM_TIMERRESET_TIMER_B
  4628. * @arg HRTIM_TIMERRESET_TIMER_C
  4629. * @arg HRTIM_TIMERRESET_TIMER_D
  4630. * @arg HRTIM_TIMERRESET_TIMER_E
  4631. * @retval HAL status
  4632. * @note The 'software reset' bits in the HRTIM conrol register 2 are
  4633. * automatically reset by hardware
  4634. */
  4635. HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef * hhrtim,
  4636. uint32_t Timers)
  4637. {
  4638. /* Check parameters */
  4639. assert_param(IS_HRTIM_TIMERRESET(Timers));
  4640. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4641. {
  4642. return HAL_BUSY;
  4643. }
  4644. /* Process Locked */
  4645. __HAL_LOCK(hhrtim);
  4646. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4647. /* Force timer(s) registers reset */
  4648. hhrtim->Instance->sCommonRegs.CR2 = Timers;
  4649. hhrtim->State = HAL_HRTIM_STATE_READY;
  4650. /* Process Unlocked */
  4651. __HAL_UNLOCK(hhrtim);
  4652. return HAL_OK;
  4653. }
  4654. /**
  4655. * @brief Starts a burst DMA operation to update HRTIM control registers content
  4656. * @param hhrtim pointer to HAL HRTIM handle
  4657. * @param TimerIdx Timer index
  4658. * This parameter can be one of the following values:
  4659. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  4660. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4661. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4662. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4663. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4664. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4665. * @param BurstBufferAddress address of the buffer the HRTIM control registers
  4666. * content will be updated from.
  4667. * @param BurstBufferLength size (in WORDS) of the burst buffer.
  4668. * @retval HAL status
  4669. * @note The TimerIdx parameter determines the dma channel to be used by the
  4670. * DMA burst controller (see below)
  4671. * HRTIM_TIMERINDEX_MASTER: DMA channel 2 is used by the DMA burst controller
  4672. * HRTIM_TIMERINDEX_TIMER_A: DMA channel 3 is used by the DMA burst controller
  4673. * HRTIM_TIMERINDEX_TIMER_B: DMA channel 4 is used by the DMA burst controller
  4674. * HRTIM_TIMERINDEX_TIMER_C: DMA channel 5 is used by the DMA burst controller
  4675. * HRTIM_TIMERINDEX_TIMER_D: DMA channel 6 is used by the DMA burst controller
  4676. * HRTIM_TIMERINDEX_TIMER_E: DMA channel 7 is used by the DMA burst controller
  4677. */
  4678. HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
  4679. uint32_t TimerIdx,
  4680. uint32_t BurstBufferAddress,
  4681. uint32_t BurstBufferLength)
  4682. {
  4683. DMA_HandleTypeDef * hdma;
  4684. /* Check the parameters */
  4685. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  4686. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  4687. {
  4688. return HAL_BUSY;
  4689. }
  4690. if((hhrtim->State == HAL_HRTIM_STATE_READY))
  4691. {
  4692. if((BurstBufferAddress == 0U ) || (BurstBufferLength == 0U))
  4693. {
  4694. return HAL_ERROR;
  4695. }
  4696. else
  4697. {
  4698. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4699. }
  4700. }
  4701. /* Process Locked */
  4702. __HAL_LOCK(hhrtim);
  4703. /* Get the timer DMA handler */
  4704. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  4705. if (hdma == NULL)
  4706. {
  4707. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4708. /* Process Unlocked */
  4709. __HAL_UNLOCK(hhrtim);
  4710. return HAL_ERROR;
  4711. }
  4712. /* Set the DMA transfer completed callback */
  4713. hdma->XferCpltCallback = HRTIM_BurstDMACplt;
  4714. /* Set the DMA error callback */
  4715. hdma->XferErrorCallback = HRTIM_DMAError ;
  4716. /* Enable the DMA channel */
  4717. HAL_DMA_Start_IT(hdma,
  4718. BurstBufferAddress,
  4719. (uint32_t)&(hhrtim->Instance->sCommonRegs.BDMADR),
  4720. BurstBufferLength);
  4721. hhrtim->State = HAL_HRTIM_STATE_READY;
  4722. /* Process Unlocked */
  4723. __HAL_UNLOCK(hhrtim);
  4724. return HAL_OK;
  4725. }
  4726. /**
  4727. * @brief Enables the transfer from preload to active registers for one
  4728. * or several timing units (including master timer).
  4729. * @param hhrtim pointer to HAL HRTIM handle
  4730. * @param Timers Timer(s) concerned by the register preload enabling command
  4731. * This parameter can be any combination of the following values:
  4732. * @arg HRTIM_TIMERUPDATE_MASTER
  4733. * @arg HRTIM_TIMERUPDATE_A
  4734. * @arg HRTIM_TIMERUPDATE_B
  4735. * @arg HRTIM_TIMERUPDATE_C
  4736. * @arg HRTIM_TIMERUPDATE_D
  4737. * @arg HRTIM_TIMERUPDATE_E
  4738. * @retval HAL status
  4739. */
  4740. HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim,
  4741. uint32_t Timers)
  4742. {
  4743. /* Check the parameters */
  4744. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  4745. /* Process Locked */
  4746. __HAL_LOCK(hhrtim);
  4747. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4748. /* Enable timer(s) registers update */
  4749. hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers);
  4750. hhrtim->State = HAL_HRTIM_STATE_READY;
  4751. /* Process Unlocked */
  4752. __HAL_UNLOCK(hhrtim);
  4753. return HAL_OK;
  4754. }
  4755. /**
  4756. * @brief Disables the transfer from preload to active registers for one
  4757. * or several timing units (including master timer).
  4758. * @param hhrtim pointer to HAL HRTIM handle
  4759. * @param Timers Timer(s) concerned by the register preload disabling command
  4760. * This parameter can be any combination of the following values:
  4761. * @arg HRTIM_TIMERUPDATE_MASTER
  4762. * @arg HRTIM_TIMERUPDATE_A
  4763. * @arg HRTIM_TIMERUPDATE_B
  4764. * @arg HRTIM_TIMERUPDATE_C
  4765. * @arg HRTIM_TIMERUPDATE_D
  4766. * @arg HRTIM_TIMERUPDATE_E
  4767. * @retval HAL status
  4768. */
  4769. HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim,
  4770. uint32_t Timers)
  4771. {
  4772. /* Check the parameters */
  4773. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  4774. /* Process Locked */
  4775. __HAL_LOCK(hhrtim);
  4776. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4777. /* Enable timer(s) registers update */
  4778. hhrtim->Instance->sCommonRegs.CR1 |= (Timers);
  4779. hhrtim->State = HAL_HRTIM_STATE_READY;
  4780. /* Process Unlocked */
  4781. __HAL_UNLOCK(hhrtim);
  4782. return HAL_OK;
  4783. }
  4784. /**
  4785. * @}
  4786. */
  4787. /** @defgroup HRTIM_Exported_Functions_Group9 Peripheral state functions
  4788. * @brief Peripheral State functions
  4789. @verbatim
  4790. ===============================================================================
  4791. ##### Peripheral State functions #####
  4792. ===============================================================================
  4793. [..] This section provides functions used to get HRTIM or HRTIM timer
  4794. specific information:
  4795. (+) Get HRTIM HAL state
  4796. (+) Get captured value
  4797. (+) Get HRTIM timer output level
  4798. (+) Get HRTIM timer output state
  4799. (+) Get delayed protection status
  4800. (+) Get burst status
  4801. (+) Get current push-pull status
  4802. (+) Get idle push-pull status
  4803. @endverbatim
  4804. * @{
  4805. */
  4806. /**
  4807. * @brief return the HRTIM HAL state
  4808. * @param hhrtim pointer to HAL HRTIM handle
  4809. * @retval HAL state
  4810. */
  4811. HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(HRTIM_HandleTypeDef* hhrtim)
  4812. {
  4813. /* Return ADC state */
  4814. return hhrtim->State;
  4815. }
  4816. /**
  4817. * @brief Returns actual value of the capture register of the designated capture unit
  4818. * @param hhrtim pointer to HAL HRTIM handle
  4819. * @param TimerIdx Timer index
  4820. * This parameter can be one of the following values:
  4821. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4822. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4823. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4824. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4825. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4826. * @param CaptureUnit Capture unit to trig
  4827. * This parameter can be one of the following values:
  4828. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  4829. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  4830. * @retval Captured value
  4831. */
  4832. uint32_t HAL_HRTIM_GetCapturedValue(HRTIM_HandleTypeDef * hhrtim,
  4833. uint32_t TimerIdx,
  4834. uint32_t CaptureUnit)
  4835. {
  4836. uint32_t captured_value = 0U;
  4837. /* Check parameters */
  4838. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  4839. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
  4840. /* Read captured value */
  4841. switch (CaptureUnit)
  4842. {
  4843. case HRTIM_CAPTUREUNIT_1:
  4844. {
  4845. captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xR;
  4846. }
  4847. break;
  4848. case HRTIM_CAPTUREUNIT_2:
  4849. {
  4850. captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xR;
  4851. }
  4852. break;
  4853. default:
  4854. break;
  4855. }
  4856. return captured_value;
  4857. }
  4858. /**
  4859. * @brief Returns actual level (active or inactive) of the designated output
  4860. * @param hhrtim pointer to HAL HRTIM handle
  4861. * @param TimerIdx Timer index
  4862. * This parameter can be one of the following values:
  4863. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4864. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4865. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4866. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4867. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4868. * @param Output Timer output
  4869. * This parameter can be one of the following values:
  4870. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4871. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4872. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4873. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4874. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4875. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4876. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4877. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4878. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4879. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4880. * @retval Output level
  4881. * @note Returned output level is taken before the output stage (chopper,
  4882. * polarity).
  4883. */
  4884. uint32_t HAL_HRTIM_WaveformGetOutputLevel(HRTIM_HandleTypeDef * hhrtim,
  4885. uint32_t TimerIdx,
  4886. uint32_t Output)
  4887. {
  4888. uint32_t output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
  4889. /* Check parameters */
  4890. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  4891. /* Read the output level */
  4892. switch (Output)
  4893. {
  4894. case HRTIM_OUTPUT_TA1:
  4895. case HRTIM_OUTPUT_TB1:
  4896. case HRTIM_OUTPUT_TC1:
  4897. case HRTIM_OUTPUT_TD1:
  4898. case HRTIM_OUTPUT_TE1:
  4899. {
  4900. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1CPY) != RESET)
  4901. {
  4902. output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
  4903. }
  4904. else
  4905. {
  4906. output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
  4907. }
  4908. }
  4909. break;
  4910. case HRTIM_OUTPUT_TA2:
  4911. case HRTIM_OUTPUT_TB2:
  4912. case HRTIM_OUTPUT_TC2:
  4913. case HRTIM_OUTPUT_TD2:
  4914. case HRTIM_OUTPUT_TE2:
  4915. {
  4916. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2CPY) != RESET)
  4917. {
  4918. output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
  4919. }
  4920. else
  4921. {
  4922. output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
  4923. }
  4924. }
  4925. break;
  4926. default:
  4927. break;
  4928. }
  4929. return output_level;
  4930. }
  4931. /**
  4932. * @brief Returns actual state (RUN, IDLE, FAULT) of the designated output
  4933. * @param hhrtim pointer to HAL HRTIM handle
  4934. * @param TimerIdx Timer index
  4935. * This parameter can be one of the following values:
  4936. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4937. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4938. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4939. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4940. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4941. * @param Output Timer output
  4942. * This parameter can be one of the following values:
  4943. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4944. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4945. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4946. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4947. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4948. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4949. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4950. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4951. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4952. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4953. * @retval Output state
  4954. */
  4955. uint32_t HAL_HRTIM_WaveformGetOutputState(HRTIM_HandleTypeDef * hhrtim,
  4956. uint32_t TimerIdx,
  4957. uint32_t Output)
  4958. {
  4959. uint32_t output_bit = 0U;
  4960. uint32_t output_state = HRTIM_OUTPUTSTATE_IDLE;
  4961. /* Check parameters */
  4962. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  4963. /* Set output state according to output control status and output disable status */
  4964. switch (Output)
  4965. {
  4966. case HRTIM_OUTPUT_TA1:
  4967. {
  4968. output_bit = HRTIM_OENR_TA1OEN;
  4969. }
  4970. break;
  4971. case HRTIM_OUTPUT_TA2:
  4972. {
  4973. output_bit = HRTIM_OENR_TA2OEN;
  4974. }
  4975. break;
  4976. case HRTIM_OUTPUT_TB1:
  4977. {
  4978. output_bit = HRTIM_OENR_TB1OEN;
  4979. }
  4980. break;
  4981. case HRTIM_OUTPUT_TB2:
  4982. {
  4983. output_bit = HRTIM_OENR_TB2OEN;
  4984. }
  4985. break;
  4986. case HRTIM_OUTPUT_TC1:
  4987. {
  4988. output_bit = HRTIM_OENR_TC1OEN;
  4989. }
  4990. break;
  4991. case HRTIM_OUTPUT_TC2:
  4992. {
  4993. output_bit = HRTIM_OENR_TC2OEN;
  4994. }
  4995. break;
  4996. case HRTIM_OUTPUT_TD1:
  4997. {
  4998. output_bit = HRTIM_OENR_TD1OEN;
  4999. }
  5000. break;
  5001. case HRTIM_OUTPUT_TD2:
  5002. {
  5003. output_bit = HRTIM_OENR_TD2OEN;
  5004. }
  5005. break;
  5006. case HRTIM_OUTPUT_TE1:
  5007. {
  5008. output_bit = HRTIM_OENR_TE1OEN;
  5009. }
  5010. break;
  5011. case HRTIM_OUTPUT_TE2:
  5012. {
  5013. output_bit = HRTIM_OENR_TE2OEN;
  5014. }
  5015. break;
  5016. default:
  5017. break;
  5018. }
  5019. if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != RESET)
  5020. {
  5021. /* Output is enabled: output in RUN state (whatever ouput disable status is)*/
  5022. output_state = HRTIM_OUTPUTSTATE_RUN;
  5023. }
  5024. else
  5025. {
  5026. if ((hhrtim->Instance->sCommonRegs.ODSR & output_bit) != RESET)
  5027. {
  5028. /* Output is disabled: output in FAULT state */
  5029. output_state = HRTIM_OUTPUTSTATE_FAULT;
  5030. }
  5031. else
  5032. {
  5033. /* Output is disabled: output in IDLE state */
  5034. output_state = HRTIM_OUTPUTSTATE_IDLE;
  5035. }
  5036. }
  5037. return(output_state);
  5038. }
  5039. /**
  5040. * @brief Returns the level (active or inactive) of the designated output
  5041. * when the delayed protection was triggered.
  5042. * @param hhrtim pointer to HAL HRTIM handle
  5043. * @param TimerIdx Timer index
  5044. * This parameter can be one of the following values:
  5045. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5046. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5047. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5048. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5049. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5050. * @param Output Timer output
  5051. * This parameter can be one of the following values:
  5052. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  5053. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  5054. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  5055. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  5056. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  5057. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  5058. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  5059. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  5060. * @arg HRTIM_OUTPUT_TD1: Timer E - Output 1
  5061. * @arg HRTIM_OUTPUT_TD2: Timer E - Output 2
  5062. * @retval Delayed protection status
  5063. */
  5064. uint32_t HAL_HRTIM_GetDelayedProtectionStatus(HRTIM_HandleTypeDef * hhrtim,
  5065. uint32_t TimerIdx,
  5066. uint32_t Output)
  5067. {
  5068. uint32_t delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
  5069. /* Check parameters */
  5070. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  5071. /* Read the delayed protection status */
  5072. switch (Output)
  5073. {
  5074. case HRTIM_OUTPUT_TA1:
  5075. case HRTIM_OUTPUT_TB1:
  5076. case HRTIM_OUTPUT_TC1:
  5077. case HRTIM_OUTPUT_TD1:
  5078. case HRTIM_OUTPUT_TE1:
  5079. {
  5080. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1STAT) != RESET)
  5081. {
  5082. /* Output 1 was active when the delayed idle protection was triggered */
  5083. delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
  5084. }
  5085. else
  5086. {
  5087. /* Output 1 was inactive when the delayed idle protection was triggered */
  5088. delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
  5089. }
  5090. }
  5091. break;
  5092. case HRTIM_OUTPUT_TA2:
  5093. case HRTIM_OUTPUT_TB2:
  5094. case HRTIM_OUTPUT_TC2:
  5095. case HRTIM_OUTPUT_TD2:
  5096. case HRTIM_OUTPUT_TE2:
  5097. {
  5098. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2STAT) != RESET)
  5099. {
  5100. /* Output 2 was active when the delayed idle protection was triggered */
  5101. delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
  5102. }
  5103. else
  5104. {
  5105. /* Output 2 was inactive when the delayed idle protection was triggered */
  5106. delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
  5107. }
  5108. }
  5109. break;
  5110. default:
  5111. break;
  5112. }
  5113. return delayed_protection_status;
  5114. }
  5115. /**
  5116. * @brief Returns the actual status (active or inactive) of the burst mode controller
  5117. * @param hhrtim pointer to HAL HRTIM handle
  5118. * @retval Burst mode controller status
  5119. */
  5120. uint32_t HAL_HRTIM_GetBurstStatus(HRTIM_HandleTypeDef * hhrtim)
  5121. {
  5122. uint32_t burst_mode_status;
  5123. /* Read burst mode status */
  5124. burst_mode_status = (hhrtim->Instance->sCommonRegs.BMCR & HRTIM_BMCR_BMSTAT);
  5125. return burst_mode_status;
  5126. }
  5127. /**
  5128. * @brief Indicates on which output the signal is currently active (when the
  5129. * push pull mode is enabled).
  5130. * @param hhrtim pointer to HAL HRTIM handle
  5131. * @param TimerIdx Timer index
  5132. * This parameter can be one of the following values:
  5133. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5134. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5135. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5136. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5137. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5138. * @retval Burst mode controller status
  5139. */
  5140. uint32_t HAL_HRTIM_GetCurrentPushPullStatus(HRTIM_HandleTypeDef * hhrtim,
  5141. uint32_t TimerIdx)
  5142. {
  5143. uint32_t current_pushpull_status;
  5144. /* Check the parameters */
  5145. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  5146. /* Read current push pull status */
  5147. current_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_CPPSTAT);
  5148. return current_pushpull_status;
  5149. }
  5150. /**
  5151. * @brief Indicates on which output the signal was applied, in push-pull mode,
  5152. balanced fault mode or delayed idle mode, when the protection was triggered.
  5153. * @param hhrtim pointer to HAL HRTIM handle
  5154. * @param TimerIdx Timer index
  5155. * This parameter can be one of the following values:
  5156. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5157. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5158. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5159. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5160. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5161. * @retval Idle Push Pull Status
  5162. */
  5163. uint32_t HAL_HRTIM_GetIdlePushPullStatus(HRTIM_HandleTypeDef * hhrtim,
  5164. uint32_t TimerIdx)
  5165. {
  5166. uint32_t idle_pushpull_status;
  5167. /* Check the parameters */
  5168. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  5169. /* Read current push pull status */
  5170. idle_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_IPPSTAT);
  5171. return idle_pushpull_status;
  5172. }
  5173. /**
  5174. * @}
  5175. */
  5176. /** @defgroup HRTIM_Exported_Functions_Group10 Interrupts handling
  5177. * @brief Functions called when HRTIM generates an interrupt
  5178. * 7 interrupts can be generated by the master timer:
  5179. * - Master timer registers update
  5180. * - Synchronization event received
  5181. * - Master timer repetition event
  5182. * - Master Compare 1 to 4 event
  5183. * 14 interrupts can be generated by each timing unit:
  5184. * - Delayed protection triggered
  5185. * - Counter reset or roll-over event
  5186. * - Output 1 and output 2 reset (transition active to inactive)
  5187. * - Output 1 and output 2 set (transition inactive to active)
  5188. * - Capture 1 and 2 events
  5189. * - Timing unit registers update
  5190. * - Repetition event
  5191. * - Compare 1 to 4 event
  5192. * 8 global interrupts are generated for the whole HRTIM:
  5193. * - System fault and Fault 1 to 5 (regardless of the timing unit attribution)
  5194. * - DLL calibration done
  5195. * - Burst mode period completed
  5196. @verbatim
  5197. ===============================================================================
  5198. ##### HRTIM interrupts handling #####
  5199. ===============================================================================
  5200. [..]
  5201. This subsection provides a set of functions allowing to manage the HRTIM
  5202. interrupts:
  5203. (+) HRTIM interrupt handler
  5204. (+) Callback function called when Fault1 interrupt occurs
  5205. (+) Callback function called when Fault2 interrupt occurs
  5206. (+) Callback function called when Fault3 interrupt occurs
  5207. (+) Callback function called when Fault4 interrupt occurs
  5208. (+) Callback function called when Fault5 interrupt occurs
  5209. (+) Callback function called when system Fault interrupt occurs
  5210. (+) Callback function called when DLL ready interrupt occurs
  5211. (+) Callback function called when burst mode period interrupt occurs
  5212. (+) Callback function called when synchronization input interrupt occurs
  5213. (+) Callback function called when a timer register update interrupt occurs
  5214. (+) Callback function called when a timer repetition interrupt occurs
  5215. (+) Callback function called when a compare 1 match interrupt occurs
  5216. (+) Callback function called when a compare 2 match interrupt occurs
  5217. (+) Callback function called when a compare 3 match interrupt occurs
  5218. (+) Callback function called when a compare 4 match interrupt occurs
  5219. (+) Callback function called when a capture 1 interrupt occurs
  5220. (+) Callback function called when a capture 2 interrupt occurs
  5221. (+) Callback function called when a delayed protection interrupt occurs
  5222. (+) Callback function called when a timer counter reset interrupt occurs
  5223. (+) Callback function called when a timer output 1 set interrupt occurs
  5224. (+) Callback function called when a timer output 1 reset interrupt occurs
  5225. (+) Callback function called when a timer output 2 set interrupt occurs
  5226. (+) Callback function called when a timer output 2 reset interrupt occurs
  5227. (+) Callback function called when a timer output 2 reset interrupt occurs
  5228. (+) Callback function called upon completion of a burst DMA transfer
  5229. @endverbatim
  5230. * @{
  5231. */
  5232. /**
  5233. * @brief This function handles HRTIM interrupt request.
  5234. * @param hhrtim pointer to HAL HRTIM handle
  5235. * @param TimerIdx Timer index
  5236. * This parameter can be any value of @ref HRTIM_Timer_Index
  5237. * @retval None
  5238. */
  5239. void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef * hhrtim,
  5240. uint32_t TimerIdx)
  5241. {
  5242. /* HRTIM interrupts handling */
  5243. if (TimerIdx == HRTIM_TIMERINDEX_COMMON)
  5244. {
  5245. HRTIM_HRTIM_ISR(hhrtim);
  5246. }
  5247. else if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  5248. {
  5249. /* Master related interrupts handling */
  5250. HRTIM_Master_ISR(hhrtim);
  5251. }
  5252. else
  5253. {
  5254. /* Timing unit related interrupts handling */
  5255. HRTIM_Timer_ISR(hhrtim, TimerIdx);
  5256. }
  5257. }
  5258. /**
  5259. * @brief Callback function invoked when a fault 1 interrupt occured
  5260. * @param hhrtim pointer to HAL HRTIM handle * @retval None
  5261. * @retval None
  5262. */
  5263. __weak void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef * hhrtim)
  5264. {
  5265. /* Prevent unused argument(s) compilation warning */
  5266. UNUSED(hhrtim);
  5267. /* NOTE : This function should not be modified, when the callback is needed,
  5268. the HAL_HRTIM_Fault1Callback could be implenetd in the user file
  5269. */
  5270. }
  5271. /**
  5272. * @brief Callback function invoked when a fault 2 interrupt occured
  5273. * @param hhrtim pointer to HAL HRTIM handle
  5274. * @retval None
  5275. */
  5276. __weak void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef * hhrtim)
  5277. {
  5278. /* Prevent unused argument(s) compilation warning */
  5279. UNUSED(hhrtim);
  5280. /* NOTE : This function should not be modified, when the callback is needed,
  5281. the HAL_HRTIM_Fault2Callback could be implenetd in the user file
  5282. */
  5283. }
  5284. /**
  5285. * @brief Callback function invoked when a fault 3 interrupt occured
  5286. * @param hhrtim pointer to HAL HRTIM handle
  5287. * @retval None
  5288. */
  5289. __weak void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef * hhrtim)
  5290. {
  5291. /* Prevent unused argument(s) compilation warning */
  5292. UNUSED(hhrtim);
  5293. /* NOTE : This function should not be modified, when the callback is needed,
  5294. the HAL_HRTIM_Fault3Callback could be implenetd in the user file
  5295. */
  5296. }
  5297. /**
  5298. * @brief Callback function invoked when a fault 4 interrupt occured
  5299. * @param hhrtim pointer to HAL HRTIM handle
  5300. * @retval None
  5301. */
  5302. __weak void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef * hhrtim)
  5303. {
  5304. /* Prevent unused argument(s) compilation warning */
  5305. UNUSED(hhrtim);
  5306. /* NOTE : This function should not be modified, when the callback is needed,
  5307. the HAL_HRTIM_Fault4Callback could be implenetd in the user file
  5308. */
  5309. }
  5310. /**
  5311. * @brief Callback function invoked when a fault 5 interrupt occured
  5312. * @param hhrtim pointer to HAL HRTIM handle
  5313. * @retval None
  5314. */
  5315. __weak void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef * hhrtim)
  5316. {
  5317. /* Prevent unused argument(s) compilation warning */
  5318. UNUSED(hhrtim);
  5319. /* NOTE : This function should not be modified, when the callback is needed,
  5320. the HAL_HRTIM_Fault5Callback could be implenetd in the user file
  5321. */
  5322. }
  5323. /**
  5324. * @brief Callback function invoked when a system fault interrupt occured
  5325. * @param hhrtim pointer to HAL HRTIM handle
  5326. * @retval None
  5327. */
  5328. __weak void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef * hhrtim)
  5329. {
  5330. /* Prevent unused argument(s) compilation warning */
  5331. UNUSED(hhrtim);
  5332. /* NOTE : This function should not be modified, when the callback is needed,
  5333. the HAL_HRTIM_SystemFaultCallback could be implenetd in the user file
  5334. */
  5335. }
  5336. /**
  5337. * @brief Callback function invoked when the DLL calibration is completed
  5338. * @param hhrtim pointer to HAL HRTIM handle
  5339. * @retval None
  5340. */
  5341. __weak void HAL_HRTIM_DLLCalbrationReadyCallback(HRTIM_HandleTypeDef * hhrtim)
  5342. {
  5343. /* Prevent unused argument(s) compilation warning */
  5344. UNUSED(hhrtim);
  5345. /* NOTE : This function should not be modified, when the callback is needed,
  5346. the HAL_HRTIM_DLLCalbrationCallback could be implenetd in the user file
  5347. */
  5348. }
  5349. /**
  5350. * @brief Callback function invoked when the end of the burst mode period is reached
  5351. * @param hhrtim pointer to HAL HRTIM handle
  5352. * @retval None
  5353. */
  5354. __weak void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef * hhrtim)
  5355. {
  5356. /* Prevent unused argument(s) compilation warning */
  5357. UNUSED(hhrtim);
  5358. /* NOTE : This function should not be modified, when the callback is needed,
  5359. the HAL_HRTIM_BurstModeCallback could be implenetd in the user file
  5360. */
  5361. }
  5362. /**
  5363. * @brief Callback function invoked when a synchronization input event is received
  5364. * @param hhrtim pointer to HAL HRTIM handle
  5365. * @retval None
  5366. */
  5367. __weak void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef * hhrtim)
  5368. {
  5369. /* Prevent unused argument(s) compilation warning */
  5370. UNUSED(hhrtim);
  5371. /* NOTE : This function should not be modified, when the callback is needed,
  5372. the HAL_HRTIM_Master_SynchronizationEventCallback could be implenetd in the user file
  5373. */
  5374. }
  5375. /**
  5376. * @brief Callback function invoked when timer registers are updated
  5377. * @param hhrtim pointer to HAL HRTIM handle
  5378. * @param TimerIdx Timer index
  5379. * This parameter can be one of the following values:
  5380. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5381. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5382. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5383. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5384. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5385. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5386. * @retval None
  5387. */
  5388. __weak void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef * hhrtim,
  5389. uint32_t TimerIdx)
  5390. {
  5391. /* Prevent unused argument(s) compilation warning */
  5392. UNUSED(hhrtim);
  5393. UNUSED(TimerIdx);
  5394. /* NOTE : This function should not be modified, when the callback is needed,
  5395. the HAL_HRTIM_Master_RegistersUpdateCallback could be implenetd in the user file
  5396. */
  5397. }
  5398. /**
  5399. * @brief Callback function invoked when timer repetition period has elapsed
  5400. * @param hhrtim pointer to HAL HRTIM handle
  5401. * @param TimerIdx Timer index
  5402. * This parameter can be one of the following values:
  5403. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5404. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5405. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5406. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5407. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5408. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5409. * @retval None
  5410. */
  5411. __weak void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef * hhrtim,
  5412. uint32_t TimerIdx)
  5413. {
  5414. /* Prevent unused argument(s) compilation warning */
  5415. UNUSED(hhrtim);
  5416. UNUSED(TimerIdx);
  5417. /* NOTE : This function should not be modified, when the callback is needed,
  5418. the HAL_HRTIM_Master_RepetitionEventCallback could be implenetd in the user file
  5419. */
  5420. }
  5421. /**
  5422. * @brief Callback function invoked when the timer counter matches the value
  5423. * programmed in the compare 1 register
  5424. * @param hhrtim pointer to HAL HRTIM handle
  5425. * @param TimerIdx Timer index
  5426. * This parameter can be one of the following values:
  5427. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5428. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5429. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5430. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5431. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5432. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5433. * @retval None
  5434. */
  5435. __weak void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5436. uint32_t TimerIdx)
  5437. {
  5438. /* Prevent unused argument(s) compilation warning */
  5439. UNUSED(hhrtim);
  5440. UNUSED(TimerIdx);
  5441. /* NOTE : This function should not be modified, when the callback is needed,
  5442. the HAL_HRTIM_Master_Compare1EventCallback could be implenetd in the user file
  5443. */
  5444. }
  5445. /**
  5446. * @brief Callback function invoked when the timer counter matches the value
  5447. * programmed in the compare 2 register
  5448. * @param hhrtim pointer to HAL HRTIM handle
  5449. * @retval None
  5450. * @param TimerIdx Timer index
  5451. * This parameter can be one of the following values:
  5452. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5453. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5454. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5455. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5456. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5457. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5458. */
  5459. __weak void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5460. uint32_t TimerIdx)
  5461. {
  5462. /* Prevent unused argument(s) compilation warning */
  5463. UNUSED(hhrtim);
  5464. UNUSED(TimerIdx);
  5465. /* NOTE : This function should not be modified, when the callback is needed,
  5466. the HAL_HRTIM_Master_Compare2EventCallback could be implenetd in the user file
  5467. */
  5468. }
  5469. /**
  5470. * @brief Callback function invoked when the timer counter matches the value
  5471. * programmed in the compare 3 register
  5472. * @param hhrtim pointer to HAL HRTIM handle
  5473. * @param TimerIdx Timer index
  5474. * This parameter can be one of the following values:
  5475. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5476. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5477. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5478. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5479. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5480. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5481. * @retval None
  5482. */
  5483. __weak void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5484. uint32_t TimerIdx)
  5485. {
  5486. /* Prevent unused argument(s) compilation warning */
  5487. UNUSED(hhrtim);
  5488. UNUSED(TimerIdx);
  5489. /* NOTE : This function should not be modified, when the callback is needed,
  5490. the HAL_HRTIM_Master_Compare3EventCallback could be implenetd in the user file
  5491. */
  5492. }
  5493. /**
  5494. * @brief Callback function invoked when the timer counter matches the value
  5495. * programmed in the compare 4 register.
  5496. * @param hhrtim pointer to HAL HRTIM handle
  5497. * @param TimerIdx Timer index
  5498. * This parameter can be one of the following values:
  5499. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5500. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5501. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5502. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5503. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5504. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5505. * @retval None
  5506. */
  5507. __weak void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5508. uint32_t TimerIdx)
  5509. {
  5510. /* Prevent unused argument(s) compilation warning */
  5511. UNUSED(hhrtim);
  5512. UNUSED(TimerIdx);
  5513. /* NOTE : This function should not be modified, when the callback is needed,
  5514. the HAL_HRTIM_Master_Compare4EventCallback could be implenetd in the user file
  5515. */
  5516. }
  5517. /**
  5518. * @brief Callback function invoked when the timer x capture 1 event occurs
  5519. * @param hhrtim pointer to HAL HRTIM handle
  5520. * @param TimerIdx Timer index
  5521. * This parameter can be one of the following values:
  5522. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5523. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5524. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5525. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5526. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5527. * @retval None
  5528. */
  5529. __weak void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5530. uint32_t TimerIdx)
  5531. {
  5532. /* Prevent unused argument(s) compilation warning */
  5533. UNUSED(hhrtim);
  5534. UNUSED(TimerIdx);
  5535. /* NOTE : This function should not be modified, when the callback is needed,
  5536. the HAL_HRTIM_Timer_Capture1EventCallback could be implenetd in the user file
  5537. */
  5538. }
  5539. /**
  5540. * @brief Callback function invoked when the timer x capture 2 event occurs
  5541. * @param hhrtim pointer to HAL HRTIM handle
  5542. * @param TimerIdx Timer index
  5543. * This parameter can be one of the following values:
  5544. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5545. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5546. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5547. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5548. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5549. * @retval None
  5550. */
  5551. __weak void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5552. uint32_t TimerIdx)
  5553. {
  5554. /* Prevent unused argument(s) compilation warning */
  5555. UNUSED(hhrtim);
  5556. UNUSED(TimerIdx);
  5557. /* NOTE : This function should not be modified, when the callback is needed,
  5558. the HAL_HRTIM_Timer_Capture2EventCallback could be implenetd in the user file
  5559. */
  5560. }
  5561. /**
  5562. * @brief Callback function invoked when the delayed idle or balanced idle mode is
  5563. * entered.
  5564. * @param hhrtim pointer to HAL HRTIM handle
  5565. * @param TimerIdx Timer index
  5566. * This parameter can be one of the following values:
  5567. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5568. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5569. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5570. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5571. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5572. * @retval None
  5573. */
  5574. __weak void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef * hhrtim,
  5575. uint32_t TimerIdx)
  5576. {
  5577. /* Prevent unused argument(s) compilation warning */
  5578. UNUSED(hhrtim);
  5579. UNUSED(TimerIdx);
  5580. /* NOTE : This function should not be modified, when the callback is needed,
  5581. the HAL_HRTIM_Timer_DelayedProtectionCallback could be implenetd in the user file
  5582. */
  5583. }
  5584. /**
  5585. * @brief Callback function invoked when the timer x counter reset/roll-over
  5586. * event occurs.
  5587. * @param hhrtim pointer to HAL HRTIM handle
  5588. * @param TimerIdx Timer index
  5589. * This parameter can be one of the following values:
  5590. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5591. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5592. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5593. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5594. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5595. * @retval None
  5596. */
  5597. __weak void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef * hhrtim,
  5598. uint32_t TimerIdx)
  5599. {
  5600. /* Prevent unused argument(s) compilation warning */
  5601. UNUSED(hhrtim);
  5602. UNUSED(TimerIdx);
  5603. /* NOTE : This function should not be modified, when the callback is needed,
  5604. the HAL_HRTIM_Timer_CounterResetCallback could be implenetd in the user file
  5605. */
  5606. }
  5607. /**
  5608. * @brief Callback function invoked when the timer x output 1 is set
  5609. * @param hhrtim pointer to HAL HRTIM handle
  5610. * @param TimerIdx Timer index
  5611. * This parameter can be one of the following values:
  5612. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5613. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5614. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5615. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5616. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5617. * @retval None
  5618. */
  5619. __weak void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef * hhrtim,
  5620. uint32_t TimerIdx)
  5621. {
  5622. /* Prevent unused argument(s) compilation warning */
  5623. UNUSED(hhrtim);
  5624. UNUSED(TimerIdx);
  5625. /* NOTE : This function should not be modified, when the callback is needed,
  5626. the HAL_HRTIM_Timer_Output1SetCallback could be implenetd in the user file
  5627. */
  5628. }
  5629. /**
  5630. * @brief Callback function invoked when the timer x output 1 is reset
  5631. * @param hhrtim pointer to HAL HRTIM handle
  5632. * @param TimerIdx Timer index
  5633. * This parameter can be one of the following values:
  5634. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5635. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5636. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5637. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5638. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5639. * @retval None
  5640. */
  5641. __weak void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef * hhrtim,
  5642. uint32_t TimerIdx)
  5643. {
  5644. /* Prevent unused argument(s) compilation warning */
  5645. UNUSED(hhrtim);
  5646. UNUSED(TimerIdx);
  5647. /* NOTE : This function should not be modified, when the callback is needed,
  5648. the HAL_HRTIM_Timer_Output1ResetCallback could be implenetd in the user file
  5649. */
  5650. }
  5651. /**
  5652. * @brief Callback function invoked when the timer x output 2 is set
  5653. * @param hhrtim pointer to HAL HRTIM handle
  5654. * @param TimerIdx Timer index
  5655. * This parameter can be one of the following values:
  5656. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5657. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5658. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5659. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5660. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5661. * @retval None
  5662. */
  5663. __weak void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef * hhrtim,
  5664. uint32_t TimerIdx)
  5665. {
  5666. /* Prevent unused argument(s) compilation warning */
  5667. UNUSED(hhrtim);
  5668. UNUSED(TimerIdx);
  5669. /* NOTE : This function should not be modified, when the callback is needed,
  5670. the HAL_HRTIM_Timer_Output2SetCallback could be implenetd in the user file
  5671. */
  5672. }
  5673. /**
  5674. * @brief Callback function invoked when the timer x output 2 is reset
  5675. * @param hhrtim pointer to HAL HRTIM handle
  5676. * @param TimerIdx Timer index
  5677. * This parameter can be one of the following values:
  5678. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5679. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5680. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5681. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5682. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5683. * @retval None
  5684. */
  5685. __weak void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef * hhrtim,
  5686. uint32_t TimerIdx)
  5687. {
  5688. /* Prevent unused argument(s) compilation warning */
  5689. UNUSED(hhrtim);
  5690. UNUSED(TimerIdx);
  5691. /* NOTE : This function should not be modified, when the callback is needed,
  5692. the HAL_HRTIM_Timer_Output2ResetCallback could be implenetd in the user file
  5693. */
  5694. }
  5695. /**
  5696. * @brief Callback function invoked when a DMA burst transfer is completed
  5697. * @param hhrtim pointer to HAL HRTIM handle
  5698. * @param TimerIdx Timer index
  5699. * This parameter can be one of the following values:
  5700. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5701. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5702. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5703. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5704. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5705. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5706. * @retval None
  5707. */
  5708. __weak void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef * hhrtim,
  5709. uint32_t TimerIdx)
  5710. {
  5711. /* Prevent unused argument(s) compilation warning */
  5712. UNUSED(hhrtim);
  5713. UNUSED(TimerIdx);
  5714. /* NOTE : This function should not be modified, when the callback is needed,
  5715. the HAL_HRTIM_BurstDMATransferCallback could be implenetd in the user file
  5716. */
  5717. }
  5718. /**
  5719. * @brief Callback function invoked when a DMA error occurs
  5720. * @param hhrtim pointer to HAL HRTIM handle
  5721. * @retval None
  5722. */
  5723. __weak void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim)
  5724. {
  5725. /* Prevent unused argument(s) compilation warning */
  5726. UNUSED(hhrtim);
  5727. /* NOTE : This function should not be modified, when the callback is needed,
  5728. the HAL_HRTIM_ErrorCallback could be implenetd in the user file
  5729. */
  5730. }
  5731. /**
  5732. * @}
  5733. */
  5734. /**
  5735. * @}
  5736. */
  5737. /** @addtogroup HRTIM_Private_Functions HRTIM Private Functions
  5738. * @{
  5739. */
  5740. /**
  5741. * @brief Configures the master timer time base
  5742. * @param hhrtim pointer to HAL HRTIM handle
  5743. * @param pTimeBaseCfg pointer to the time base configuration structure
  5744. * @retval None
  5745. */
  5746. static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
  5747. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  5748. {
  5749. uint32_t hrtim_mcr;
  5750. /* Configure master timer */
  5751. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  5752. /* Set the prescaler ratio */
  5753. hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CK_PSC);
  5754. hrtim_mcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio;
  5755. /* Set the operating mode */
  5756. hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CONT | HRTIM_MCR_RETRIG);
  5757. hrtim_mcr |= (uint32_t)pTimeBaseCfg->Mode;
  5758. /* Update the HRTIM registers */
  5759. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  5760. hhrtim->Instance->sMasterRegs.MPER = pTimeBaseCfg->Period;
  5761. hhrtim->Instance->sMasterRegs.MREP = pTimeBaseCfg->RepetitionCounter;
  5762. }
  5763. /**
  5764. * @brief Configures timing unit (timer A to timer E) time base
  5765. * @param hhrtim pointer to HAL HRTIM handle
  5766. * @param TimerIdx Timer index
  5767. * @param pTimeBaseCfg pointer to the time base configuration structure
  5768. * @retval None
  5769. */
  5770. static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
  5771. uint32_t TimerIdx ,
  5772. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  5773. {
  5774. uint32_t hrtim_timcr;
  5775. /* Configure master timing unit */
  5776. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  5777. /* Set the prescaler ratio */
  5778. hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CK_PSC);
  5779. hrtim_timcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio;
  5780. /* Set the operating mode */
  5781. hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CONT | HRTIM_TIMCR_RETRIG);
  5782. hrtim_timcr |= (uint32_t)pTimeBaseCfg->Mode;
  5783. /* Update the HRTIM registers */
  5784. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  5785. hhrtim->Instance->sTimerxRegs[TimerIdx].PERxR = pTimeBaseCfg->Period;
  5786. hhrtim->Instance->sTimerxRegs[TimerIdx].REPxR = pTimeBaseCfg->RepetitionCounter;
  5787. }
  5788. /**
  5789. * @brief Configures the master timer in waveform mode
  5790. * @param hhrtim pointer to HAL HRTIM handle
  5791. * @param pTimerCfg pointer to the timer configuration data structure
  5792. * @retval None
  5793. */
  5794. static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  5795. HRTIM_TimerCfgTypeDef * pTimerCfg)
  5796. {
  5797. uint32_t hrtim_mcr;
  5798. uint32_t hrtim_bmcr;
  5799. /* Configure master timer */
  5800. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  5801. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  5802. /* Enable/Disable the half mode */
  5803. hrtim_mcr &= ~(HRTIM_MCR_HALF);
  5804. hrtim_mcr |= pTimerCfg->HalfModeEnable;
  5805. /* Enable/Disable the timer start upon synchronization event reception */
  5806. hrtim_mcr &= ~(HRTIM_MCR_SYNCSTRTM);
  5807. hrtim_mcr |= pTimerCfg->StartOnSync;
  5808. /* Enable/Disable the timer reset upon synchronization event reception */
  5809. hrtim_mcr &= ~(HRTIM_MCR_SYNCRSTM);
  5810. hrtim_mcr |= pTimerCfg->ResetOnSync;
  5811. /* Enable/Disable the DAC synchronization event generation */
  5812. hrtim_mcr &= ~(HRTIM_MCR_DACSYNC);
  5813. hrtim_mcr |= pTimerCfg->DACSynchro;
  5814. /* Enable/Disable preload meachanism for timer registers */
  5815. hrtim_mcr &= ~(HRTIM_MCR_PREEN);
  5816. hrtim_mcr |= pTimerCfg->PreloadEnable;
  5817. /* Master timer registers update handling */
  5818. hrtim_mcr &= ~(HRTIM_MCR_BRSTDMA);
  5819. hrtim_mcr |= (pTimerCfg->UpdateGating << 2U);
  5820. /* Enable/Disable registers update on repetition */
  5821. hrtim_mcr &= ~(HRTIM_MCR_MREPU);
  5822. hrtim_mcr |= pTimerCfg->RepetitionUpdate;
  5823. /* Set the timer burst mode */
  5824. hrtim_bmcr &= ~(HRTIM_BMCR_MTBM);
  5825. hrtim_bmcr |= pTimerCfg->BurstMode;
  5826. /* Update the HRTIM registers */
  5827. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  5828. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  5829. }
  5830. /**
  5831. * @brief Configures timing unit (timer A to timer E) in waveform mode
  5832. * @param hhrtim pointer to HAL HRTIM handle
  5833. * @param TimerIdx Timer index
  5834. * @param pTimerCfg pointer to the timer configuration data structure
  5835. * @retval None
  5836. */
  5837. static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  5838. uint32_t TimerIdx,
  5839. HRTIM_TimerCfgTypeDef * pTimerCfg)
  5840. {
  5841. uint32_t hrtim_timcr;
  5842. uint32_t hrtim_timfltr;
  5843. uint32_t hrtim_timoutr;
  5844. uint32_t hrtim_timrstr;
  5845. uint32_t hrtim_bmcr;
  5846. /* UPDGAT bitfield must be reset before programming a new value */
  5847. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~(HRTIM_TIMCR_UPDGAT);
  5848. /* Configure timing unit (Timer A to Timer E) */
  5849. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  5850. hrtim_timfltr = hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR;
  5851. hrtim_timoutr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
  5852. hrtim_timrstr = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR;
  5853. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  5854. /* Enable/Disable the half mode */
  5855. hrtim_timcr &= ~(HRTIM_TIMCR_HALF);
  5856. hrtim_timcr |= pTimerCfg->HalfModeEnable;
  5857. /* Enable/Disable the timer start upon synchronization event reception */
  5858. hrtim_timcr &= ~(HRTIM_TIMCR_SYNCSTRT);
  5859. hrtim_timcr |= pTimerCfg->StartOnSync;
  5860. /* Enable/Disable the timer reset upon synchronization event reception */
  5861. hrtim_timcr &= ~(HRTIM_TIMCR_SYNCRST);
  5862. hrtim_timcr |= pTimerCfg->ResetOnSync;
  5863. /* Enable/Disable the DAC synchronization event generation */
  5864. hrtim_timcr &= ~(HRTIM_TIMCR_DACSYNC);
  5865. hrtim_timcr |= pTimerCfg->DACSynchro;
  5866. /* Enable/Disable preload meachanism for timer registers */
  5867. hrtim_timcr &= ~(HRTIM_TIMCR_PREEN);
  5868. hrtim_timcr |= pTimerCfg->PreloadEnable;
  5869. /* Timing unit registers update handling */
  5870. hrtim_timcr &= ~(HRTIM_TIMCR_UPDGAT);
  5871. hrtim_timcr |= pTimerCfg->UpdateGating;
  5872. /* Enable/Disable registers update on repetition */
  5873. hrtim_timcr &= ~(HRTIM_TIMCR_TREPU);
  5874. if (pTimerCfg->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED)
  5875. {
  5876. hrtim_timcr |= HRTIM_TIMCR_TREPU;
  5877. }
  5878. /* Set the push-pull mode */
  5879. hrtim_timcr &= ~(HRTIM_TIMCR_PSHPLL);
  5880. hrtim_timcr |= pTimerCfg->PushPull;
  5881. /* Enable/Disable registers update on timer counter reset */
  5882. hrtim_timcr &= ~(HRTIM_TIMCR_TRSTU);
  5883. hrtim_timcr |= pTimerCfg->ResetUpdate;
  5884. /* Set the timer update trigger */
  5885. hrtim_timcr &= ~(HRTIM_TIMCR_TIMUPDATETRIGGER);
  5886. hrtim_timcr |= pTimerCfg->UpdateTrigger;
  5887. /* Enable/Disable the fault channel at timer level */
  5888. hrtim_timfltr &= ~(HRTIM_FLTR_FLTxEN);
  5889. hrtim_timfltr |= (pTimerCfg->FaultEnable & HRTIM_FLTR_FLTxEN);
  5890. /* Lock/Unlock fault sources at timer level */
  5891. hrtim_timfltr &= ~(HRTIM_FLTR_FLTLCK);
  5892. hrtim_timfltr |= pTimerCfg->FaultLock;
  5893. /* The deadtime cannot be used simultaneously with the push-pull mode */
  5894. if (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_DISABLED)
  5895. {
  5896. /* Enable/Disable dead time insertion at timer level */
  5897. hrtim_timoutr &= ~(HRTIM_OUTR_DTEN);
  5898. hrtim_timoutr |= pTimerCfg->DeadTimeInsertion;
  5899. }
  5900. /* Enable/Disable delayed protection at timer level
  5901. Delayed Idle is available whatever the timer operating mode (regular, push-pull)
  5902. Balanced Idle is only available in push-pull mode
  5903. */
  5904. if ( ((pTimerCfg->DelayedProtectionMode != HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6)
  5905. && (pTimerCfg->DelayedProtectionMode != HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7))
  5906. || (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_ENABLED))
  5907. {
  5908. hrtim_timoutr &= ~(HRTIM_OUTR_DLYPRT| HRTIM_OUTR_DLYPRTEN);
  5909. hrtim_timoutr |= pTimerCfg->DelayedProtectionMode;
  5910. }
  5911. /* Set the timer counter reset trigger */
  5912. hrtim_timrstr = pTimerCfg->ResetTrigger;
  5913. /* Set the timer burst mode */
  5914. switch (TimerIdx)
  5915. {
  5916. case HRTIM_TIMERINDEX_TIMER_A:
  5917. {
  5918. hrtim_bmcr &= ~(HRTIM_BMCR_TABM);
  5919. hrtim_bmcr |= ( pTimerCfg->BurstMode << 1U);
  5920. }
  5921. break;
  5922. case HRTIM_TIMERINDEX_TIMER_B:
  5923. {
  5924. hrtim_bmcr &= ~(HRTIM_BMCR_TBBM);
  5925. hrtim_bmcr |= ( pTimerCfg->BurstMode << 2U);
  5926. }
  5927. break;
  5928. case HRTIM_TIMERINDEX_TIMER_C:
  5929. {
  5930. hrtim_bmcr &= ~(HRTIM_BMCR_TCBM);
  5931. hrtim_bmcr |= ( pTimerCfg->BurstMode << 3U);
  5932. }
  5933. break;
  5934. case HRTIM_TIMERINDEX_TIMER_D:
  5935. {
  5936. hrtim_bmcr &= ~(HRTIM_BMCR_TDBM);
  5937. hrtim_bmcr |= ( pTimerCfg->BurstMode << 4U);
  5938. }
  5939. break;
  5940. case HRTIM_TIMERINDEX_TIMER_E:
  5941. {
  5942. hrtim_bmcr &= ~(HRTIM_BMCR_TEBM);
  5943. hrtim_bmcr |= ( pTimerCfg->BurstMode << 5U);
  5944. }
  5945. break;
  5946. default:
  5947. break;
  5948. }
  5949. /* Update the HRTIM registers */
  5950. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  5951. hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR = hrtim_timfltr;
  5952. hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_timoutr;
  5953. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = hrtim_timrstr;
  5954. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  5955. }
  5956. /**
  5957. * @brief Configures a compare unit
  5958. * @param hhrtim pointer to HAL HRTIM handle
  5959. * @param TimerIdx Timer index
  5960. * @param CompareUnit Compare unit identifier
  5961. * @param pCompareCfg pointer to the compare unit configuration data structure
  5962. * @retval None
  5963. */
  5964. static void HRTIM_CompareUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  5965. uint32_t TimerIdx,
  5966. uint32_t CompareUnit,
  5967. HRTIM_CompareCfgTypeDef * pCompareCfg)
  5968. {
  5969. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  5970. {
  5971. /* Configure the compare unit of the master timer */
  5972. switch (CompareUnit)
  5973. {
  5974. case HRTIM_COMPAREUNIT_1:
  5975. {
  5976. hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue;
  5977. }
  5978. break;
  5979. case HRTIM_COMPAREUNIT_2:
  5980. {
  5981. hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue;
  5982. }
  5983. break;
  5984. case HRTIM_COMPAREUNIT_3:
  5985. {
  5986. hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue;
  5987. }
  5988. break;
  5989. case HRTIM_COMPAREUNIT_4:
  5990. {
  5991. hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue;
  5992. }
  5993. break;
  5994. default:
  5995. break;
  5996. }
  5997. }
  5998. else
  5999. {
  6000. /* Configure the compare unit of the timing unit */
  6001. switch (CompareUnit)
  6002. {
  6003. case HRTIM_COMPAREUNIT_1:
  6004. {
  6005. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
  6006. }
  6007. break;
  6008. case HRTIM_COMPAREUNIT_2:
  6009. {
  6010. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
  6011. }
  6012. break;
  6013. case HRTIM_COMPAREUNIT_3:
  6014. {
  6015. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
  6016. }
  6017. break;
  6018. case HRTIM_COMPAREUNIT_4:
  6019. {
  6020. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
  6021. }
  6022. break;
  6023. default:
  6024. break;
  6025. }
  6026. }
  6027. }
  6028. /**
  6029. * @brief Configures a capture unit
  6030. * @param hhrtim pointer to HAL HRTIM handle
  6031. * @param TimerIdx Timer index
  6032. * @param CaptureUnit Capture unit identifier
  6033. * @param Event Event reference
  6034. * @retval None
  6035. */
  6036. static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  6037. uint32_t TimerIdx,
  6038. uint32_t CaptureUnit,
  6039. uint32_t Event)
  6040. {
  6041. uint32_t CaptureTrigger = 0xFFFFFFFFU;
  6042. switch (Event)
  6043. {
  6044. case HRTIM_EVENT_1:
  6045. {
  6046. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1;
  6047. }
  6048. break;
  6049. case HRTIM_EVENT_2:
  6050. {
  6051. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_2;
  6052. }
  6053. break;
  6054. case HRTIM_EVENT_3:
  6055. {
  6056. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_3;
  6057. }
  6058. break;
  6059. case HRTIM_EVENT_4:
  6060. {
  6061. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_4;
  6062. }
  6063. break;
  6064. case HRTIM_EVENT_5:
  6065. {
  6066. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_5;
  6067. }
  6068. break;
  6069. case HRTIM_EVENT_6:
  6070. {
  6071. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_6;
  6072. }
  6073. break;
  6074. case HRTIM_EVENT_7:
  6075. {
  6076. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_7;
  6077. }
  6078. break;
  6079. case HRTIM_EVENT_8:
  6080. {
  6081. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_8;
  6082. }
  6083. break;
  6084. case HRTIM_EVENT_9:
  6085. {
  6086. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_9;
  6087. }
  6088. break;
  6089. case HRTIM_EVENT_10:
  6090. {
  6091. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_10;
  6092. }
  6093. break;
  6094. default:
  6095. break;
  6096. }
  6097. switch (CaptureUnit)
  6098. {
  6099. case HRTIM_CAPTUREUNIT_1:
  6100. {
  6101. hhrtim->TimerParam[TimerIdx].CaptureTrigger1 = CaptureTrigger;
  6102. }
  6103. break;
  6104. case HRTIM_CAPTUREUNIT_2:
  6105. {
  6106. hhrtim->TimerParam[TimerIdx].CaptureTrigger2 = CaptureTrigger;
  6107. }
  6108. break;
  6109. default:
  6110. break;
  6111. }
  6112. }
  6113. /**
  6114. * @brief Configures the output of a timing unit
  6115. * @param hhrtim pointer to HAL HRTIM handle
  6116. * @param TimerIdx Timer index
  6117. * @param Output timing unit output identifier
  6118. * @param pOutputCfg pointer to the output configuration data structure
  6119. * @retval None
  6120. */
  6121. static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
  6122. uint32_t TimerIdx,
  6123. uint32_t Output,
  6124. HRTIM_OutputCfgTypeDef * pOutputCfg)
  6125. {
  6126. uint32_t hrtim_outr;
  6127. uint32_t hrtim_dtr;
  6128. uint32_t shift = 0xFFFFFFFFU;
  6129. hrtim_outr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
  6130. hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR;
  6131. switch (Output)
  6132. {
  6133. case HRTIM_OUTPUT_TA1:
  6134. case HRTIM_OUTPUT_TB1:
  6135. case HRTIM_OUTPUT_TC1:
  6136. case HRTIM_OUTPUT_TD1:
  6137. case HRTIM_OUTPUT_TE1:
  6138. {
  6139. /* Set the output set/reset crossbar */
  6140. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R = pOutputCfg->SetSource;
  6141. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R = pOutputCfg->ResetSource;
  6142. shift = 0U;
  6143. }
  6144. break;
  6145. case HRTIM_OUTPUT_TA2:
  6146. case HRTIM_OUTPUT_TB2:
  6147. case HRTIM_OUTPUT_TC2:
  6148. case HRTIM_OUTPUT_TD2:
  6149. case HRTIM_OUTPUT_TE2:
  6150. {
  6151. /* Set the output set/reset crossbar */
  6152. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R = pOutputCfg->SetSource;
  6153. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R = pOutputCfg->ResetSource;
  6154. shift = 16U;
  6155. }
  6156. break;
  6157. default:
  6158. break;
  6159. }
  6160. /* Clear output config */
  6161. hrtim_outr &= ~((HRTIM_OUTR_POL1 |
  6162. HRTIM_OUTR_IDLM1 |
  6163. HRTIM_OUTR_IDLES1|
  6164. HRTIM_OUTR_FAULT1|
  6165. HRTIM_OUTR_CHP1 |
  6166. HRTIM_OUTR_DIDL1) << shift);
  6167. /* Set the polarity */
  6168. hrtim_outr |= (pOutputCfg->Polarity << shift);
  6169. /* Set the IDLE mode */
  6170. hrtim_outr |= (pOutputCfg->IdleMode << shift);
  6171. /* Set the IDLE state */
  6172. hrtim_outr |= (pOutputCfg->IdleLevel << shift);
  6173. /* Set the FAULT state */
  6174. hrtim_outr |= (pOutputCfg->FaultLevel << shift);
  6175. /* Set the chopper mode */
  6176. hrtim_outr |= (pOutputCfg->ChopperModeEnable << shift);
  6177. /* Set the burst mode entry mode : deadtime insertion when entering the idle
  6178. state during a burst mode operation is allowed only under the following
  6179. conditions:
  6180. - the outputs is active during the burst mode (IDLES=1U)
  6181. - positive deadtimes (SDTR/SDTF set to 0U)
  6182. */
  6183. if ((pOutputCfg->IdleLevel == HRTIM_OUTPUTIDLELEVEL_ACTIVE) &&
  6184. ((hrtim_dtr & HRTIM_DTR_SDTR) == RESET) &&
  6185. ((hrtim_dtr & HRTIM_DTR_SDTF) == RESET))
  6186. {
  6187. hrtim_outr |= (pOutputCfg->BurstModeEntryDelayed << shift);
  6188. }
  6189. /* Update HRTIM register */
  6190. hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_outr;
  6191. }
  6192. /**
  6193. * @brief Configures an external event channel
  6194. * @param hhrtim pointer to HAL HRTIM handle
  6195. * @param Event Event channel identifier
  6196. * @param pEventCfg pointer to the event channel configuration data structure
  6197. * @retval None
  6198. */
  6199. static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  6200. uint32_t Event,
  6201. HRTIM_EventCfgTypeDef *pEventCfg)
  6202. {
  6203. uint32_t hrtim_eecr1;
  6204. uint32_t hrtim_eecr2;
  6205. uint32_t hrtim_eecr3;
  6206. /* Configure external event channel */
  6207. hrtim_eecr1 = hhrtim->Instance->sCommonRegs.EECR1;
  6208. hrtim_eecr2 = hhrtim->Instance->sCommonRegs.EECR2;
  6209. hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;
  6210. switch (Event)
  6211. {
  6212. case HRTIM_EVENT_1:
  6213. {
  6214. hrtim_eecr1 &= ~(HRTIM_EECR1_EE1SRC | HRTIM_EECR1_EE1POL | HRTIM_EECR1_EE1SNS | HRTIM_EECR1_EE1FAST);
  6215. hrtim_eecr1 |= pEventCfg->Source;
  6216. hrtim_eecr1 |= (pEventCfg->Polarity & HRTIM_EECR1_EE1POL);
  6217. hrtim_eecr1 |= pEventCfg->Sensitivity;
  6218. /* Update the HRTIM registers (all bitfields but EE1FAST bit) */
  6219. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6220. /* Update the HRTIM registers (EE1FAST bit) */
  6221. hrtim_eecr1 |= pEventCfg->FastMode;
  6222. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6223. }
  6224. break;
  6225. case HRTIM_EVENT_2:
  6226. {
  6227. hrtim_eecr1 &= ~(HRTIM_EECR1_EE2SRC | HRTIM_EECR1_EE2POL | HRTIM_EECR1_EE2SNS | HRTIM_EECR1_EE2FAST);
  6228. hrtim_eecr1 |= (pEventCfg->Source << 6U);
  6229. hrtim_eecr1 |= ((pEventCfg->Polarity << 6U) & (HRTIM_EECR1_EE2POL));
  6230. hrtim_eecr1 |= (pEventCfg->Sensitivity << 6U);
  6231. /* Update the HRTIM registers (all bitfields but EE2FAST bit) */
  6232. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6233. /* Update the HRTIM registers (EE2FAST bit) */
  6234. hrtim_eecr1 |= (pEventCfg->FastMode << 6U);
  6235. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6236. }
  6237. break;
  6238. case HRTIM_EVENT_3:
  6239. {
  6240. hrtim_eecr1 &= ~(HRTIM_EECR1_EE3SRC | HRTIM_EECR1_EE3POL | HRTIM_EECR1_EE3SNS | HRTIM_EECR1_EE3FAST);
  6241. hrtim_eecr1 |= (pEventCfg->Source << 12U);
  6242. hrtim_eecr1 |= ((pEventCfg->Polarity << 12U) & (HRTIM_EECR1_EE3POL));
  6243. hrtim_eecr1 |= (pEventCfg->Sensitivity << 12U);
  6244. /* Update the HRTIM registers (all bitfields but EE3FAST bit) */
  6245. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6246. /* Update the HRTIM registers (EE3FAST bit) */
  6247. hrtim_eecr1 |= (pEventCfg->FastMode << 12U);
  6248. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6249. }
  6250. break;
  6251. case HRTIM_EVENT_4:
  6252. {
  6253. hrtim_eecr1 &= ~(HRTIM_EECR1_EE4SRC | HRTIM_EECR1_EE4POL | HRTIM_EECR1_EE4SNS | HRTIM_EECR1_EE4FAST);
  6254. hrtim_eecr1 |= (pEventCfg->Source << 18U);
  6255. hrtim_eecr1 |= ((pEventCfg->Polarity << 18U) & (HRTIM_EECR1_EE4POL));
  6256. hrtim_eecr1 |= (pEventCfg->Sensitivity << 18U);
  6257. /* Update the HRTIM registers (all bitfields but EE4FAST bit) */
  6258. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6259. /* Update the HRTIM registers (EE4FAST bit) */
  6260. hrtim_eecr1 |= (pEventCfg->FastMode << 18U);
  6261. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6262. }
  6263. break;
  6264. case HRTIM_EVENT_5:
  6265. {
  6266. hrtim_eecr1 &= ~(HRTIM_EECR1_EE5SRC | HRTIM_EECR1_EE5POL | HRTIM_EECR1_EE5SNS | HRTIM_EECR1_EE5FAST);
  6267. hrtim_eecr1 |= (pEventCfg->Source << 24U);
  6268. hrtim_eecr1 |= ((pEventCfg->Polarity << 24U) & (HRTIM_EECR1_EE5POL));
  6269. hrtim_eecr1 |= (pEventCfg->Sensitivity << 24U);
  6270. /* Update the HRTIM registers (all bitfields but EE5FAST bit) */
  6271. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6272. /* Update the HRTIM registers (EE5FAST bit) */
  6273. hrtim_eecr1 |= (pEventCfg->FastMode << 24U);
  6274. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6275. }
  6276. break;
  6277. case HRTIM_EVENT_6:
  6278. {
  6279. hrtim_eecr2 &= ~(HRTIM_EECR2_EE6SRC | HRTIM_EECR2_EE6POL | HRTIM_EECR2_EE6SNS);
  6280. hrtim_eecr2 |= pEventCfg->Source;
  6281. hrtim_eecr2 |= (pEventCfg->Polarity & HRTIM_EECR2_EE6POL);
  6282. hrtim_eecr2 |= pEventCfg->Sensitivity;
  6283. hrtim_eecr3 &= ~(HRTIM_EECR3_EE6F);
  6284. hrtim_eecr3 |= pEventCfg->Filter;
  6285. /* Update the HRTIM registers */
  6286. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6287. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6288. }
  6289. break;
  6290. case HRTIM_EVENT_7:
  6291. {
  6292. hrtim_eecr2 &= ~(HRTIM_EECR2_EE7SRC | HRTIM_EECR2_EE7POL | HRTIM_EECR2_EE7SNS);
  6293. hrtim_eecr2 |= (pEventCfg->Source << 6U);
  6294. hrtim_eecr2 |= ((pEventCfg->Polarity << 6U) & (HRTIM_EECR2_EE7POL));
  6295. hrtim_eecr2 |= (pEventCfg->Sensitivity << 6U);
  6296. hrtim_eecr3 &= ~(HRTIM_EECR3_EE7F);
  6297. hrtim_eecr3 |= (pEventCfg->Filter << 6U);
  6298. /* Update the HRTIM registers */
  6299. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6300. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6301. }
  6302. break;
  6303. case HRTIM_EVENT_8:
  6304. {
  6305. hrtim_eecr2 &= ~(HRTIM_EECR2_EE8SRC | HRTIM_EECR2_EE8POL | HRTIM_EECR2_EE8SNS);
  6306. hrtim_eecr2 |= (pEventCfg->Source << 12U);
  6307. hrtim_eecr2 |= ((pEventCfg->Polarity << 12U) & (HRTIM_EECR2_EE8POL));
  6308. hrtim_eecr2 |= (pEventCfg->Sensitivity << 12U);
  6309. hrtim_eecr3 &= ~(HRTIM_EECR3_EE8F);
  6310. hrtim_eecr3 |= (pEventCfg->Filter << 12U);
  6311. /* Update the HRTIM registers */
  6312. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6313. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6314. }
  6315. break;
  6316. case HRTIM_EVENT_9:
  6317. {
  6318. hrtim_eecr2 &= ~(HRTIM_EECR2_EE9SRC | HRTIM_EECR2_EE9POL | HRTIM_EECR2_EE9SNS);
  6319. hrtim_eecr2 |= (pEventCfg->Source << 18U);
  6320. hrtim_eecr2 |= ((pEventCfg->Polarity << 18U) & (HRTIM_EECR2_EE9POL));
  6321. hrtim_eecr2 |= (pEventCfg->Sensitivity << 18U);
  6322. hrtim_eecr3 &= ~(HRTIM_EECR3_EE9F);
  6323. hrtim_eecr3 |= (pEventCfg->Filter << 18U);
  6324. /* Update the HRTIM registers */
  6325. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6326. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6327. }
  6328. break;
  6329. case HRTIM_EVENT_10:
  6330. {
  6331. hrtim_eecr2 &= ~(HRTIM_EECR2_EE10SRC | HRTIM_EECR2_EE10POL | HRTIM_EECR2_EE10SNS);
  6332. hrtim_eecr2 |= (pEventCfg->Source << 24U);
  6333. hrtim_eecr2 |= ((pEventCfg->Polarity << 24U) & (HRTIM_EECR2_EE10POL));
  6334. hrtim_eecr2 |= (pEventCfg->Sensitivity << 24U);
  6335. hrtim_eecr3 &= ~(HRTIM_EECR3_EE10F);
  6336. hrtim_eecr3 |= (pEventCfg->Filter << 24U);
  6337. /* Update the HRTIM registers */
  6338. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6339. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6340. }
  6341. break;
  6342. default:
  6343. break;
  6344. }
  6345. }
  6346. /**
  6347. * @brief Configures the timer counter reset
  6348. * @param hhrtim pointer to HAL HRTIM handle
  6349. * @param TimerIdx Timer index
  6350. * @param Event Event channel identifier
  6351. * @retval None
  6352. */
  6353. static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
  6354. uint32_t TimerIdx,
  6355. uint32_t Event)
  6356. {
  6357. switch (Event)
  6358. {
  6359. case HRTIM_EVENT_1:
  6360. {
  6361. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_1;
  6362. }
  6363. break;
  6364. case HRTIM_EVENT_2:
  6365. {
  6366. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_2;
  6367. }
  6368. break;
  6369. case HRTIM_EVENT_3:
  6370. {
  6371. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_3;
  6372. }
  6373. break;
  6374. case HRTIM_EVENT_4:
  6375. {
  6376. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_4;
  6377. }
  6378. break;
  6379. case HRTIM_EVENT_5:
  6380. {
  6381. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_5;
  6382. }
  6383. break;
  6384. case HRTIM_EVENT_6:
  6385. {
  6386. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_6;
  6387. }
  6388. break;
  6389. case HRTIM_EVENT_7:
  6390. {
  6391. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_7;
  6392. }
  6393. break;
  6394. case HRTIM_EVENT_8:
  6395. {
  6396. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_8;
  6397. }
  6398. break;
  6399. case HRTIM_EVENT_9:
  6400. {
  6401. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_9;
  6402. }
  6403. break;
  6404. case HRTIM_EVENT_10:
  6405. {
  6406. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_10;
  6407. }
  6408. break;
  6409. default:
  6410. break;
  6411. }
  6412. }
  6413. /**
  6414. * @brief Returns the interrupt to enable or disable according to the
  6415. * OC mode.
  6416. * @param hhrtim pointer to HAL HRTIM handle
  6417. * @param TimerIdx Timer index
  6418. * @param OCChannel Timer output
  6419. * This parameter can be one of the following values:
  6420. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  6421. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  6422. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  6423. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  6424. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  6425. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  6426. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  6427. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  6428. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  6429. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  6430. * @retval Interrupt to enable or disable
  6431. */
  6432. static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim,
  6433. uint32_t TimerIdx,
  6434. uint32_t OCChannel)
  6435. {
  6436. uint32_t hrtim_set;
  6437. uint32_t hrtim_reset;
  6438. uint32_t interrupt = 0U;
  6439. switch (OCChannel)
  6440. {
  6441. case HRTIM_OUTPUT_TA1:
  6442. case HRTIM_OUTPUT_TB1:
  6443. case HRTIM_OUTPUT_TC1:
  6444. case HRTIM_OUTPUT_TD1:
  6445. case HRTIM_OUTPUT_TE1:
  6446. {
  6447. /* Retreives actual OC mode and set interrupt accordingly */
  6448. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
  6449. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
  6450. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  6451. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
  6452. {
  6453. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  6454. interrupt = HRTIM_TIM_IT_CMP1;
  6455. }
  6456. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  6457. (hrtim_reset == 0U))
  6458. {
  6459. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  6460. interrupt = HRTIM_TIM_IT_SET1;
  6461. }
  6462. else if ((hrtim_set == 0U) &&
  6463. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
  6464. {
  6465. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  6466. interrupt = HRTIM_TIM_IT_RST1;
  6467. }
  6468. }
  6469. break;
  6470. case HRTIM_OUTPUT_TA2:
  6471. case HRTIM_OUTPUT_TB2:
  6472. case HRTIM_OUTPUT_TC2:
  6473. case HRTIM_OUTPUT_TD2:
  6474. case HRTIM_OUTPUT_TE2:
  6475. {
  6476. /* Retreives actual OC mode and set interrupt accordingly */
  6477. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
  6478. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
  6479. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  6480. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
  6481. {
  6482. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  6483. interrupt = HRTIM_TIM_IT_CMP2;
  6484. }
  6485. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  6486. (hrtim_reset == 0U))
  6487. {
  6488. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  6489. interrupt = HRTIM_TIM_IT_SET2;
  6490. }
  6491. else if ((hrtim_set == 0U) &&
  6492. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
  6493. {
  6494. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  6495. interrupt = HRTIM_TIM_IT_RST2;
  6496. }
  6497. }
  6498. break;
  6499. default:
  6500. break;
  6501. }
  6502. return interrupt;
  6503. }
  6504. /**
  6505. * @brief Returns the DMA request to enable or disable according to the
  6506. * OC mode.
  6507. * @param hhrtim pointer to HAL HRTIM handle
  6508. * @param TimerIdx Timer index
  6509. * @param OCChannel Timer output
  6510. * This parameter can be one of the following values:
  6511. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  6512. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  6513. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  6514. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  6515. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  6516. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  6517. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  6518. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  6519. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  6520. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  6521. * @retval DMA request to enable or disable
  6522. */
  6523. static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim,
  6524. uint32_t TimerIdx,
  6525. uint32_t OCChannel)
  6526. {
  6527. uint32_t hrtim_set;
  6528. uint32_t hrtim_reset;
  6529. uint32_t dma_request = 0U;
  6530. switch (OCChannel)
  6531. {
  6532. case HRTIM_OUTPUT_TA1:
  6533. case HRTIM_OUTPUT_TB1:
  6534. case HRTIM_OUTPUT_TC1:
  6535. case HRTIM_OUTPUT_TD1:
  6536. case HRTIM_OUTPUT_TE1:
  6537. {
  6538. /* Retreives actual OC mode and set dma_request accordingly */
  6539. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
  6540. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
  6541. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  6542. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
  6543. {
  6544. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  6545. dma_request = HRTIM_TIM_DMA_CMP1;
  6546. }
  6547. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  6548. (hrtim_reset == 0U))
  6549. {
  6550. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  6551. dma_request = HRTIM_TIM_DMA_SET1;
  6552. }
  6553. else if ((hrtim_set == 0U) &&
  6554. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
  6555. {
  6556. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  6557. dma_request = HRTIM_TIM_DMA_RST1;
  6558. }
  6559. }
  6560. break;
  6561. case HRTIM_OUTPUT_TA2:
  6562. case HRTIM_OUTPUT_TB2:
  6563. case HRTIM_OUTPUT_TC2:
  6564. case HRTIM_OUTPUT_TD2:
  6565. case HRTIM_OUTPUT_TE2:
  6566. {
  6567. /* Retreives actual OC mode and set dma_request accordingly */
  6568. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
  6569. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
  6570. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  6571. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
  6572. {
  6573. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  6574. dma_request = HRTIM_TIM_DMA_CMP2;
  6575. }
  6576. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  6577. (hrtim_reset == 0U))
  6578. {
  6579. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  6580. dma_request = HRTIM_TIM_DMA_SET2;
  6581. }
  6582. else if ((hrtim_set == 0U) &&
  6583. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
  6584. {
  6585. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  6586. dma_request = HRTIM_TIM_DMA_RST2;
  6587. }
  6588. }
  6589. break;
  6590. default:
  6591. break;
  6592. }
  6593. return dma_request;
  6594. }
  6595. static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim,
  6596. uint32_t TimerIdx)
  6597. {
  6598. DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)NULL;
  6599. switch (TimerIdx)
  6600. {
  6601. case HRTIM_TIMERINDEX_MASTER:
  6602. {
  6603. hdma = hhrtim->hdmaMaster;
  6604. }
  6605. break;
  6606. case HRTIM_TIMERINDEX_TIMER_A:
  6607. {
  6608. hdma = hhrtim->hdmaTimerA;
  6609. }
  6610. break;
  6611. case HRTIM_TIMERINDEX_TIMER_B:
  6612. {
  6613. hdma = hhrtim->hdmaTimerB;
  6614. }
  6615. break;
  6616. case HRTIM_TIMERINDEX_TIMER_C:
  6617. {
  6618. hdma = hhrtim->hdmaTimerC;
  6619. }
  6620. break;
  6621. case HRTIM_TIMERINDEX_TIMER_D:
  6622. {
  6623. hdma = hhrtim->hdmaTimerD;
  6624. }
  6625. break;
  6626. case HRTIM_TIMERINDEX_TIMER_E:
  6627. {
  6628. hdma = hhrtim->hdmaTimerE;
  6629. }
  6630. break;
  6631. default:
  6632. break;
  6633. }
  6634. return hdma;
  6635. }
  6636. static uint32_t GetTimerIdxFromDMAHandle(DMA_HandleTypeDef *hdma)
  6637. {
  6638. uint32_t timed_idx = 0xFFFFFFFFU;
  6639. if (hdma->Instance == DMA1_Channel2)
  6640. {
  6641. timed_idx = HRTIM_TIMERINDEX_MASTER;
  6642. }
  6643. else if (hdma->Instance == DMA1_Channel3)
  6644. {
  6645. timed_idx = HRTIM_TIMERINDEX_TIMER_A;
  6646. }
  6647. else if (hdma->Instance == DMA1_Channel4)
  6648. {
  6649. timed_idx = HRTIM_TIMERINDEX_TIMER_B;
  6650. }
  6651. else if (hdma->Instance == DMA1_Channel5)
  6652. {
  6653. timed_idx = HRTIM_TIMERINDEX_TIMER_C;
  6654. }
  6655. else if (hdma->Instance == DMA1_Channel6)
  6656. {
  6657. timed_idx = HRTIM_TIMERINDEX_TIMER_D;
  6658. }
  6659. else if (hdma->Instance == DMA1_Channel7)
  6660. {
  6661. timed_idx = HRTIM_TIMERINDEX_TIMER_E;
  6662. }
  6663. return timed_idx;
  6664. }
  6665. /**
  6666. * @brief Forces an immediate transfer from the preload to the active
  6667. * registers.
  6668. * @param hhrtim pointer to HAL HRTIM handle
  6669. * @param TimerIdx Timer index
  6670. * @retval None
  6671. */
  6672. static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
  6673. uint32_t TimerIdx)
  6674. {
  6675. switch (TimerIdx)
  6676. {
  6677. case HRTIM_TIMERINDEX_MASTER:
  6678. {
  6679. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_MSWU;
  6680. }
  6681. break;
  6682. case HRTIM_TIMERINDEX_TIMER_A:
  6683. {
  6684. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TASWU;
  6685. }
  6686. break;
  6687. case HRTIM_TIMERINDEX_TIMER_B:
  6688. {
  6689. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TBSWU;
  6690. }
  6691. break;
  6692. case HRTIM_TIMERINDEX_TIMER_C:
  6693. {
  6694. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TCSWU;
  6695. }
  6696. break;
  6697. case HRTIM_TIMERINDEX_TIMER_D:
  6698. {
  6699. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TDSWU;
  6700. }
  6701. break;
  6702. case HRTIM_TIMERINDEX_TIMER_E:
  6703. {
  6704. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TESWU;
  6705. }
  6706. break;
  6707. default:
  6708. break;
  6709. }
  6710. }
  6711. /**
  6712. * @brief HRTIM interrupts service routine
  6713. * @param hhrtim pointer to HAL HRTIM handle
  6714. * @retval None
  6715. */
  6716. static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim)
  6717. {
  6718. /* Fault 1 event */
  6719. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT1) != RESET)
  6720. {
  6721. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT1) != RESET)
  6722. {
  6723. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT1);
  6724. /* Invoke Fault 1 event callback */
  6725. HAL_HRTIM_Fault1Callback(hhrtim);
  6726. }
  6727. }
  6728. /* Fault 2 event */
  6729. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT2) != RESET)
  6730. {
  6731. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT2) != RESET)
  6732. {
  6733. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT2);
  6734. /* Invoke Fault 2 event callback */
  6735. HAL_HRTIM_Fault2Callback(hhrtim);
  6736. }
  6737. }
  6738. /* Fault 3 event */
  6739. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT3) != RESET)
  6740. {
  6741. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT3) != RESET)
  6742. {
  6743. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT3);
  6744. /* Invoke Fault 3 event callback */
  6745. HAL_HRTIM_Fault3Callback(hhrtim);
  6746. }
  6747. }
  6748. /* Fault 4 event */
  6749. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT4) != RESET)
  6750. {
  6751. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT4) != RESET)
  6752. {
  6753. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT4);
  6754. /* Invoke Fault 4 event callback */
  6755. HAL_HRTIM_Fault4Callback(hhrtim);
  6756. }
  6757. }
  6758. /* Fault 5 event */
  6759. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT5) != RESET)
  6760. {
  6761. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT5) != RESET)
  6762. {
  6763. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT5);
  6764. /* Invoke Fault 5 event callback */
  6765. HAL_HRTIM_Fault5Callback(hhrtim);
  6766. }
  6767. }
  6768. /* System fault event */
  6769. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_SYSFLT) != RESET)
  6770. {
  6771. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_SYSFLT) != RESET)
  6772. {
  6773. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_SYSFLT);
  6774. /* Invoke System fault event callback */
  6775. HAL_HRTIM_SystemFaultCallback(hhrtim);
  6776. }
  6777. }
  6778. }
  6779. /**
  6780. * @brief Master timer interrupts service routine
  6781. * @param hhrtim pointer to HAL HRTIM handle
  6782. * @retval None
  6783. */
  6784. static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim)
  6785. {
  6786. /* DLL calibration ready event */
  6787. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_DLLRDY) != RESET)
  6788. {
  6789. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_DLLRDY) != RESET)
  6790. {
  6791. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_DLLRDY);
  6792. /* Set HRTIM State */
  6793. hhrtim->State = HAL_HRTIM_STATE_READY;
  6794. /* Process unlocked */
  6795. __HAL_UNLOCK(hhrtim);
  6796. /* Invoke System fault event callback */
  6797. HAL_HRTIM_DLLCalbrationReadyCallback(hhrtim);
  6798. }
  6799. }
  6800. /* Burst mode period event */
  6801. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_BMPER) != RESET)
  6802. {
  6803. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_BMPER) != RESET)
  6804. {
  6805. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_BMPER);
  6806. /* Invoke Burst mode period event callback */
  6807. HAL_HRTIM_BurstModePeriodCallback(hhrtim);
  6808. }
  6809. }
  6810. /* Master timer compare 1 event */
  6811. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP1) != RESET)
  6812. {
  6813. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP1) != RESET)
  6814. {
  6815. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP1);
  6816. /* Invoke compare 1 event callback */
  6817. HAL_HRTIM_Compare1EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6818. }
  6819. }
  6820. /* Master timer compare 2 event */
  6821. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP2) != RESET)
  6822. {
  6823. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP2) != RESET)
  6824. {
  6825. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP2);
  6826. /* Invoke compare 2 event callback */
  6827. HAL_HRTIM_Compare2EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6828. }
  6829. }
  6830. /* Master timer compare 3 event */
  6831. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP3) != RESET)
  6832. {
  6833. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP3) != RESET)
  6834. {
  6835. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP3);
  6836. /* Invoke compare 3 event callback */
  6837. HAL_HRTIM_Compare3EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6838. }
  6839. }
  6840. /* Master timer compare 4 event */
  6841. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP4) != RESET)
  6842. {
  6843. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP4) != RESET)
  6844. {
  6845. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP4);
  6846. /* Invoke compare 4 event callback */
  6847. HAL_HRTIM_Compare4EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6848. }
  6849. }
  6850. /* Master timer repetition event */
  6851. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MREP) != RESET)
  6852. {
  6853. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MREP) != RESET)
  6854. {
  6855. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  6856. /* Invoke repetition event callback */
  6857. HAL_HRTIM_RepetitionEventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6858. }
  6859. }
  6860. /* Synchronization input event */
  6861. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_SYNC) != RESET)
  6862. {
  6863. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_SYNC) != RESET)
  6864. {
  6865. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_SYNC);
  6866. /* Invoke synchronization event callback */
  6867. HAL_HRTIM_SynchronizationEventCallback(hhrtim);
  6868. }
  6869. }
  6870. /* Master timer registers update event */
  6871. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MUPD) != RESET)
  6872. {
  6873. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MUPD) != RESET)
  6874. {
  6875. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MUPD);
  6876. /* Invoke registers update event callback */
  6877. HAL_HRTIM_RegistersUpdateCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6878. }
  6879. }
  6880. }
  6881. /**
  6882. * @brief Timer interrupts service routine
  6883. * @param hhrtim pointer to HAL HRTIM handle
  6884. * @param TimerIdx Timer index
  6885. * This parameter can be one of the following values:
  6886. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  6887. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  6888. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  6889. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  6890. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  6891. * @retval None
  6892. */
  6893. static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
  6894. uint32_t TimerIdx)
  6895. {
  6896. /* Timer compare 1 event */
  6897. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP1) != RESET)
  6898. {
  6899. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1) != RESET)
  6900. {
  6901. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  6902. /* Invoke compare 1 event callback */
  6903. HAL_HRTIM_Compare1EventCallback(hhrtim, TimerIdx);
  6904. }
  6905. }
  6906. /* Timer compare 2 event */
  6907. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP2) != RESET)
  6908. {
  6909. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2) != RESET)
  6910. {
  6911. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  6912. /* Invoke compare 2 event callback */
  6913. HAL_HRTIM_Compare2EventCallback(hhrtim, TimerIdx);
  6914. }
  6915. }
  6916. /* Timer compare 3 event */
  6917. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP3) != RESET)
  6918. {
  6919. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3) != RESET)
  6920. {
  6921. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3);
  6922. /* Invoke compare 3 event callback */
  6923. HAL_HRTIM_Compare3EventCallback(hhrtim, TimerIdx);
  6924. }
  6925. }
  6926. /* Timer compare 4 event */
  6927. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP4) != RESET)
  6928. {
  6929. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4) != RESET)
  6930. {
  6931. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4);
  6932. /* Invoke compare 4 event callback */
  6933. HAL_HRTIM_Compare4EventCallback(hhrtim, TimerIdx);
  6934. }
  6935. }
  6936. /* Timer repetition event */
  6937. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_REP) != RESET)
  6938. {
  6939. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_REP) != RESET)
  6940. {
  6941. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  6942. /* Invoke repetition event callback */
  6943. HAL_HRTIM_RepetitionEventCallback(hhrtim, TimerIdx);
  6944. }
  6945. }
  6946. /* Timer registers update event */
  6947. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_UPD) != RESET)
  6948. {
  6949. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD) != RESET)
  6950. {
  6951. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD);
  6952. /* Invoke registers update event callback */
  6953. HAL_HRTIM_RegistersUpdateCallback(hhrtim, TimerIdx);
  6954. }
  6955. }
  6956. /* Timer capture 1 event */
  6957. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CPT1) != RESET)
  6958. {
  6959. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1) != RESET)
  6960. {
  6961. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  6962. /* Invoke capture 1 event callback */
  6963. HAL_HRTIM_Capture1EventCallback(hhrtim, TimerIdx);
  6964. }
  6965. }
  6966. /* Timer capture 2 event */
  6967. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CPT2) != RESET)
  6968. {
  6969. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2) != RESET)
  6970. {
  6971. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  6972. /* Invoke capture 2 event callback */
  6973. HAL_HRTIM_Capture2EventCallback(hhrtim, TimerIdx);
  6974. }
  6975. }
  6976. /* Timer ouput 1 set event */
  6977. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_SET1) != RESET)
  6978. {
  6979. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1) != RESET)
  6980. {
  6981. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1);
  6982. /* Invoke ouput 1 set event callback */
  6983. HAL_HRTIM_Output1SetCallback(hhrtim, TimerIdx);
  6984. }
  6985. }
  6986. /* Timer ouput 1 reset event */
  6987. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST1) != RESET)
  6988. {
  6989. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1) != RESET)
  6990. {
  6991. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1);
  6992. /* Invoke ouput 1 reset event callback */
  6993. HAL_HRTIM_Output1ResetCallback(hhrtim, TimerIdx);
  6994. }
  6995. }
  6996. /* Timer ouput 2 set event */
  6997. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_SET2) != RESET)
  6998. {
  6999. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2) != RESET)
  7000. {
  7001. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2);
  7002. /* Invoke ouput 2 set event callback */
  7003. HAL_HRTIM_Output2SetCallback(hhrtim, TimerIdx);
  7004. }
  7005. }
  7006. /* Timer ouput 2 reset event */
  7007. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST2) != RESET)
  7008. {
  7009. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2) != RESET)
  7010. {
  7011. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2);
  7012. /* Invoke ouput 2 reset event callback */
  7013. HAL_HRTIM_Output2ResetCallback(hhrtim, TimerIdx);
  7014. }
  7015. }
  7016. /* Timer reset event */
  7017. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST) != RESET)
  7018. {
  7019. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST) != RESET)
  7020. {
  7021. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST);
  7022. /* Invoke timer reset callback */
  7023. HAL_HRTIM_CounterResetCallback(hhrtim, TimerIdx);
  7024. }
  7025. }
  7026. /* Delayed protection event */
  7027. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_DLYPRT) != RESET)
  7028. {
  7029. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT) != RESET)
  7030. {
  7031. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT);
  7032. /* Invoke delayed protection callback */
  7033. HAL_HRTIM_DelayedProtectionCallback(hhrtim, TimerIdx);
  7034. }
  7035. }
  7036. }
  7037. /**
  7038. * @brief DMA callback invoked upon master timer related DMA request completion
  7039. * @param hdma pointer to DMA handle.
  7040. * @retval None
  7041. */
  7042. static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma)
  7043. {
  7044. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  7045. if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP1) != RESET)
  7046. {
  7047. HAL_HRTIM_Compare1EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7048. }
  7049. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP2) != RESET)
  7050. {
  7051. HAL_HRTIM_Compare2EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7052. }
  7053. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP3) != RESET)
  7054. {
  7055. HAL_HRTIM_Compare3EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7056. }
  7057. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP4) != RESET)
  7058. {
  7059. HAL_HRTIM_Compare4EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7060. }
  7061. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MREP) != RESET)
  7062. {
  7063. HAL_HRTIM_RepetitionEventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7064. }
  7065. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_SYNC) != RESET)
  7066. {
  7067. HAL_HRTIM_SynchronizationEventCallback(hrtim);
  7068. }
  7069. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MUPD) != RESET)
  7070. {
  7071. HAL_HRTIM_RegistersUpdateCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7072. }
  7073. }
  7074. /**
  7075. * @brief DMA callback invoked upon timer A..E related DMA request completion
  7076. * @param hdma pointer to DMA handle.
  7077. * @retval None
  7078. */
  7079. static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma)
  7080. {
  7081. uint8_t timer_idx;
  7082. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  7083. timer_idx = GetTimerIdxFromDMAHandle(hdma);
  7084. if (IS_HRTIM_TIMING_UNIT( timer_idx))
  7085. {
  7086. if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP1) != RESET)
  7087. {
  7088. HAL_HRTIM_Compare1EventCallback(hrtim, timer_idx);
  7089. }
  7090. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP2) != RESET)
  7091. {
  7092. HAL_HRTIM_Compare2EventCallback(hrtim, timer_idx);
  7093. }
  7094. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP3) != RESET)
  7095. {
  7096. HAL_HRTIM_Compare3EventCallback(hrtim, timer_idx);
  7097. }
  7098. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP4) != RESET)
  7099. {
  7100. HAL_HRTIM_Compare4EventCallback(hrtim, timer_idx);
  7101. }
  7102. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_REP) != RESET)
  7103. {
  7104. HAL_HRTIM_RepetitionEventCallback(hrtim, timer_idx);
  7105. }
  7106. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_UPD) != RESET)
  7107. {
  7108. HAL_HRTIM_RegistersUpdateCallback(hrtim, timer_idx);
  7109. }
  7110. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT1) != RESET)
  7111. {
  7112. HAL_HRTIM_Capture1EventCallback(hrtim, timer_idx);
  7113. }
  7114. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT2) != RESET)
  7115. {
  7116. HAL_HRTIM_Capture2EventCallback(hrtim, timer_idx);
  7117. }
  7118. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET1) != RESET)
  7119. {
  7120. HAL_HRTIM_Output1SetCallback(hrtim, timer_idx);
  7121. }
  7122. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST1) != RESET)
  7123. {
  7124. HAL_HRTIM_Output1ResetCallback(hrtim, timer_idx);
  7125. }
  7126. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET2) != RESET)
  7127. {
  7128. HAL_HRTIM_Output2SetCallback(hrtim, timer_idx);
  7129. }
  7130. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST2) != RESET)
  7131. {
  7132. HAL_HRTIM_Output2ResetCallback(hrtim, timer_idx);
  7133. }
  7134. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST) != RESET)
  7135. {
  7136. HAL_HRTIM_CounterResetCallback(hrtim, timer_idx);
  7137. }
  7138. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_DLYPRT) != RESET)
  7139. {
  7140. HAL_HRTIM_DelayedProtectionCallback(hrtim, timer_idx);
  7141. }
  7142. }
  7143. }
  7144. /**
  7145. * @brief DMA error callback
  7146. * @param hdma pointer to DMA handle.
  7147. * @retval None
  7148. */
  7149. static void HRTIM_DMAError(DMA_HandleTypeDef *hdma)
  7150. {
  7151. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  7152. HAL_HRTIM_ErrorCallback(hrtim);
  7153. }
  7154. /**
  7155. * @brief DMA callback invoked upon burst DMA transfer completion
  7156. * @param hdma pointer to DMA handle.
  7157. * @retval None
  7158. */
  7159. static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma)
  7160. {
  7161. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  7162. HAL_HRTIM_BurstDMATransferCallback(hrtim, GetTimerIdxFromDMAHandle(hdma));
  7163. }
  7164. /**
  7165. * @}
  7166. */
  7167. /**
  7168. * @}
  7169. */
  7170. #endif /* STM32F334x8 */
  7171. #endif /* HAL_HRTIM_MODULE_ENABLED */
  7172. /**
  7173. * @}
  7174. */
  7175. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/