#ifndef _ADC_H__
#define _ADC_H__
#include "hal/hal.h"
#include "stm32f3xx_ll_adc.h"
#include "stm32f3xx_ll_tim.h"
#include "libs/types.h"
typedef struct _R3_f3_1_adc_config {
  	ADC_TypeDef * ADCx;            /*!< First ADC peripheral to be used.*/
  	TIM_TypeDef * TIMx;  //which triger the staring of the adc
  	u32 volatile * ADCDataReg1[6]; /*!< Contains the Address of ADC read value for one phase
                                         and all the 6 sectors */
  	u32 volatile * ADCDataReg2[6]; /*!< Contains the Address of ADC read value for one phase
                                         and all the 6 sectors */                                         
  	uint32_t ADCConfig [6] ; /*!< values of JSQR for first ADC for 6 sectors */ 	
}R3_F30x_8_ADC_Config_t;

static const R3_F30x_8_ADC_Config_t adc_config = {
	.ADCx = ADC1,
	.TIMx = TIM1,
	.ADCConfig = {//A ->U, B->V, C->W
				CURRENT_V_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_U_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
				CURRENT_U_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_V_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
				CURRENT_W_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_V_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
				CURRENT_V_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_W_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
				CURRENT_U_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_W_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
				CURRENT_W_ADC_CHANNAL<<ADC_JSQR_JSQ1_Pos | CURRENT_U_ADC_CHANNAL<<ADC_JSQR_JSQ2_Pos | 1<<ADC_JSQR_JL_Pos | (LL_ADC_INJ_TRIG_EXT_TIM1_TRGO & ~ADC_INJ_TRIG_EXT_EDGE_DEFAULT),
	},

	.ADCDataReg1 = {
				&ADC1->JDR1,//V
				&ADC1->JDR2,//V
				&ADC1->JDR1,//W  
				&ADC1->JDR2,//W 
				&ADC1->JDR1,//U
				&ADC1->JDR2,//U
	},
	.ADCDataReg2 = {
				&ADC1->JDR2, //U
				&ADC1->JDR1, //U
				&ADC1->JDR2, //V
				&ADC1->JDR1, //V
				&ADC1->JDR2, //W
				&ADC1->JDR1, //W
	},
};

void HAL_ADC1_Init(void);
void HAL_ADC1_Enable(void);
void HAL_ADC1_InJ_StartConvert(void);
void HAL_ADC1_ChanConfig(u32 channel);
u16 HAL_ADC1_ReadValue(u32 channel);

void __inline HAL_ADC1_Inject_Config(u8 sector, u32 inject_flags) {
	adc_config.ADCx->JSQR = adc_config.ADCConfig[sector] | inject_flags;
	MODIFY_REG(adc_config.TIMx->CR2, TIM_CR2_MMS, LL_TIM_TRGO_OC4REF);
}

void __inline HAL_ADC1_Inject_Read(u8 sector, u32 *v1, u32 *v2) {
	*v1 = *adc_config.ADCDataReg1[sector];
	*v2 = *adc_config.ADCDataReg2[sector];
}

#endif /* _ADC_H__ */