bsp.c 2.0 KB

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  1. #include "bsp/bsp.h"
  2. #include "bsp/bsp_driver.h"
  3. #include "libs/logger.h"
  4. #include "os/os_types.h"
  5. #include "version.h"
  6. static void wdog_enable(void);
  7. #define DGB_TIM1_STOP (1<<10)
  8. #define DGB_TIM8_STOP (1<<17)
  9. static void dbg_stop_tim1_8(void) {
  10. __IO uint32_t *p = (uint32_t*)0xE0042004;
  11. *p |= DGB_TIM1_STOP;
  12. *p |= DGB_TIM8_STOP;
  13. }
  14. void bsp_init(void){
  15. wdog_enable();
  16. dbg_stop_tim1_8();
  17. systick_open();
  18. task_ticks_enable();
  19. gpio_pin_init();
  20. shark_uart_init(SHARK_UART0);
  21. }
  22. void system_reboot(void){
  23. NVIC_SystemReset();
  24. }
  25. void systick_close(void)
  26. {
  27. SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
  28. }
  29. void systick_open(void)
  30. {
  31. SysTick_Config(SystemCoreClock / 1000);
  32. }
  33. u8 mcu_chip_id(u8 *buff)
  34. {
  35. u32 values[] = { REG32(0x1FFFF7E8), REG32(0x1FFFF7EC), REG32(0x1FFFF7F0), REG32(0x1FFFF7E0) };
  36. memcpy(buff, values, sizeof(values));
  37. return sizeof(values);
  38. }
  39. static u32 _mcu_rst_status = 0xFFFFFFFF;
  40. u32 get_mcu_reset_source(void)
  41. {
  42. if (_mcu_rst_status == 0xFFFFFFFF) {
  43. _mcu_rst_status = RCC->CTRLSTS;
  44. RCC_ClrFlag();
  45. }
  46. return _mcu_rst_status;
  47. }
  48. void wdog_reload(void){
  49. #if CONFIG_DEBUG == 0
  50. IWDG_ReloadKey();
  51. #endif
  52. }
  53. static void wdog_enable(void)
  54. {
  55. #if CONFIG_DEBUG == 0
  56. /* IWDG timeout equal to 250 ms (the timeout may varies due to LSI frequency
  57. dispersion) */
  58. /* Enable write access to IWDG_PR and IWDG_RLR registers */
  59. IWDG_WriteConfig(IWDG_WRITE_ENABLE);
  60. /* IWDG counter clock: LSI/32 */
  61. IWDG_SetPrescalerDiv(IWDG_PRESCALER_DIV128);
  62. /* Set counter reload value to obtain 250ms IWDG TimeOut.
  63. Counter Reload Value = 250ms/IWDG counter clock period
  64. = 250ms / (LSI/32)
  65. = 0.25s / (LsiFreq/32)
  66. = LsiFreq/(32 * 4)
  67. = LsiFreq/128
  68. */
  69. IWDG_CntReload(40000 / 128);
  70. /* Reload IWDG counter */
  71. IWDG_ReloadKey();
  72. /* Enable IWDG (the LSI oscillator will be enabled by hardware) */
  73. IWDG_Enable();
  74. #endif
  75. }
  76. int wdog_set_timeout(int wdog_time)
  77. {
  78. return 0;
  79. }