bsp.c 1.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485
  1. #include "bsp/bsp.h"
  2. #include "bsp/bsp_driver.h"
  3. #include "libs/logger.h"
  4. #include "os/os_types.h"
  5. #include "version.h"
  6. extern void system_clock_config(void);
  7. static void wdog_enable(void);
  8. void bsp_init(void){
  9. system_clock_config();
  10. wdog_enable();
  11. debug_periph_mode_set(DEBUG_TMR1_PAUSE, TRUE);
  12. systick_open();
  13. task_ticks_enable();
  14. gpio_pin_init();
  15. shark_uart_init(SHARK_UART0);
  16. }
  17. void system_reboot(void){
  18. NVIC_SystemReset();
  19. }
  20. void systick_close(void)
  21. {
  22. SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
  23. }
  24. void systick_open(void)
  25. {
  26. systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV);
  27. SysTick_Config(system_core_clock / 1000);
  28. NVIC_SetPriority(SysTick_IRQn, 0x00U);
  29. }
  30. u8 mcu_chip_id(u8 *buff)
  31. {
  32. u32 values[] = { REG32(0x1FFFF7E0), REG32(0x1FFFF7E8), REG32(0x1FFFF7EC), REG32(0x1FFFF7F0) };
  33. memcpy(buff, values, sizeof(values));
  34. return sizeof(values);
  35. }
  36. void wdog_reload(void){
  37. #if CONFIG_DEBUG == 0
  38. wdt_counter_reload();
  39. #endif
  40. }
  41. static void wdog_enable(void)
  42. {
  43. #if CONFIG_DEBUG == 0
  44. /* disable register write protection */
  45. wdt_register_write_enable(TRUE);
  46. /* set the wdt divider value */
  47. wdt_divider_set(WDT_CLK_DIV_64);
  48. /* set reload value
  49. timeout = reload_value * (divider / lick_freq ) (s)
  50. lick_freq = 40000 Hz
  51. divider = 4
  52. reload_value = 30000
  53. timeout = 3000 * (64 / 40000 ) = 4.8s = 4800ms
  54. */
  55. wdt_reload_value_set(3000 - 1);
  56. /* reload wdt counter */
  57. wdt_counter_reload();
  58. /* enable wdt */
  59. wdt_enable();
  60. #endif
  61. }
  62. int wdog_set_timeout(int wdog_time)
  63. {
  64. return 0;
  65. }