adc.c 13 KB

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  1. #include "bsp/bsp.h"
  2. #include "bsp/adc.h"
  3. #include "libs/utils.h"
  4. #include "os/os_task.h"
  5. #include "libs/logger.h"
  6. #define REG_CHAN_DMA 1
  7. #ifdef REG_CHAN_DMA
  8. #ifndef MC100_HW_V1
  9. #define ADC01_NUM 7
  10. #define ADC2_NUM 0
  11. #else
  12. #define ADC01_NUM (5)
  13. #define ADC2_NUM 4
  14. #endif
  15. #define REG_CHAN_NUM (ADC01_NUM + ADC2_NUM)
  16. s16 adc_buffer[REG_CHAN_NUM];
  17. static void adc01_dma_init(void)
  18. {
  19. dma_parameter_struct dma_init_struct;
  20. rcu_periph_clock_enable(RCU_DMA0);
  21. dma_deinit(DMA0, DMA_CH0);
  22. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  23. dma_init_struct.memory_addr = (uint32_t)adc_buffer;
  24. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  25. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;
  26. dma_init_struct.number = ADC01_NUM;
  27. dma_init_struct.periph_addr = (uint32_t)(&ADC_RDATA(ADC0));
  28. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  29. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
  30. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  31. dma_init(DMA0, DMA_CH0, &dma_init_struct);
  32. dma_circulation_enable(DMA0, DMA_CH0);
  33. dma_memory_to_memory_disable(DMA0, DMA_CH0);
  34. dma_channel_enable(DMA0, DMA_CH0);
  35. }
  36. #ifdef MC100_HW_V1
  37. static void adc2_dma_init(void)
  38. {
  39. dma_parameter_struct dma_init_struct;
  40. rcu_periph_clock_enable(RCU_DMA1);
  41. dma_deinit(DMA1, DMA_CH4);
  42. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  43. dma_init_struct.memory_addr = (uint32_t)(adc_buffer + ADC01_NUM);
  44. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  45. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;
  46. dma_init_struct.number = ADC2_NUM;
  47. dma_init_struct.periph_addr = (uint32_t)(&ADC_RDATA(ADC2));
  48. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  49. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
  50. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  51. dma_init(DMA1, DMA_CH4, &dma_init_struct);
  52. dma_circulation_enable(DMA1, DMA_CH4);
  53. dma_memory_to_memory_disable(DMA1, DMA_CH4);
  54. dma_channel_enable(DMA1, DMA_CH4);
  55. }
  56. #endif
  57. #endif
  58. static void adc0_init(void){
  59. /* config ADC clock */
  60. rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV4); //APB2 clk 120M, adc clk 30M
  61. rcu_periph_clock_enable(RCU_ADC0);
  62. adc_deinit(ADC0);
  63. adc_mode_config(ADC_DAUL_INSERTED_PARALLEL);
  64. adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);
  65. adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);
  66. /* configure ADC data alignment */
  67. adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);
  68. /* configure ADC inserted channel length */
  69. adc_channel_length_config(ADC0, ADC_INSERTED_CHANNEL, 1);
  70. //adc_inserted_channel_config(ADC0, 0, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  71. #ifdef U_PHASE_I_CHAN
  72. adc_update_insert_sample_time(ADC0, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  73. #endif
  74. #ifdef V_PHASE_I_CHAN
  75. adc_update_insert_sample_time(ADC0, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  76. #endif
  77. #ifdef W_PHASE_I_CHAN
  78. adc_update_insert_sample_time(ADC0, W_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  79. #endif
  80. #ifdef HIGH_SIDE_CURRENT_SENSOR
  81. adc_oversample_mode_config(ADC0, ADC_OVERSAMPLING_ALL_CONVERT, ADC_OVERSAMPLING_SHIFT_1B, ADC_OVERSAMPLING_RATIO_MUL2);
  82. adc_oversample_mode_enable(ADC0);
  83. #endif
  84. /* configure ADC inserted channel trigger */
  85. adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL, ADC_TRIGGER_PHASE);
  86. /* ADC external trigger enable */
  87. adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
  88. #ifdef REG_CHAN_DMA
  89. /* configure ADC regular channel */
  90. adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, ADC01_NUM);
  91. #ifndef MC100_HW_V1
  92. adc_regular_channel_config(ADC0, 0, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  93. adc_regular_channel_config(ADC0, 1, THROTTLE_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  94. adc_regular_channel_config(ADC0, 2, U_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  95. adc_regular_channel_config(ADC0, 3, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  96. adc_regular_channel_config(ADC0, 4, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  97. adc_regular_channel_config(ADC0, 5, MOS_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  98. adc_regular_channel_config(ADC0, 6, MOTOR_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  99. #else
  100. adc_regular_channel_config(ADC0, 0, MOS_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  101. adc_regular_channel_config(ADC0, 1, MOS_TEMP1_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  102. adc_regular_channel_config(ADC0, 2, U_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  103. adc_regular_channel_config(ADC0, 3, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  104. adc_regular_channel_config(ADC0, 4, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  105. #endif
  106. #endif
  107. /* configure ADC regular channel trigger */
  108. adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
  109. adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
  110. #ifdef REG_CHAN_DMA
  111. adc_dma_mode_enable(ADC0);
  112. #endif
  113. /* enable ADC interface */
  114. adc_enable(ADC0);
  115. delay_ms(1);
  116. /* ADC calibration and reset calibration */
  117. adc_calibration_enable(ADC0);
  118. nvic_irq_enable(ADC0_1_IRQn, ADC_IRQ_PRIORITY, 0);
  119. adc_disable_ext_trigger();
  120. #ifdef REG_CHAN_DMA
  121. adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);
  122. #endif
  123. }
  124. static void adc1_init(void){
  125. rcu_periph_clock_enable(RCU_ADC1);
  126. adc_deinit(ADC1);
  127. /* configure ADC data alignment */
  128. adc_data_alignment_config(ADC1, ADC_DATAALIGN_RIGHT);
  129. /* configure ADC inserted channel length */
  130. adc_channel_length_config(ADC1, ADC_INSERTED_CHANNEL, 1);
  131. /* configure ADC inserted channel */
  132. #ifdef U_PHASE_I_CHAN
  133. adc_update_insert_sample_time(ADC1, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  134. #endif
  135. #ifdef V_PHASE_I_CHAN
  136. adc_update_insert_sample_time(ADC1, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  137. #endif
  138. #ifdef W_PHASE_I_CHAN
  139. adc_update_insert_sample_time(ADC1, W_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  140. #endif
  141. #ifdef HIGH_SIDE_CURRENT_SENSOR
  142. adc_oversample_mode_config(ADC1, ADC_OVERSAMPLING_ALL_CONVERT, ADC_OVERSAMPLING_SHIFT_1B, ADC_OVERSAMPLING_RATIO_MUL2);
  143. adc_oversample_mode_enable(ADC1);
  144. #endif
  145. /* ADC external trigger enable */
  146. adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC_TRIGGER_NONE);
  147. adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
  148. /* enable ADC interface */
  149. adc_enable(ADC1);
  150. delay_ms(1);
  151. /* ADC calibration and reset calibration */
  152. adc_calibration_enable(ADC1);
  153. /* ADC software trigger enable */
  154. adc_software_trigger_enable(ADC1, ADC_INSERTED_CHANNEL);
  155. }
  156. #ifdef MC100_HW_V1
  157. static void adc2_init(void){
  158. rcu_periph_clock_enable(RCU_ADC2);
  159. adc_deinit(ADC2);
  160. adc_special_function_config(ADC2, ADC_CONTINUOUS_MODE, ENABLE);
  161. adc_special_function_config(ADC2, ADC_SCAN_MODE, ENABLE);
  162. /* configure ADC data alignment */
  163. adc_data_alignment_config(ADC2, ADC_DATAALIGN_RIGHT);
  164. #ifdef REG_CHAN_DMA
  165. /* configure ADC regular channel */
  166. adc_channel_length_config(ADC2, ADC_REGULAR_CHANNEL, ADC2_NUM);
  167. adc_regular_channel_config(ADC2, 0, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  168. adc_regular_channel_config(ADC2, 1, ACC_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  169. adc_regular_channel_config(ADC2, 2, THROTTLE_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  170. adc_regular_channel_config(ADC2, 3, MOTOR_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  171. #endif
  172. /* configure ADC regular channel trigger */
  173. adc_external_trigger_source_config(ADC2, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
  174. adc_external_trigger_config(ADC2, ADC_REGULAR_CHANNEL, ENABLE);
  175. #ifdef REG_CHAN_DMA
  176. adc_dma_mode_enable(ADC2);
  177. #endif
  178. /* enable ADC interface */
  179. adc_enable(ADC2);
  180. delay_ms(1);
  181. /* ADC calibration and reset calibration */
  182. adc_calibration_enable(ADC2);
  183. #ifdef REG_CHAN_DMA
  184. adc_software_trigger_enable(ADC2, ADC_REGULAR_CHANNEL);
  185. #endif
  186. }
  187. #endif
  188. static void adc_gpio_init(void) {
  189. rcu_periph_clock_enable(RCU_AF);
  190. /* configure ADC pin, current sampling -- ADC_IN1(PA1) ADC_IN12(PC2) ADC_IN13(PC3) */
  191. #ifdef U_PHASE_ADC_GROUP
  192. rcu_periph_clock_enable(U_PHASE_ADC_RCU);
  193. gpio_init(U_PHASE_ADC_GROUP, U_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, U_PHASE_ADC_PIN);
  194. #endif
  195. #ifdef V_PHASE_ADC_GROUP
  196. rcu_periph_clock_enable(V_PHASE_ADC_RCU);
  197. gpio_init(V_PHASE_ADC_GROUP, V_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, V_PHASE_ADC_PIN);
  198. #endif
  199. #ifdef W_PHASE_ADC_GROUP
  200. rcu_periph_clock_enable(W_PHASE_ADC_RCU);
  201. gpio_init(W_PHASE_ADC_GROUP, W_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, W_PHASE_ADC_PIN);
  202. #endif
  203. #ifdef VBUS_V_ADC_GROUP
  204. rcu_periph_clock_enable(VBUS_V_ADC_RCU);
  205. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  206. gpio_init(VBUS_V_ADC_GROUP, VBUS_V_ADC_MODE, GPIO_OSPEED_50MHZ, VBUS_V_ADC_PIN);
  207. #endif
  208. #ifdef ACC_V_ADC_GROUP
  209. rcu_periph_clock_enable(ACC_V_ADC_RCU);
  210. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  211. gpio_init(ACC_V_ADC_GROUP, ACC_V_ADC_MODE, GPIO_OSPEED_50MHZ, ACC_V_ADC_PIN);
  212. #endif
  213. #ifdef THROTTLE_V_ADC_GROUP
  214. rcu_periph_clock_enable(THROTTLE_V_ADC_RCU);
  215. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  216. gpio_init(THROTTLE_V_ADC_GROUP, THROTTLE_V_ADC_MODE, GPIO_OSPEED_50MHZ, THROTTLE_V_ADC_PIN);
  217. #endif
  218. #ifdef TEMP_V_ADC_GROUP
  219. rcu_periph_clock_enable(TEMP_V_ADC_GROUP);
  220. /* configure ADC pin, temperature sampling -- ADC_IN11(PC1) */
  221. gpio_init(TEMP_V_ADC_GROUP, TEMP_V_ADC_MODE, GPIO_OSPEED_50MHZ, TEMP_V_ADC_PIN);
  222. #endif
  223. #ifdef U_VOL_ADC_GROUP
  224. rcu_periph_clock_enable(U_VOL_ADC_RCU);
  225. gpio_init(U_VOL_ADC_GROUP, U_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, U_VOL_ADC_PIN);
  226. #endif
  227. #ifdef V_VOL_ADC_GROUP
  228. rcu_periph_clock_enable(V_VOL_ADC_RCU);
  229. gpio_init(V_VOL_ADC_GROUP, V_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, V_VOL_ADC_PIN);
  230. #endif
  231. #ifdef W_VOL_ADC_GROUP
  232. rcu_periph_clock_enable(W_VOL_ADC_RCU);
  233. gpio_init(W_VOL_ADC_GROUP, W_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, W_VOL_ADC_PIN);
  234. #endif
  235. #ifdef MOS_TEMP_ADC_CHAN
  236. rcu_periph_clock_enable(MOS_TEMP_ADC_RCU);
  237. gpio_init(MOS_TEMP_ADC_CHAN, MOS_TEMP_ADC_MODE, GPIO_OSPEED_50MHZ, MOS_TEMP_ADC_PIN);
  238. #endif
  239. #ifdef MOS_TEMP1_ADC_CHAN
  240. rcu_periph_clock_enable(MOS_TEMP1_ADC_RCU);
  241. gpio_init(MOS_TEMP1_ADC_CHAN, MOS_TEMP1_ADC_MODE, GPIO_OSPEED_50MHZ, MOS_TEMP1_ADC_PIN);
  242. #endif
  243. #ifdef MOTOR_TEMP_ADC_CHAN
  244. rcu_periph_clock_enable(MOTOR_TEMP_ADC_RCU);
  245. gpio_init(MOTOR_TEMP_ADC_CHAN, MOTOR_TEMP_ADC_MODE, GPIO_OSPEED_50MHZ, MOTOR_TEMP_ADC_PIN);
  246. #endif
  247. }
  248. void adc_init(void) {
  249. adc_gpio_init();
  250. #ifdef REG_CHAN_DMA
  251. adc01_dma_init();
  252. #ifdef MC100_HW_V1
  253. adc2_dma_init();
  254. #endif
  255. #endif
  256. adc0_init();
  257. adc1_init();
  258. #ifdef MC100_HW_V1
  259. adc2_init();
  260. #endif
  261. adc_current_sample_config(0);
  262. }
  263. u16 adc_get_vbus(void) {
  264. #ifdef MC100_HW_V1
  265. return adc_buffer[ADC01_NUM + 0];
  266. #else
  267. return adc_buffer[0];
  268. #endif
  269. }
  270. u16 adc_get_acc(void) {
  271. #ifdef MC100_HW_V1
  272. return adc_buffer[ADC01_NUM + 1];
  273. #else
  274. return adc_get_vbus();
  275. #endif
  276. }
  277. u16 adc_get_throttle(void) {
  278. #ifdef MC100_HW_V1
  279. return adc_buffer[ADC01_NUM + 2];
  280. #else
  281. return adc_buffer[1];
  282. #endif
  283. }
  284. void adc_get_uvw_phaseV(u16 *uvw) {
  285. uvw[0] = adc_buffer[2];
  286. uvw[1] = adc_buffer[3];
  287. uvw[2] = adc_buffer[4];
  288. }
  289. u16 adc_get_mos_temp(void) {
  290. #ifdef MC100_HW_V1
  291. return adc_buffer[0];
  292. #else
  293. return adc_buffer[5];
  294. #endif
  295. }
  296. u16 adc_get_mos_temp2(void) {
  297. #ifdef MC100_HW_V1
  298. return adc_buffer[1];
  299. #else
  300. return adc_get_mos_temp();
  301. #endif
  302. }
  303. u16 adc_get_motor_temp(void) {
  304. #ifdef MC100_HW_V1
  305. return adc_buffer[ADC01_NUM + 3];
  306. #else
  307. return adc_buffer[6];
  308. #endif
  309. }
  310. void adc_start_convert(void) {
  311. int drop = 2;
  312. /* clear the ADC flag */
  313. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  314. adc_flag_clear(ADC1, ADC_FLAG_EOIC);
  315. adc_enable_ext_trigger();
  316. while(drop-- > 0) {
  317. while (adc_flag_get(ADC0, ADC_FLAG_EOIC) == RESET);
  318. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  319. }
  320. /* enable ADC interrupt */
  321. adc_interrupt_enable(ADC0, ADC_INT_EOIC);
  322. adc_update_ext_trigger(ADC_TRIGGER_PHASE);
  323. }
  324. void adc_stop_convert(void) {
  325. adc_disable_ext_trigger();
  326. /* disable ADC interrupt */
  327. adc_interrupt_disable(ADC0, ADC_INT_EOIC);
  328. /* clear the ADC flag */
  329. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  330. adc_flag_clear(ADC1, ADC_FLAG_EOIC);
  331. }
  332. s32 adc_sample_regular_channel(int channel, int times) {
  333. #ifndef REG_CHAN_DMA
  334. u32 adc_device = ADC0;
  335. int value = 0;
  336. int count = 0;
  337. int min = 0xFFFFF;
  338. int max = -0xFFFFF;
  339. u64 start_time;
  340. adc_channel_length_config(adc_device, ADC_REGULAR_CHANNEL, 1);
  341. adc_regular_channel_config(adc_device, 0, channel, ADC_REGCHAN_SAMPLE_TIME);
  342. while(count < times){
  343. restart:
  344. start_time = shark_get_mseconds();
  345. adc_software_trigger_enable(adc_device, ADC_REGULAR_CHANNEL);
  346. while(SET != adc_flag_get(adc_device, ADC_FLAG_EOC)){
  347. if (shark_get_mseconds() - start_time >= 2){
  348. goto restart;
  349. }
  350. };
  351. int one = adc_regular_data_read(adc_device);
  352. adc_flag_clear(adc_device, ADC_FLAG_EOC);
  353. value += (one & 0xFFF);
  354. count ++;
  355. if (one > max){
  356. max = one;
  357. }
  358. if (one < min) {
  359. min = one;
  360. }
  361. }
  362. if (times <= 2) {
  363. return value/times;
  364. }
  365. return (value - min - max)/(times-2);
  366. #else
  367. return 0;
  368. #endif
  369. }