can.c 5.9 KB

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  1. #include <stdio.h>
  2. #include "bsp.h"
  3. #include "can.h"
  4. #include "libs/utils.h"
  5. #include "os/queue.h"
  6. #define CAN_RX_MESSAGE_RX_ID 1
  7. #define CAN_SEND_QUEUE_SIZE 32
  8. #define RX_ID_OFFSET 16
  9. #define CAN_SEND_OK 0
  10. #define CAN_SEND_ERROR -1
  11. #define CAN_SEND_WAIT_TIMEOUT -2
  12. static co_queue_t tx_queue;
  13. static co_queue_t rx_queue;
  14. static int shark_send_can0_to_fifo(can_trasnmit_message_struct *P_message);
  15. static int shark_send_can0_data(can_trasnmit_message_struct *P_message);
  16. static void _can_tx_task(void *args);
  17. static void _can_rx_task(void *args);
  18. /* this function can be overide by app, which need recv the can frame */
  19. __weak void handle_can_frame(can_id_t id, uint8_t *data, int len){
  20. }
  21. static void _can_rx_task(void *args){
  22. can_receive_message_struct message;
  23. while(1) {
  24. if (queue_get(rx_queue, &message)) {
  25. can_id_t can_id;
  26. can_id.id = message.rx_efid;
  27. handle_can_frame(can_id, message.rx_data, message.rx_dlen);
  28. }
  29. co_task_yield();
  30. }
  31. }
  32. static __inline__ void can_fifo_recv(int fifo){
  33. can_receive_message_struct message;
  34. can_message_receive(CAN0, fifo, &message);
  35. queue_put(rx_queue, &message);
  36. }
  37. void USBD_LP_CAN0_RX0_IRQHandler(void)
  38. {
  39. can_fifo_recv(CAN_FIFO0);
  40. }
  41. void CAN0_RX1_IRQHandler(void)
  42. {
  43. can_fifo_recv(CAN_FIFO1);
  44. }
  45. static void shark_can0_txrx_pin_config(void){
  46. /* enable can clock */
  47. rcu_periph_clock_enable(RCU_CAN0);
  48. rcu_periph_clock_enable(RCU_GPIOA);
  49. rcu_periph_clock_enable(RCU_AF);
  50. //gpio_pin_remap_config(GPIO_CAN_FULL_REMAP,DISABLE);
  51. //gpio_pin_remap_config(GPIO_CAN_PARTIAL_REMAP,ENABLE);
  52. gpio_init(GPIOA, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_12);
  53. gpio_init(GPIOA, GPIO_MODE_IPU, GPIO_OSPEED_50MHZ, GPIO_PIN_11);
  54. }
  55. static void shark_can0_config(void)
  56. {
  57. can_parameter_struct can_parameter;
  58. can_struct_para_init(CAN_INIT_STRUCT, &can_parameter);
  59. /* initialize CAN register */
  60. can_deinit(CAN0);
  61. //can_deinit(CAN1);
  62. /* initialize CAN parameters */
  63. can_parameter.time_triggered = DISABLE;
  64. can_parameter.auto_bus_off_recovery = ENABLE;
  65. can_parameter.auto_wake_up = DISABLE;
  66. can_parameter.rec_fifo_overwrite = DISABLE;
  67. can_parameter.trans_fifo_order = ENABLE;
  68. can_parameter.no_auto_retrans = ENABLE;
  69. #if CAN0_SPEED==250 //250k bps
  70. if (SystemCoreClock == 120000000) {
  71. can_parameter.resync_jump_width = CAN_BT_SJW_1TQ;
  72. can_parameter.time_segment_1 = CAN_BT_BS1_5TQ;
  73. can_parameter.time_segment_2 = CAN_BT_BS2_4TQ;
  74. } else {
  75. can_parameter.resync_jump_width = CAN_BT_SJW_1TQ;
  76. can_parameter.time_segment_1 = CAN_BT_BS1_5TQ;
  77. can_parameter.time_segment_2 = CAN_BT_BS2_3TQ;
  78. }
  79. #endif
  80. can_parameter.working_mode = CAN_NORMAL_MODE;
  81. can_parameter.prescaler = 24;
  82. /* initialize CAN */
  83. can_init(CAN0, &can_parameter);
  84. /* recv my can ID, use fifo0 */
  85. can_filter_mask_mode_init(CAN_MY_ADDRESS, CAN_FILTER_DEST_MASK, CAN_EXTENDED_FIFO0, 0);
  86. nvic_priority_group_set(NVIC_PRIGROUP_PRE4_SUB0);
  87. nvic_irq_enable(USBD_LP_CAN0_RX0_IRQn,2,0);
  88. /* enable can receive FIFO0 not empty interrupt */
  89. can_interrupt_enable(CAN0, CAN_INTEN_RFNEIE0);
  90. /* recv broadcast, fifo1 */
  91. can_filter_mask_mode_init(CAN_NODE_ADDR_FF, CAN_FILTER_DEST_MASK, CAN_EXTENDED_FIFO1, 1);
  92. /* recv ccu aux fifo2*/
  93. can_filter_mask_mode_init(CAN_NODE_ADDR_CCU_AUX, CAN_FILTER_DEST_MASK, CAN_EXTENDED_FIFO1, 2);
  94. /* recv ble fifo3*/
  95. can_filter_mask_mode_init(CAN_NODE_ADDR_BLE, CAN_FILTER_DEST_MASK, CAN_EXTENDED_FIFO1, 3);
  96. can_filter_mask_mode_init(CAN_NODE_ADDR_ACU, CAN_FILTER_DEST_MASK, CAN_EXTENDED_FIFO1, 4);
  97. nvic_irq_enable(CAN0_RX1_IRQn,10,0);
  98. /* enable can receive FIFO1 not empty interrupt */
  99. can_interrupt_enable(CAN0, CAN_INTEN_RFNEIE1);
  100. }
  101. static int shark_send_can0_data(can_trasnmit_message_struct *P_message){
  102. if (queue_put(tx_queue, P_message)){
  103. return CAN_SEND_OK;
  104. }
  105. return CAN_SEND_ERROR;
  106. }
  107. static void _can_tx_task(void *args){
  108. can_trasnmit_message_struct trasnmit_msg;
  109. while(1) {
  110. if (queue_get(tx_queue, &trasnmit_msg)) {
  111. shark_send_can0_to_fifo(&trasnmit_msg);
  112. }
  113. co_task_yield();
  114. }
  115. }
  116. /*when system scheduler is not start or stoped, we MUST not use FreeRTOS
  117. system api which can cause sleep,context switch */
  118. static int shark_send_can0_to_fifo(can_trasnmit_message_struct *P_message){
  119. uint8_t mailbox_number = CAN_NOMAILBOX;
  120. uint32_t retry_count = 20000;
  121. if (CAN_ERR(CAN0) & CAN_ERR_BOERR){
  122. shark_can0_reset();
  123. }
  124. do {
  125. mailbox_number = can_message_transmit(CAN0, P_message);
  126. if (mailbox_number < CAN_NOMAILBOX){
  127. return CAN_SEND_OK;
  128. }
  129. }while(retry_count-- > 0); //wait sender fifo empty
  130. shark_can0_reset();
  131. return CAN_SEND_ERROR;
  132. }
  133. int shark_can0_send_message(uint32_t can_id, const void*buff, int len){
  134. can_trasnmit_message_struct trasnmit_msg;
  135. can_id_t can_frame_id;
  136. u32 total_frames = ((len + 7) >> 3);
  137. int send_len = len;
  138. u32 frame_id = 1;
  139. can_frame_id.id = can_id;
  140. can_frame_id.total = total_frames;
  141. while(send_len > 0){
  142. can_frame_id.idx = frame_id;
  143. trasnmit_msg.tx_sfid = 0;
  144. trasnmit_msg.tx_efid = can_frame_id.id;
  145. trasnmit_msg.tx_ft = CAN_FT_DATA;
  146. trasnmit_msg.tx_ff = CAN_FF_EXTENDED;
  147. trasnmit_msg.tx_dlen = min(CAN_DATA_SIZE,send_len);
  148. memcpy((char *)trasnmit_msg.tx_data, (char *)buff + (len - send_len), trasnmit_msg.tx_dlen);
  149. send_len -= trasnmit_msg.tx_dlen;
  150. frame_id ++;
  151. if (shark_send_can0_data(&trasnmit_msg) != CAN_SEND_OK){
  152. return CAN_SEND_ERROR;
  153. }
  154. }
  155. return CAN_SEND_OK;
  156. }
  157. void shark_can0_reset(void){
  158. shark_can0_txrx_pin_config();
  159. shark_can0_config();
  160. }
  161. void shark_can0_deinit(void){
  162. can_deinit(CAN0);
  163. rcu_periph_clock_disable(RCU_CAN0);
  164. gpio_init(GPIOB, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_2MHZ, GPIO_PIN_9);
  165. }
  166. void shark_can0_init(void){
  167. tx_queue = queue_create(64, sizeof(can_trasnmit_message_struct));
  168. rx_queue = queue_create(32, sizeof(can_trasnmit_message_struct));
  169. co_task_create(_can_tx_task, NULL, 512);
  170. co_task_create(_can_rx_task, NULL, 512);
  171. shark_can0_txrx_pin_config();
  172. shark_can0_config();
  173. }