adc.c 8.6 KB

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  1. #include "bsp/bsp.h"
  2. #include "bsp/adc.h"
  3. #include "libs/utils.h"
  4. #include "os/os_task.h"
  5. #include "libs/logger.h"
  6. #define REG_CHAN_DMA 1
  7. #ifdef REG_CHAN_DMA
  8. #define REG_CHAN_NUM 5
  9. s16 adc_buffer[REG_CHAN_NUM] = {0, 0, 0, 0, 0};
  10. static void adc_dma_init(void)
  11. {
  12. dma_parameter_struct dma_init_struct;
  13. rcu_periph_clock_enable(RCU_DMA0);
  14. dma_deinit(DMA0, DMA_CH0);
  15. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  16. dma_init_struct.memory_addr = (uint32_t)adc_buffer;
  17. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  18. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;
  19. dma_init_struct.number = REG_CHAN_NUM;
  20. dma_init_struct.periph_addr = (uint32_t)(&ADC_RDATA(ADC0));
  21. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  22. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
  23. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  24. dma_init(DMA0, DMA_CH0, &dma_init_struct);
  25. dma_circulation_enable(DMA0, DMA_CH0);
  26. dma_memory_to_memory_disable(DMA0, DMA_CH0);
  27. /* enable the full transfer interrupt */
  28. dma_interrupt_flag_clear(DMA0, DMA_CH0, DMA_INT_FLAG_FTF);
  29. dma_interrupt_enable(DMA0, DMA_CH0, DMA_INT_FTF);
  30. dma_channel_enable(DMA0, DMA_CH0);
  31. }
  32. #endif
  33. static void adc0_init(void){
  34. /* config ADC clock */
  35. rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV4); //APB2 clk 120M, adc clk 30M
  36. rcu_periph_clock_enable(RCU_ADC0);
  37. adc_deinit(ADC0);
  38. adc_mode_config(ADC_DAUL_INSERTED_PARALLEL);
  39. adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);
  40. adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);
  41. /* configure ADC data alignment */
  42. adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);
  43. /* configure ADC inserted channel length */
  44. adc_channel_length_config(ADC0, ADC_INSERTED_CHANNEL, 1);
  45. //adc_inserted_channel_config(ADC0, 0, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  46. #ifdef U_PHASE_I_CHAN
  47. adc_update_insert_sample_time(ADC0, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  48. #endif
  49. #ifdef V_PHASE_I_CHAN
  50. adc_update_insert_sample_time(ADC0, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  51. #endif
  52. #ifdef W_PHASE_I_CHAN
  53. adc_update_insert_sample_time(ADC0, W_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  54. #endif
  55. #ifdef HIGH_SIDE_CURRENT_SENSOR
  56. adc_oversample_mode_config(ADC0, ADC_OVERSAMPLING_ALL_CONVERT, ADC_OVERSAMPLING_SHIFT_1B, ADC_OVERSAMPLING_RATIO_MUL2);
  57. adc_oversample_mode_enable(ADC0);
  58. #endif
  59. /* configure ADC inserted channel trigger */
  60. adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL, ADC_TRIGGER_PHASE);
  61. /* ADC external trigger enable */
  62. adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
  63. #ifdef REG_CHAN_DMA
  64. /* configure ADC regular channel */
  65. adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, REG_CHAN_NUM);
  66. adc_regular_channel_config(ADC0, 0, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  67. adc_regular_channel_config(ADC0, 1, THROTTLE_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  68. adc_regular_channel_config(ADC0, 2, U_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  69. adc_regular_channel_config(ADC0, 3, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  70. adc_regular_channel_config(ADC0, 4, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  71. #endif
  72. /* configure ADC regular channel trigger */
  73. adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
  74. adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
  75. #ifdef REG_CHAN_DMA
  76. adc_dma_mode_enable(ADC0);
  77. #endif
  78. /* enable ADC interface */
  79. adc_enable(ADC0);
  80. delay_ms(1);
  81. /* ADC calibration and reset calibration */
  82. adc_calibration_enable(ADC0);
  83. nvic_irq_enable(ADC0_1_IRQn, ADC_IRQ_PRIORITY, 0);
  84. adc_disable_ext_trigger();
  85. #ifdef REG_CHAN_DMA
  86. adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);
  87. #endif
  88. }
  89. static void adc1_init(void){
  90. rcu_periph_clock_enable(RCU_ADC1);
  91. adc_deinit(ADC1);
  92. /* configure ADC data alignment */
  93. adc_data_alignment_config(ADC1, ADC_DATAALIGN_RIGHT);
  94. /* configure ADC inserted channel length */
  95. adc_channel_length_config(ADC1, ADC_INSERTED_CHANNEL, 1);
  96. /* configure ADC inserted channel */
  97. #ifdef U_PHASE_I_CHAN
  98. adc_update_insert_sample_time(ADC1, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  99. #endif
  100. #ifdef V_PHASE_I_CHAN
  101. adc_update_insert_sample_time(ADC1, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  102. #endif
  103. #ifdef W_PHASE_I_CHAN
  104. adc_update_insert_sample_time(ADC1, W_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  105. #endif
  106. #ifdef HIGH_SIDE_CURRENT_SENSOR
  107. adc_oversample_mode_config(ADC1, ADC_OVERSAMPLING_ALL_CONVERT, ADC_OVERSAMPLING_SHIFT_1B, ADC_OVERSAMPLING_RATIO_MUL2);
  108. adc_oversample_mode_enable(ADC1);
  109. #endif
  110. /* ADC external trigger enable */
  111. adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC_TRIGGER_NONE);
  112. adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
  113. /* enable ADC interface */
  114. adc_enable(ADC1);
  115. delay_ms(1);
  116. /* ADC calibration and reset calibration */
  117. adc_calibration_enable(ADC1);
  118. /* ADC software trigger enable */
  119. adc_software_trigger_enable(ADC1, ADC_INSERTED_CHANNEL);
  120. }
  121. static void adc_gpio_init(void) {
  122. rcu_periph_clock_enable(RCU_AF);
  123. /* configure ADC pin, current sampling -- ADC_IN1(PA1) ADC_IN12(PC2) ADC_IN13(PC3) */
  124. #ifdef U_PHASE_ADC_GROUP
  125. rcu_periph_clock_enable(U_PHASE_ADC_RCU);
  126. gpio_init(U_PHASE_ADC_GROUP, U_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, U_PHASE_ADC_PIN);
  127. #endif
  128. #ifdef V_PHASE_ADC_GROUP
  129. rcu_periph_clock_enable(V_PHASE_ADC_RCU);
  130. gpio_init(V_PHASE_ADC_GROUP, V_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, V_PHASE_ADC_PIN);
  131. #endif
  132. #ifdef W_PHASE_ADC_GROUP
  133. rcu_periph_clock_enable(W_PHASE_ADC_RCU);
  134. gpio_init(W_PHASE_ADC_GROUP, W_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, W_PHASE_ADC_PIN);
  135. #endif
  136. #ifdef VBUS_V_ADC_GROUP
  137. rcu_periph_clock_enable(VBUS_V_ADC_RCU);
  138. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  139. gpio_init(VBUS_V_ADC_GROUP, VBUS_V_ADC_MODE, GPIO_OSPEED_50MHZ, VBUS_V_ADC_PIN);
  140. #endif
  141. #ifdef THROTTLE_V_ADC_GROUP
  142. rcu_periph_clock_enable(THROTTLE_V_ADC_RCU);
  143. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  144. gpio_init(THROTTLE_V_ADC_GROUP, THROTTLE_V_ADC_MODE, GPIO_OSPEED_50MHZ, THROTTLE_V_ADC_PIN);
  145. #endif
  146. #ifdef TEMP_V_ADC_GROUP
  147. rcu_periph_clock_enable(TEMP_V_ADC_GROUP);
  148. /* configure ADC pin, temperature sampling -- ADC_IN11(PC1) */
  149. gpio_init(TEMP_V_ADC_GROUP, TEMP_V_ADC_MODE, GPIO_OSPEED_50MHZ, TEMP_V_ADC_PIN);
  150. #endif
  151. #ifdef U_VOL_ADC_GROUP
  152. rcu_periph_clock_enable(U_VOL_ADC_RCU);
  153. gpio_init(U_VOL_ADC_GROUP, U_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, U_VOL_ADC_PIN);
  154. #endif
  155. #ifdef V_VOL_ADC_GROUP
  156. rcu_periph_clock_enable(V_VOL_ADC_RCU);
  157. gpio_init(V_VOL_ADC_GROUP, V_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, V_VOL_ADC_PIN);
  158. #endif
  159. #ifdef W_VOL_ADC_GROUP
  160. rcu_periph_clock_enable(W_VOL_ADC_RCU);
  161. gpio_init(W_VOL_ADC_GROUP, W_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, W_VOL_ADC_PIN);
  162. #endif
  163. }
  164. void adc_init(void) {
  165. adc_gpio_init();
  166. #ifdef REG_CHAN_DMA
  167. adc_dma_init();
  168. #endif
  169. adc0_init();
  170. adc1_init();
  171. adc_current_sample_config(0);
  172. }
  173. u16 adc_get_vbus(void) {
  174. return adc_buffer[0];
  175. }
  176. u16 adc_get_throttle(void) {
  177. return adc_buffer[1];
  178. }
  179. void adc_get_uvw_phaseV(u16 *uvw) {
  180. uvw[0] = adc_buffer[2];
  181. uvw[1] = adc_buffer[3];
  182. uvw[2] = adc_buffer[4];
  183. }
  184. void adc_start_convert(void) {
  185. int drop = 2;
  186. /* clear the ADC flag */
  187. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  188. adc_flag_clear(ADC1, ADC_FLAG_EOIC);
  189. adc_enable_ext_trigger();
  190. while(drop-- > 0) {
  191. while (adc_flag_get(ADC0, ADC_FLAG_EOIC) == RESET);
  192. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  193. }
  194. /* enable ADC interrupt */
  195. adc_interrupt_enable(ADC0, ADC_INT_EOIC);
  196. adc_update_ext_trigger(ADC_TRIGGER_PHASE);
  197. }
  198. void adc_stop_convert(void) {
  199. adc_disable_ext_trigger();
  200. /* disable ADC interrupt */
  201. adc_interrupt_disable(ADC0, ADC_INT_EOIC);
  202. /* clear the ADC flag */
  203. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  204. adc_flag_clear(ADC1, ADC_FLAG_EOIC);
  205. }
  206. s32 adc_sample_regular_channel(int channel, int times) {
  207. #ifndef REG_CHAN_DMA
  208. u32 adc_device = ADC0;
  209. int value = 0;
  210. int count = 0;
  211. int min = 0xFFFFF;
  212. int max = -0xFFFFF;
  213. u64 start_time;
  214. adc_channel_length_config(adc_device, ADC_REGULAR_CHANNEL, 1);
  215. adc_regular_channel_config(adc_device, 0, channel, ADC_REGCHAN_SAMPLE_TIME);
  216. while(count < times){
  217. restart:
  218. start_time = shark_get_mseconds();
  219. adc_software_trigger_enable(adc_device, ADC_REGULAR_CHANNEL);
  220. while(SET != adc_flag_get(adc_device, ADC_FLAG_EOC)){
  221. if (shark_get_mseconds() - start_time >= 2){
  222. goto restart;
  223. }
  224. };
  225. int one = adc_regular_data_read(adc_device);
  226. adc_flag_clear(adc_device, ADC_FLAG_EOC);
  227. value += (one & 0xFFF);
  228. count ++;
  229. if (one > max){
  230. max = one;
  231. }
  232. if (one < min) {
  233. min = one;
  234. }
  235. }
  236. if (times <= 2) {
  237. return value/times;
  238. }
  239. return (value - min - max)/(times-2);
  240. #else
  241. return 0;
  242. #endif
  243. }