adc.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471
  1. #include "bsp/bsp_driver.h"
  2. #include "libs/utils.h"
  3. #include "os/os_task.h"
  4. #include "libs/logger.h"
  5. #include "math/fast_math.h"
  6. #ifdef CONFIG_BOARD_MCXXX
  7. #if (CONFIG_HW_VERSION==2)
  8. #define ADC01_NUM (8)
  9. #define ADC2_NUM 4
  10. #define MOS_TEMP_BUFF_IDX 0
  11. #define VREF5v_BUFF_IDX 1
  12. #define VBUS_I_BUFF_IDX 2
  13. #define U_VOL_BUFF_IDX 3
  14. #define V_VOL_BUFF_IDX 4
  15. #define W_VOL_BUFF_IDX 5
  16. #define VREF_BUFF_IDX 7
  17. #define VBUS_V_BUFF_IDX 8
  18. #define ACC_V_BUFF_IDX 9
  19. #define THROTTLE_BUFF_IDX 10
  20. #define MOTOR_TEMP_BUFF_IDX 11
  21. #elif (CONFIG_HW_VERSION==3)
  22. #define ADC1_NUM 9
  23. #define ADC2_NUM 9
  24. #define MOS_TEMP_BUFF_IDX 0
  25. #define VBUS_V_BUFF_IDX 1
  26. #define MOTOR_TEMP_BUFF_IDX 2
  27. #define ACC_V_BUFF_IDX 3
  28. #define THROTTLE_BUFF_IDX 4
  29. #define VBUS_I_BUFF_IDX 5
  30. #define THROTTLE2_BUFF_IDX 6
  31. #define V_VOL_BUFF_IDX 7
  32. //zero chan 8
  33. #define W_VOL_BUFF_IDX 9
  34. #define VREF_BUFF_IDX 10
  35. //zero chan 11
  36. #define THROTTLE2_5V_BUFF_IDX 12
  37. #define THROTTLE_5V_BUFF_IDX 13
  38. #define U_VOL_BUFF_IDX 14
  39. //zero chan 15
  40. //zero chan 16
  41. #define VREF5v_BUFF_IDX 17
  42. #endif
  43. #endif
  44. #define REG_CHAN_NUM (ADC1_NUM + ADC2_NUM)
  45. u16 adc_buffer[REG_CHAN_NUM];
  46. float vref_adc = 1408.0f;
  47. float vref_5v_adc = 3095.0f;
  48. static void analog_gpio_init(gpio_type *gpiox, u32 pin) {
  49. gpio_init_type gpio_init_struct = {0};
  50. /* gpio configuration */
  51. gpio_default_para_init(&gpio_init_struct);
  52. gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
  53. gpio_init_struct.gpio_pins = pin;
  54. gpio_init(gpiox, &gpio_init_struct);
  55. }
  56. static void adc01_dma_init(void)
  57. {
  58. dma_init_type dma_init_struct;
  59. /* dma clock configuration */
  60. crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
  61. /* dma configuration */
  62. dma_reset(DMA1_CHANNEL1);
  63. dma_default_para_init(&dma_init_struct);
  64. dma_init_struct.buffer_size = REG_CHAN_NUM/2;
  65. dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
  66. dma_init_struct.memory_base_addr = (uint32_t)adc_buffer;
  67. dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
  68. dma_init_struct.memory_inc_enable = TRUE;
  69. dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
  70. dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
  71. dma_init_struct.peripheral_inc_enable = FALSE;
  72. dma_init_struct.priority = DMA_PRIORITY_HIGH;
  73. dma_init_struct.loop_mode_enable = TRUE;
  74. dma_init(DMA1_CHANNEL1, &dma_init_struct);
  75. dma_channel_enable(DMA1_CHANNEL1, TRUE);
  76. }
  77. static void adc0_init(void){
  78. adc_base_config_type adc_base_struct;
  79. /* adc clock configuration */
  80. crm_adc_clock_div_set(CRM_ADC_DIV_8); /* PCLK2 Max. CLK = 100M Hz, ADC_CLK = 100/4 = 25M Hz */
  81. crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
  82. crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
  83. adc_reset(ADC1);
  84. adc_reset(ADC2);
  85. adc_base_struct.sequence_mode = TRUE;
  86. adc_base_struct.repeat_mode = TRUE;
  87. adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
  88. adc_base_struct.ordinary_channel_length = ADC1_NUM;
  89. adc_base_config(ADC1, &adc_base_struct);
  90. adc_base_config(ADC2, &adc_base_struct);
  91. /* ordinary channel configuration */
  92. adc_ordinary_channel_set(ADC1, MOS_TEMP_ADC_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
  93. adc_ordinary_channel_set(ADC1, MOTOR_TEMP_ADC_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
  94. adc_ordinary_channel_set(ADC1, THROTTLE_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
  95. adc_ordinary_channel_set(ADC1, THROTTLE2_CHAN, 4, ADC_REGCHAN_SAMPLE_TIME);
  96. adc_ordinary_channel_set(ADC1, ZERO_ADC_CHAN, 5, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  97. adc_ordinary_channel_set(ADC1, ADC_CHANNEL_17, 6, ADC_REGCHAN_SAMPLE_TIME); //mcu内部vref
  98. adc_ordinary_channel_set(ADC1, THROTTLE2_5V_CHAN, 7, ADC_REGCHAN_SAMPLE_TIME);
  99. adc_ordinary_channel_set(ADC1, U_VOL_ADC_CHAN, 8, ADC_REGCHAN_SAMPLE_TIME);
  100. adc_ordinary_channel_set(ADC1, ZERO_ADC_CHAN, 9, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  101. adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
  102. adc_ordinary_channel_set(ADC2, VBUS_V_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
  103. adc_ordinary_channel_set(ADC2, ACC_V_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
  104. adc_ordinary_channel_set(ADC2, VBUS_I_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
  105. adc_ordinary_channel_set(ADC2, V_VOL_ADC_CHAN, 4, ADC_REGCHAN_SAMPLE_TIME);
  106. adc_ordinary_channel_set(ADC2, W_VOL_ADC_CHAN, 5, ADC_REGCHAN_SAMPLE_TIME);
  107. adc_ordinary_channel_set(ADC2, ZERO_ADC_CHAN, 6, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  108. adc_ordinary_channel_set(ADC2, THROTTLE_5V_CHAN, 7, ADC_REGCHAN_SAMPLE_TIME);
  109. adc_ordinary_channel_set(ADC2, ZERO_ADC_CHAN, 8, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  110. adc_ordinary_channel_set(ADC2, DC5V_ADC_CHAN, 9, ADC_REGCHAN_SAMPLE_TIME);
  111. adc_ordinary_conversion_trigger_set(ADC2, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
  112. adc_preempt_channel_length_set(ADC1, 3);
  113. adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 1, ADC_SAMPLE_TIME);
  114. adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 2, ADC_SAMPLE_TIME);
  115. adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 3, ADC_SAMPLE_TIME);
  116. //adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 4, ADC_SAMPLE_TIME);
  117. /* adc prempt trigger source */
  118. adc_preempt_conversion_trigger_set(ADC1, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
  119. adc_preempt_channel_length_set(ADC2, 3);
  120. adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 1, ADC_SAMPLE_TIME);
  121. adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 2, ADC_SAMPLE_TIME);
  122. adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 3, ADC_SAMPLE_TIME);
  123. //adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 4, ADC_SAMPLE_TIME);
  124. /* adc prempt trigger source */
  125. adc_preempt_conversion_trigger_set(ADC2, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
  126. /* select adc mster-slave mode */
  127. adc_combine_mode_select(ADC_ORDINARY_SMLT_PREEMPT_SMLT_MODE);
  128. adc_tempersensor_vintrv_enable(TRUE);
  129. adc_dma_mode_enable(ADC1, TRUE);
  130. adc_dma_mode_enable(ADC2, TRUE);
  131. /* ADC enable and calibration */
  132. adc_enable(ADC1, TRUE);
  133. adc_calibration_init(ADC1);
  134. while(adc_calibration_init_status_get(ADC1));
  135. adc_calibration_start(ADC1);
  136. while(adc_calibration_status_get(ADC1));
  137. adc_enable(ADC2, TRUE);
  138. adc_calibration_init(ADC2);
  139. while(adc_calibration_init_status_get(ADC2));
  140. adc_calibration_start(ADC2);
  141. while(adc_calibration_status_get(ADC2));
  142. nvic_irq_enable(ADC1_2_IRQn, ADC_IRQ_PRIORITY, 0);
  143. adc_disable_ext_trigger();
  144. adc_current_sample_config(0);
  145. adc_ordinary_software_trigger_enable(ADC1, TRUE);
  146. }
  147. static void adc1_init(void){
  148. #if 0
  149. adc_base_config_type adc_base_struct;
  150. /* adc clock configuration */
  151. crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
  152. adc_reset(ADC2);
  153. adc_base_struct.sequence_mode = TRUE;
  154. adc_base_struct.repeat_mode = TRUE;
  155. adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
  156. adc_base_struct.ordinary_channel_length = ADC2_NUM;
  157. adc_base_config(ADC2, &adc_base_struct);
  158. /* ordinary channel configuration */
  159. adc_ordinary_channel_set(ADC2, VBUS_V_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
  160. adc_ordinary_channel_set(ADC2, ACC_V_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
  161. adc_ordinary_channel_set(ADC2, VBUS_I_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
  162. adc_ordinary_channel_set(ADC2, V_VOL_ADC_CHAN, 4, ADC_REGCHAN_SAMPLE_TIME);
  163. adc_ordinary_channel_set(ADC2, W_VOL_ADC_CHAN, 5, ADC_REGCHAN_SAMPLE_TIME);
  164. adc_ordinary_channel_set(ADC2, ZERO_ADC_CHAN, 6, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  165. adc_ordinary_channel_set(ADC2, THROTTLE_5V_CHAN, 7, ADC_REGCHAN_SAMPLE_TIME);
  166. adc_ordinary_channel_set(ADC2, ZERO_ADC_CHAN, 8, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  167. adc_ordinary_channel_set(ADC2, DC5V_ADC_CHAN, 9, ADC_REGCHAN_SAMPLE_TIME);
  168. adc_ordinary_conversion_trigger_set(ADC2, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
  169. adc_preempt_channel_length_set(ADC2, 3);
  170. adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 1, ADC_SAMPLE_TIME);
  171. adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 2, ADC_SAMPLE_TIME);
  172. adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 3, ADC_SAMPLE_TIME);
  173. //adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 4, ADC_SAMPLE_TIME);
  174. /* adc prempt trigger source */
  175. adc_preempt_conversion_trigger_set(ADC2, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
  176. adc_dma_mode_enable(ADC2, TRUE);
  177. /* ADC enable and calibration */
  178. adc_enable(ADC2, TRUE);
  179. adc_calibration_init(ADC2);
  180. while(adc_calibration_init_status_get(ADC2));
  181. adc_calibration_start(ADC2);
  182. while(adc_calibration_status_get(ADC2));
  183. #endif
  184. }
  185. static void adc_gpio_init(void) {
  186. /* configure ADC pin, current sampling -- ADC_IN1(PA1) ADC_IN12(PC2) ADC_IN13(PC3) */
  187. #ifdef U_PHASE_ADC_GROUP
  188. crm_periph_clock_enable(U_PHASE_ADC_RCU, TRUE);
  189. analog_gpio_init(U_PHASE_ADC_GROUP, U_PHASE_ADC_PIN);
  190. #endif
  191. #ifdef V_PHASE_ADC_GROUP
  192. crm_periph_clock_enable(V_PHASE_ADC_RCU, TRUE);
  193. analog_gpio_init(V_PHASE_ADC_GROUP, V_PHASE_ADC_PIN);
  194. #endif
  195. #ifdef W_PHASE_ADC_GROUP
  196. crm_periph_clock_enable(W_PHASE_ADC_RCU, TRUE);
  197. analog_gpio_init(W_PHASE_ADC_GROUP, W_PHASE_ADC_PIN);
  198. #endif
  199. #ifdef VBUS_V_ADC_GROUP
  200. crm_periph_clock_enable(VBUS_V_ADC_RCU, TRUE);
  201. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  202. analog_gpio_init(VBUS_V_ADC_GROUP, VBUS_V_ADC_PIN);
  203. #endif
  204. #ifdef VBUS_I_ADC_GROUP
  205. crm_periph_clock_enable(VBUS_I_ADC_RCU, TRUE);
  206. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  207. analog_gpio_init(VBUS_I_ADC_GROUP, VBUS_I_ADC_PIN);
  208. #endif
  209. #ifdef ACC_V_ADC_GROUP
  210. crm_periph_clock_enable(ACC_V_ADC_RCU, TRUE);
  211. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  212. analog_gpio_init(ACC_V_ADC_GROUP, ACC_V_ADC_PIN);
  213. #endif
  214. #ifdef THROTTLE_V_ADC_GROUP
  215. crm_periph_clock_enable(THROTTLE_V_ADC_RCU, TRUE);
  216. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  217. analog_gpio_init(THROTTLE_V_ADC_GROUP, THROTTLE_V_ADC_PIN);
  218. #endif
  219. #ifdef THROTTLE2_V_ADC_GROUP
  220. crm_periph_clock_enable(THROTTLE2_V_ADC_RCU, TRUE);
  221. analog_gpio_init(THROTTLE2_V_ADC_GROUP, THROTTLE2_V_ADC_PIN);
  222. #endif
  223. #ifdef THROTTLE_5V_ADC_GROUP
  224. crm_periph_clock_enable(THROTTLE_5V_ADC_RCU, TRUE);
  225. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  226. analog_gpio_init(THROTTLE_5V_ADC_GROUP, THROTTLE_5V_ADC_PIN);
  227. #endif
  228. #ifdef THROTTLE2_5V_ADC_GROUP
  229. crm_periph_clock_enable(THROTTLE2_5V_ADC_RCU, TRUE);
  230. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  231. analog_gpio_init(THROTTLE2_5V_ADC_GROUP, THROTTLE2_5V_ADC_PIN);
  232. #endif
  233. #ifdef U_VOL_ADC_GROUP
  234. crm_periph_clock_enable(U_VOL_ADC_RCU, TRUE);
  235. analog_gpio_init(U_VOL_ADC_GROUP, U_VOL_ADC_PIN);
  236. #endif
  237. #ifdef V_VOL_ADC_GROUP
  238. crm_periph_clock_enable(V_VOL_ADC_RCU, TRUE);
  239. analog_gpio_init(V_VOL_ADC_GROUP, V_VOL_ADC_PIN);
  240. #endif
  241. #ifdef W_VOL_ADC_GROUP
  242. crm_periph_clock_enable(W_VOL_ADC_RCU, TRUE);
  243. analog_gpio_init(W_VOL_ADC_GROUP, W_VOL_ADC_PIN);
  244. #endif
  245. #ifdef MOS_TEMP_ADC_GROUP
  246. crm_periph_clock_enable(MOS_TEMP_ADC_RCU, TRUE);
  247. analog_gpio_init(MOS_TEMP_ADC_GROUP, MOS_TEMP_ADC_PIN);
  248. #endif
  249. #ifdef MOS_TEMP1_ADC_GROUP
  250. crm_periph_clock_enable(MOS_TEMP1_ADC_RCU, TRUE);
  251. analog_gpio_init(MOS_TEMP1_ADC_GROUP, MOS_TEMP1_ADC_PIN);
  252. #endif
  253. #ifdef MOTOR_TEMP_ADC_GROUP
  254. crm_periph_clock_enable(MOTOR_TEMP_ADC_RCU, TRUE);
  255. analog_gpio_init(MOTOR_TEMP_ADC_GROUP, MOTOR_TEMP_ADC_PIN);
  256. #endif
  257. #ifdef ZERO_ADC_GROUP
  258. crm_periph_clock_enable(ZERO_ADC_RCU, TRUE);
  259. analog_gpio_init(ZERO_ADC_GROUP, ZERO_ADC_PIN);
  260. #endif
  261. }
  262. void adc_init(void) {
  263. adc_gpio_init();
  264. adc01_dma_init();
  265. adc0_init();
  266. adc1_init();
  267. }
  268. void adc_set_vref_calc(float v) {
  269. vref_adc = v;
  270. }
  271. void adc_set_5vref_calc(float v) {
  272. vref_5v_adc = v;
  273. }
  274. #define VREF_COMP_LFP_CEOF (0.0001F)
  275. static float vref_compestion_filter = 1.0f;
  276. #define VREF_3V3_COMPESTION() (vref_adc/(float)adc_buffer[VREF_BUFF_IDX])
  277. void adc_3v3ref_filter(void) {
  278. float value = VREF_3V3_COMPESTION();
  279. LowPass_Filter(vref_compestion_filter, value, VREF_COMP_LFP_CEOF);
  280. }
  281. float adc_vref_compesion(void) {
  282. return vref_compestion_filter;
  283. }
  284. static float vref_5v_compestion_filter = 1.0f;
  285. #define VREF_5V_COMPESTION() (vref_5v_adc/(float)adc_buffer[VREF5v_BUFF_IDX])
  286. void adc_5vref_filter(void) {
  287. float value = VREF_5V_COMPESTION();
  288. LowPass_Filter(vref_5v_compestion_filter, value, VREF_COMP_LFP_CEOF);
  289. }
  290. float adc_5vref_compesion(void) {
  291. return vref_5v_compestion_filter;
  292. }
  293. void adc_vref_filter(void) {
  294. adc_3v3ref_filter();
  295. adc_5vref_filter();
  296. }
  297. u16 adc_get_vbus(void) {
  298. return (float)adc_buffer[VBUS_V_BUFF_IDX] * VREF_3V3_COMPESTION();
  299. }
  300. u16 adc_get_acc(void) {
  301. #ifdef CONFIG_BOARD_MCXXX
  302. return (float)adc_buffer[ACC_V_BUFF_IDX] * VREF_3V3_COMPESTION();
  303. #else
  304. return adc_get_vbus();
  305. #endif
  306. }
  307. u16 adc_get_ibus(void) {
  308. #ifdef CONFIG_BOARD_MCXXX
  309. return (float)adc_buffer[VBUS_I_BUFF_IDX] * VREF_5V_COMPESTION();
  310. #else
  311. return 0;
  312. #endif
  313. }
  314. u16 adc_get_throttle(void) {
  315. return adc_buffer[THROTTLE_BUFF_IDX] * VREF_3V3_COMPESTION();
  316. }
  317. u16 adc_get_throttle2(void) {
  318. #ifdef THROTTLE2_BUFF_IDX
  319. return adc_buffer[THROTTLE2_BUFF_IDX] * VREF_3V3_COMPESTION();
  320. #else
  321. return adc_get_throttle();
  322. #endif
  323. }
  324. u16 adc_get_thro_5v(void) {
  325. #ifdef THROTTLE_5V_BUFF_IDX
  326. return adc_buffer[THROTTLE_5V_BUFF_IDX] * VREF_3V3_COMPESTION();
  327. #else
  328. return 0;
  329. #endif
  330. }
  331. u16 adc_get_thro2_5v(void) {
  332. #ifdef THROTTLE2_5V_BUFF_IDX
  333. return adc_buffer[THROTTLE2_5V_BUFF_IDX] * VREF_3V3_COMPESTION();
  334. #else
  335. return 0;
  336. #endif
  337. }
  338. void adc_get_uvw_phaseV(u16 *uvw) {
  339. uvw[0] = adc_buffer[U_VOL_BUFF_IDX];
  340. uvw[1] = adc_buffer[V_VOL_BUFF_IDX];
  341. uvw[2] = adc_buffer[W_VOL_BUFF_IDX];
  342. }
  343. u16 adc_get_mos_temp(void) {
  344. return adc_buffer[MOS_TEMP_BUFF_IDX];
  345. }
  346. u16 adc_get_motor_temp(void) {
  347. return adc_buffer[MOTOR_TEMP_BUFF_IDX];
  348. }
  349. u16 adc_get_vref(void) {
  350. #ifdef CONFIG_BOARD_MCXXX
  351. return adc_buffer[VREF_BUFF_IDX];
  352. #else
  353. return 0;
  354. #endif
  355. }
  356. u16 adc_get_5v_ref(void) {
  357. #ifdef CONFIG_BOARD_MCXXX
  358. return adc_buffer[VREF5v_BUFF_IDX];
  359. #else
  360. return 0;
  361. #endif
  362. }
  363. void adc_start_convert(void) {
  364. int drop = 16;
  365. /* clear the ADC flag */
  366. adc_flag_clear(ADC1, ADC_PCCE_FLAG);
  367. adc_flag_clear(ADC2, ADC_PCCE_FLAG);
  368. adc_enable_ext_trigger();
  369. while(drop-- > 0) {
  370. while (adc_flag_get(ADC1, ADC_PCCE_FLAG) == RESET);
  371. adc_flag_clear(ADC1, ADC_PCCE_FLAG);
  372. }
  373. /* enable ADC interrupt */
  374. adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
  375. adc_update_ext_trigger(ADC_TRIGGER_PHASE);
  376. }
  377. void adc_stop_convert(void) {
  378. adc_disable_ext_trigger();
  379. /* disable ADC interrupt */
  380. adc_interrupt_enable(ADC1, ADC_PCCE_INT, FALSE);
  381. /* clear the ADC flag */
  382. adc_flag_clear(ADC1, ADC_PCCE_FLAG);
  383. adc_flag_clear(ADC2, ADC_PCCE_FLAG);
  384. }