adc.c 6.8 KB

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  1. #include "bsp/bsp.h"
  2. #include "bsp/adc.h"
  3. #include "libs/utils.h"
  4. #include "os/os_task.h"
  5. #include "libs/logger.h"
  6. //#define REG_CHAN_DMA 1
  7. #ifdef REG_CHAN_DMA
  8. uint16_t adc_buffer[2] = {0};
  9. static void adc_dma_init(void)
  10. {
  11. dma_parameter_struct dma_init_struct;
  12. rcu_periph_clock_enable(RCU_DMA0);
  13. dma_deinit(DMA0, DMA_CH0);
  14. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  15. dma_init_struct.memory_addr = (uint32_t)adc_buffer;
  16. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  17. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;
  18. dma_init_struct.number = 2;
  19. dma_init_struct.periph_addr = (uint32_t)(&ADC_RDATA(ADC0));
  20. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  21. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
  22. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  23. dma_init(DMA0, DMA_CH0, &dma_init_struct);
  24. dma_circulation_enable(DMA0, DMA_CH0);
  25. dma_memory_to_memory_disable(DMA0, DMA_CH0);
  26. /* enable the full transfer interrupt */
  27. dma_interrupt_flag_clear(DMA0, DMA_CH0, DMA_INT_FLAG_FTF);
  28. dma_interrupt_enable(DMA0, DMA_CH0, DMA_INT_FTF);
  29. dma_channel_enable(DMA0, DMA_CH0);
  30. }
  31. #endif
  32. static void adc0_init(void){
  33. /* config ADC clock */
  34. rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV4); //APB2 clk 120M, adc clk 30M
  35. rcu_periph_clock_enable(RCU_ADC0);
  36. adc_deinit(ADC0);
  37. adc_mode_config(ADC_DAUL_INSERTED_PARALLEL);
  38. adc_special_function_config(ADC0, ADC_SCAN_MODE, DISABLE);
  39. adc_discontinuous_mode_config(ADC0, ADC_CHANNEL_DISCON_DISABLE, 0);
  40. /* configure ADC data alignment */
  41. adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);
  42. /* configure ADC inserted channel length */
  43. adc_channel_length_config(ADC0, ADC_INSERTED_CHANNEL, 1);
  44. adc_inserted_channel_config(ADC0, 0, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  45. adc_update_insert_sample_time(ADC0, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  46. adc_update_insert_sample_time(ADC0, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  47. adc_update_insert_sample_time(ADC0, W_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  48. /* configure ADC inserted channel trigger */
  49. adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL, ADC_TRIGGER_PHASE);
  50. /* ADC external trigger enable */
  51. adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
  52. #ifdef REG_CHAN_DMA
  53. /* configure ADC regular channel */
  54. adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, 2);
  55. adc_regular_channel_config(ADC0, 0, VBUS_V_CHAN, ADC_SAMPLETIME_7POINT5);
  56. adc_regular_channel_config(ADC0, 1, THROTTLE_CHAN, ADC_SAMPLETIME_7POINT5);
  57. #endif
  58. /* configure ADC regular channel trigger */
  59. adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
  60. adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
  61. /* enable ADC interface */
  62. adc_enable(ADC0);
  63. delay_ms(1);
  64. /* ADC calibration and reset calibration */
  65. adc_calibration_enable(ADC0);
  66. nvic_irq_enable(ADC0_1_IRQn, ADC_IRQ_PRIORITY, 0);
  67. adc_disable_ext_trigger();
  68. }
  69. static void adc1_init(void){
  70. rcu_periph_clock_enable(RCU_ADC1);
  71. adc_deinit(ADC1);
  72. adc_special_function_config(ADC1, ADC_SCAN_MODE, DISABLE);
  73. adc_discontinuous_mode_config(ADC1, ADC_CHANNEL_DISCON_DISABLE, 0);
  74. /* configure ADC data alignment */
  75. adc_data_alignment_config(ADC1, ADC_DATAALIGN_RIGHT);
  76. /* configure ADC inserted channel length */
  77. adc_channel_length_config(ADC1, ADC_INSERTED_CHANNEL, 1);
  78. /* configure ADC inserted channel */
  79. adc_inserted_channel_config(ADC1, 0, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  80. adc_update_insert_sample_time(ADC1, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  81. adc_update_insert_sample_time(ADC1, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  82. adc_update_insert_sample_time(ADC1, W_PHASE_I_CHAN, ADC_SAMPLE_TIME);
  83. /* ADC external trigger enable */
  84. adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC_TRIGGER_NONE);
  85. adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
  86. /* enable ADC interface */
  87. adc_enable(ADC1);
  88. delay_ms(1);
  89. /* ADC calibration and reset calibration */
  90. adc_calibration_enable(ADC1);
  91. /* ADC software trigger enable */
  92. adc_software_trigger_enable(ADC1, ADC_INSERTED_CHANNEL);
  93. }
  94. static void adc_gpio_init(void) {
  95. rcu_periph_clock_enable(RCU_GPIOA);
  96. rcu_periph_clock_enable(RCU_GPIOB);
  97. rcu_periph_clock_enable(RCU_AF);
  98. #ifdef GD32_FOC_DEMO
  99. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  100. gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);
  101. /* configure ADC pin, temperature sampling -- ADC_IN11(PC1) */
  102. gpio_init(GPIOC, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_1);
  103. /* configure ADC pin, current sampling -- ADC_IN1(PA1) ADC_IN12(PC2) ADC_IN13(PC3) */
  104. gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_1);
  105. gpio_init(GPIOC, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_2);
  106. gpio_init(GPIOC, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_3);
  107. #else
  108. gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
  109. gpio_init(GPIOB, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0|GPIO_PIN_1);
  110. #endif
  111. }
  112. void adc_init(void) {
  113. adc_gpio_init();
  114. adc0_init();
  115. adc1_init();
  116. #ifdef REG_CHAN_DMA
  117. adc_dma_init();
  118. #endif
  119. }
  120. void adc_start_convert(void) {
  121. int drop = 2;
  122. /* clear the ADC flag */
  123. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  124. adc_flag_clear(ADC1, ADC_FLAG_EOIC);
  125. adc_enable_ext_trigger();
  126. while(drop-- > 0) {
  127. while (adc_flag_get(ADC0, ADC_FLAG_EOIC) == RESET);
  128. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  129. }
  130. /* enable ADC interrupt */
  131. adc_interrupt_enable(ADC0, ADC_INT_EOIC);
  132. adc_update_ext_trigger(ADC_TRIGGER_PHASE);
  133. //adc_enable_ext_trigger();
  134. }
  135. void adc_stop_convert(void) {
  136. adc_disable_ext_trigger();
  137. /* disable ADC interrupt */
  138. adc_interrupt_disable(ADC0, ADC_INT_EOIC);
  139. /* clear the ADC flag */
  140. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  141. adc_flag_clear(ADC1, ADC_FLAG_EOIC);
  142. }
  143. s32 adc_sample_regular_channel(int channel, int times) {
  144. #if 1
  145. u32 adc_device = ADC0;
  146. int value = 0;
  147. int count = 0;
  148. int min = 0xFFFFF;
  149. int max = -0xFFFFF;
  150. u64 start_time;
  151. adc_channel_length_config(adc_device, ADC_REGULAR_CHANNEL, 1);
  152. adc_regular_channel_config(adc_device, 0, channel, ADC_SAMPLETIME_7POINT5);
  153. while(count < times){
  154. restart:
  155. start_time = shark_get_mseconds();
  156. adc_software_trigger_enable(adc_device, ADC_REGULAR_CHANNEL);
  157. while(SET != adc_flag_get(adc_device, ADC_FLAG_EOC)){
  158. if (shark_get_mseconds() - start_time >= 2){
  159. goto restart;
  160. }
  161. };
  162. int one = adc_regular_data_read(adc_device);
  163. adc_flag_clear(adc_device, ADC_FLAG_EOC);
  164. value += (one & 0xFFF);
  165. count ++;
  166. if (one > max){
  167. max = one;
  168. }
  169. if (one < min) {
  170. min = one;
  171. }
  172. }
  173. if (times <= 2) {
  174. return value/times;
  175. }
  176. return (value - min - max)/(times-2);
  177. #else
  178. return 0;
  179. #endif
  180. }