rtGetInf.c 3.4 KB

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  1. /*
  2. * rtGetInf.c
  3. *
  4. * Code generation for model "PMSM_Motor_TL3_sf".
  5. *
  6. * Model version : 1.825
  7. * Simulink Coder version : 9.4 (R2020b) 29-Jul-2020
  8. * C source code generated on : Fri Apr 14 12:51:02 2023
  9. *
  10. * Target selection: rtwsfcn.tlc
  11. * Note: GRT includes extra infrastructure and instrumentation for prototyping
  12. * Embedded hardware selection: ARM Compatible->ARM Cortex-M
  13. * Emulation hardware selection:
  14. * Differs from embedded hardware (MATLAB Host)
  15. * Code generation objectives:
  16. * 1. Execution efficiency
  17. * 2. RAM efficiency
  18. * Validation result: Not run
  19. */
  20. /*
  21. * Abstract:
  22. * Function to initialize non-finite, Inf
  23. */
  24. #include "rtGetInf.h"
  25. #define NumBitsPerChar 8U
  26. /*
  27. * Initialize rtInf needed by the generated code.
  28. * Inf is initialized as non-signaling. Assumes IEEE.
  29. */
  30. real_T rtGetInf(void)
  31. {
  32. size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
  33. real_T inf = 0.0;
  34. if (bitsPerReal == 32U) {
  35. inf = rtGetInfF();
  36. } else {
  37. uint16_T one = 1U;
  38. enum {
  39. LittleEndian,
  40. BigEndian
  41. } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian;
  42. switch (machByteOrder) {
  43. case LittleEndian:
  44. {
  45. union {
  46. LittleEndianIEEEDouble bitVal;
  47. real_T fltVal;
  48. } tmpVal;
  49. tmpVal.bitVal.words.wordH = 0x7FF00000U;
  50. tmpVal.bitVal.words.wordL = 0x00000000U;
  51. inf = tmpVal.fltVal;
  52. break;
  53. }
  54. case BigEndian:
  55. {
  56. union {
  57. BigEndianIEEEDouble bitVal;
  58. real_T fltVal;
  59. } tmpVal;
  60. tmpVal.bitVal.words.wordH = 0x7FF00000U;
  61. tmpVal.bitVal.words.wordL = 0x00000000U;
  62. inf = tmpVal.fltVal;
  63. break;
  64. }
  65. }
  66. }
  67. return inf;
  68. }
  69. /*
  70. * Initialize rtInfF needed by the generated code.
  71. * Inf is initialized as non-signaling. Assumes IEEE.
  72. */
  73. real32_T rtGetInfF(void)
  74. {
  75. IEEESingle infF;
  76. infF.wordL.wordLuint = 0x7F800000U;
  77. return infF.wordL.wordLreal;
  78. }
  79. /*
  80. * Initialize rtMinusInf needed by the generated code.
  81. * Inf is initialized as non-signaling. Assumes IEEE.
  82. */
  83. real_T rtGetMinusInf(void)
  84. {
  85. size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
  86. real_T minf = 0.0;
  87. if (bitsPerReal == 32U) {
  88. minf = rtGetMinusInfF();
  89. } else {
  90. uint16_T one = 1U;
  91. enum {
  92. LittleEndian,
  93. BigEndian
  94. } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian;
  95. switch (machByteOrder) {
  96. case LittleEndian:
  97. {
  98. union {
  99. LittleEndianIEEEDouble bitVal;
  100. real_T fltVal;
  101. } tmpVal;
  102. tmpVal.bitVal.words.wordH = 0xFFF00000U;
  103. tmpVal.bitVal.words.wordL = 0x00000000U;
  104. minf = tmpVal.fltVal;
  105. break;
  106. }
  107. case BigEndian:
  108. {
  109. union {
  110. BigEndianIEEEDouble bitVal;
  111. real_T fltVal;
  112. } tmpVal;
  113. tmpVal.bitVal.words.wordH = 0xFFF00000U;
  114. tmpVal.bitVal.words.wordL = 0x00000000U;
  115. minf = tmpVal.fltVal;
  116. break;
  117. }
  118. }
  119. }
  120. return minf;
  121. }
  122. /*
  123. * Initialize rtMinusInfF needed by the generated code.
  124. * Inf is initialized as non-signaling. Assumes IEEE.
  125. */
  126. real32_T rtGetMinusInfF(void)
  127. {
  128. IEEESingle minfF;
  129. minfF.wordL.wordLuint = 0xFF800000U;
  130. return minfF.wordL.wordLreal;
  131. }