adc.c 20 KB

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  1. #include "bsp/bsp_driver.h"
  2. #include "libs/utils.h"
  3. #include "os/os_task.h"
  4. #include "libs/logger.h"
  5. #include "math/fast_math.h"
  6. #if (CONFIG_MC105_HW_VERSION==2)
  7. #define ADC01_NUM (8)
  8. #define ADC2_NUM 4
  9. #define MOS_TEMP_BUFF_IDX 0
  10. #define VREF5v_BUFF_IDX 1 //需要跳线修改mos的第二路温感采集模拟5v
  11. #define VBUS_I_BUFF_IDX 2
  12. #define U_VOL_BUFF_IDX 3
  13. #define V_VOL_BUFF_IDX 4
  14. #define W_VOL_BUFF_IDX 5
  15. #define VREF_BUFF_IDX 7
  16. #define VBUS_V_BUFF_IDX 8
  17. #define ACC_V_BUFF_IDX 9
  18. #define THROTTLE_BUFF_IDX 10
  19. #define MOTOR_TEMP_BUFF_IDX 11
  20. #define REG_CHAN_NUM (ADC01_NUM + ADC2_NUM)
  21. #define ADC_DUAL_MODE ADC_DAUL_INSERTED_PARALLEL
  22. #elif (CONFIG_MC105_HW_VERSION==3)
  23. #define ADC01_NUM (9)
  24. #define MOS_TEMP_BUFF_IDX 0
  25. #define VBUS_V_BUFF_IDX 1
  26. #define MOTOR_TEMP_BUFF_IDX 2
  27. #define ACC_V_BUFF_IDX 3
  28. #define THROTTLE_BUFF_IDX 4
  29. #define VBUS_I_BUFF_IDX 5
  30. #define THROTTLE2_BUFF_IDX 6
  31. #define V_VOL_BUFF_IDX 7
  32. //zero chan 8
  33. #define W_VOL_BUFF_IDX 9
  34. #define VREF_BUFF_IDX 10
  35. //zero chan 11
  36. #define THROTTLE2_5V_BUFF_IDX 12
  37. #define THROTTLE_5V_BUFF_IDX 13
  38. #define U_VOL_BUFF_IDX 14
  39. //zero chan 15
  40. //zero chan 16
  41. #define VREF5v_BUFF_IDX 17
  42. #define REG_CHAN_NUM (ADC01_NUM + ADC01_NUM)
  43. #define ADC_DUAL_MODE ADC_DAUL_REGULAL_PARALLEL_INSERTED_PARALLEL
  44. #endif
  45. s16 adc_buffer[REG_CHAN_NUM];
  46. float vref_adc = 1408.0f;
  47. float vref_5v_adc = 2047.0f;
  48. #define VREF_ADC_DATA 1509.0F //1498, 1.21/3.3*4095
  49. #if (CONFIG_MC105_HW_VERSION==3)
  50. static void adc01_dma_init(void)
  51. {
  52. dma_parameter_struct dma_init_struct;
  53. rcu_periph_clock_enable(RCU_DMA0);
  54. dma_deinit(DMA0, DMA_CH0);
  55. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  56. dma_init_struct.memory_addr = (uint32_t)adc_buffer;
  57. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  58. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_32BIT;
  59. dma_init_struct.number = REG_CHAN_NUM/2;
  60. dma_init_struct.periph_addr = (uint32_t)(&ADC_RDATA(ADC0));
  61. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  62. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_32BIT;
  63. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  64. dma_init(DMA0, DMA_CH0, &dma_init_struct);
  65. dma_circulation_enable(DMA0, DMA_CH0);
  66. dma_memory_to_memory_disable(DMA0, DMA_CH0);
  67. dma_channel_enable(DMA0, DMA_CH0);
  68. }
  69. #else
  70. static void adc01_dma_init(void)
  71. {
  72. dma_parameter_struct dma_init_struct;
  73. rcu_periph_clock_enable(RCU_DMA0);
  74. dma_deinit(DMA0, DMA_CH0);
  75. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  76. dma_init_struct.memory_addr = (uint32_t)adc_buffer;
  77. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  78. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;
  79. dma_init_struct.number = REG_CHAN_NUM;
  80. dma_init_struct.periph_addr = (uint32_t)(&ADC_RDATA(ADC0));
  81. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  82. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
  83. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  84. dma_init(DMA0, DMA_CH0, &dma_init_struct);
  85. dma_circulation_enable(DMA0, DMA_CH0);
  86. dma_memory_to_memory_disable(DMA0, DMA_CH0);
  87. dma_channel_enable(DMA0, DMA_CH0);
  88. }
  89. #endif
  90. #if (CONFIG_MC105_HW_VERSION==3)
  91. static void adc01_init(void) {
  92. /* config ADC clock */
  93. rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV4); //APB2 clk 120M, adc clk 30M
  94. rcu_periph_clock_enable(RCU_ADC0);
  95. rcu_periph_clock_enable(RCU_ADC1);
  96. adc_deinit(ADC0);
  97. adc_deinit(ADC1);
  98. /* config work mode */
  99. adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);
  100. adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);
  101. adc_special_function_config(ADC1, ADC_CONTINUOUS_MODE, ENABLE);
  102. adc_special_function_config(ADC1, ADC_SCAN_MODE, ENABLE);
  103. /* configure ADC data alignment */
  104. adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);
  105. adc_data_alignment_config(ADC1, ADC_DATAALIGN_RIGHT);
  106. /* configure ADC regular channel */
  107. adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, ADC01_NUM);
  108. adc_regular_channel_config(ADC0, 0, MOS_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  109. adc_regular_channel_config(ADC0, 1, MOTOR_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  110. adc_regular_channel_config(ADC0, 2, THROTTLE_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  111. adc_regular_channel_config(ADC0, 3, THROTTLE2_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  112. adc_regular_channel_config(ADC0, 4, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  113. adc_regular_channel_config(ADC0, 5, ADC_CHANNEL_17, ADC_REGCHAN_SAMPLE_TIME); //mcu内部vref
  114. adc_regular_channel_config(ADC0, 6, THROTTLE2_5V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  115. adc_regular_channel_config(ADC0, 7, U_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  116. adc_regular_channel_config(ADC0, 8, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  117. adc_tempsensor_vrefint_enable();
  118. adc_channel_length_config(ADC1, ADC_REGULAR_CHANNEL, ADC01_NUM);
  119. adc_regular_channel_config(ADC1, 0, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  120. adc_regular_channel_config(ADC1, 1, ACC_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  121. adc_regular_channel_config(ADC1, 2, VBUS_I_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  122. adc_regular_channel_config(ADC1, 3, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  123. adc_regular_channel_config(ADC1, 4, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  124. adc_regular_channel_config(ADC1, 5, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  125. adc_regular_channel_config(ADC1, 6, THROTTLE_5V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  126. adc_regular_channel_config(ADC1, 7, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
  127. adc_regular_channel_config(ADC1, 8, DC5V_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  128. adc_buffer[VREF_BUFF_IDX] = VREF_ADC_DATA; //1.21/3.3*4095
  129. /* configure ADC regular channel trigger */
  130. adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
  131. adc_external_trigger_source_config(ADC1, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
  132. adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
  133. adc_external_trigger_config(ADC1, ADC_REGULAR_CHANNEL, ENABLE);
  134. /* configure ADC inserted channel length */
  135. adc_channel_length_config(ADC0, ADC_INSERTED_CHANNEL, INJ_CHAN_NUM);
  136. adc_inserted_channel_config(ADC0, 0, V_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  137. #if (INJ_CHAN_NUM==4)
  138. adc_inserted_channel_config(ADC0, 1, W_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  139. adc_inserted_channel_config(ADC0, 2, V_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  140. adc_inserted_channel_config(ADC0, 3, W_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  141. #endif
  142. adc_channel_length_config(ADC1, ADC_INSERTED_CHANNEL, INJ_CHAN_NUM);
  143. adc_inserted_channel_config(ADC1, 0, W_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  144. #if (INJ_CHAN_NUM==4)
  145. adc_inserted_channel_config(ADC1, 1, V_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  146. adc_inserted_channel_config(ADC1, 2, W_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  147. adc_inserted_channel_config(ADC1, 3, V_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  148. #endif
  149. adc_mode_config(ADC_DUAL_MODE);
  150. /* configure ADC inserted channel trigger */
  151. adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL, ADC_TRIGGER_PHASE);
  152. /* ADC external trigger enable */
  153. adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
  154. /* ADC1 external trigger disable */
  155. adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC_TRIGGER_NONE);
  156. adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
  157. /* enable ADC interface */
  158. adc_enable(ADC0);
  159. delay_ms(1);
  160. /* ADC calibration and reset calibration */
  161. adc_calibration_enable(ADC0);
  162. adc_enable(ADC1);
  163. delay_ms(1);
  164. /* ADC calibration and reset calibration */
  165. adc_calibration_enable(ADC1);
  166. adc_dma_mode_enable(ADC0);
  167. adc_disable_ext_trigger();
  168. nvic_irq_enable(ADC0_1_IRQn, ADC_IRQ_PRIORITY, 0);
  169. //start regular channels
  170. adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);
  171. }
  172. #else
  173. static void adc0_init(void){
  174. /* config ADC clock */
  175. rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV4); //APB2 clk 120M, adc clk 30M
  176. rcu_periph_clock_enable(RCU_ADC0);
  177. adc_deinit(ADC0);
  178. adc_mode_config(ADC_DUAL_MODE);
  179. adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);
  180. adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);
  181. /* configure ADC data alignment */
  182. adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);
  183. /* configure ADC inserted channel length */
  184. adc_channel_length_config(ADC0, ADC_INSERTED_CHANNEL, 1);
  185. //adc_inserted_channel_config(ADC0, 0, U_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  186. #ifdef U_PHASE_I_CHAN
  187. adc_update_insert_sample_time(ADC0, U_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  188. #endif
  189. #ifdef V_PHASE_I_CHAN
  190. adc_update_insert_sample_time(ADC0, V_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  191. #endif
  192. #ifdef W_PHASE_I_CHAN
  193. adc_update_insert_sample_time(ADC0, W_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  194. #endif
  195. #ifdef CONFIG_HW_MUTISAMPLE
  196. adc_oversample_mode_config(ADC0, ADC_OVERSAMPLING_ALL_CONVERT, CONFIG_HW_MUTISAMPLE_SHIFT, CONFIG_HW_MUTISAMPLE);
  197. adc_oversample_mode_enable(ADC0);
  198. #endif
  199. /* configure ADC inserted channel trigger */
  200. adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL, ADC_TRIGGER_PHASE);
  201. /* ADC external trigger enable */
  202. adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
  203. /* configure ADC regular channel */
  204. adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, ADC01_NUM);
  205. #ifndef CONFIG_BOARD_MCXXX
  206. adc_regular_channel_config(ADC0, 0, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  207. adc_regular_channel_config(ADC0, 1, THROTTLE_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  208. adc_regular_channel_config(ADC0, 2, U_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  209. adc_regular_channel_config(ADC0, 3, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  210. adc_regular_channel_config(ADC0, 4, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  211. adc_regular_channel_config(ADC0, 5, MOS_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  212. adc_regular_channel_config(ADC0, 6, MOTOR_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  213. #elif (CONFIG_MC105_HW_VERSION==2)
  214. adc_regular_channel_config(ADC0, 0, MOS_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  215. adc_regular_channel_config(ADC0, 1, MOS_TEMP1_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  216. adc_regular_channel_config(ADC0, 2, VBUS_I_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  217. adc_regular_channel_config(ADC0, 3, U_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  218. adc_regular_channel_config(ADC0, 4, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  219. adc_regular_channel_config(ADC0, 5, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
  220. adc_regular_channel_config(ADC0, 6, ADC_CHANNEL_10, ADC_REGCHAN_SAMPLE_TIME);
  221. adc_regular_channel_config(ADC0, 7, ADC_CHANNEL_17, ADC_REGCHAN_SAMPLE_TIME);
  222. adc_tempsensor_vrefint_enable();
  223. adc_buffer[VREF_BUFF_IDX] = VREF_ADC_DATA; //1.21/3.3*4095
  224. #endif
  225. /* configure ADC regular channel trigger */
  226. adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
  227. adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
  228. adc_dma_mode_enable(ADC0);
  229. /* enable ADC interface */
  230. adc_enable(ADC0);
  231. delay_ms(1);
  232. /* ADC calibration and reset calibration */
  233. adc_calibration_enable(ADC0);
  234. nvic_irq_enable(ADC0_1_IRQn, ADC_IRQ_PRIORITY, 0);
  235. adc_disable_ext_trigger();
  236. }
  237. static void adc1_init(void){
  238. rcu_periph_clock_enable(RCU_ADC1);
  239. adc_deinit(ADC1);
  240. adc_special_function_config(ADC1, ADC_CONTINUOUS_MODE, ENABLE);
  241. adc_special_function_config(ADC1, ADC_SCAN_MODE, ENABLE);
  242. /* configure ADC data alignment */
  243. adc_data_alignment_config(ADC1, ADC_DATAALIGN_RIGHT);
  244. /* configure ADC inserted channel length */
  245. adc_channel_length_config(ADC1, ADC_INSERTED_CHANNEL, 1);
  246. /* configure ADC inserted channel */
  247. #ifdef U_PHASE_I_CHAN
  248. adc_update_insert_sample_time(ADC1, U_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  249. #endif
  250. #ifdef V_PHASE_I_CHAN
  251. adc_update_insert_sample_time(ADC1, V_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  252. #endif
  253. #ifdef W_PHASE_I_CHAN
  254. adc_update_insert_sample_time(ADC1, W_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
  255. #endif
  256. #ifdef CONFIG_HW_MUTISAMPLE
  257. adc_oversample_mode_config(ADC1, ADC_OVERSAMPLING_ALL_CONVERT, CONFIG_HW_MUTISAMPLE_SHIFT, CONFIG_HW_MUTISAMPLE);
  258. adc_oversample_mode_enable(ADC1);
  259. #endif
  260. /* ADC external trigger enable */
  261. adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC_TRIGGER_NONE);
  262. adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
  263. /* enable ADC interface */
  264. adc_enable(ADC1);
  265. delay_ms(1);
  266. /* ADC calibration and reset calibration */
  267. adc_calibration_enable(ADC1);
  268. }
  269. #endif
  270. static void adc_gpio_init(void) {
  271. rcu_periph_clock_enable(RCU_AF);
  272. /* configure ADC pin, current sampling -- ADC_IN1(PA1) ADC_IN12(PC2) ADC_IN13(PC3) */
  273. #ifdef U_PHASE_ADC_GROUP
  274. rcu_periph_clock_enable(U_PHASE_ADC_RCU);
  275. gpio_init(U_PHASE_ADC_GROUP, U_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, U_PHASE_ADC_PIN);
  276. #endif
  277. #ifdef V_PHASE_ADC_GROUP
  278. rcu_periph_clock_enable(V_PHASE_ADC_RCU);
  279. gpio_init(V_PHASE_ADC_GROUP, V_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, V_PHASE_ADC_PIN);
  280. #endif
  281. #ifdef W_PHASE_ADC_GROUP
  282. rcu_periph_clock_enable(W_PHASE_ADC_RCU);
  283. gpio_init(W_PHASE_ADC_GROUP, W_PHASE_ADC_MODE, GPIO_OSPEED_50MHZ, W_PHASE_ADC_PIN);
  284. #endif
  285. #ifdef VBUS_V_ADC_GROUP
  286. rcu_periph_clock_enable(VBUS_V_ADC_RCU);
  287. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  288. gpio_init(VBUS_V_ADC_GROUP, VBUS_V_ADC_MODE, GPIO_OSPEED_50MHZ, VBUS_V_ADC_PIN);
  289. #endif
  290. #ifdef VBUS_I_ADC_GROUP
  291. rcu_periph_clock_enable(VBUS_I_ADC_RCU);
  292. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  293. gpio_init(VBUS_I_ADC_GROUP, VBUS_I_ADC_MODE, GPIO_OSPEED_50MHZ, VBUS_I_ADC_PIN);
  294. #endif
  295. #ifdef ACC_V_ADC_GROUP
  296. rcu_periph_clock_enable(ACC_V_ADC_RCU);
  297. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  298. gpio_init(ACC_V_ADC_GROUP, ACC_V_ADC_MODE, GPIO_OSPEED_50MHZ, ACC_V_ADC_PIN);
  299. #endif
  300. #ifdef THROTTLE_V_ADC_GROUP
  301. rcu_periph_clock_enable(THROTTLE_V_ADC_RCU);
  302. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  303. gpio_init(THROTTLE_V_ADC_GROUP, THROTTLE_V_ADC_MODE, GPIO_OSPEED_50MHZ, THROTTLE_V_ADC_PIN);
  304. #endif
  305. #ifdef THROTTLE2_V_ADC_GROUP
  306. rcu_periph_clock_enable(THROTTLE2_V_ADC_RCU);
  307. gpio_init(THROTTLE2_V_ADC_GROUP, THROTTLE2_V_ADC_MODE, GPIO_OSPEED_50MHZ, THROTTLE2_V_ADC_PIN);
  308. #endif
  309. #ifdef THROTTLE_5V_ADC_GROUP
  310. rcu_periph_clock_enable(THROTTLE_5V_ADC_RCU);
  311. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  312. gpio_init(THROTTLE_5V_ADC_GROUP, THROTTLE_5V_ADC_MODE, GPIO_OSPEED_50MHZ, THROTTLE_5V_ADC_PIN);
  313. #endif
  314. #ifdef THROTTLE2_5V_ADC_GROUP
  315. rcu_periph_clock_enable(THROTTLE2_5V_ADC_RCU);
  316. /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
  317. gpio_init(THROTTLE2_5V_ADC_GROUP, THROTTLE2_5V_ADC_MODE, GPIO_OSPEED_50MHZ, THROTTLE2_5V_ADC_PIN);
  318. #endif
  319. #ifdef U_VOL_ADC_GROUP
  320. rcu_periph_clock_enable(U_VOL_ADC_RCU);
  321. gpio_init(U_VOL_ADC_GROUP, U_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, U_VOL_ADC_PIN);
  322. #endif
  323. #ifdef V_VOL_ADC_GROUP
  324. rcu_periph_clock_enable(V_VOL_ADC_RCU);
  325. gpio_init(V_VOL_ADC_GROUP, V_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, V_VOL_ADC_PIN);
  326. #endif
  327. #ifdef W_VOL_ADC_GROUP
  328. rcu_periph_clock_enable(W_VOL_ADC_RCU);
  329. gpio_init(W_VOL_ADC_GROUP, W_VOL_ADC_MODE, GPIO_OSPEED_50MHZ, W_VOL_ADC_PIN);
  330. #endif
  331. #ifdef MOS_TEMP_ADC_GROUP
  332. rcu_periph_clock_enable(MOS_TEMP_ADC_RCU);
  333. gpio_init(MOS_TEMP_ADC_GROUP, MOS_TEMP_ADC_MODE, GPIO_OSPEED_50MHZ, MOS_TEMP_ADC_PIN);
  334. #endif
  335. #ifdef MOS_TEMP1_ADC_GROUP
  336. rcu_periph_clock_enable(MOS_TEMP1_ADC_RCU);
  337. gpio_init(MOS_TEMP1_ADC_GROUP, MOS_TEMP1_ADC_MODE, GPIO_OSPEED_50MHZ, MOS_TEMP1_ADC_PIN);
  338. #endif
  339. #ifdef MOTOR_TEMP_ADC_GROUP
  340. rcu_periph_clock_enable(MOTOR_TEMP_ADC_RCU);
  341. gpio_init(MOTOR_TEMP_ADC_GROUP, MOTOR_TEMP_ADC_MODE, GPIO_OSPEED_50MHZ, MOTOR_TEMP_ADC_PIN);
  342. #endif
  343. #ifdef ZERO_ADC_GROUP
  344. rcu_periph_clock_enable(ZERO_ADC_RCU);
  345. gpio_init(ZERO_ADC_GROUP, ZERO_ADC_MODE, GPIO_OSPEED_50MHZ, ZERO_ADC_PIN);
  346. #endif
  347. #ifdef DC5V_ADC_GROUP
  348. rcu_periph_clock_enable(DC5V_ADC_RCU);
  349. gpio_init(DC5V_ADC_GROUP, DC5V_ADC_MODE, GPIO_OSPEED_50MHZ, DC5V_ADC_PIN);
  350. #endif
  351. }
  352. void adc_init(void) {
  353. adc_gpio_init();
  354. adc01_dma_init();
  355. #if (CONFIG_MC105_HW_VERSION==3)
  356. adc01_init();
  357. #else
  358. adc0_init();
  359. adc1_init();
  360. #endif
  361. adc_current_sample_config(0);
  362. }
  363. void adc_set_vref_calc(float v) {
  364. vref_adc = v;
  365. }
  366. void adc_set_5vref_calc(float v) {
  367. vref_5v_adc = v;
  368. }
  369. #define VREF_COMP_LFP_CEOF (0.0001F)
  370. static float vref_compestion_filter = 1.0f;
  371. #define VREF_3V3_COMPESTION() (vref_adc/(float)adc_buffer[VREF_BUFF_IDX])
  372. void adc_3v3ref_filter(void) {
  373. float value = VREF_3V3_COMPESTION();
  374. LowPass_Filter(vref_compestion_filter, value, VREF_COMP_LFP_CEOF);
  375. }
  376. float adc_vref_compesion(void) {
  377. return vref_compestion_filter;
  378. }
  379. static float vref_5v_compestion_filter = 1.0f;
  380. #define VREF_5V_COMPESTION() (vref_5v_adc/(float)adc_buffer[VREF5v_BUFF_IDX])
  381. void adc_5vref_filter(void) {
  382. float value = VREF_5V_COMPESTION();
  383. LowPass_Filter(vref_5v_compestion_filter, value, VREF_COMP_LFP_CEOF);
  384. }
  385. float adc_5vref_compesion(void) {
  386. return vref_5v_compestion_filter;
  387. }
  388. void adc_vref_filter(void) {
  389. adc_3v3ref_filter();
  390. adc_5vref_filter();
  391. }
  392. u16 adc_get_vbus(void) {
  393. return (float)adc_buffer[VBUS_V_BUFF_IDX] * VREF_3V3_COMPESTION();
  394. }
  395. u16 adc_get_acc(void) {
  396. #ifdef CONFIG_BOARD_MCXXX
  397. return (float)adc_buffer[ACC_V_BUFF_IDX] * VREF_3V3_COMPESTION();
  398. #else
  399. return adc_get_vbus();
  400. #endif
  401. }
  402. u16 adc_get_ibus(void) {
  403. #ifdef CONFIG_BOARD_MCXXX
  404. return (float)adc_buffer[VBUS_I_BUFF_IDX] * VREF_5V_COMPESTION();
  405. #else
  406. return 0;
  407. #endif
  408. }
  409. u16 adc_get_throttle(void) {
  410. #if CONFIG_MC105_HW_VERSION==3
  411. if (gpio_board_id() == CONFIG_MC105_VER3_ID2) { //v3 和 V4 adc 通道交换了一下
  412. return adc_buffer[THROTTLE_BUFF_IDX] * VREF_3V3_COMPESTION();
  413. }else {
  414. return adc_buffer[MOTOR_TEMP_BUFF_IDX] * VREF_3V3_COMPESTION();
  415. }
  416. #else
  417. return adc_buffer[THROTTLE_BUFF_IDX] * VREF_3V3_COMPESTION();
  418. #endif
  419. }
  420. u16 adc_get_throttle2(void) {
  421. #ifdef THROTTLE2_BUFF_IDX
  422. return adc_buffer[THROTTLE2_BUFF_IDX] * VREF_3V3_COMPESTION();
  423. #else
  424. return adc_get_throttle();
  425. #endif
  426. }
  427. u16 adc_get_thro_5v(void) {
  428. #ifdef THROTTLE_5V_BUFF_IDX
  429. return adc_buffer[THROTTLE_5V_BUFF_IDX] * VREF_3V3_COMPESTION();
  430. #else
  431. return 0xFFFF;
  432. #endif
  433. }
  434. u16 adc_get_thro2_5v(void) {
  435. #ifdef THROTTLE2_5V_BUFF_IDX
  436. return adc_buffer[THROTTLE2_5V_BUFF_IDX] * VREF_3V3_COMPESTION();
  437. #else
  438. return 0xFFFF;
  439. #endif
  440. }
  441. void adc_get_uvw_phaseV(u16 *uvw) {
  442. uvw[0] = adc_buffer[U_VOL_BUFF_IDX];
  443. uvw[1] = adc_buffer[V_VOL_BUFF_IDX];
  444. uvw[2] = adc_buffer[W_VOL_BUFF_IDX];
  445. }
  446. u16 adc_get_mos_temp(void) {
  447. return adc_buffer[MOS_TEMP_BUFF_IDX];
  448. }
  449. u16 adc_get_motor_temp(void) {
  450. #if CONFIG_MC105_HW_VERSION==3
  451. if (gpio_board_id() == CONFIG_MC105_VER3_ID2) {
  452. return adc_buffer[MOTOR_TEMP_BUFF_IDX];
  453. }else {
  454. return adc_buffer[THROTTLE_BUFF_IDX];
  455. }
  456. #else
  457. return adc_buffer[MOTOR_TEMP_BUFF_IDX];
  458. #endif
  459. }
  460. u16 adc_get_vref(void) {
  461. #ifdef CONFIG_BOARD_MCXXX
  462. return adc_buffer[VREF_BUFF_IDX];
  463. #else
  464. return 0;
  465. #endif
  466. }
  467. u16 adc_get_5v_ref(void) {
  468. #ifdef CONFIG_BOARD_MCXXX
  469. return adc_buffer[VREF5v_BUFF_IDX];
  470. #else
  471. return 0;
  472. #endif
  473. }
  474. void adc_start_convert(void) {
  475. int drop = 16;
  476. /* clear the ADC flag */
  477. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  478. adc_flag_clear(ADC1, ADC_FLAG_EOIC);
  479. adc_enable_ext_trigger();
  480. while(drop-- > 0) {
  481. while (adc_flag_get(ADC0, ADC_FLAG_EOIC) == RESET);
  482. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  483. }
  484. /* enable ADC interrupt */
  485. adc_interrupt_enable(ADC0, ADC_INT_EOIC);
  486. adc_update_ext_trigger(ADC_TRIGGER_PHASE);
  487. }
  488. void adc_stop_convert(void) {
  489. adc_disable_ext_trigger();
  490. /* disable ADC interrupt */
  491. adc_interrupt_disable(ADC0, ADC_INT_EOIC);
  492. /* clear the ADC flag */
  493. adc_flag_clear(ADC0, ADC_FLAG_EOIC);
  494. adc_flag_clear(ADC1, ADC_FLAG_EOIC);
  495. }
  496. s32 adc_sample_regular_channel(int channel, int times) {
  497. #ifndef REG_CHAN_DMA
  498. u32 adc_device = ADC0;
  499. int value = 0;
  500. int count = 0;
  501. int min = 0xFFFFF;
  502. int max = -0xFFFFF;
  503. u64 start_time;
  504. adc_channel_length_config(adc_device, ADC_REGULAR_CHANNEL, 1);
  505. adc_regular_channel_config(adc_device, 0, channel, ADC_REGCHAN_SAMPLE_TIME);
  506. while(count < times){
  507. restart:
  508. start_time = shark_get_mseconds();
  509. adc_software_trigger_enable(adc_device, ADC_REGULAR_CHANNEL);
  510. while(SET != adc_flag_get(adc_device, ADC_FLAG_EOC)){
  511. if (shark_get_mseconds() - start_time >= 2){
  512. goto restart;
  513. }
  514. };
  515. int one = adc_regular_data_read(adc_device);
  516. adc_flag_clear(adc_device, ADC_FLAG_EOC);
  517. value += (one & 0xFFF);
  518. count ++;
  519. if (one > max){
  520. max = one;
  521. }
  522. if (one < min) {
  523. min = one;
  524. }
  525. }
  526. if (times <= 2) {
  527. return value/times;
  528. }
  529. return (value - min - max)/(times-2);
  530. #else
  531. return 0;
  532. #endif
  533. }