at32f413_spi.c 20 KB

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  1. /**
  2. **************************************************************************
  3. * @file at32f413_spi.c
  4. * @brief contains all the functions for the spi firmware library
  5. **************************************************************************
  6. * Copyright notice & Disclaimer
  7. *
  8. * The software Board Support Package (BSP) that is made available to
  9. * download from Artery official website is the copyrighted work of Artery.
  10. * Artery authorizes customers to use, copy, and distribute the BSP
  11. * software and its related documentation for the purpose of design and
  12. * development in conjunction with Artery microcontrollers. Use of the
  13. * software is governed by this copyright notice and the following disclaimer.
  14. *
  15. * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
  16. * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
  17. * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
  18. * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
  19. * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  21. *
  22. **************************************************************************
  23. */
  24. #include "at32f413_conf.h"
  25. /** @addtogroup AT32F413_periph_driver
  26. * @{
  27. */
  28. /** @defgroup SPI
  29. * @brief SPI driver modules
  30. * @{
  31. */
  32. #ifdef SPI_MODULE_ENABLED
  33. /** @defgroup SPI_private_functions
  34. * @{
  35. */
  36. /**
  37. * @brief spi reset by crm reset register
  38. * @param spi_x: select the spi peripheral.
  39. * this parameter can be one of the following values:
  40. * SPI1, SPI2
  41. * @retval none
  42. */
  43. void spi_i2s_reset(spi_type *spi_x)
  44. {
  45. if(spi_x == SPI1)
  46. {
  47. crm_periph_reset(CRM_SPI1_PERIPH_RESET, TRUE);
  48. crm_periph_reset(CRM_SPI1_PERIPH_RESET, FALSE);
  49. }
  50. else if(spi_x == SPI2)
  51. {
  52. crm_periph_reset(CRM_SPI2_PERIPH_RESET, TRUE);
  53. crm_periph_reset(CRM_SPI2_PERIPH_RESET, FALSE);
  54. }
  55. }
  56. /**
  57. * @brief spi init config with its default value.
  58. * @param spi_init_struct : pointer to a spi_init_type structure which will
  59. * be initialized.
  60. * @retval none
  61. */
  62. void spi_default_para_init(spi_init_type* spi_init_struct)
  63. {
  64. spi_init_struct->transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
  65. spi_init_struct->master_slave_mode = SPI_MODE_SLAVE;
  66. spi_init_struct->mclk_freq_division = SPI_MCLK_DIV_2;
  67. spi_init_struct->first_bit_transmission = SPI_FIRST_BIT_MSB;
  68. spi_init_struct->frame_bit_num = SPI_FRAME_8BIT;
  69. spi_init_struct->clock_polarity = SPI_CLOCK_POLARITY_LOW;
  70. spi_init_struct->clock_phase = SPI_CLOCK_PHASE_1EDGE;
  71. spi_init_struct->cs_mode_selection = SPI_CS_SOFTWARE_MODE;
  72. }
  73. /**
  74. * @brief spi init config with its setting value.
  75. * @param spi_x: select the spi peripheral.
  76. * this parameter can be one of the following values:
  77. * SPI1, SPI2
  78. * @param spi_init_struct : pointer to a spi_init_type structure which will be initialized.
  79. * @retval none
  80. */
  81. void spi_init(spi_type* spi_x, spi_init_type* spi_init_struct)
  82. {
  83. spi_x->i2sctrl_bit.i2smsel = FALSE;
  84. if(spi_init_struct->transmission_mode == SPI_TRANSMIT_FULL_DUPLEX)
  85. {
  86. spi_x->ctrl1_bit.slben = FALSE;
  87. spi_x->ctrl1_bit.slbtd = FALSE;
  88. spi_x->ctrl1_bit.ora = FALSE;
  89. }
  90. else if(spi_init_struct->transmission_mode == SPI_TRANSMIT_SIMPLEX_RX)
  91. {
  92. spi_x->ctrl1_bit.slben = FALSE;
  93. spi_x->ctrl1_bit.slbtd = FALSE;
  94. spi_x->ctrl1_bit.ora = TRUE;
  95. }
  96. else if(spi_init_struct->transmission_mode == SPI_TRANSMIT_HALF_DUPLEX_RX)
  97. {
  98. spi_x->ctrl1_bit.slben = TRUE;
  99. spi_x->ctrl1_bit.slbtd = FALSE;
  100. spi_x->ctrl1_bit.ora = FALSE;
  101. }
  102. else if(spi_init_struct->transmission_mode == SPI_TRANSMIT_HALF_DUPLEX_TX)
  103. {
  104. spi_x->ctrl1_bit.slben = TRUE;
  105. spi_x->ctrl1_bit.slbtd = TRUE;
  106. spi_x->ctrl1_bit.ora = FALSE;
  107. }
  108. spi_x->ctrl1_bit.swcsen = spi_init_struct->cs_mode_selection;
  109. if((spi_init_struct->master_slave_mode == SPI_MODE_MASTER) && (spi_init_struct->cs_mode_selection == SPI_CS_SOFTWARE_MODE))
  110. {
  111. spi_x->ctrl1_bit.swcsil = TRUE;
  112. }
  113. else
  114. {
  115. spi_x->ctrl1_bit.swcsil = FALSE;
  116. }
  117. spi_x->ctrl1_bit.msten = spi_init_struct->master_slave_mode;
  118. if(spi_init_struct->mclk_freq_division > SPI_MCLK_DIV_256)
  119. {
  120. spi_x->ctrl2_bit.mdiv_h = 1;
  121. spi_x->ctrl1_bit.mdiv_l = spi_init_struct->mclk_freq_division & 0x7;
  122. }
  123. else
  124. {
  125. spi_x->ctrl2_bit.mdiv_h = 0;
  126. spi_x->ctrl1_bit.mdiv_l = spi_init_struct->mclk_freq_division;
  127. }
  128. spi_x->ctrl1_bit.ltf = spi_init_struct->first_bit_transmission;
  129. spi_x->ctrl1_bit.fbn = spi_init_struct->frame_bit_num;
  130. spi_x->ctrl1_bit.clkpol = spi_init_struct->clock_polarity;
  131. spi_x->ctrl1_bit.clkpha = spi_init_struct->clock_phase;
  132. }
  133. /**
  134. * @brief spi next transmit crc for the spi peripheral.
  135. * @param spi_x: select the spi peripheral.
  136. * this parameter can be one of the following values:
  137. * SPI1, SPI2
  138. * @retval none
  139. */
  140. void spi_crc_next_transmit(spi_type* spi_x)
  141. {
  142. spi_x->ctrl1_bit.ntc = TRUE;
  143. }
  144. /**
  145. * @brief set the crc polynomial value for the spi peripheral.
  146. * @param spi_x: select the spi peripheral.
  147. * this parameter can be one of the following values:
  148. * SPI1, SPI2
  149. * @param crc_poly: crc polynomial value.
  150. * @retval none
  151. */
  152. void spi_crc_polynomial_set(spi_type* spi_x, uint16_t crc_poly)
  153. {
  154. spi_x->cpoly_bit.cpoly = crc_poly;
  155. }
  156. /**
  157. * @brief return the crc polynomial register value for the spi peripheral.
  158. * @param spi_x: select the spi peripheral.
  159. * this parameter can be one of the following values:
  160. * SPI1, SPI2
  161. * @retval the select crc polynomial register value
  162. */
  163. uint16_t spi_crc_polynomial_get(spi_type* spi_x)
  164. {
  165. return spi_x->cpoly_bit.cpoly;
  166. }
  167. /**
  168. * @brief enable or disable the hardware crc calculation for the spi peripheral.
  169. * @param spi_x: select the spi peripheral.
  170. * this parameter can be one of the following values:
  171. * SPI1, SPI2
  172. * @param new_state: new state of crc calculation.
  173. * this parameter can be: TRUE or FALSE.
  174. * @retval none
  175. */
  176. void spi_crc_enable(spi_type* spi_x, confirm_state new_state)
  177. {
  178. spi_x->ctrl1_bit.ccen = new_state;
  179. }
  180. /**
  181. * @brief return the transmit or the receive crc value for the spi peripheral.
  182. * @param spi_x: select the spi peripheral.
  183. * this parameter can be one of the following values:
  184. * SPI1, SPI2
  185. * @param crc_direction: select transmit or receive crc value to be read
  186. * - SPI_CRC_RX
  187. * - SPI_CRC_TX
  188. * @retval the select crc register value
  189. */
  190. uint16_t spi_crc_value_get(spi_type* spi_x, spi_crc_direction_type crc_direction)
  191. {
  192. if(crc_direction == SPI_CRC_RX)
  193. return spi_x->rcrc_bit.rcrc;
  194. else
  195. return spi_x->tcrc_bit.tcrc;
  196. }
  197. /**
  198. * @brief enable or disable the hardware cs output for the spi peripheral.
  199. * @param spi_x: select the spi peripheral.
  200. * this parameter can be one of the following values:
  201. * SPI1, SPI2
  202. * @param new_state: new state of spi master cs output.
  203. * this parameter can be: TRUE or FALSE.
  204. * note:the bit only use in spi master mode
  205. * @retval none
  206. */
  207. void spi_hardware_cs_output_enable(spi_type* spi_x, confirm_state new_state)
  208. {
  209. spi_x->ctrl2_bit.hwcsoe = new_state;
  210. }
  211. /**
  212. * @brief set the software cs internal level for the spi peripheral.
  213. * @param spi_x: select the spi peripheral.
  214. * this parameter can be one of the following values:
  215. * SPI1, SPI2
  216. * @param level: set the state of spi cs level.
  217. * this parameter can be one of the following values:
  218. * - SPI_SWCS_INTERNAL_LEVEL_LOW
  219. * - SPI_SWCS_INTERNAL_LEVEL_HIGHT
  220. * note:the bit only use when swcsen bit is set.
  221. * note:when use this bit,io operation on the cs pin are invalid.
  222. * @retval none
  223. */
  224. void spi_software_cs_internal_level_set(spi_type* spi_x, spi_software_cs_level_type level)
  225. {
  226. spi_x->ctrl1_bit.swcsil = level;
  227. }
  228. /**
  229. * @brief set the data frame bit num for the spi peripheral.
  230. * @param spi_x: select the spi peripheral.
  231. * this parameter can be one of the following values:
  232. * SPI1, SPI2
  233. * @param bit_num: set the data frame size
  234. * - SPI_FRAME_8BIT
  235. * - SPI_FRAME_16BIT
  236. * @retval none
  237. */
  238. void spi_frame_bit_num_set(spi_type* spi_x, spi_frame_bit_num_type bit_num)
  239. {
  240. spi_x->ctrl1_bit.fbn = bit_num;
  241. }
  242. /**
  243. * @brief set the data transmission direction in single line bidirectiona half duplex mode of the spi peripheral.
  244. * @param spi_x: select the spi peripheral.
  245. * this parameter can be one of the following values:
  246. * SPI1, SPI2
  247. * @param direction: data transfer direction
  248. * this parameter can be one of the following values:
  249. * - SPI_HALF_DUPLEX_DIRECTION_RX
  250. * - SPI_HALF_DUPLEX_DIRECTION_TX
  251. * @retval none
  252. */
  253. void spi_half_duplex_direction_set(spi_type* spi_x, spi_half_duplex_direction_type direction)
  254. {
  255. spi_x->ctrl1_bit.slbtd = direction;
  256. }
  257. /**
  258. * @brief enable or disable spi.
  259. * @param spi_x: select the spi peripheral.
  260. * this parameter can be one of the following values:
  261. * SPI1, SPI2
  262. * @param new_state: new state of spi.
  263. * this parameter can be: TRUE or FALSE.
  264. * @retval none
  265. */
  266. void spi_enable(spi_type* spi_x, confirm_state new_state)
  267. {
  268. spi_x->ctrl1_bit.spien = new_state;
  269. }
  270. /**
  271. * @brief i2s init config with its default value.
  272. * @param i2s_init_struct : pointer to a i2s_init_type structure which will
  273. * be initialized.
  274. * @retval none
  275. */
  276. void i2s_default_para_init(i2s_init_type* i2s_init_struct)
  277. {
  278. i2s_init_struct->operation_mode = I2S_MODE_SLAVE_TX;
  279. i2s_init_struct->audio_protocol = I2S_AUDIO_PROTOCOL_PHILLIPS;
  280. i2s_init_struct->audio_sampling_freq = I2S_AUDIO_FREQUENCY_DEFAULT;
  281. i2s_init_struct->data_channel_format = I2S_DATA_16BIT_CHANNEL_16BIT;
  282. i2s_init_struct->clock_polarity = I2S_CLOCK_POLARITY_LOW;
  283. i2s_init_struct->mclk_output_enable = FALSE;
  284. }
  285. /**
  286. * @brief i2s init config with its setting value.
  287. * @param spi_x: select the spi peripheral.
  288. * this parameter can be one of the following values:
  289. * SPI1, SPI2
  290. * @param i2s_init_struct : pointer to a i2s_init_type structure which will be initialized.
  291. * @retval none
  292. */
  293. void i2s_init(spi_type* spi_x, i2s_init_type* i2s_init_struct)
  294. {
  295. crm_clocks_freq_type clocks_freq;
  296. uint32_t i2s_sclk_index = 0;
  297. uint32_t i2sdiv_index = 2, i2sodd_index = 0, frequency_index = 0;
  298. /* i2s audio frequency config */
  299. if(i2s_init_struct->audio_sampling_freq == I2S_AUDIO_FREQUENCY_DEFAULT)
  300. {
  301. i2sodd_index = 0;
  302. i2sdiv_index = 2;
  303. }
  304. else
  305. {
  306. crm_clocks_freq_get(&clocks_freq);
  307. i2s_sclk_index = clocks_freq.sclk_freq;
  308. if((i2s_init_struct->audio_protocol == I2S_AUDIO_PROTOCOL_PCM_SHORT) || (i2s_init_struct->audio_protocol == I2S_AUDIO_PROTOCOL_PCM_LONG))
  309. {
  310. if(i2s_init_struct->mclk_output_enable == TRUE)
  311. {
  312. frequency_index = (((i2s_sclk_index / 128) * 10) / i2s_init_struct->audio_sampling_freq) + 5;
  313. }
  314. else
  315. {
  316. if(i2s_init_struct->data_channel_format == I2S_DATA_16BIT_CHANNEL_16BIT)
  317. frequency_index = (((i2s_sclk_index / 16) * 10) / i2s_init_struct->audio_sampling_freq) + 5;
  318. else
  319. frequency_index = (((i2s_sclk_index / 32) * 10) / i2s_init_struct->audio_sampling_freq) + 5;
  320. }
  321. }
  322. else
  323. {
  324. if(i2s_init_struct->mclk_output_enable == TRUE)
  325. {
  326. frequency_index = (((i2s_sclk_index / 256) * 10) / i2s_init_struct->audio_sampling_freq) + 5;
  327. }
  328. else
  329. {
  330. if(i2s_init_struct->data_channel_format == I2S_DATA_16BIT_CHANNEL_16BIT)
  331. frequency_index = (((i2s_sclk_index / 32) * 10) / i2s_init_struct->audio_sampling_freq) + 5;
  332. else
  333. frequency_index = (((i2s_sclk_index / 64) * 10) / i2s_init_struct->audio_sampling_freq) + 5;
  334. }
  335. }
  336. }
  337. frequency_index = frequency_index / 10;
  338. i2sodd_index = frequency_index & (uint16_t)0x0001;
  339. i2sdiv_index = (frequency_index - i2sodd_index) / 2;
  340. if((i2sdiv_index < 2) || (i2sdiv_index > 0x03FF))
  341. {
  342. i2sodd_index = 0;
  343. i2sdiv_index = 2;
  344. }
  345. spi_x->i2sclk_bit.i2sodd = i2sodd_index;
  346. if(i2sdiv_index > 0x00FF)
  347. {
  348. spi_x->i2sclk_bit.i2sdiv_h = (i2sdiv_index >> 8) & 0x0003;
  349. spi_x->i2sclk_bit.i2sdiv_l = i2sdiv_index & 0x00FF;
  350. }
  351. else
  352. {
  353. spi_x->i2sclk_bit.i2sdiv_h = 0;
  354. spi_x->i2sclk_bit.i2sdiv_l = i2sdiv_index;
  355. }
  356. /* i2s audio_protocol set*/
  357. if(i2s_init_struct->audio_protocol == I2S_AUDIO_PROTOCOL_PCM_LONG)
  358. {
  359. spi_x->i2sctrl_bit.pcmfssel = 1;
  360. spi_x->i2sctrl_bit.stdsel = 3;
  361. }
  362. else if(i2s_init_struct->audio_protocol == I2S_AUDIO_PROTOCOL_PCM_SHORT)
  363. {
  364. spi_x->i2sctrl_bit.pcmfssel = 0;
  365. spi_x->i2sctrl_bit.stdsel = 3;
  366. }
  367. else if(i2s_init_struct->audio_protocol == I2S_AUDIO_PROTOCOL_LSB)
  368. {
  369. spi_x->i2sctrl_bit.pcmfssel = 0;
  370. spi_x->i2sctrl_bit.stdsel = 2;
  371. }
  372. else if(i2s_init_struct->audio_protocol == I2S_AUDIO_PROTOCOL_MSB)
  373. {
  374. spi_x->i2sctrl_bit.pcmfssel = 0;
  375. spi_x->i2sctrl_bit.stdsel = 1;
  376. }
  377. else if(i2s_init_struct->audio_protocol == I2S_AUDIO_PROTOCOL_PHILLIPS)
  378. {
  379. spi_x->i2sctrl_bit.pcmfssel = 0;
  380. spi_x->i2sctrl_bit.stdsel = 0;
  381. }
  382. /* i2s data_channel_format set*/
  383. if(i2s_init_struct->data_channel_format == I2S_DATA_16BIT_CHANNEL_16BIT)
  384. {
  385. spi_x->i2sctrl_bit.i2scbn = 0;
  386. spi_x->i2sctrl_bit.i2sdbn = 0;
  387. }
  388. else if(i2s_init_struct->data_channel_format == I2S_DATA_16BIT_CHANNEL_32BIT)
  389. {
  390. spi_x->i2sctrl_bit.i2scbn = 1;
  391. spi_x->i2sctrl_bit.i2sdbn = 0;
  392. }
  393. else if(i2s_init_struct->data_channel_format == I2S_DATA_24BIT_CHANNEL_32BIT)
  394. {
  395. spi_x->i2sctrl_bit.i2scbn = 1;
  396. spi_x->i2sctrl_bit.i2sdbn = 1;
  397. }
  398. else if(i2s_init_struct->data_channel_format == I2S_DATA_32BIT_CHANNEL_32BIT)
  399. {
  400. spi_x->i2sctrl_bit.i2scbn = 1;
  401. spi_x->i2sctrl_bit.i2sdbn = 2;
  402. }
  403. spi_x->i2sctrl_bit.i2sclkpol = i2s_init_struct->clock_polarity;
  404. spi_x->i2sclk_bit.i2smclkoe = i2s_init_struct->mclk_output_enable;
  405. spi_x->i2sctrl_bit.opersel = i2s_init_struct->operation_mode;
  406. spi_x->i2sctrl_bit.i2smsel = TRUE;
  407. }
  408. /**
  409. * @brief enable or disable i2s.
  410. * @param spi_x: select the i2s peripheral.
  411. * this parameter can be one of the following values:
  412. * SPI1, SPI2
  413. * @param new_state: new state of i2s.
  414. * this parameter can be: TRUE or FALSE.
  415. * @retval none
  416. */
  417. void i2s_enable(spi_type* spi_x, confirm_state new_state)
  418. {
  419. spi_x->i2sctrl_bit.i2sen = new_state;
  420. }
  421. /**
  422. * @brief enable or disable the specified spi/i2s interrupts.
  423. * @param spi_x: select the spi/i2s peripheral.
  424. * this parameter can be one of the following values:
  425. * SPI1, SPI2
  426. * @param spi_i2s_int: specifies the spi/i2s interrupt sources to be enabled or disabled.
  427. * this parameter can be one of the following values:
  428. * - SPI_I2S_ERROR_INT
  429. * - SPI_I2S_RDBF_INT
  430. * - SPI_I2S_TDBE_INT
  431. * @param new_state: new state of the specified spi/i2s interrupts.
  432. * this parameter can be: TRUE or FALSE.
  433. * @retval none
  434. */
  435. void spi_i2s_interrupt_enable(spi_type* spi_x, uint32_t spi_i2s_int, confirm_state new_state)
  436. {
  437. if(new_state != FALSE)
  438. {
  439. spi_x->ctrl2 |= spi_i2s_int;
  440. }
  441. else
  442. {
  443. spi_x->ctrl2 &= ~spi_i2s_int;
  444. }
  445. }
  446. /**
  447. * @brief enable or disable the spi/i2s dma transmitter mode.
  448. * @param spi_x: select the spi/i2s peripheral.
  449. * this parameter can be one of the following values:
  450. * SPI1, SPI2
  451. * @param new_state: new state of the dma request.
  452. * this parameter can be: TRUE or FALSE.
  453. * @retval none
  454. */
  455. void spi_i2s_dma_transmitter_enable(spi_type* spi_x, confirm_state new_state)
  456. {
  457. spi_x->ctrl2_bit.dmaten = new_state;
  458. }
  459. /**
  460. * @brief enable or disable the spi/i2s dma receiver mode.
  461. * @param spi_x: select the spi/i2s peripheral.
  462. * this parameter can be one of the following values:
  463. * SPI1, SPI2
  464. * @param new_state: new state of the dma request.
  465. * this parameter can be: TRUE or FALSE.
  466. * @retval none
  467. */
  468. void spi_i2s_dma_receiver_enable(spi_type* spi_x, confirm_state new_state)
  469. {
  470. spi_x->ctrl2_bit.dmaren = new_state;
  471. }
  472. /**
  473. * @brief spi/i2s data transmit
  474. * @param spi_x: select the spi/i2s peripheral.
  475. * this parameter can be one of the following values:
  476. * SPI1, SPI2
  477. * @param tx_data: the data to be transmit.
  478. * this parameter can be:
  479. * - (0x0000~0xFFFF)
  480. * @retval none
  481. */
  482. void spi_i2s_data_transmit(spi_type* spi_x, uint16_t tx_data)
  483. {
  484. spi_x->dt = tx_data;
  485. }
  486. /**
  487. * @brief spi/i2s data receive
  488. * @param spi_x: select the spi/i2s peripheral.
  489. * this parameter can be one of the following values:
  490. * SPI1, SPI2
  491. * @retval the received data value
  492. */
  493. uint16_t spi_i2s_data_receive(spi_type* spi_x)
  494. {
  495. return (uint16_t)spi_x->dt;
  496. }
  497. /**
  498. * @brief get flag of the specified spi/i2s peripheral.
  499. * @param spi_x: select the spi/i2s peripheral.
  500. * this parameter can be one of the following values:
  501. * SPI1, SPI2
  502. * @param spi_i2s_flag: select the spi/i2s flag
  503. * this parameter can be one of the following values:
  504. * - SPI_I2S_RDBF_FLAG
  505. * - SPI_I2S_TDBE_FLAG
  506. * - I2S_ACS_FLAG (this flag only use in i2s mode)
  507. * - I2S_TUERR_FLAG (this flag only use in i2s mode)
  508. * - SPI_CCERR_FLAG (this flag only use in spi mode)
  509. * - SPI_MMERR_FLAG (this flag only use in spi mode)
  510. * - SPI_I2S_ROERR_FLAG
  511. * - SPI_I2S_BF_FLAG
  512. * @retval the new state of spi/i2s flag
  513. */
  514. flag_status spi_i2s_flag_get(spi_type* spi_x, uint32_t spi_i2s_flag)
  515. {
  516. flag_status status = RESET;
  517. if ((spi_x->sts & spi_i2s_flag) == RESET)
  518. {
  519. status = RESET;
  520. }
  521. else
  522. {
  523. status = SET;
  524. }
  525. return status;
  526. }
  527. /**
  528. * @brief clear flag of the specified spi/i2s peripheral.
  529. * @param spi_x: select the spi/i2s peripheral.
  530. * this parameter can be one of the following values:
  531. * SPI1, SPI2
  532. * @param spi_i2s_flag: select the spi/i2s flag
  533. * this parameter can be one of the following values:
  534. * - SPI_CCERR_FLAG
  535. * - SPI_I2S_RDBF_FLAG
  536. * - I2S_TUERR_FLAG
  537. * - SPI_MMERR_FLAG
  538. * - SPI_I2S_ROERR_FLAG
  539. * @note
  540. * SPI_I2S_TDBE_FLAG this flag is cleared when the tx buffer already contain data to be transmit.
  541. * I2S_ACS_FLAG this flag cann't cleared by software,the flag indicate the channel side(not use in pcm standard mode).
  542. * SPI_I2S_BF_FLAG this flag cann't cleared by software, it's set and cleared by hardware.
  543. * @retval none
  544. */
  545. void spi_i2s_flag_clear(spi_type* spi_x, uint32_t spi_i2s_flag)
  546. {
  547. if(spi_i2s_flag == SPI_CCERR_FLAG)
  548. spi_x->sts = ~SPI_CCERR_FLAG;
  549. else if(spi_i2s_flag == SPI_I2S_RDBF_FLAG)
  550. UNUSED(spi_x->dt);
  551. else if(spi_i2s_flag == I2S_TUERR_FLAG)
  552. UNUSED(spi_x->sts);
  553. else if(spi_i2s_flag == SPI_MMERR_FLAG)
  554. {
  555. UNUSED(spi_x->sts);
  556. spi_x->ctrl1 = spi_x->ctrl1;
  557. }
  558. else if(spi_i2s_flag == SPI_I2S_ROERR_FLAG)
  559. {
  560. UNUSED(spi_x->dt);
  561. UNUSED(spi_x->sts);
  562. }
  563. }
  564. /**
  565. * @}
  566. */
  567. #endif
  568. /**
  569. * @}
  570. */
  571. /**
  572. * @}
  573. */