n32g45x_can.c 47 KB

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  1. /*****************************************************************************
  2. * Copyright (c) 2019, Nations Technologies Inc.
  3. *
  4. * All rights reserved.
  5. * ****************************************************************************
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions are met:
  9. *
  10. * - Redistributions of source code must retain the above copyright notice,
  11. * this list of conditions and the disclaimer below.
  12. *
  13. * Nations' name may not be used to endorse or promote products derived from
  14. * this software without specific prior written permission.
  15. *
  16. * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR
  17. * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  18. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
  19. * DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,
  20. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
  22. * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  23. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  24. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  25. * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26. * ****************************************************************************/
  27. /**
  28. * @file n32g45x_can.c
  29. * @author Nations
  30. * @version v1.0.1
  31. *
  32. * @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
  33. */
  34. #include "n32g45x_can.h"
  35. #include "n32g45x_rcc.h"
  36. /** @addtogroup N32G45X_StdPeriph_Driver
  37. * @{
  38. */
  39. /** @addtogroup CAN
  40. * @brief CAN driver modules
  41. * @{
  42. */
  43. /** @addtogroup CAN_Private_TypesDefinitions
  44. * @{
  45. */
  46. /**
  47. * @}
  48. */
  49. /** @addtogroup CAN_Private_Defines
  50. * @{
  51. */
  52. /* CAN Master Control Register bits */
  53. #define MCTRL_DBGF ((uint32_t)0x00010000) /* Debug freeze */
  54. #define MCTRL_MRST ((uint32_t)0x00010000) /* software master reset */
  55. /* CAN Mailbox Transmit Request */
  56. #define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */
  57. /* CAN Filter Master Register bits */
  58. #define FMC_FINITM ((uint32_t)0x00000001) /* Filter init mode */
  59. /* Time out for INAK bit */
  60. #define INIAK_TIMEOUT ((uint32_t)0x0000FFFF)
  61. /* Time out for SLAK bit */
  62. #define SLPAK_TIMEOUT ((uint32_t)0x0000FFFF)
  63. /* Flags in TSTS register */
  64. #define CAN_FLAGS_TSTS ((uint32_t)0x08000000)
  65. /* Flags in RFF1 register */
  66. #define CAN_FLAGS_RFF1 ((uint32_t)0x04000000)
  67. /* Flags in RFF0 register */
  68. #define CAN_FLAGS_RFF0 ((uint32_t)0x02000000)
  69. /* Flags in MSTS register */
  70. #define CAN_FLAGS_MSTS ((uint32_t)0x01000000)
  71. /* Flags in ESTS register */
  72. #define CAN_FLAGS_ESTS ((uint32_t)0x00F00000)
  73. /* Mailboxes definition */
  74. #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
  75. #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
  76. #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
  77. #define CAN_MODE_MASK ((uint32_t)0x00000003)
  78. /**
  79. * @}
  80. */
  81. /** @addtogroup CAN_Private_Macros
  82. * @{
  83. */
  84. /**
  85. * @}
  86. */
  87. /** @addtogroup CAN_Private_Variables
  88. * @{
  89. */
  90. /**
  91. * @}
  92. */
  93. /** @addtogroup CAN_Private_FunctionPrototypes
  94. * @{
  95. */
  96. static INTStatus CheckINTStatus(uint32_t CAN_Reg, uint32_t Int_Bit);
  97. /**
  98. * @}
  99. */
  100. /** @addtogroup CAN_Private_Functions
  101. * @{
  102. */
  103. /**
  104. * @brief Deinitializes the CAN peripheral registers to their default reset values.
  105. * @param CANx where x can be 1 or 2 to select the CAN peripheral.
  106. */
  107. void CAN_DeInit(CAN_Module* CANx)
  108. {
  109. /* Check the parameters */
  110. assert_param(IS_CAN_ALL_PERIPH(CANx));
  111. if (CANx == CAN1)
  112. {
  113. /* Enable CAN1 reset state */
  114. RCC_EnableAPB1PeriphReset(RCC_APB1_PERIPH_CAN1, ENABLE);
  115. /* Release CAN1 from reset state */
  116. RCC_EnableAPB1PeriphReset(RCC_APB1_PERIPH_CAN1, DISABLE);
  117. }
  118. else
  119. {
  120. /* Enable CAN2 reset state */
  121. RCC_EnableAPB1PeriphReset(RCC_APB1_PERIPH_CAN2, ENABLE);
  122. /* Release CAN2 from reset state */
  123. RCC_EnableAPB1PeriphReset(RCC_APB1_PERIPH_CAN2, DISABLE);
  124. }
  125. }
  126. /**
  127. * @brief Initializes the CAN peripheral according to the specified
  128. * parameters in the CAN_InitParam.
  129. * @param CANx where x can be 1 or 2 to to select the CAN
  130. * peripheral.
  131. * @param CAN_InitParam pointer to a CAN_InitType structure that
  132. * contains the configuration information for the
  133. * CAN peripheral.
  134. * @return Constant indicates initialization succeed which will be
  135. * CAN_InitSTS_Failed or CAN_InitSTS_Success.
  136. */
  137. uint8_t CAN_Init(CAN_Module* CANx, CAN_InitType* CAN_InitParam)
  138. {
  139. uint8_t InitStatus = CAN_InitSTS_Failed;
  140. uint32_t wait_ack = 0x00000000;
  141. /* Check the parameters */
  142. assert_param(IS_CAN_ALL_PERIPH(CANx));
  143. assert_param(IS_FUNCTIONAL_STATE(CAN_InitParam->TTCM));
  144. assert_param(IS_FUNCTIONAL_STATE(CAN_InitParam->ABOM));
  145. assert_param(IS_FUNCTIONAL_STATE(CAN_InitParam->AWKUM));
  146. assert_param(IS_FUNCTIONAL_STATE(CAN_InitParam->NART));
  147. assert_param(IS_FUNCTIONAL_STATE(CAN_InitParam->RFLM));
  148. assert_param(IS_FUNCTIONAL_STATE(CAN_InitParam->TXFP));
  149. assert_param(IS_CAN_MODE(CAN_InitParam->OperatingMode));
  150. assert_param(IS_CAN_RSJW(CAN_InitParam->RSJW));
  151. assert_param(IS_CAN_TBS1(CAN_InitParam->TBS1));
  152. assert_param(IS_CAN_TBS2(CAN_InitParam->TBS2));
  153. assert_param(IS_CAN_BAUDRATEPRESCALER(CAN_InitParam->BaudRatePrescaler));
  154. /* Exit from sleep mode */
  155. CANx->MCTRL &= (~(uint32_t)CAN_MCTRL_SLPRQ);
  156. /* Request initialisation */
  157. CANx->MCTRL |= CAN_MCTRL_INIRQ;
  158. /* Wait the acknowledge */
  159. while (((CANx->MSTS & CAN_MSTS_INIAK) != CAN_MSTS_INIAK) && (wait_ack != INIAK_TIMEOUT))
  160. {
  161. wait_ack++;
  162. }
  163. /* Check acknowledge */
  164. if ((CANx->MSTS & CAN_MSTS_INIAK) != CAN_MSTS_INIAK)
  165. {
  166. InitStatus = CAN_InitSTS_Failed;
  167. }
  168. else
  169. {
  170. /* Set the time triggered communication mode */
  171. if (CAN_InitParam->TTCM == ENABLE)
  172. {
  173. CANx->MCTRL |= CAN_MCTRL_TTCM;
  174. }
  175. else
  176. {
  177. CANx->MCTRL &= ~(uint32_t)CAN_MCTRL_TTCM;
  178. }
  179. /* Set the automatic bus-off management */
  180. if (CAN_InitParam->ABOM == ENABLE)
  181. {
  182. CANx->MCTRL |= CAN_MCTRL_ABOM;
  183. }
  184. else
  185. {
  186. CANx->MCTRL &= ~(uint32_t)CAN_MCTRL_ABOM;
  187. }
  188. /* Set the automatic wake-up mode */
  189. if (CAN_InitParam->AWKUM == ENABLE)
  190. {
  191. CANx->MCTRL |= CAN_MCTRL_AWKUM;
  192. }
  193. else
  194. {
  195. CANx->MCTRL &= ~(uint32_t)CAN_MCTRL_AWKUM;
  196. }
  197. /* Set the no automatic retransmission */
  198. if (CAN_InitParam->NART == ENABLE)
  199. {
  200. CANx->MCTRL |= CAN_MCTRL_NART;
  201. }
  202. else
  203. {
  204. CANx->MCTRL &= ~(uint32_t)CAN_MCTRL_NART;
  205. }
  206. /* Set the receive DATFIFO locked mode */
  207. if (CAN_InitParam->RFLM == ENABLE)
  208. {
  209. CANx->MCTRL |= CAN_MCTRL_RFLM;
  210. }
  211. else
  212. {
  213. CANx->MCTRL &= ~(uint32_t)CAN_MCTRL_RFLM;
  214. }
  215. /* Set the transmit DATFIFO priority */
  216. if (CAN_InitParam->TXFP == ENABLE)
  217. {
  218. CANx->MCTRL |= CAN_MCTRL_TXFP;
  219. }
  220. else
  221. {
  222. CANx->MCTRL &= ~(uint32_t)CAN_MCTRL_TXFP;
  223. }
  224. /* Set the bit timing register */
  225. CANx->BTIM = (uint32_t)((uint32_t)CAN_InitParam->OperatingMode << 30) | ((uint32_t)CAN_InitParam->RSJW << 24)
  226. | ((uint32_t)CAN_InitParam->TBS1 << 16) | ((uint32_t)CAN_InitParam->TBS2 << 20)
  227. | ((uint32_t)CAN_InitParam->BaudRatePrescaler - 1);
  228. /* Request leave initialisation */
  229. CANx->MCTRL &= ~(uint32_t)CAN_MCTRL_INIRQ;
  230. /* Wait the acknowledge */
  231. wait_ack = 0;
  232. while (((CANx->MSTS & CAN_MSTS_INIAK) == CAN_MSTS_INIAK) && (wait_ack != INIAK_TIMEOUT))
  233. {
  234. wait_ack++;
  235. }
  236. /* ...and check acknowledged */
  237. if ((CANx->MSTS & CAN_MSTS_INIAK) == CAN_MSTS_INIAK)
  238. {
  239. InitStatus = CAN_InitSTS_Failed;
  240. }
  241. else
  242. {
  243. InitStatus = CAN_InitSTS_Success;
  244. }
  245. }
  246. /* At this step, return the status of initialization */
  247. return InitStatus;
  248. }
  249. /**
  250. * @brief Initializes the CAN1 peripheral according to the specified
  251. * parameters in the CAN_InitFilterStruct.
  252. * @param CAN_InitFilterStruct pointer to a CAN_FilterInitType
  253. * structure that contains the configuration
  254. * information.
  255. */
  256. void CAN1_InitFilter(CAN_FilterInitType* CAN_InitFilterStruct)
  257. {
  258. uint32_t filter_number_bit_pos = 0;
  259. /* Check the parameters */
  260. assert_param(IS_CAN_FILTER_NUM(CAN_InitFilterStruct->Filter_Num));
  261. assert_param(IS_CAN_FILTER_MODE(CAN_InitFilterStruct->Filter_Mode));
  262. assert_param(IS_CAN_FILTER_SCALE(CAN_InitFilterStruct->Filter_Scale));
  263. assert_param(IS_CAN_FILTER_FIFO(CAN_InitFilterStruct->Filter_FIFOAssignment));
  264. assert_param(IS_FUNCTIONAL_STATE(CAN_InitFilterStruct->Filter_Act));
  265. filter_number_bit_pos = ((uint32_t)1) << CAN_InitFilterStruct->Filter_Num;
  266. /* Initialisation mode for the filter */
  267. CAN1->FMC |= FMC_FINITM;
  268. /* Filter Deactivation */
  269. CAN1->FA1 &= ~(uint32_t)filter_number_bit_pos;
  270. /* Filter Scale */
  271. if (CAN_InitFilterStruct->Filter_Scale == CAN_Filter_16bitScale)
  272. {
  273. /* 16-bit scale for the filter */
  274. CAN1->FS1 &= ~(uint32_t)filter_number_bit_pos;
  275. /* First 16-bit identifier and First 16-bit mask */
  276. /* Or First 16-bit identifier and Second 16-bit identifier */
  277. CAN1->sFilterRegister[CAN_InitFilterStruct->Filter_Num].FR1 =
  278. ((0x0000FFFF & (uint32_t)CAN_InitFilterStruct->FilterMask_LowId) << 16)
  279. | (0x0000FFFF & (uint32_t)CAN_InitFilterStruct->Filter_LowId);
  280. /* Second 16-bit identifier and Second 16-bit mask */
  281. /* Or Third 16-bit identifier and Fourth 16-bit identifier */
  282. CAN1->sFilterRegister[CAN_InitFilterStruct->Filter_Num].FR2 =
  283. ((0x0000FFFF & (uint32_t)CAN_InitFilterStruct->FilterMask_HighId) << 16)
  284. | (0x0000FFFF & (uint32_t)CAN_InitFilterStruct->Filter_HighId);
  285. }
  286. if (CAN_InitFilterStruct->Filter_Scale == CAN_Filter_32bitScale)
  287. {
  288. /* 32-bit scale for the filter */
  289. CAN1->FS1 |= filter_number_bit_pos;
  290. /* 32-bit identifier or First 32-bit identifier */
  291. CAN1->sFilterRegister[CAN_InitFilterStruct->Filter_Num].FR1 =
  292. ((0x0000FFFF & (uint32_t)CAN_InitFilterStruct->Filter_HighId) << 16)
  293. | (0x0000FFFF & (uint32_t)CAN_InitFilterStruct->Filter_LowId);
  294. /* 32-bit mask or Second 32-bit identifier */
  295. CAN1->sFilterRegister[CAN_InitFilterStruct->Filter_Num].FR2 =
  296. ((0x0000FFFF & (uint32_t)CAN_InitFilterStruct->FilterMask_HighId) << 16)
  297. | (0x0000FFFF & (uint32_t)CAN_InitFilterStruct->FilterMask_LowId);
  298. }
  299. /* Filter Mode */
  300. if (CAN_InitFilterStruct->Filter_Mode == CAN_Filter_IdMaskMode)
  301. {
  302. /*Id/Mask mode for the filter*/
  303. CAN1->FM1 &= ~(uint32_t)filter_number_bit_pos;
  304. }
  305. else /* CAN_InitFilterStruct->Filter_Mode == CAN_Filter_IdListMode */
  306. {
  307. /*Identifier list mode for the filter*/
  308. CAN1->FM1 |= (uint32_t)filter_number_bit_pos;
  309. }
  310. /* Filter DATFIFO assignment */
  311. if (CAN_InitFilterStruct->Filter_FIFOAssignment == CAN_Filter_FIFO0)
  312. {
  313. /* DATFIFO 0 assignation for the filter */
  314. CAN1->FFA1 &= ~(uint32_t)filter_number_bit_pos;
  315. }
  316. if (CAN_InitFilterStruct->Filter_FIFOAssignment == CAN_Filter_FIFO1)
  317. {
  318. /* DATFIFO 1 assignation for the filter */
  319. CAN1->FFA1 |= (uint32_t)filter_number_bit_pos;
  320. }
  321. /* Filter activation */
  322. if (CAN_InitFilterStruct->Filter_Act == ENABLE)
  323. {
  324. CAN1->FA1 |= filter_number_bit_pos;
  325. }
  326. /* Leave the initialisation mode for the filter */
  327. CAN1->FMC &= ~FMC_FINITM;
  328. }
  329. /**
  330. * @brief Initializes the CAN2 peripheral according to the specified
  331. * parameters in the CAN_InitFilterStruct.
  332. * @param CAN_InitFilterStruct pointer to a CAN_FilterInitType
  333. * structure that contains the configuration
  334. * information.
  335. */
  336. void CAN2_InitFilter(CAN_FilterInitType* CAN_InitFilterStruct)
  337. {
  338. uint32_t filter_number_bit_pos = 0;
  339. /* Check the parameters */
  340. assert_param(IS_CAN_FILTER_NUM(CAN_InitFilterStruct->Filter_Num));
  341. assert_param(IS_CAN_FILTER_MODE(CAN_InitFilterStruct->Filter_Mode));
  342. assert_param(IS_CAN_FILTER_SCALE(CAN_InitFilterStruct->Filter_Scale));
  343. assert_param(IS_CAN_FILTER_FIFO(CAN_InitFilterStruct->Filter_FIFOAssignment));
  344. assert_param(IS_FUNCTIONAL_STATE(CAN_InitFilterStruct->Filter_Act));
  345. filter_number_bit_pos = ((uint32_t)1) << CAN_InitFilterStruct->Filter_Num;
  346. /* Initialisation mode for the filter */
  347. CAN2->FMC |= FMC_FINITM;
  348. /* Filter Deactivation */
  349. CAN2->FA1 &= ~(uint32_t)filter_number_bit_pos;
  350. /* Filter Scale */
  351. if (CAN_InitFilterStruct->Filter_Scale == CAN_Filter_16bitScale)
  352. {
  353. /* 16-bit scale for the filter */
  354. CAN2->FS1 &= ~(uint32_t)filter_number_bit_pos;
  355. /* First 16-bit identifier and First 16-bit mask */
  356. /* Or First 16-bit identifier and Second 16-bit identifier */
  357. CAN2->sFilterRegister[CAN_InitFilterStruct->Filter_Num].FR1 =
  358. ((0x0000FFFF & (uint32_t)CAN_InitFilterStruct->FilterMask_LowId) << 16)
  359. | (0x0000FFFF & (uint32_t)CAN_InitFilterStruct->Filter_LowId);
  360. /* Second 16-bit identifier and Second 16-bit mask */
  361. /* Or Third 16-bit identifier and Fourth 16-bit identifier */
  362. CAN2->sFilterRegister[CAN_InitFilterStruct->Filter_Num].FR2 =
  363. ((0x0000FFFF & (uint32_t)CAN_InitFilterStruct->FilterMask_HighId) << 16)
  364. | (0x0000FFFF & (uint32_t)CAN_InitFilterStruct->Filter_HighId);
  365. }
  366. if (CAN_InitFilterStruct->Filter_Scale == CAN_Filter_32bitScale)
  367. {
  368. /* 32-bit scale for the filter */
  369. CAN2->FS1 |= filter_number_bit_pos;
  370. /* 32-bit identifier or First 32-bit identifier */
  371. CAN2->sFilterRegister[CAN_InitFilterStruct->Filter_Num].FR1 =
  372. ((0x0000FFFF & (uint32_t)CAN_InitFilterStruct->Filter_HighId) << 16)
  373. | (0x0000FFFF & (uint32_t)CAN_InitFilterStruct->Filter_LowId);
  374. /* 32-bit mask or Second 32-bit identifier */
  375. CAN2->sFilterRegister[CAN_InitFilterStruct->Filter_Num].FR2 =
  376. ((0x0000FFFF & (uint32_t)CAN_InitFilterStruct->FilterMask_HighId) << 16)
  377. | (0x0000FFFF & (uint32_t)CAN_InitFilterStruct->FilterMask_LowId);
  378. }
  379. /* Filter Mode */
  380. if (CAN_InitFilterStruct->Filter_Mode == CAN_Filter_IdMaskMode)
  381. {
  382. /*Id/Mask mode for the filter*/
  383. CAN2->FM1 &= ~(uint32_t)filter_number_bit_pos;
  384. }
  385. else /* CAN_InitFilterStruct->Filter_Mode == CAN_Filter_IdListMode */
  386. {
  387. /*Identifier list mode for the filter*/
  388. CAN2->FM1 |= (uint32_t)filter_number_bit_pos;
  389. }
  390. /* Filter DATFIFO assignment */
  391. if (CAN_InitFilterStruct->Filter_FIFOAssignment == CAN_Filter_FIFO0)
  392. {
  393. /* DATFIFO 0 assignation for the filter */
  394. CAN2->FFA1 &= ~(uint32_t)filter_number_bit_pos;
  395. }
  396. if (CAN_InitFilterStruct->Filter_FIFOAssignment == CAN_Filter_FIFO1)
  397. {
  398. /* DATFIFO 1 assignation for the filter */
  399. CAN2->FFA1 |= (uint32_t)filter_number_bit_pos;
  400. }
  401. /* Filter activation */
  402. if (CAN_InitFilterStruct->Filter_Act == ENABLE)
  403. {
  404. CAN2->FA1 |= filter_number_bit_pos;
  405. }
  406. /* Leave the initialisation mode for the filter */
  407. CAN2->FMC &= ~FMC_FINITM;
  408. }
  409. /**
  410. * @brief Fills each CAN_InitParam member with its default value.
  411. * @param CAN_InitParam pointer to a CAN_InitType structure which
  412. * will be initialized.
  413. */
  414. void CAN_InitStruct(CAN_InitType* CAN_InitParam)
  415. {
  416. /* Reset CAN init structure parameters values */
  417. /* Initialize the time triggered communication mode */
  418. CAN_InitParam->TTCM = DISABLE;
  419. /* Initialize the automatic bus-off management */
  420. CAN_InitParam->ABOM = DISABLE;
  421. /* Initialize the automatic wake-up mode */
  422. CAN_InitParam->AWKUM = DISABLE;
  423. /* Initialize the no automatic retransmission */
  424. CAN_InitParam->NART = DISABLE;
  425. /* Initialize the receive DATFIFO locked mode */
  426. CAN_InitParam->RFLM = DISABLE;
  427. /* Initialize the transmit DATFIFO priority */
  428. CAN_InitParam->TXFP = DISABLE;
  429. /* Initialize the OperatingMode member */
  430. CAN_InitParam->OperatingMode = CAN_Normal_Mode;
  431. /* Initialize the RSJW member */
  432. CAN_InitParam->RSJW = CAN_RSJW_1tq;
  433. /* Initialize the TBS1 member */
  434. CAN_InitParam->TBS1 = CAN_TBS1_4tq;
  435. /* Initialize the TBS2 member */
  436. CAN_InitParam->TBS2 = CAN_TBS2_3tq;
  437. /* Initialize the BaudRatePrescaler member */
  438. CAN_InitParam->BaudRatePrescaler = 1;
  439. }
  440. /**
  441. * @brief Enables or disables the DBG Freeze for CAN.
  442. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  443. * @param Cmd new state of the CAN peripheral. This parameter can
  444. * be: ENABLE or DISABLE.
  445. */
  446. void CAN_DebugFreeze(CAN_Module* CANx, FunctionalState Cmd)
  447. {
  448. /* Check the parameters */
  449. assert_param(IS_CAN_ALL_PERIPH(CANx));
  450. assert_param(IS_FUNCTIONAL_STATE(Cmd));
  451. if (Cmd != DISABLE)
  452. {
  453. /* Enable Debug Freeze */
  454. CANx->MCTRL |= MCTRL_DBGF;
  455. }
  456. else
  457. {
  458. /* Disable Debug Freeze */
  459. CANx->MCTRL &= ~MCTRL_DBGF;
  460. }
  461. }
  462. /**
  463. * @brief Enables or disabes the CAN Time TriggerOperation communication mode.
  464. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  465. * @param Cmd Mode new state , can be one of @ref FunctionalState.
  466. * @note when enabled, Time stamp (TIME[15:0]) value is sent in the last
  467. * two data bytes of the 8-byte message: TIME[7:0] in data byte 6
  468. * and TIME[15:8] in data byte 7
  469. * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be
  470. * sent over the CAN bus.
  471. */
  472. void CAN_EnTTComMode(CAN_Module* CANx, FunctionalState Cmd)
  473. {
  474. /* Check the parameters */
  475. assert_param(IS_CAN_ALL_PERIPH(CANx));
  476. assert_param(IS_FUNCTIONAL_STATE(Cmd));
  477. if (Cmd != DISABLE)
  478. {
  479. /* Enable the TTCM mode */
  480. CANx->MCTRL |= CAN_MCTRL_TTCM;
  481. /* Set TGT bits */
  482. CANx->sTxMailBox[0].TMDT |= ((uint32_t)CAN_TMDT0_TGT);
  483. CANx->sTxMailBox[1].TMDT |= ((uint32_t)CAN_TMDT1_TGT);
  484. CANx->sTxMailBox[2].TMDT |= ((uint32_t)CAN_TMDT2_TGT);
  485. }
  486. else
  487. {
  488. /* Disable the TTCM mode */
  489. CANx->MCTRL &= (uint32_t)(~(uint32_t)CAN_MCTRL_TTCM);
  490. /* Reset TGT bits */
  491. CANx->sTxMailBox[0].TMDT &= ((uint32_t)~CAN_TMDT0_TGT);
  492. CANx->sTxMailBox[1].TMDT &= ((uint32_t)~CAN_TMDT1_TGT);
  493. CANx->sTxMailBox[2].TMDT &= ((uint32_t)~CAN_TMDT2_TGT);
  494. }
  495. }
  496. /**
  497. * @brief Initiates the transmission of a message.
  498. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  499. * @param TxMessage pointer to a structure which contains CAN Id, CAN
  500. * DLC and CAN data.
  501. * @return The number of the mailbox that is used for transmission
  502. * or CAN_TxSTS_NoMailBox if there is no empty mailbox.
  503. */
  504. uint8_t CAN_TransmitMessage(CAN_Module* CANx, CanTxMessage* TxMessage)
  505. {
  506. uint8_t transmit_mailbox = 0;
  507. /* Check the parameters */
  508. assert_param(IS_CAN_ALL_PERIPH(CANx));
  509. assert_param(IS_CAN_ID(TxMessage->IDE));
  510. assert_param(IS_CAN_RTRQ(TxMessage->RTR));
  511. assert_param(IS_CAN_DLC(TxMessage->DLC));
  512. /* Select one empty transmit mailbox */
  513. if ((CANx->TSTS & CAN_TSTS_TMEM0) == CAN_TSTS_TMEM0)
  514. {
  515. transmit_mailbox = 0;
  516. }
  517. else if ((CANx->TSTS & CAN_TSTS_TMEM1) == CAN_TSTS_TMEM1)
  518. {
  519. transmit_mailbox = 1;
  520. }
  521. else if ((CANx->TSTS & CAN_TSTS_TMEM2) == CAN_TSTS_TMEM2)
  522. {
  523. transmit_mailbox = 2;
  524. }
  525. else
  526. {
  527. transmit_mailbox = CAN_TxSTS_NoMailBox;
  528. }
  529. if (transmit_mailbox != CAN_TxSTS_NoMailBox)
  530. {
  531. /* Set up the Id */
  532. CANx->sTxMailBox[transmit_mailbox].TMI &= TMIDxR_TXRQ;
  533. if (TxMessage->IDE == CAN_Standard_Id)
  534. {
  535. assert_param(IS_CAN_STDID(TxMessage->StdId));
  536. CANx->sTxMailBox[transmit_mailbox].TMI |= ((TxMessage->StdId << 21) | TxMessage->RTR);
  537. }
  538. else
  539. {
  540. assert_param(IS_CAN_EXTID(TxMessage->ExtId));
  541. CANx->sTxMailBox[transmit_mailbox].TMI |= ((TxMessage->ExtId << 3) | TxMessage->IDE | TxMessage->RTR);
  542. }
  543. /* Set up the DLC */
  544. TxMessage->DLC &= (uint8_t)0x0000000F;
  545. CANx->sTxMailBox[transmit_mailbox].TMDT &= (uint32_t)0xFFFFFFF0;
  546. CANx->sTxMailBox[transmit_mailbox].TMDT |= TxMessage->DLC;
  547. /* Set up the data field */
  548. CANx->sTxMailBox[transmit_mailbox].TMDL =
  549. (((uint32_t)TxMessage->Data[3] << 24) | ((uint32_t)TxMessage->Data[2] << 16)
  550. | ((uint32_t)TxMessage->Data[1] << 8) | ((uint32_t)TxMessage->Data[0]));
  551. CANx->sTxMailBox[transmit_mailbox].TMDH =
  552. (((uint32_t)TxMessage->Data[7] << 24) | ((uint32_t)TxMessage->Data[6] << 16)
  553. | ((uint32_t)TxMessage->Data[5] << 8) | ((uint32_t)TxMessage->Data[4]));
  554. /* Request transmission */
  555. CANx->sTxMailBox[transmit_mailbox].TMI |= TMIDxR_TXRQ;
  556. }
  557. return transmit_mailbox;
  558. }
  559. /**
  560. * @brief Checks the transmission of a message.
  561. * @param CANx where x can be 1 or 2 to to select the
  562. * CAN peripheral.
  563. * @param TransmitMailbox the number of the mailbox that is used for
  564. * transmission.
  565. * @return CAN_TxSTS_Ok if the CAN driver transmits the message, CAN_TxSTS_Failed
  566. * in an other case.
  567. */
  568. uint8_t CAN_TransmitSTS(CAN_Module* CANx, uint8_t TransmitMailbox)
  569. {
  570. uint32_t state = 0;
  571. /* Check the parameters */
  572. assert_param(IS_CAN_ALL_PERIPH(CANx));
  573. assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
  574. switch (TransmitMailbox)
  575. {
  576. case (CAN_TXMAILBOX_0):
  577. state = CANx->TSTS & (CAN_TSTS_RQCPM0 | CAN_TSTS_TXOKM0 | CAN_TSTS_TMEM0);
  578. break;
  579. case (CAN_TXMAILBOX_1):
  580. state = CANx->TSTS & (CAN_TSTS_RQCPM1 | CAN_TSTS_TXOKM1 | CAN_TSTS_TMEM1);
  581. break;
  582. case (CAN_TXMAILBOX_2):
  583. state = CANx->TSTS & (CAN_TSTS_RQCPM2 | CAN_TSTS_TXOKM2 | CAN_TSTS_TMEM2);
  584. break;
  585. default:
  586. state = CAN_TxSTS_Failed;
  587. break;
  588. }
  589. switch (state)
  590. {
  591. /* transmit pending */
  592. case (0x0):
  593. state = CAN_TxSTS_Pending;
  594. break;
  595. /* transmit failed */
  596. case (CAN_TSTS_RQCPM0 | CAN_TSTS_TMEM0):
  597. state = CAN_TxSTS_Failed;
  598. break;
  599. case (CAN_TSTS_RQCPM1 | CAN_TSTS_TMEM1):
  600. state = CAN_TxSTS_Failed;
  601. break;
  602. case (CAN_TSTS_RQCPM2 | CAN_TSTS_TMEM2):
  603. state = CAN_TxSTS_Failed;
  604. break;
  605. /* transmit succeeded */
  606. case (CAN_TSTS_RQCPM0 | CAN_TSTS_TXOKM0 | CAN_TSTS_TMEM0):
  607. state = CAN_TxSTS_Ok;
  608. break;
  609. case (CAN_TSTS_RQCPM1 | CAN_TSTS_TXOKM1 | CAN_TSTS_TMEM1):
  610. state = CAN_TxSTS_Ok;
  611. break;
  612. case (CAN_TSTS_RQCPM2 | CAN_TSTS_TXOKM2 | CAN_TSTS_TMEM2):
  613. state = CAN_TxSTS_Ok;
  614. break;
  615. default:
  616. state = CAN_TxSTS_Failed;
  617. break;
  618. }
  619. return (uint8_t)state;
  620. }
  621. /**
  622. * @brief Cancels a transmit request.
  623. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  624. * @param Mailbox Mailbox number.
  625. */
  626. void CAN_CancelTransmitMessage(CAN_Module* CANx, uint8_t Mailbox)
  627. {
  628. /* Check the parameters */
  629. assert_param(IS_CAN_ALL_PERIPH(CANx));
  630. assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
  631. /* abort transmission */
  632. switch (Mailbox)
  633. {
  634. case (CAN_TXMAILBOX_0):
  635. CANx->TSTS |= CAN_TSTS_ABRQM0;
  636. break;
  637. case (CAN_TXMAILBOX_1):
  638. CANx->TSTS |= CAN_TSTS_ABRQM1;
  639. break;
  640. case (CAN_TXMAILBOX_2):
  641. CANx->TSTS |= CAN_TSTS_ABRQM2;
  642. break;
  643. default:
  644. break;
  645. }
  646. }
  647. /**
  648. * @brief Receives a message.
  649. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  650. * @param FIFONum Receive DATFIFO number, CAN_FIFO0 or CAN_FIFO1.
  651. * @param RxMessage pointer to a structure receive message which contains
  652. * CAN Id, CAN DLC, CAN datas and FMI number.
  653. */
  654. void CAN_ReceiveMessage(CAN_Module* CANx, uint8_t FIFONum, CanRxMessage* RxMessage)
  655. {
  656. /* Check the parameters */
  657. assert_param(IS_CAN_ALL_PERIPH(CANx));
  658. assert_param(IS_CAN_FIFO(FIFONum));
  659. /* Get the Id */
  660. RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONum].RMI;
  661. if (RxMessage->IDE == CAN_Standard_Id)
  662. {
  663. RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONum].RMI >> 21);
  664. }
  665. else
  666. {
  667. RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONum].RMI >> 3);
  668. }
  669. RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONum].RMI;
  670. /* Get the DLC */
  671. RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONum].RMDT;
  672. /* Get the FMI */
  673. RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDT >> 8);
  674. /* Get the data field */
  675. RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONum].RMDL;
  676. RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDL >> 8);
  677. RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDL >> 16);
  678. RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDL >> 24);
  679. RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONum].RMDH;
  680. RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDH >> 8);
  681. RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDH >> 16);
  682. RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDH >> 24);
  683. /* Release the DATFIFO */
  684. /* Release FIFO0 */
  685. if (FIFONum == CAN_FIFO0)
  686. {
  687. CANx->RFF0 |= CAN_RFF0_RFFOM0;
  688. }
  689. /* Release FIFO1 */
  690. else /* FIFONum == CAN_FIFO1 */
  691. {
  692. CANx->RFF1 |= CAN_RFF1_RFFOM1;
  693. }
  694. }
  695. /**
  696. * @brief Releases the specified DATFIFO.
  697. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  698. * @param FIFONum DATFIFO to release, CAN_FIFO0 or CAN_FIFO1.
  699. */
  700. void CAN_ReleaseFIFO(CAN_Module* CANx, uint8_t FIFONum)
  701. {
  702. /* Check the parameters */
  703. assert_param(IS_CAN_ALL_PERIPH(CANx));
  704. assert_param(IS_CAN_FIFO(FIFONum));
  705. /* Release FIFO0 */
  706. if (FIFONum == CAN_FIFO0)
  707. {
  708. CANx->RFF0 |= CAN_RFF0_RFFOM0;
  709. }
  710. /* Release FIFO1 */
  711. else /* FIFONum == CAN_FIFO1 */
  712. {
  713. CANx->RFF1 |= CAN_RFF1_RFFOM1;
  714. }
  715. }
  716. /**
  717. * @brief Returns the number of pending messages.
  718. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  719. * @param FIFONum Receive DATFIFO number, CAN_FIFO0 or CAN_FIFO1.
  720. * @return NbMessage : which is the number of pending message.
  721. */
  722. uint8_t CAN_PendingMessage(CAN_Module* CANx, uint8_t FIFONum)
  723. {
  724. uint8_t message_pending = 0;
  725. /* Check the parameters */
  726. assert_param(IS_CAN_ALL_PERIPH(CANx));
  727. assert_param(IS_CAN_FIFO(FIFONum));
  728. if (FIFONum == CAN_FIFO0)
  729. {
  730. message_pending = (uint8_t)(CANx->RFF0 & (uint32_t)0x03);
  731. }
  732. else if (FIFONum == CAN_FIFO1)
  733. {
  734. message_pending = (uint8_t)(CANx->RFF1 & (uint32_t)0x03);
  735. }
  736. else
  737. {
  738. message_pending = 0;
  739. }
  740. return message_pending;
  741. }
  742. /**
  743. * @brief Select the CAN Operation mode.
  744. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  745. * @param CAN_OperatingMode CAN Operating Mode. This parameter can be one
  746. * of @ref CAN_operating_mode enumeration.
  747. * @return status of the requested mode which can be
  748. * - CAN_ModeSTS_Failed CAN failed entering the specific mode
  749. * - CAN_ModeSTS_Success CAN Succeed entering the specific mode
  750. */
  751. uint8_t CAN_OperatingModeReq(CAN_Module* CANx, uint8_t CAN_OperatingMode)
  752. {
  753. uint8_t status = CAN_ModeSTS_Failed;
  754. /* Timeout for INAK or also for SLAK bits*/
  755. uint32_t timeout = INIAK_TIMEOUT;
  756. /* Check the parameters */
  757. assert_param(IS_CAN_ALL_PERIPH(CANx));
  758. assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode));
  759. if (CAN_OperatingMode == CAN_Operating_InitMode)
  760. {
  761. /* Request initialisation */
  762. CANx->MCTRL = (uint32_t)((CANx->MCTRL & (uint32_t)(~(uint32_t)CAN_MCTRL_SLPRQ)) | CAN_MCTRL_INIRQ);
  763. /* Wait the acknowledge */
  764. while (((CANx->MSTS & CAN_MODE_MASK) != CAN_MSTS_INIAK) && (timeout != 0))
  765. {
  766. timeout--;
  767. }
  768. if ((CANx->MSTS & CAN_MODE_MASK) != CAN_MSTS_INIAK)
  769. {
  770. status = CAN_ModeSTS_Failed;
  771. }
  772. else
  773. {
  774. status = CAN_ModeSTS_Success;
  775. }
  776. }
  777. else if (CAN_OperatingMode == CAN_Operating_NormalMode)
  778. {
  779. /* Request leave initialisation and sleep mode and enter Normal mode */
  780. CANx->MCTRL &= (uint32_t)(~(CAN_MCTRL_SLPRQ | CAN_MCTRL_INIRQ));
  781. /* Wait the acknowledge */
  782. while (((CANx->MSTS & CAN_MODE_MASK) != 0) && (timeout != 0))
  783. {
  784. timeout--;
  785. }
  786. if ((CANx->MSTS & CAN_MODE_MASK) != 0)
  787. {
  788. status = CAN_ModeSTS_Failed;
  789. }
  790. else
  791. {
  792. status = CAN_ModeSTS_Success;
  793. }
  794. }
  795. else if (CAN_OperatingMode == CAN_Operating_SleepMode)
  796. {
  797. /* Request Sleep mode */
  798. CANx->MCTRL = (uint32_t)((CANx->MCTRL & (uint32_t)(~(uint32_t)CAN_MCTRL_INIRQ)) | CAN_MCTRL_SLPRQ);
  799. /* Wait the acknowledge */
  800. while (((CANx->MSTS & CAN_MODE_MASK) != CAN_MSTS_SLPAK) && (timeout != 0))
  801. {
  802. timeout--;
  803. }
  804. if ((CANx->MSTS & CAN_MODE_MASK) != CAN_MSTS_SLPAK)
  805. {
  806. status = CAN_ModeSTS_Failed;
  807. }
  808. else
  809. {
  810. status = CAN_ModeSTS_Success;
  811. }
  812. }
  813. else
  814. {
  815. status = CAN_ModeSTS_Failed;
  816. }
  817. return (uint8_t)status;
  818. }
  819. /**
  820. * @brief Enters the low power mode.
  821. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  822. * @return status: CAN_SLEEP_Ok if sleep entered, CAN_SLEEP_Failed in an
  823. * other case.
  824. */
  825. uint8_t CAN_EnterSleep(CAN_Module* CANx)
  826. {
  827. uint8_t sleepstatus = CAN_SLEEP_Failed;
  828. /* Check the parameters */
  829. assert_param(IS_CAN_ALL_PERIPH(CANx));
  830. /* Request Sleep mode */
  831. CANx->MCTRL = (((CANx->MCTRL) & (uint32_t)(~(uint32_t)CAN_MCTRL_INIRQ)) | CAN_MCTRL_SLPRQ);
  832. /* Sleep mode status */
  833. if ((CANx->MSTS & (CAN_MSTS_SLPAK | CAN_MSTS_INIAK)) == CAN_MSTS_SLPAK)
  834. {
  835. /* Sleep mode not entered */
  836. sleepstatus = CAN_SLEEP_Ok;
  837. }
  838. /* return sleep mode status */
  839. return (uint8_t)sleepstatus;
  840. }
  841. /**
  842. * @brief Wakes the CAN up.
  843. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  844. * @return status: CAN_WKU_Ok if sleep mode left, CAN_WKU_Failed in an
  845. * other case.
  846. */
  847. uint8_t CAN_WakeUp(CAN_Module* CANx)
  848. {
  849. uint32_t wait_slak = SLPAK_TIMEOUT;
  850. uint8_t wakeupstatus = CAN_WKU_Failed;
  851. /* Check the parameters */
  852. assert_param(IS_CAN_ALL_PERIPH(CANx));
  853. /* Wake up request */
  854. CANx->MCTRL &= ~(uint32_t)CAN_MCTRL_SLPRQ;
  855. /* Sleep mode status */
  856. while (((CANx->MSTS & CAN_MSTS_SLPAK) == CAN_MSTS_SLPAK) && (wait_slak != 0x00))
  857. {
  858. wait_slak--;
  859. }
  860. if ((CANx->MSTS & CAN_MSTS_SLPAK) != CAN_MSTS_SLPAK)
  861. {
  862. /* wake up done : Sleep mode exited */
  863. wakeupstatus = CAN_WKU_Ok;
  864. }
  865. /* return wakeup status */
  866. return (uint8_t)wakeupstatus;
  867. }
  868. /**
  869. * @brief Returns the CANx's last error code (LEC).
  870. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  871. * @return CAN_ErrorCode: specifies the Error code :
  872. * - CAN_ERRORCODE_NoErr No Error
  873. * - CAN_ERRORCODE_StuffErr Stuff Error
  874. * - CAN_ERRORCODE_FormErr Form Error
  875. * - CAN_ERRORCODE_ACKErr Acknowledgment Error
  876. * - CAN_ERRORCODE_BitRecessiveErr Bit Recessive Error
  877. * - CAN_ERRORCODE_BitDominantErr Bit Dominant Error
  878. * - CAN_ERRORCODE_CRCErr CRC Error
  879. * - CAN_ERRORCODE_SoftwareSetErr Software Set Error
  880. */
  881. uint8_t CAN_GetLastErrCode(CAN_Module* CANx)
  882. {
  883. uint8_t errorcode = 0;
  884. /* Check the parameters */
  885. assert_param(IS_CAN_ALL_PERIPH(CANx));
  886. /* Get the error code*/
  887. errorcode = (((uint8_t)CANx->ESTS) & (uint8_t)CAN_ESTS_LEC);
  888. /* Return the error code*/
  889. return errorcode;
  890. }
  891. /**
  892. * @brief Returns the CANx Receive Error Counter (REC).
  893. * @note In case of an error during reception, this counter is incremented
  894. * by 1 or by 8 depending on the error condition as defined by the CAN
  895. * standard. After every successful reception, the counter is
  896. * decremented by 1 or reset to 120 if its value was higher than 128.
  897. * When the counter value exceeds 127, the CAN controller enters the
  898. * error passive state.
  899. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  900. * @return CAN Receive Error Counter.
  901. */
  902. uint8_t CAN_GetReceiveErrCounter(CAN_Module* CANx)
  903. {
  904. uint8_t counter = 0;
  905. /* Check the parameters */
  906. assert_param(IS_CAN_ALL_PERIPH(CANx));
  907. /* Get the Receive Error Counter*/
  908. counter = (uint8_t)((CANx->ESTS & CAN_ESTS_RXEC) >> 24);
  909. /* Return the Receive Error Counter*/
  910. return counter;
  911. }
  912. /**
  913. * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC).
  914. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  915. * @return LSB of the 9-bit CAN Transmit Error Counter.
  916. */
  917. uint8_t CAN_GetLSBTransmitErrCounter(CAN_Module* CANx)
  918. {
  919. uint8_t counter = 0;
  920. /* Check the parameters */
  921. assert_param(IS_CAN_ALL_PERIPH(CANx));
  922. /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
  923. counter = (uint8_t)((CANx->ESTS & CAN_ESTS_TXEC) >> 16);
  924. /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
  925. return counter;
  926. }
  927. /**
  928. * @brief Enables or disables the specified CANx interrupts.
  929. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  930. * @param CAN_INT specifies the CAN interrupt sources to be enabled or disabled.
  931. * This parameter can be:
  932. * - CAN_INT_TME,
  933. * - CAN_INT_FMP0,
  934. * - CAN_INT_FF0,
  935. * - CAN_INT_FOV0,
  936. * - CAN_INT_FMP1,
  937. * - CAN_INT_FF1,
  938. * - CAN_INT_FOV1,
  939. * - CAN_INT_EWG,
  940. * - CAN_INT_EPV,
  941. * - CAN_INT_LEC,
  942. * - CAN_INT_ERR,
  943. * - CAN_INT_WKU or
  944. * - CAN_INT_SLK.
  945. * @param Cmd new state of the CAN interrupts.
  946. * This parameter can be: ENABLE or DISABLE.
  947. */
  948. void CAN_INTConfig(CAN_Module* CANx, uint32_t CAN_INT, FunctionalState Cmd)
  949. {
  950. /* Check the parameters */
  951. assert_param(IS_CAN_ALL_PERIPH(CANx));
  952. assert_param(IS_CAN_INT(CAN_INT));
  953. assert_param(IS_FUNCTIONAL_STATE(Cmd));
  954. if (Cmd != DISABLE)
  955. {
  956. /* Enable the selected CANx interrupt */
  957. CANx->INTE |= CAN_INT;
  958. }
  959. else
  960. {
  961. /* Disable the selected CANx interrupt */
  962. CANx->INTE &= ~CAN_INT;
  963. }
  964. }
  965. /**
  966. * @brief Checks whether the specified CAN flag is set or not.
  967. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  968. * @param CAN_FLAG specifies the flag to check.
  969. * This parameter can be one of the following flags:
  970. * - CAN_FLAG_EWGFL
  971. * - CAN_FLAG_EPVFL
  972. * - CAN_FLAG_BOFFL
  973. * - CAN_FLAG_RQCPM0
  974. * - CAN_FLAG_RQCPM1
  975. * - CAN_FLAG_RQCPM2
  976. * - CAN_FLAG_FFMP1
  977. * - CAN_FLAG_FFULL1
  978. * - CAN_FLAG_FFOVR1
  979. * - CAN_FLAG_FFMP0
  980. * - CAN_FLAG_FFULL0
  981. * - CAN_FLAG_FFOVR0
  982. * - CAN_FLAG_WKU
  983. * - CAN_FLAG_SLAK
  984. * - CAN_FLAG_LEC
  985. * @return The new state of CAN_FLAG (SET or RESET).
  986. */
  987. FlagStatus CAN_GetFlagSTS(CAN_Module* CANx, uint32_t CAN_FLAG)
  988. {
  989. FlagStatus bitstatus = RESET;
  990. /* Check the parameters */
  991. assert_param(IS_CAN_ALL_PERIPH(CANx));
  992. assert_param(IS_CAN_GET_FLAG(CAN_FLAG));
  993. if ((CAN_FLAG & CAN_FLAGS_ESTS) != (uint32_t)RESET)
  994. {
  995. /* Check the status of the specified CAN flag */
  996. if ((CANx->ESTS & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  997. {
  998. /* CAN_FLAG is set */
  999. bitstatus = SET;
  1000. }
  1001. else
  1002. {
  1003. /* CAN_FLAG is reset */
  1004. bitstatus = RESET;
  1005. }
  1006. }
  1007. else if ((CAN_FLAG & CAN_FLAGS_MSTS) != (uint32_t)RESET)
  1008. {
  1009. /* Check the status of the specified CAN flag */
  1010. if ((CANx->MSTS & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1011. {
  1012. /* CAN_FLAG is set */
  1013. bitstatus = SET;
  1014. }
  1015. else
  1016. {
  1017. /* CAN_FLAG is reset */
  1018. bitstatus = RESET;
  1019. }
  1020. }
  1021. else if ((CAN_FLAG & CAN_FLAGS_TSTS) != (uint32_t)RESET)
  1022. {
  1023. /* Check the status of the specified CAN flag */
  1024. if ((CANx->TSTS & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1025. {
  1026. /* CAN_FLAG is set */
  1027. bitstatus = SET;
  1028. }
  1029. else
  1030. {
  1031. /* CAN_FLAG is reset */
  1032. bitstatus = RESET;
  1033. }
  1034. }
  1035. else if ((CAN_FLAG & CAN_FLAGS_RFF0) != (uint32_t)RESET)
  1036. {
  1037. /* Check the status of the specified CAN flag */
  1038. if ((CANx->RFF0 & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1039. {
  1040. /* CAN_FLAG is set */
  1041. bitstatus = SET;
  1042. }
  1043. else
  1044. {
  1045. /* CAN_FLAG is reset */
  1046. bitstatus = RESET;
  1047. }
  1048. }
  1049. else /* If(CAN_FLAG & CAN_FLAGS_RFF1 != (uint32_t)RESET) */
  1050. {
  1051. /* Check the status of the specified CAN flag */
  1052. if ((uint32_t)(CANx->RFF1 & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
  1053. {
  1054. /* CAN_FLAG is set */
  1055. bitstatus = SET;
  1056. }
  1057. else
  1058. {
  1059. /* CAN_FLAG is reset */
  1060. bitstatus = RESET;
  1061. }
  1062. }
  1063. /* Return the CAN_FLAG status */
  1064. return bitstatus;
  1065. }
  1066. /**
  1067. * @brief Clears the CAN's pending flags.
  1068. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  1069. * @param CAN_FLAG specifies the flag to clear.
  1070. * This parameter can be one of the following flags:
  1071. * - CAN_FLAG_RQCPM0
  1072. * - CAN_FLAG_RQCPM1
  1073. * - CAN_FLAG_RQCPM2
  1074. * - CAN_FLAG_FFULL1
  1075. * - CAN_FLAG_FFOVR1
  1076. * - CAN_FLAG_FFULL0
  1077. * - CAN_FLAG_FFOVR0
  1078. * - CAN_FLAG_WKU
  1079. * - CAN_FLAG_SLAK
  1080. * - CAN_FLAG_LEC
  1081. */
  1082. void CAN_ClearFlag(CAN_Module* CANx, uint32_t CAN_FLAG)
  1083. {
  1084. uint32_t flagtmp = 0;
  1085. /* Check the parameters */
  1086. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1087. assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG));
  1088. if (CAN_FLAG == CAN_FLAG_LEC) /* ESTS register */
  1089. {
  1090. /* Clear the selected CAN flags */
  1091. CANx->ESTS = (uint32_t)RESET;
  1092. }
  1093. else /* MSTS or TSTS or RFF0 or RFF1 */
  1094. {
  1095. flagtmp = CAN_FLAG & 0x000FFFFF;
  1096. if ((CAN_FLAG & CAN_FLAGS_RFF0) != (uint32_t)RESET)
  1097. {
  1098. /* Receive Flags */
  1099. CANx->RFF0 = (uint32_t)(flagtmp);
  1100. }
  1101. else if ((CAN_FLAG & CAN_FLAGS_RFF1) != (uint32_t)RESET)
  1102. {
  1103. /* Receive Flags */
  1104. CANx->RFF1 = (uint32_t)(flagtmp);
  1105. }
  1106. else if ((CAN_FLAG & CAN_FLAGS_TSTS) != (uint32_t)RESET)
  1107. {
  1108. /* Transmit Flags */
  1109. CANx->TSTS = (uint32_t)(flagtmp);
  1110. }
  1111. else /* If((CAN_FLAG & CAN_FLAGS_MSTS)!=(uint32_t)RESET) */
  1112. {
  1113. /* Operating mode Flags */
  1114. CANx->MSTS = (uint32_t)(flagtmp);
  1115. }
  1116. }
  1117. }
  1118. /**
  1119. * @brief Checks whether the specified CANx interrupt has occurred or not.
  1120. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  1121. * @param CAN_INT specifies the CAN interrupt source to check.
  1122. * This parameter can be one of the following flags:
  1123. * - CAN_INT_TME
  1124. * - CAN_INT_FMP0
  1125. * - CAN_INT_FF0
  1126. * - CAN_INT_FOV0
  1127. * - CAN_INT_FMP1
  1128. * - CAN_INT_FF1
  1129. * - CAN_INT_FOV1
  1130. * - CAN_INT_WKU
  1131. * - CAN_INT_SLK
  1132. * - CAN_INT_EWG
  1133. * - CAN_INT_EPV
  1134. * - CAN_INT_BOF
  1135. * - CAN_INT_LEC
  1136. * - CAN_INT_ERR
  1137. * @return The current state of CAN_INT (SET or RESET).
  1138. */
  1139. INTStatus CAN_GetIntStatus(CAN_Module* CANx, uint32_t CAN_INT)
  1140. {
  1141. INTStatus itstatus = RESET;
  1142. /* Check the parameters */
  1143. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1144. assert_param(IS_CAN_INT(CAN_INT));
  1145. /* check the enable interrupt bit */
  1146. if ((CANx->INTE & CAN_INT) != RESET)
  1147. {
  1148. /* in case the Interrupt is enabled, .... */
  1149. switch (CAN_INT)
  1150. {
  1151. case CAN_INT_TME:
  1152. /* Check CAN_TSTS_RQCPx bits */
  1153. itstatus = CheckINTStatus(CANx->TSTS, CAN_TSTS_RQCPM0 | CAN_TSTS_RQCPM1 | CAN_TSTS_RQCPM2);
  1154. break;
  1155. case CAN_INT_FMP0:
  1156. /* Check CAN_RFF0_FFMP0 bit */
  1157. itstatus = CheckINTStatus(CANx->RFF0, CAN_RFF0_FFMP0);
  1158. break;
  1159. case CAN_INT_FF0:
  1160. /* Check CAN_RFF0_FFULL0 bit */
  1161. itstatus = CheckINTStatus(CANx->RFF0, CAN_RFF0_FFULL0);
  1162. break;
  1163. case CAN_INT_FOV0:
  1164. /* Check CAN_RFF0_FFOVR0 bit */
  1165. itstatus = CheckINTStatus(CANx->RFF0, CAN_RFF0_FFOVR0);
  1166. break;
  1167. case CAN_INT_FMP1:
  1168. /* Check CAN_RFF1_FFMP1 bit */
  1169. itstatus = CheckINTStatus(CANx->RFF1, CAN_RFF1_FFMP1);
  1170. break;
  1171. case CAN_INT_FF1:
  1172. /* Check CAN_RFF1_FFULL1 bit */
  1173. itstatus = CheckINTStatus(CANx->RFF1, CAN_RFF1_FFULL1);
  1174. break;
  1175. case CAN_INT_FOV1:
  1176. /* Check CAN_RFF1_FFOVR1 bit */
  1177. itstatus = CheckINTStatus(CANx->RFF1, CAN_RFF1_FFOVR1);
  1178. break;
  1179. case CAN_INT_WKU:
  1180. /* Check CAN_MSTS_WKUINT bit */
  1181. itstatus = CheckINTStatus(CANx->MSTS, CAN_MSTS_WKUINT);
  1182. break;
  1183. case CAN_INT_SLK:
  1184. /* Check CAN_MSTS_SLAKINT bit */
  1185. itstatus = CheckINTStatus(CANx->MSTS, CAN_MSTS_SLAKINT);
  1186. break;
  1187. case CAN_INT_EWG:
  1188. /* Check CAN_ESTS_EWGFL bit */
  1189. itstatus = CheckINTStatus(CANx->ESTS, CAN_ESTS_EWGFL);
  1190. break;
  1191. case CAN_INT_EPV:
  1192. /* Check CAN_ESTS_EPVFL bit */
  1193. itstatus = CheckINTStatus(CANx->ESTS, CAN_ESTS_EPVFL);
  1194. break;
  1195. case CAN_INT_BOF:
  1196. /* Check CAN_ESTS_BOFFL bit */
  1197. itstatus = CheckINTStatus(CANx->ESTS, CAN_ESTS_BOFFL);
  1198. break;
  1199. case CAN_INT_LEC:
  1200. /* Check CAN_ESTS_LEC bit */
  1201. itstatus = CheckINTStatus(CANx->ESTS, CAN_ESTS_LEC);
  1202. break;
  1203. case CAN_INT_ERR:
  1204. /* Check CAN_MSTS_ERRINT bit */
  1205. itstatus = CheckINTStatus(CANx->MSTS, CAN_MSTS_ERRINT);
  1206. break;
  1207. default:
  1208. /* in case of error, return RESET */
  1209. itstatus = RESET;
  1210. break;
  1211. }
  1212. }
  1213. else
  1214. {
  1215. /* in case the Interrupt is not enabled, return RESET */
  1216. itstatus = RESET;
  1217. }
  1218. /* Return the CAN_INT status */
  1219. return itstatus;
  1220. }
  1221. /**
  1222. * @brief Clears the CANx's interrupt pending bits.
  1223. * @param CANx where x can be 1 or 2 to to select the CAN peripheral.
  1224. * @param CAN_INT specifies the interrupt pending bit to clear.
  1225. * - CAN_INT_TME
  1226. * - CAN_INT_FF0
  1227. * - CAN_INT_FOV0
  1228. * - CAN_INT_FF1
  1229. * - CAN_INT_FOV1
  1230. * - CAN_INT_WKU
  1231. * - CAN_INT_SLK
  1232. * - CAN_INT_EWG
  1233. * - CAN_INT_EPV
  1234. * - CAN_INT_BOF
  1235. * - CAN_INT_LEC
  1236. * - CAN_INT_ERR
  1237. */
  1238. void CAN_ClearINTPendingBit(CAN_Module* CANx, uint32_t CAN_INT)
  1239. {
  1240. /* Check the parameters */
  1241. assert_param(IS_CAN_ALL_PERIPH(CANx));
  1242. assert_param(IS_CAN_CLEAR_INT(CAN_INT));
  1243. switch (CAN_INT)
  1244. {
  1245. case CAN_INT_TME:
  1246. /* Clear CAN_TSTS_RQCPx (rc_w1)*/
  1247. CANx->TSTS = CAN_TSTS_RQCPM0 | CAN_TSTS_RQCPM1 | CAN_TSTS_RQCPM2;
  1248. break;
  1249. case CAN_INT_FF0:
  1250. /* Clear CAN_RFF0_FFULL0 (rc_w1)*/
  1251. CANx->RFF0 = CAN_RFF0_FFULL0;
  1252. break;
  1253. case CAN_INT_FOV0:
  1254. /* Clear CAN_RFF0_FFOVR0 (rc_w1)*/
  1255. CANx->RFF0 = CAN_RFF0_FFOVR0;
  1256. break;
  1257. case CAN_INT_FF1:
  1258. /* Clear CAN_RFF1_FFULL1 (rc_w1)*/
  1259. CANx->RFF1 = CAN_RFF1_FFULL1;
  1260. break;
  1261. case CAN_INT_FOV1:
  1262. /* Clear CAN_RFF1_FFOVR1 (rc_w1)*/
  1263. CANx->RFF1 = CAN_RFF1_FFOVR1;
  1264. break;
  1265. case CAN_INT_WKU:
  1266. /* Clear CAN_MSTS_WKUINT (rc_w1)*/
  1267. CANx->MSTS = CAN_MSTS_WKUINT;
  1268. break;
  1269. case CAN_INT_SLK:
  1270. /* Clear CAN_MSTS_SLAKINT (rc_w1)*/
  1271. CANx->MSTS = CAN_MSTS_SLAKINT;
  1272. break;
  1273. case CAN_INT_EWG:
  1274. /* Clear CAN_MSTS_ERRINT (rc_w1) */
  1275. CANx->MSTS = CAN_MSTS_ERRINT;
  1276. /* Note : the corresponding Flag is cleared by hardware depending
  1277. of the CAN Bus status*/
  1278. break;
  1279. case CAN_INT_EPV:
  1280. /* Clear CAN_MSTS_ERRINT (rc_w1) */
  1281. CANx->MSTS = CAN_MSTS_ERRINT;
  1282. /* Note : the corresponding Flag is cleared by hardware depending
  1283. of the CAN Bus status*/
  1284. break;
  1285. case CAN_INT_BOF:
  1286. /* Clear CAN_MSTS_ERRINT (rc_w1) */
  1287. CANx->MSTS = CAN_MSTS_ERRINT;
  1288. /* Note : the corresponding Flag is cleared by hardware depending
  1289. of the CAN Bus status*/
  1290. break;
  1291. case CAN_INT_LEC:
  1292. /* Clear LEC bits */
  1293. CANx->ESTS = RESET;
  1294. /* Clear CAN_MSTS_ERRINT (rc_w1) */
  1295. CANx->MSTS = CAN_MSTS_ERRINT;
  1296. break;
  1297. case CAN_INT_ERR:
  1298. /*Clear LEC bits */
  1299. CANx->ESTS = RESET;
  1300. /* Clear CAN_MSTS_ERRINT (rc_w1) */
  1301. CANx->MSTS = CAN_MSTS_ERRINT;
  1302. /* Note : BOFF, EPVF and EWGF Flags are cleared by hardware depending
  1303. of the CAN Bus status*/
  1304. break;
  1305. default:
  1306. break;
  1307. }
  1308. }
  1309. /**
  1310. * @brief Checks whether the CAN interrupt has occurred or not.
  1311. * @param CAN_Reg specifies the CAN interrupt register to check.
  1312. * @param Int_Bit specifies the interrupt source bit to check.
  1313. * @return The new state of the CAN Interrupt (SET or RESET).
  1314. */
  1315. static INTStatus CheckINTStatus(uint32_t CAN_Reg, uint32_t Int_Bit)
  1316. {
  1317. INTStatus pendingbitstatus = RESET;
  1318. if ((CAN_Reg & Int_Bit) != (uint32_t)RESET)
  1319. {
  1320. /* CAN_INT is set */
  1321. pendingbitstatus = SET;
  1322. }
  1323. else
  1324. {
  1325. /* CAN_INT is reset */
  1326. pendingbitstatus = RESET;
  1327. }
  1328. return pendingbitstatus;
  1329. }
  1330. /**
  1331. * @}
  1332. */
  1333. /**
  1334. * @}
  1335. */
  1336. /**
  1337. * @}
  1338. */