cortex-m4.c 1.4 KB

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  1. #include "os/os_type.h"
  2. #include "bsp/bsp.h"
  3. void co_task_tick_init(void){
  4. /* setup systick timer for 1000Hz interrupts */
  5. SysTick_Config(SystemCoreClock / 1000);
  6. /* configure the systick handler priority */
  7. NVIC_SetPriority(SysTick_IRQn, 0x00U);
  8. }
  9. u32 arch_stack_init(u32 *stack_base, u16 stack_size, void *fptr, void *p_arg) {
  10. u32 *p_stk = &stack_base[stack_size];
  11. u32 u_stk = (u32) p_stk;
  12. u_stk = u_stk & 0xFFFFFFFF8;
  13. p_stk = (u32 *)u_stk;
  14. *(--p_stk) = (u32)fptr; //r14
  15. //r12 - r1
  16. p_stk -= 12;
  17. *(--p_stk) = (u32)p_arg; //r0
  18. return (u32)p_stk;
  19. }
  20. __asm void arch_start_first_task(void) {
  21. extern current_tcb;
  22. PRESERVE8
  23. ldr r0, =current_tcb
  24. ldr r0, [r0]
  25. ldr r0, [r0] //load tcb->sp to psp
  26. msr psp, r0
  27. mrs r0, CONTROL //thread mode use psp stack pointer
  28. orr r0, r0, #2
  29. msr CONTROL, r0
  30. isb
  31. pop {r0-r12, pc}
  32. nop
  33. }
  34. __asm int arch_save_context(void){
  35. PRESERVE8
  36. STMFD sp!, {r0-r12,r14}
  37. ldr r0, =current_tcb
  38. ldr r0, [r0]
  39. str sp, [r0] //save sp to tcb->sp
  40. bx lr
  41. nop
  42. }
  43. __asm void arch_restore_context(void){
  44. PRESERVE8
  45. ldr r0, =current_tcb
  46. ldr r0, [r0]
  47. ldr sp, [r0] //load tcb->sp to r0
  48. LDMFD sp!, {r0-r12, pc}
  49. }
  50. extern u64 g_task_ticks64;
  51. extern u32 g_task_ticks;
  52. void SysTick_Handler(void) {
  53. g_task_ticks ++;
  54. g_task_ticks64 ++;
  55. }