pwm.h 3.1 KB

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  1. #ifndef _PWM_H__
  2. #define _PWM_H__
  3. #include "bsp/bsp.h"
  4. #include "os/os_types.h"
  5. #define TIMER_CHCTL2_CH0EN BIT(0) /*!< channel 0 capture/compare function enable */
  6. #define TIMER_CHCTL2_CH0NEN BIT(2) /*!< channel 0 complementary output enable */
  7. #define TIMER_CHCTL2_CH1EN BIT(4) /*!< channel 1 capture/compare function enable */
  8. #define TIMER_CHCTL2_CH1NEN BIT(6) /*!< channel 1 complementary output enable */
  9. #define TIMER_CHCTL2_CH2EN BIT(8) /*!< channel 2 capture/compare function enable */
  10. #define TIMER_CHCTL2_CH2NEN BIT(10) /*!< channel 2 complementary output enable */
  11. #define TIMER_CHCTL2_CH3EN BIT(12) /*!< channel 3 capture/compare function enable */
  12. #define TIMxCCER_MASK_CH012 ((uint16_t) (TIMER_CHCTL2_CH0EN|TIMER_CHCTL2_CH0NEN|\
  13. TIMER_CHCTL2_CH1EN|TIMER_CHCTL2_CH1NEN|\
  14. TIMER_CHCTL2_CH2EN|TIMER_CHCTL2_CH2NEN))
  15. #define pwm_enable_channel() {pwm_timer->cctrl |= TIMxCCER_MASK_CH012;}
  16. #define pwm_disable_channel() {pwm_timer->cctrl &= ~TIMxCCER_MASK_CH012;}
  17. #define ch0_update_duty(duty) pwm_timer->c1dt = (uint32_t)duty
  18. #define ch1_update_duty(duty) pwm_timer->c2dt = (uint32_t)duty
  19. #define ch2_update_duty(duty) pwm_timer->c3dt = (uint32_t)duty
  20. #define update_adc_trigger(time) pwm_timer->c4dt = (uint32_t)time
  21. #ifdef CONFIG_PWM_UV_SWAP
  22. #define pwm_update_duty(dutyA, dutyB, dutyC) \
  23. do {\
  24. ch0_update_duty(dutyC);\
  25. ch1_update_duty(dutyB);\
  26. ch2_update_duty(dutyA);\
  27. }while(0)
  28. #else
  29. #define pwm_update_duty(dutyA, dutyB, dutyC) \
  30. do {\
  31. ch0_update_duty(dutyA);\
  32. ch1_update_duty(dutyB);\
  33. ch2_update_duty(dutyC);\
  34. }while(0)
  35. #endif
  36. #define pwm_update_2smaples(samp1, sampl2) \
  37. do { \
  38. pwm_timer->c4dt = (uint32_t)samp1; \
  39. }while(0)
  40. #define pwm_clear_updata() \
  41. tmr_flag_clear(pwm_timer, TMR_OVF_INT);
  42. #define pwm_wait_and_clear_updata() \
  43. do { \
  44. while ( tmr_flag_get(pwm_timer, TMR_OVF_INT) == RESET ); \
  45. timer_flag_clear(pwm_timer, TMR_OVF_INT); \
  46. }while(0)
  47. #define pwm_change_t3_mode(m) \
  48. do { \
  49. if (pwm_timer->cm2_output_bit.c4octrl != m) { \
  50. pwm_timer->cm2_output_bit.c4octrl = m; \
  51. } \
  52. }while(0)
  53. #define pwm_brake_enable(n) \
  54. do { \
  55. if (n) { \
  56. nvic_irq_enable(TMR1_BRK_TMR9_IRQn, EBREAK_IRQ_PRIORITY, 0); \
  57. }else { \
  58. nvic_irq_disable(TMR1_BRK_TMR9_IRQn); \
  59. } \
  60. }while(0)
  61. #define pwm_up_enable(n) \
  62. do { \
  63. if (n) { \
  64. tmr_flag_clear(pwm_timer, TMR_OVF_INT); \
  65. tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, TRUE); \
  66. }else { \
  67. tmr_flag_clear(pwm_timer, TMR_OVF_INT); \
  68. tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, FALSE); \
  69. } \
  70. }while(0)
  71. #define get_deadtime() (pwm_timer->brk_bit.dtc)
  72. void pwm_3phase_init(void);
  73. void pwm_3phase_sides(bool hon, bool lon);
  74. void pwm_start(void);
  75. void pwm_stop(void);
  76. void pwm_turn_on_low_side(void);
  77. void pwm_enable_output(bool enable);
  78. void pwm_update_sample(u32 samp1, u32 samp2, u8 sector);
  79. #endif /*_PWM_H__*/