1/*



2 * File: rt_nonfinite.h



3 *



4 * Code generated for Simulink model 'PMSM_Controller'.



5 *



6 * Model version                  : 1.885



7 * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020



8 * C/C++ source code generated on : Sat Jan  8 15:44:11 2022



9 *



10 * Target selection: ert.tlc



11 * Embedded hardware selection: ARM Compatible->ARM Cortex-M



12 * Code generation objectives:



13 *    1. Execution efficiency



14 *    2. RAM efficiency



15 * Validation result: Not run



16 */



17



18#ifndef RTW_HEADER_rt_nonfinite_h_



19#define RTW_HEADER_rt_nonfinite_h_



20#include <stddef.h>



21#include "rtwtypes.h"



22



23extern real_T rtInf;



24extern real_T rtMinusInf;



25extern real_T rtNaN;



26extern real32_T rtInfF;



27extern real32_T rtMinusInfF;



28extern real32_T rtNaNF;



29extern void rt_InitInfAndNaN(size_t realSize);



30extern boolean_T rtIsInf(real_T value);



31extern boolean_T rtIsInfF(real32_T value);



32extern boolean_T rtIsNaN(real_T value);



33extern boolean_T rtIsNaNF(real32_T value);



34typedef struct {



35  struct {



36    uint32_T wordH;



37    uint32_T wordL;



38  } words;



39} BigEndianIEEEDouble;



40



41typedef struct {



42  struct {



43    uint32_T wordL;



44    uint32_T wordH;



45  } words;



46} LittleEndianIEEEDouble;



47



48typedef struct {



49  union {



50    real32_T wordLreal;



51    uint32_T wordLuint;



52  } wordL;



53} IEEESingle;



54



55#endif                                 /* RTW_HEADER_rt_nonfinite_h_ */



56



57/*



58 * File trailer for generated code.



59 *



60 * [EOF]



61 */



62