#ifndef __BSP_H__
#define __BSP_H__
#if defined (GD32F30X_HD) || defined (GD32F30X_XD) || defined (GD32F30X_CL)
#include "gd32f30x.h"
#elif defined GD32E10x
#include "gd32e10x.h"
#endif
#include "bsp/gpio.h"
#include "bsp/gd32_bkp.h"
#include "bsp/gd32_rtc.h"
#include "bsp/can.h"
#include "bsp/i2c.h"
#include "bsp/fmc_flash.h"
#include "bsp/can.h"

//#define GD32_FOC_DEMO
#define USER_ITMER_BRAKE 0


#define SYSTEM_CLOCK (120000000u) //system clk 120M Hz
#define TIM_CLOCK (SYSTEM_CLOCK) /*SystemClock_Config��TIM1��clk��sys PLL �������̶�2����PLLƵ��*/
#define TIM_CLOCK_MHz (120u)
#define ADC_CLOCK (30000000u)
#define ADC_CLOCK_MHz (30u)
#define NS_PER_TCLK (8u) /* (1/120000000 * 1000000000) */
#define NS_2_TCLK(ns) (((ns)/NS_PER_TCLK) + 1u) //ns תΪpwmʹ�õ��Ǹ�TIM��clk count
#define FOC_PWM_FS (16000u)
#define FOC_PWM_period (TIM_CLOCK/FOC_PWM_FS)
#define FOC_PWM_Half_Period (FOC_PWM_period/2)

#define FOC_CTRL_US (1.0f/(float)FOC_PWM_FS)

#define ADC_TRIG_CONV_LATENCY_CYCLES 12.5f
#define ADC_SAMPLING_CYCLES 7.5f

#ifdef GD32_FOC_DEMO
#define MOSDEV_DLY      550U
#define MOSDRV_DT_NS     400U
#define HW_DEAD_TIME_NS  (MOSDEV_DLY+MOSDRV_DT_NS)
#define HW_RISE_TIME_NS  500u
#define HW_NOISE_TIME_NS 500u
#else
#define HW_DEAD_TIME_NS  1200u
#define HW_RISE_TIME_NS  500u
#define HW_NOISE_TIME_NS 500u
#endif
#define TDead NS_2_TCLK(HW_DEAD_TIME_NS)/* ����ʱ�� */ 
#define TRise NS_2_TCLK(HW_RISE_TIME_NS)/* MOS ����ʱ��*/
#define TNoise NS_2_TCLK(HW_NOISE_TIME_NS)/* MOS��������Ŀ�������ʱ�� */
#define TADC  ((uint16_t)((ADC_TRIG_CONV_LATENCY_CYCLES + ADC_SAMPLING_CYCLES) * TIM_CLOCK_MHz) / ADC_CLOCK_MHz + 1u)/* ADC ����ʱ�� */
#define TSampleMIN (TADC + TDead*2 + TRise) //采样需要的总时间
#define TSampleBefore (TDead + TRise) //采样开始前需要等待的时间


#define START_RAMP_DURATION (2000)//ms
#define SPEED_SAMPLE_INVAL (100) //ת�Ѳɼ��ļ��,ms
#define SPEED_RAMP_DURATION SPEED_SAMPLE_INVAL //�����ٶȵ�б��ʱ�䣬�ٶ�ƽ���������½�

#define ADC_REFERENCE_VOLTAGE  (3.3F)

#define pwm_timer TIMER0
#define adc_timer TIMER1
#define aux_timer TIMER2

#define TIMER_UP_IRQ_PRIORITY 0
#define ADC_IRQ_PRIORITY 1
#define HALL_IRQ_PRIORITY 2
#define SCHED_TIMER_IRQ_PRIORITY 3
#define EBREAK_IRQ_PRIORITY 2
#define CAN_IRQ_PRIORITY       6 
#define RTC_IRQ_PRIORITY       7 
#define UART_IRQ_PRIORITY      6 


#define THREE_SHUNTS_SAMPLE 1
#define ONE_SHUNT_SAMPLE 2

#define SHUNT_NUM THREE_SHUNTS_SAMPLE

//#define ENABLE_AUX_TIMER 1

#ifdef GD32_FOC_DEMO
#define ADC_TO_CURR_ceof (0.004f)
#define VBUS_VOL_CEOF (ADC_REFERENCE_VOLTAGE*16/4096.0f)
#else
#define ADC_TO_CURR_ceof (0.0942f)
#define VBUS_VOL_CEOF (ADC_REFERENCE_VOLTAGE*45/4096.0f)
#define THROTTLE_VOL_CEOF (1)
#endif
void bsp_init(void);
void wdog_reload(void);
void system_reboot(void);
int wdog_set_timeout(int wdog_time);
void systick_open(void);

#endif /* __BSP_H__ */