#include "bsp/bsp.h" #include "bsp/pwm.h" #include "bsp/adc.h" #include "os/os_task.h" /* 以下主要是在某一相电路无法采集的时候,需要对这相的pwm挖坑处理 timer 分配: timer0 -> ch0-2 互补pwm ch4 event, update event 触发DMA(ch3,4)实现CCR的自更新 timer1 -> 触发ADC采样,GD32不支持多channel 或方式触发输出,通过timer1的 ch0 compara 配置 TRGO触发ADC,但是需要在一个PWM周期内触发2次(单电阻) timer0 master --> timer1 slave/master 确保timer0,1同步开始,同频同相位 DMA 分配: DMA0 ch4 -> timer0 update event ch3 -> timer0 chan3 CC event ch1 -> timer1 update event,需要更新CCR */ static void _init_pwm_timer(void); #ifdef ENABLE_AUX_TIMER static void _init_adc_timer(void); static void _init_aux_timer(void); #endif #if SHUNT_NUM==ONE_SHUNT_SAMPLE static void timer0_dma_config(void); #endif static void _pwm_gpio_config(void); #if USER_ITMER_BRAKE==0 static void _gpio_brakein_irq_enable(void); #endif u16 timer_update_buffer[6] = {0}; void pwm_3phase_init(void){ _init_pwm_timer(); #ifdef ENABLE_AUX_TIMER _init_adc_timer(); _init_aux_timer(); #endif #if SHUNT_NUM==ONE_SHUNT_SAMPLE timer0_dma_config(); #endif _pwm_gpio_config(); } static rcu_periph_enum _rcu_clk(u32 timer) { if (timer == TIMER0) { return RCU_TIMER0; } if (timer == TIMER1) { return RCU_TIMER1; } if (timer == TIMER2) { return RCU_TIMER2; } return RCU_TIMER2; } static void _pwm_gpio_config(void) { rcu_periph_clock_enable(RCU_GPIOA); rcu_periph_clock_enable(RCU_GPIOB); rcu_periph_clock_enable(RCU_AF); //gpio_pin_remap_config(GPIO_TIMER0_PARTIAL_REMAP, ENABLE); //gpio_pin_remap_config(GPIO_TIMER0_FULL_REMAP, DISABLE); /*configure PA8 PA9 PA10(TIMER0 CH0 CH1 CH2) as alternate function*/ gpio_init(GPIOA,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_8); gpio_init(GPIOA,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_9); gpio_init(GPIOA,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_10); /*configure PB13 PB14 PB15(TIMER0 CH0N CH1N CH2N) as alternate function*/ gpio_init(GPIOB,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_13); gpio_init(GPIOB,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_14); gpio_init(GPIOB,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_15); /*configure BRAKE IN*/ #if USER_ITMER_BRAKE==1 #ifdef GD32_FOC_DEMO /* TIMER0 BKIN */ gpio_init(GPIOB, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_12); #else gpio_init(GPIOA,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_6); #endif #else gpio_init(GPIOB,GPIO_MODE_IN_FLOATING,GPIO_OSPEED_50MHZ,GPIO_PIN_4);//高刹车 gpio_init(GPIOB,GPIO_MODE_IN_FLOATING,GPIO_OSPEED_50MHZ,GPIO_PIN_5);//低刹车 #endif #ifdef GD32_FOC_DEMO /* IR2136S enable pin */ gpio_bit_reset(GPIOA, GPIO_PIN_12); gpio_init(GPIOA, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, GPIO_PIN_12); #endif } static void _init_pwm_timer(void) { timer_oc_parameter_struct timer_ocintpara; timer_parameter_struct timer_initpara; u32 timer = pwm_timer; u32 half_period = FOC_PWM_Half_Period; rcu_periph_clock_enable(_rcu_clk(timer)); timer_deinit(timer); /* TIMER0 configuration */ memset(&timer_initpara, 0, sizeof(timer_initpara)); memset(&timer_ocintpara, 0, sizeof(timer_ocintpara)); timer_initpara.prescaler = 0; timer_initpara.alignedmode = TIMER_COUNTER_CENTER_UP; timer_initpara.counterdirection = TIMER_COUNTER_UP; timer_initpara.period = half_period-1; timer_initpara.clockdivision = TIMER_CKDIV_DIV1; timer_initpara.repetitioncounter = 1; timer_init(timer,&timer_initpara); /* auto-reload preload enable */ timer_auto_reload_shadow_enable(timer); /* CH1,CH2 and CH3 configuration in PWM mode */ timer_ocintpara.outputstate = TIMER_CCX_ENABLE; timer_ocintpara.outputnstate = TIMER_CCXN_ENABLE; timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_LOW; timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_LOW; timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_HIGH; timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_HIGH; timer_channel_output_config(timer,TIMER_CH_0,&timer_ocintpara); timer_channel_output_pulse_value_config(timer,TIMER_CH_0,half_period/2); timer_channel_output_mode_config(timer,TIMER_CH_0,TIMER_OC_MODE_PWM0); timer_channel_output_shadow_config(timer,TIMER_CH_0,TIMER_OC_SHADOW_ENABLE); timer_channel_output_config(timer,TIMER_CH_1,&timer_ocintpara); timer_channel_output_pulse_value_config(timer,TIMER_CH_1,half_period/2); timer_channel_output_mode_config(timer,TIMER_CH_1,TIMER_OC_MODE_PWM0); timer_channel_output_shadow_config(timer,TIMER_CH_1,TIMER_OC_SHADOW_ENABLE); timer_channel_output_config(timer,TIMER_CH_2,&timer_ocintpara); timer_channel_output_pulse_value_config(timer,TIMER_CH_2,half_period/2); timer_channel_output_mode_config(timer,TIMER_CH_2,TIMER_OC_MODE_PWM0); timer_channel_output_shadow_config(timer,TIMER_CH_2,TIMER_OC_SHADOW_ENABLE); timer_ocintpara.outputstate = TIMER_CCX_ENABLE; timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE; timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH; timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH; timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW; timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW; /* chan3 trigger adc O3CPRE is alwary active high, adc trigger is rising */ timer_channel_output_config(timer,TIMER_CH_3,&timer_ocintpara); timer_channel_output_pulse_value_config(timer,TIMER_CH_3,half_period-5); timer_channel_output_mode_config(timer,TIMER_CH_3,TIMER_OC_MODE_PWM1); timer_channel_output_shadow_config(timer,TIMER_CH_3,TIMER_OC_SHADOW_ENABLE); #if USER_ITMER_BRAKE==1 timer_break_parameter_struct timer_breakpara; timer_breakpara.runoffstate = TIMER_ROS_STATE_DISABLE; timer_breakpara.ideloffstate = TIMER_ROS_STATE_DISABLE; timer_breakpara.protectmode = TIMER_CCHP_PROT_OFF; timer_breakpara.deadtime = 0;//NS_2_TCLK(TIMER_DT_NS); timer_breakpara.breakstate = TIMER_BREAK_DISABLE; timer_breakpara.breakpolarity = TIMER_BREAK_POLARITY_HIGH; timer_breakpara.outputautostate = TIMER_OUTAUTO_DISABLE; timer_break_config(timer,&timer_breakpara); timer_interrupt_enable(timer, TIMER_INT_BRK); timer_interrupt_flag_clear(timer, TIMER_INT_FLAG_BRK); nvic_irq_enable(TIMER0_BRK_IRQn, 1, 0); #else _gpio_brakein_irq_enable(); #endif #ifdef ENABLE_AUX_TIMER /* select the master slave mode */ timer_master_slave_mode_config(timer,TIMER_MASTER_SLAVE_MODE_ENABLE); /* slave mode selection: enabled when time2 is enable*/ timer_slave_mode_select(timer,TIMER_SLAVE_MODE_EVENT); timer_input_trigger_source_select(timer,TIMER_SMCFG_TRGSEL_ITI2); #endif #if SHUNT_NUM==ONE_SHUNT_SAMPLE timer_channel_output_shadow_config(timer,TIMER_CH_0,TIMER_OC_SHADOW_DISABLE); timer_channel_output_shadow_config(timer,TIMER_CH_1,TIMER_OC_SHADOW_DISABLE); timer_channel_output_shadow_config(timer,TIMER_CH_2,TIMER_OC_SHADOW_DISABLE); timer_dma_transfer_config(TIMER0, TIMER_DMACFG_DMATA_CH0CV, TIMER_DMACFG_DMATC_3TRANSFER); timer_dma_enable(TIMER0, TIMER_DMA_UPD); #else timer_master_slave_mode_config(timer,TIMER_MASTER_SLAVE_MODE_DISABLE); #endif /* ONE_SHUNT_SAMPLE_1 */ pwm_enable_channel(); timer_interrupt_disable(timer, TIMER_INT_UP); timer_interrupt_flag_clear(timer, TIMER_INT_FLAG_UP); nvic_irq_enable(TIMER0_UP_IRQn, TIMER_UP_IRQ_PRIORITY, 0); #if SHUNT_NUM==THREE_SHUNTS_SAMPLE timer_enable(timer); #endif #ifdef GD32_FOC_DEMO /* IR2136S enable */ gpio_ir2136_enable(true); #endif } #ifdef ENABLE_AUX_TIMER static void _init_adc_timer(void) { timer_oc_parameter_struct timer_ocintpara; timer_parameter_struct timer_initpara; u32 timer = adc_timer; u32 half_period = FOC_PWM_Half_Period; rcu_periph_clock_enable(_rcu_clk(timer)); timer_deinit(timer); memset(&timer_initpara, 0, sizeof(timer_initpara)); memset(&timer_ocintpara, 0, sizeof(timer_ocintpara)); timer_initpara.prescaler = 0; timer_initpara.alignedmode = TIMER_COUNTER_CENTER_UP; timer_initpara.period = half_period; timer_initpara.clockdivision = TIMER_CKDIV_DIV1; timer_initpara.repetitioncounter = 0; timer_init(timer,&timer_initpara); timer_ocintpara.outputstate = TIMER_CCX_ENABLE; timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE; timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH; timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH; timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW; timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW; timer_channel_output_config(timer,TIMER_CH_0,&timer_ocintpara); timer_channel_output_pulse_value_config(timer,TIMER_CH_0,half_period-1); #if SHUNT_NUM==ONE_SHUNT_SAMPLE timer_channel_output_mode_config(timer,TIMER_CH_0,TIMER_OC_MODE_PWM1); #else timer_channel_output_mode_config(timer,TIMER_CH_0,TIMER_OC_MODE_PWM0); #endif timer_channel_output_shadow_config(timer,TIMER_CH_0,TIMER_OC_SHADOW_ENABLE); /* select the master slave mode */ timer_master_slave_mode_config(timer,TIMER_MASTER_SLAVE_MODE_ENABLE); /* slave mode selection: enabled when time2 is enable*/ timer_slave_mode_select(timer,TIMER_SLAVE_MODE_EVENT); timer_input_trigger_source_select(timer,TIMER_SMCFG_TRGSEL_ITI2); //timer_primary_output_config(timer,ENABLE); /* auto-reload preload enable */ timer_auto_reload_shadow_enable(timer); //timer_enable(timer); } static void _init_aux_timer(void) { timer_parameter_struct timer_initpara; u32 timer = aux_timer; rcu_periph_clock_enable(_rcu_clk(timer)); timer_deinit(timer); memset(&timer_initpara, 0, sizeof(timer_initpara)); timer_initpara.prescaler = 0; timer_initpara.alignedmode = TIMER_COUNTER_CENTER_UP; timer_initpara.period = FOC_PWM_period; timer_initpara.clockdivision = TIMER_CKDIV_DIV1; timer_initpara.repetitioncounter = 0; timer_init(timer,&timer_initpara); /* select the master slave mode */ timer_master_slave_mode_config(timer,TIMER_MASTER_SLAVE_MODE_ENABLE); /* timer update event is used as trigger output */ timer_master_output_trigger_source_select(timer,TIMER_TRI_OUT_SRC_ENABLE); timer_primary_output_config(timer,ENABLE); timer_enable(timer); } #endif #if SHUNT_NUM==ONE_SHUNT_SAMPLE static void timer0_dma_config(void) { dma_parameter_struct dma_init_struct; rcu_periph_clock_enable(RCU_DMA0); /* TIMER0 update */ dma_deinit(DMA0, DMA_CH4); dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL; dma_init_struct.memory_addr = (uint32_t)timer_update_buffer; dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT; dma_init_struct.number = 6; dma_init_struct.periph_addr = (uint32_t)0x40012C4C; dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT; dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH; dma_init(DMA0, DMA_CH4, &dma_init_struct); dma_circulation_enable(DMA0, DMA_CH4); dma_memory_to_memory_disable(DMA0, DMA_CH4); } #endif #if USER_ITMER_BRAKE==0 static void _gpio_brakein_irq_enable(void){ gpio_exti_source_select(GPIO_PORT_SOURCE_GPIOB, GPIO_PIN_SOURCE_4); exti_init(EXTI_4, EXTI_INTERRUPT, EXTI_TRIG_BOTH); nvic_irq_enable(EXTI4_IRQn, 4U, 0U); exti_interrupt_flag_clear(EXTI_4); exti_interrupt_enable(EXTI_4); gpio_exti_source_select(GPIO_PORT_SOURCE_GPIOB, GPIO_PIN_SOURCE_5); exti_init(EXTI_5, EXTI_INTERRUPT, EXTI_TRIG_BOTH); nvic_irq_enable(EXTI5_9_IRQn, 4U, 0U); exti_interrupt_flag_clear(EXTI_5); exti_interrupt_enable(EXTI_5); } #endif void pwm_start(void){ pwm_update_duty(FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2); pwm_update_2smaples(FOC_PWM_Half_Period-10, FOC_PWM_Half_Period + 1); /* wait for a new PWM period to flush last HF task */ timer_flag_clear(pwm_timer, TIMER_FLAG_UP); timer_event_software_generate(pwm_timer, TIMER_EVENT_SRC_UPG); while ( timer_flag_get(pwm_timer, TIMER_FLAG_UP) == RESET ){} /* Clear Update Flag */ timer_flag_clear(pwm_timer, TIMER_FLAG_UP); timer_primary_output_config(pwm_timer,ENABLE); #ifdef ENABLE_AUX_TIMER timer_primary_output_config(adc_timer,ENABLE); #endif timer_flag_clear(pwm_timer, TIMER_FLAG_UP); timer_interrupt_enable(pwm_timer, TIMER_INT_UP); } void pwm_stop(void){ timer_primary_output_config(pwm_timer,DISABLE); #ifdef ENABLE_AUX_TIMER timer_primary_output_config(adc_timer,DISABLE); #endif timer_interrupt_disable(pwm_timer, TIMER_INT_UP); /* wait for a new PWM period to flush last HF task */ timer_flag_clear(pwm_timer, TIMER_FLAG_UP); //while ( timer_flag_get(pwm_timer, TIMER_FLAG_UP) == RESET ){} /* Clear Update Flag */ timer_flag_clear(pwm_timer, TIMER_FLAG_UP); } void pwm_enable_output(bool enable) { if (enable) { timer_primary_output_config(pwm_timer,ENABLE); }else { timer_primary_output_config(pwm_timer,DISABLE); } } /*open low side of the mosfet*/ void pwm_turn_on_low_side(void) { pwm_update_duty(0, 0, 0); pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1); timer_flag_clear(pwm_timer,TIMER_FLAG_UP); timer_event_software_generate(pwm_timer, TIMER_EVENT_SRC_UPG); while (timer_flag_get(pwm_timer,TIMER_FLAG_UP) == RESET ); /* Main PWM Output Enable */ timer_primary_output_config(pwm_timer, ENABLE); #ifdef ENABLE_AUX_TIMER timer_primary_output_config(adc_timer, ENABLE); #endif } void pwm_update_sample(u32 samp1, u32 samp2, u8 sector) { pwm_update_2smaples(samp1, samp2); #ifdef ENABLE_AUX_TIMER if (samp1 < FOC_PWM_Half_Period) { adc_update_ext_trigger(ADC_TRIGGER_PHASE); }else { adc_update_ext_trigger(ADC_TRIGGER_PHASE2); } #endif adc_current_sample_config(sector); }