gd32 adc 改为 普通通道双工作模式

Signed-off-by: huhui <huhui@sharkgulf.com>

Applications/bsp/at32/adc.c

@@ -106,7 +106,7 @@ static void adc0_init(void){
 	crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
 	adc_reset(ADC1);
 	/* select adc mster-slave mode */
-	adc_combine_mode_select(ADC_PREEMPT_SMLT_ONLY_MODE);
+	adc_combine_mode_select(ADC_ORDINARY_SMLT_PREEMPT_SMLT_MODE);
 
 	adc_base_struct.sequence_mode = TRUE;
 	adc_base_struct.repeat_mode = TRUE;
@@ -124,8 +124,6 @@ static void adc0_init(void){
 	adc_ordinary_channel_set(ADC1, THROTTLE2_5V_CHAN, 7, ADC_REGCHAN_SAMPLE_TIME);
 	adc_ordinary_channel_set(ADC1, U_VOL_ADC_CHAN, 8, ADC_REGCHAN_SAMPLE_TIME);
 	adc_ordinary_channel_set(ADC1, ZERO_ADC_CHAN, 9, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
-#if 1
-#endif
 
 	adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
 
@@ -183,7 +181,7 @@ static void adc1_init(void){
 	/* adc prempt trigger source */
 	adc_preempt_conversion_trigger_set(ADC2, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
 
-	//adc_dma_mode_enable(ADC2, TRUE);
+	adc_dma_mode_enable(ADC2, TRUE);
 	/* ADC enable and calibration */
 	if(ADC2->ctrl2_bit.adcen != TRUE)
 	{
@@ -315,7 +313,7 @@ float adc_vref_compesion(void) {
 }
 
 static float vref_5v_compestion_filter = 1.0f;
-#define VREF_5V_COMPESTION() (1.0f)//(vref_5v_adc/(float)adc_buffer[VREF5v_BUFF_IDX])
+#define VREF_5V_COMPESTION() (vref_5v_adc/(float)adc_buffer[VREF5v_BUFF_IDX])
 void adc_5vref_filter(void) {
 	float value = VREF_5V_COMPESTION();
 	LowPass_Filter(vref_5v_compestion_filter, value, VREF_COMP_LFP_CEOF);

Applications/bsp/at32/adc.h

@@ -17,7 +17,7 @@ inserted ADC 由timer0 ch3触发，
 #define IL_OFFSET   20
 
 #define ADC_REGCHAN_SAMPLE_TIME ADC_SAMPLETIME_239_5
-#define ADC_SAMPLE_TIME ADC_SAMPLETIME_13_5
+#define ADC_SAMPLE_TIME ADC_SAMPLETIME_28_5
 #define ADC_TRIGGER_PHASE ADC12_PREEMPT_TRIG_TMR1CH4
 
 #define PHASE_AB 0
@@ -37,13 +37,13 @@ static void __inline adc_current_sample_config(u8 phases) {
 }
 
 static void __inline adc_disable_ext_trigger(void) {   
-	ADC1->ctrl2_bit.pcten = FALSE;
-	ADC2->ctrl2_bit.pcten = FALSE;
+	//ADC1->ctrl2_bit.pcten = FALSE;
+	//ADC2->ctrl2_bit.pcten = FALSE;
 }
 
 static void __inline adc_enable_ext_trigger(void) {	
-	ADC1->ctrl2_bit.pcten = TRUE;
-	ADC2->ctrl2_bit.pcten = TRUE;
+	//ADC1->ctrl2_bit.pcten = TRUE;
+	//ADC2->ctrl2_bit.pcten = TRUE;
 }
 
 static __inline__ void adc_clear_irq_flags(void) {

Applications/bsp/at32/bsp.c

@@ -55,7 +55,7 @@ static void wdog_enable(void)
 	 wdt_register_write_enable(TRUE);
 	
 	 /* set the wdt divider value */
-	 wdt_divider_set(WDT_CLK_DIV_4);
+	 wdt_divider_set(WDT_CLK_DIV_64);
 	
 	 /* set reload value
 	
@@ -65,9 +65,9 @@ static void wdog_enable(void)
 	  divider	   = 4
 	  reload_value = 30000
 	
-	  timeout = 30000 * (4 / 40000 ) = 3s = 3000ms
+	  timeout = 3000 * (64 / 40000 ) = 4.8s = 4800ms
 	 */
-	 wdt_reload_value_set(30000 - 1);
+	 wdt_reload_value_set(3000 - 1);
 	
 	 /* reload wdt counter */
 	 wdt_counter_reload();

Applications/bsp/at32/pwm.c

@@ -152,7 +152,7 @@ static void _init_pwm_timer(bool enable_brk) {
 	tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
 	tmr_output_struct.oc_idle_state = FALSE;
 	tmr_output_struct.occ_output_state = TRUE;
-	tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_LOW;
+	tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
 	tmr_output_struct.occ_idle_state = FALSE;
 	
 	/* channel 1, 2, 3 */

Applications/bsp/gd32/adc.c

@@ -4,8 +4,7 @@
 #include "libs/logger.h"
 #include "math/fast_math.h"
 
-#define REG_CHAN_DMA 1
-#ifdef REG_CHAN_DMA
+
 #ifndef CONFIG_BOARD_MCXXX
 #define ADC01_NUM 7
 #define ADC2_NUM 0
@@ -17,7 +16,8 @@
 #define W_VOL_BUFF_IDX 4
 #define MOS_TEMP_BUFF_IDX 5
 #define MOTOR_TEMP_BUFF_IDX 6
-
+#define REG_CHAN_NUM (ADC01_NUM + ADC2_NUM)
+#define ADC_DUAL_MODE ADC_DAUL_INSERTED_PARALLEL
 #elif (CONFIG_HW_VERSION==2)
 #define ADC01_NUM (8)
 #define ADC2_NUM 4
@@ -34,34 +34,49 @@
 #define ACC_V_BUFF_IDX 9
 #define THROTTLE_BUFF_IDX 10
 #define MOTOR_TEMP_BUFF_IDX 11
-
+#define REG_CHAN_NUM (ADC01_NUM + ADC2_NUM)
+#define ADC_DUAL_MODE ADC_DAUL_INSERTED_PARALLEL
 #elif (CONFIG_HW_VERSION==3)
-#define ADC01_NUM (16)
-#define ADC2_NUM 0
+#define ADC01_NUM (9)
 
 #define MOS_TEMP_BUFF_IDX 0
-#define MOTOR_TEMP_BUFF_IDX 1
-#define THROTTLE_BUFF_IDX 2
-#define THROTTLE2_BUFF_IDX 3
-#define THROTTLE_5V_BUFF_IDX 4
-#define THROTTLE2_5V_BUFF_IDX 5
-#define U_VOL_BUFF_IDX 6
-#define VREF_BUFF_IDX 8
-#define VREF5v_BUFF_IDX 10
-
-#define VBUS_V_BUFF_IDX 11
-#define ACC_V_BUFF_IDX 12
-#define VBUS_I_BUFF_IDX 13
-#define V_VOL_BUFF_IDX 14
-#define W_VOL_BUFF_IDX 15
+#define VBUS_V_BUFF_IDX 1
+
+#define MOTOR_TEMP_BUFF_IDX 2
+#define ACC_V_BUFF_IDX 3
+
+#define THROTTLE_BUFF_IDX 4
+#define VBUS_I_BUFF_IDX 5
+
+#define THROTTLE2_BUFF_IDX 6
+#define V_VOL_BUFF_IDX 7
+
+//zero chan            8
+#define W_VOL_BUFF_IDX 9
+
+#define VREF_BUFF_IDX   10
+//zero chan             11
+
+#define THROTTLE2_5V_BUFF_IDX 12
+#define THROTTLE_5V_BUFF_IDX 13
+
+#define U_VOL_BUFF_IDX 14
+//zero chan            15
+
+//zero chan            16
+#define VREF5v_BUFF_IDX 17
+#define REG_CHAN_NUM (ADC01_NUM + ADC01_NUM)
+#define ADC_DUAL_MODE ADC_DAUL_REGULAL_PARALLEL_INSERTED_PARALLEL
+
 #endif
-#define REG_CHAN_NUM (ADC01_NUM + ADC2_NUM)
+
 s16 adc_buffer[REG_CHAN_NUM];
 float vref_adc = 1408.0f;
 float vref_5v_adc = 2047.0f;
 
 #define VREF_ADC_DATA 1509.0F //1498, 1.21/3.3*4095
 
+#if (CONFIG_HW_VERSION==3)
 static void adc01_dma_init(void)
 {
     dma_parameter_struct dma_init_struct;
@@ -71,11 +86,11 @@ static void adc01_dma_init(void)
     dma_init_struct.direction    = DMA_PERIPHERAL_TO_MEMORY;
     dma_init_struct.memory_addr  = (uint32_t)adc_buffer;
     dma_init_struct.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;
-    dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;
-    dma_init_struct.number       = ADC01_NUM;
+    dma_init_struct.memory_width = DMA_MEMORY_WIDTH_32BIT;
+    dma_init_struct.number       = REG_CHAN_NUM/2;
     dma_init_struct.periph_addr  = (uint32_t)(&ADC_RDATA(ADC0));
     dma_init_struct.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;
-    dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
+    dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_32BIT;
     dma_init_struct.priority     = DMA_PRIORITY_ULTRA_HIGH;
     dma_init(DMA0, DMA_CH0, &dma_init_struct);
     dma_circulation_enable(DMA0, DMA_CH0);
@@ -83,33 +98,30 @@ static void adc01_dma_init(void)
 
     dma_channel_enable(DMA0, DMA_CH0);
 }
-
-#if (CONFIG_HW_VERSION==2)
-static void adc2_dma_init(void)
+#else
+static void adc01_dma_init(void)
 {
     dma_parameter_struct dma_init_struct;
-    rcu_periph_clock_enable(RCU_DMA1);
+    rcu_periph_clock_enable(RCU_DMA0);
 
-    dma_deinit(DMA1, DMA_CH4);
+    dma_deinit(DMA0, DMA_CH0);
     dma_init_struct.direction    = DMA_PERIPHERAL_TO_MEMORY;
-    dma_init_struct.memory_addr  = (uint32_t)(adc_buffer + ADC01_NUM);
+    dma_init_struct.memory_addr  = (uint32_t)adc_buffer;
     dma_init_struct.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;
     dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;
-    dma_init_struct.number       = ADC2_NUM;
-    dma_init_struct.periph_addr  = (uint32_t)(&ADC_RDATA(ADC2));
+    dma_init_struct.number       = REG_CHAN_NUM;
+    dma_init_struct.periph_addr  = (uint32_t)(&ADC_RDATA(ADC0));
     dma_init_struct.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;
     dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
     dma_init_struct.priority     = DMA_PRIORITY_ULTRA_HIGH;
-    dma_init(DMA1, DMA_CH4, &dma_init_struct);
-    dma_circulation_enable(DMA1, DMA_CH4);
-    dma_memory_to_memory_disable(DMA1, DMA_CH4);
+    dma_init(DMA0, DMA_CH0, &dma_init_struct);
+    dma_circulation_enable(DMA0, DMA_CH0);
+    dma_memory_to_memory_disable(DMA0, DMA_CH0);
 
-    dma_channel_enable(DMA1, DMA_CH4);
+    dma_channel_enable(DMA0, DMA_CH0);
 }
 #endif
 
-#endif
-
 static void adc0_init(void){
     /* config ADC clock */
     rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV4); //APB2 clk 120M, adc clk 30M
@@ -117,8 +129,8 @@ static void adc0_init(void){
 	rcu_periph_clock_enable(RCU_ADC0);
 
 	adc_deinit(ADC0);
-	
-	adc_mode_config(ADC_DAUL_INSERTED_PARALLEL);
+
+	adc_mode_config(ADC_DUAL_MODE);
 
     adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);
     adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);
@@ -150,7 +162,6 @@ static void adc0_init(void){
     /* ADC external trigger enable */
     adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
 
-#ifdef REG_CHAN_DMA
     /* configure ADC regular channel */
     adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, ADC01_NUM);
 #ifndef CONFIG_BOARD_MCXXX
@@ -177,29 +188,21 @@ static void adc0_init(void){
 	adc_regular_channel_config(ADC0, 1, MOTOR_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
 	adc_regular_channel_config(ADC0, 2, THROTTLE_CHAN, ADC_REGCHAN_SAMPLE_TIME);
 	adc_regular_channel_config(ADC0, 3, THROTTLE2_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 4, THROTTLE_5V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 5, THROTTLE2_5V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 6, U_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 7, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
-	adc_regular_channel_config(ADC0, 8, ADC_CHANNEL_17, ADC_SAMPLETIME_239POINT5); //mcu内部vref
-	adc_regular_channel_config(ADC0, 9, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
-	adc_regular_channel_config(ADC0, 10, DC5V_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 11, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 12, ACC_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 13, VBUS_I_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 14, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC0, 15, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC0, 4, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
+	adc_regular_channel_config(ADC0, 5, ADC_CHANNEL_17, ADC_REGCHAN_SAMPLE_TIME); //mcu内部vref
+	adc_regular_channel_config(ADC0, 6, THROTTLE2_5V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC0, 7, U_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC0, 8, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
 
 	adc_tempsensor_vrefint_enable();
 	adc_buffer[VREF_BUFF_IDX] = VREF_ADC_DATA; //1.21/3.3*4095
-#endif
 #endif
     /* configure ADC regular channel trigger */
     adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
     adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
-#ifdef REG_CHAN_DMA
+
 	adc_dma_mode_enable(ADC0);
-#endif
+
     /* enable ADC interface */
     adc_enable(ADC0);
 
@@ -210,9 +213,6 @@ static void adc0_init(void){
 	nvic_irq_enable(ADC0_1_IRQn, ADC_IRQ_PRIORITY, 0);
 
 	adc_disable_ext_trigger();
-#ifdef REG_CHAN_DMA
-	adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);
-#endif
 }
 
 static void adc1_init(void){
@@ -220,7 +220,7 @@ static void adc1_init(void){
 	rcu_periph_clock_enable(RCU_ADC1);
 	adc_deinit(ADC1);
 
-	adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);
+	adc_special_function_config(ADC1, ADC_CONTINUOUS_MODE, ENABLE);
 	adc_special_function_config(ADC1, ADC_SCAN_MODE, ENABLE);
 
     /* configure ADC data alignment */
@@ -249,66 +249,31 @@ static void adc1_init(void){
 	adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC_TRIGGER_NONE);
     adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
 
-    /* enable ADC interface */
-    adc_enable(ADC1);
-	delay_ms(1);
-    /* ADC calibration and reset calibration */
-    adc_calibration_enable(ADC1);
-    /* ADC software trigger enable */
-    adc_software_trigger_enable(ADC1, ADC_INSERTED_CHANNEL);	
-}
-
-#if (CONFIG_HW_VERSION==2)
-static void adc2_init(void){
-
-	rcu_periph_clock_enable(RCU_ADC2);
-
-	adc_deinit(ADC2);
-	
-    adc_special_function_config(ADC2, ADC_CONTINUOUS_MODE, ENABLE);
-    adc_special_function_config(ADC2, ADC_SCAN_MODE, ENABLE);
-
-    /* configure ADC data alignment */
-    adc_data_alignment_config(ADC2, ADC_DATAALIGN_RIGHT);
-#ifdef CONFIG_HW_MUTISAMPLE
-	adc_oversample_mode_config(ADC2, ADC_OVERSAMPLING_ALL_CONVERT, CONFIG_HW_MUTISAMPLE_SHIFT, CONFIG_HW_MUTISAMPLE);
-	adc_oversample_mode_enable(ADC2);
-#endif
-
-#ifdef REG_CHAN_DMA
-    /* configure ADC regular channel */
-	 adc_channel_length_config(ADC2, ADC_REGULAR_CHANNEL, ADC2_NUM);
-#if (CONFIG_HW_VERSION==2)
-    adc_regular_channel_config(ADC2, 0, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC2, 1, ACC_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-    adc_regular_channel_config(ADC2, 2, THROTTLE_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC2, 3, MOTOR_TEMP_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-#elif (CONFIG_HW_VERSION==3)
-	adc_regular_channel_config(ADC2, 0, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC2, 1, ACC_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC2, 2, VBUS_I_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC2, 3, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-	adc_regular_channel_config(ADC2, 4, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
-#endif
-#endif
+#if (CONFIG_HW_VERSION==3)
+	adc_channel_length_config(ADC1, ADC_REGULAR_CHANNEL, ADC01_NUM);
+
+	adc_regular_channel_config(ADC1, 0, VBUS_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC1, 1, ACC_V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC1, 2, VBUS_I_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC1, 3, V_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC1, 4, W_VOL_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC1, 5, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
+	adc_regular_channel_config(ADC1, 6, THROTTLE_5V_CHAN, ADC_REGCHAN_SAMPLE_TIME);
+	adc_regular_channel_config(ADC1, 7, ZERO_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
+	adc_regular_channel_config(ADC1, 8, DC5V_ADC_CHAN, ADC_REGCHAN_SAMPLE_TIME);
     /* configure ADC regular channel trigger */
-    adc_external_trigger_source_config(ADC2, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
-    adc_external_trigger_config(ADC2, ADC_REGULAR_CHANNEL, ENABLE);
-#ifdef REG_CHAN_DMA
-	adc_dma_mode_enable(ADC2);
+    adc_external_trigger_source_config(ADC1, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
+    adc_external_trigger_config(ADC1, ADC_REGULAR_CHANNEL, ENABLE);
+
+	adc_dma_mode_enable(ADC1);
 #endif
     /* enable ADC interface */
-    adc_enable(ADC2);
-
+    adc_enable(ADC1);
 	delay_ms(1);
     /* ADC calibration and reset calibration */
-    adc_calibration_enable(ADC2);
-
-#ifdef REG_CHAN_DMA
-	adc_software_trigger_enable(ADC2, ADC_REGULAR_CHANNEL);
-#endif
+    adc_calibration_enable(ADC1);	
 }
-#endif
+
 
 static void adc_gpio_init(void) {
 
@@ -402,18 +367,11 @@ static void adc_gpio_init(void) {
 
 void adc_init(void) {
 	adc_gpio_init();
-#ifdef REG_CHAN_DMA	
 	adc01_dma_init();
-#if (CONFIG_HW_VERSION==2)
-	adc2_dma_init();
-#endif
-#endif
 	adc0_init();
 	adc1_init();
-#if (CONFIG_HW_VERSION==2)
-	adc2_init();
-#endif
 	adc_current_sample_config(0);
+	adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);
 }
 
 void adc_set_vref_calc(float v) {
@@ -531,7 +489,7 @@ u16 adc_get_5v_ref(void) {
 }
 
 void adc_start_convert(void) {
-	int drop = 2;
+	int drop = 16;
     /* clear the ADC flag */
     adc_flag_clear(ADC0, ADC_FLAG_EOIC);
     adc_flag_clear(ADC1, ADC_FLAG_EOIC);

Applications/bsp/gd32/pwm.h

@@ -82,7 +82,7 @@
 		} \
 	}while(0)
 
-#define get_deadtime() TIMER_CCHP(pwm_timer)
+#define get_deadtime() (TIMER_CCHP(pwm_timer) & 0xFF)
 
 void pwm_3phase_init(void);
 void pwm_3phase_sides(bool hon, bool lon);

Applications/foc/motor/motor.c

@@ -241,7 +241,7 @@ bool mc_unsafe_critical_error(void) {
 	if (motor.b_ignor_throttle) {
 		err = err & (~(FOC_Cri_Err_Mask(FOC_CRIT_THRO_Err)));
 	}
-	return false;//(err != 0);
+	return (err != 0);
 }
 
 bool mc_start(u8 mode) {

Project/MC105AT_V3.uvoptx

@@ -103,7 +103,7 @@
         <bEvRecOn>1</bEvRecOn>
         <bSchkAxf>0</bSchkAxf>
         <bTchkAxf>0</bTchkAxf>
-        <nTsel>4</nTsel>
+        <nTsel>3</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -114,9 +114,14 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile></tIfile>
-        <pMon>Segger\JL2CM3.dll</pMon>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"Any" -UAny -O206 -S10 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0AT32F413_256.FLM -FS08000000 -FL040000 -FP0($$Device:-AT32F413RCT7$Flash\AT32F413_256.FLM)</Name>
+        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>ARMRTXEVENTFLAGS</Key>
@@ -135,7 +140,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGUARM</Key>
-          <Name>d</Name>
+          <Name></Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -148,56 +153,7 @@
           <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0AT32F413_256 -FL040000 -FS08000000 -FP0($$Device:-AT32F413RCT7$Flash\AT32F413_256.FLM)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
-      <Breakpoint>
-        <Bp>
-          <Number>0</Number>
-          <Type>0</Type>
-          <LineNumber>116</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>134231458</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>..\Applications\bsp\at32\mc_irqs.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\MC105AT\../Applications/bsp/at32/mc_irqs.c\116</Expression>
-        </Bp>
-        <Bp>
-          <Number>1</Number>
-          <Type>0</Type>
-          <LineNumber>16</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>134253490</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>..\Applications\main.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\MC105AT\../Applications/main.c\16</Expression>
-        </Bp>
-        <Bp>
-          <Number>2</Number>
-          <Type>0</Type>
-          <LineNumber>916</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>134222166</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>..\Applications\foc\motor\motor.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\MC105AT\../Applications/foc/motor/motor.c\916</Expression>
-        </Bp>
-      </Breakpoint>
+      <Breakpoint/>
       <WatchWindow1>
         <Ww>
           <count>0</count>

Project/MC105_V3.uvoptx

@@ -103,7 +103,7 @@
         <bEvRecOn>1</bEvRecOn>
         <bSchkAxf>0</bSchkAxf>
         <bTchkAxf>0</bTchkAxf>
-        <nTsel>4</nTsel>
+        <nTsel>3</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -114,9 +114,14 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile></tIfile>
-        <pMon>Segger\JL2CM3.dll</pMon>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"Any" -UAny -O206 -S0 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_CL.FLM -FS08000000 -FL040000 -FP0($$Device:GD32F305RC$Flash\GD32F30x_CL.FLM)</Name>
+        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
@@ -145,7 +150,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGUARM</Key>
-          <Name>d</Name>
+          <Name></Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>
@@ -211,6 +216,10 @@
           <Name>System Viewer\ADC0</Name>
           <WinId>35905</WinId>
         </Entry>
+        <Entry>
+          <Name>System Viewer\ADC1</Name>
+          <WinId>35904</WinId>
+        </Entry>
       </SystemViewers>
     </TargetOption>
   </Target>

Project/MC105_V3.uvprojx

@@ -16,8 +16,8 @@
         <TargetCommonOption>
           <Device>GD32F305RC</Device>
           <Vendor>GigaDevice</Vendor>
-          <PackID>GigaDevice.GD32F30x_DFP.2.2.0</PackID>
-          <PackURL>http://gd32mcu.com/data/documents/pack/</PackURL>
+          <PackID>GigaDevice.GD32F30x_DFP.2.2.3</PackID>
+          <PackURL>https://gd32mcu.com/data/documents/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x018000) IROM(0x08000000,0x040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>

Project/version_mc105AT.cfg

@@ -1,3 +1,3 @@
 project: MC105AT
 version: 01
-debug: 1
+debug: 0