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@@ -5,61 +5,18 @@
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#include "math/fast_math.h"
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#include "math/fast_math.h"
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-#ifdef CONFIG_BOARD_MCXXX
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-#if (CONFIG_MC105_HW_VERSION==2)
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-#define ADC01_NUM (8)
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-#define ADC2_NUM 4
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+#define ADC1_NUM 3
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+#define ADC2_NUM 3
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-#define MOS_TEMP_BUFF_IDX 0
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-#define VREF5v_BUFF_IDX 1
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-#define VBUS_I_BUFF_IDX 2
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-#define U_VOL_BUFF_IDX 3
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-#define V_VOL_BUFF_IDX 4
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-#define W_VOL_BUFF_IDX 5
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-#define VREF_BUFF_IDX 7
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+#define U_VOL_BUFF_IDX 0
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+#define V_VOL_BUFF_IDX 1
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+#define W_VOL_BUFF_IDX 2
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+#define VBUS_I_BUFF_IDX 3
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+#define MOS_TEMP_BUFF_IDX 4
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+#define VBUS_V_BUFF_IDX 5
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-#define VBUS_V_BUFF_IDX 8
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-#define ACC_V_BUFF_IDX 9
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-#define THROTTLE_BUFF_IDX 10
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-#define MOTOR_TEMP_BUFF_IDX 11
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-
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-#elif (CONFIG_MC105_HW_VERSION==3)
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-#define ADC1_NUM 9
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-#define ADC2_NUM 9
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-
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-#define MOS_TEMP_BUFF_IDX 0
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-#define VBUS_V_BUFF_IDX 1
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-
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-#define MOTOR_TEMP_BUFF_IDX 2
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-#define ACC_V_BUFF_IDX 3
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-
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-#define THROTTLE_BUFF_IDX 4
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-#define VBUS_I_BUFF_IDX 5
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-
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-#define THROTTLE2_BUFF_IDX 6
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-#define V_VOL_BUFF_IDX 7
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-
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-//zero chan 8
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-#define W_VOL_BUFF_IDX 9
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-
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-#define VREF_BUFF_IDX 10
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-//zero chan 11
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-
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-#define THROTTLE2_5V_BUFF_IDX 12
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-#define THROTTLE_5V_BUFF_IDX 13
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-
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-#define U_VOL_BUFF_IDX 14
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-//zero chan 15
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-
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-//zero chan 16
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-#define VREF5v_BUFF_IDX 17
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-
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-#endif
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-#endif
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#define REG_CHAN_NUM (ADC1_NUM + ADC2_NUM)
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#define REG_CHAN_NUM (ADC1_NUM + ADC2_NUM)
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u16 adc_buffer[REG_CHAN_NUM];
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u16 adc_buffer[REG_CHAN_NUM];
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-float vref_adc = 1408.0f;
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-float vref_5v_adc = 3095.0f;
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static void analog_gpio_init(gpio_type *gpiox, u32 pin) {
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static void analog_gpio_init(gpio_type *gpiox, u32 pin) {
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gpio_init_type gpio_init_struct = {0};
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gpio_init_type gpio_init_struct = {0};
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@@ -90,13 +47,76 @@ static void adc01_dma_init(void)
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dma_init_struct.priority = DMA_PRIORITY_HIGH;
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dma_init_struct.priority = DMA_PRIORITY_HIGH;
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dma_init_struct.loop_mode_enable = TRUE;
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dma_init_struct.loop_mode_enable = TRUE;
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dma_init(DMA1_CHANNEL1, &dma_init_struct);
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dma_init(DMA1_CHANNEL1, &dma_init_struct);
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-
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+ /* Flexible Mode Channel Cofig */
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+ dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_ADC1);
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dma_channel_enable(DMA1_CHANNEL1, TRUE);
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dma_channel_enable(DMA1_CHANNEL1, TRUE);
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}
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}
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+static void adc_preempt_channel_set_samples(adc_type *adc_x, adc_channel_select_type adc_channel, adc_sampletime_select_type adc_sampletime)
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+{
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+ switch(adc_channel)
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+ {
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+ case ADC_CHANNEL_0:
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+ adc_x->spt2_bit.cspt0 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_1:
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+ adc_x->spt2_bit.cspt1 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_2:
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+ adc_x->spt2_bit.cspt2 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_3:
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+ adc_x->spt2_bit.cspt3 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_4:
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+ adc_x->spt2_bit.cspt4 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_5:
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+ adc_x->spt2_bit.cspt5 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_6:
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+ adc_x->spt2_bit.cspt6 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_7:
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+ adc_x->spt2_bit.cspt7 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_8:
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+ adc_x->spt2_bit.cspt8 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_9:
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+ adc_x->spt2_bit.cspt9 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_10:
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+ adc_x->spt1_bit.cspt10 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_11:
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+ adc_x->spt1_bit.cspt11 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_12:
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+ adc_x->spt1_bit.cspt12 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_13:
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+ adc_x->spt1_bit.cspt13 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_14:
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+ adc_x->spt1_bit.cspt14 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_15:
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+ adc_x->spt1_bit.cspt15 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_16:
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+ adc_x->spt1_bit.cspt16 = adc_sampletime;
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+ break;
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+ case ADC_CHANNEL_17:
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+ adc_x->spt1_bit.cspt17 = adc_sampletime;
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+ break;
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+ default:
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+ break;
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+ }
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+}
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-static void adc0_init(void){
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+static void adc01_init(void){
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adc_base_config_type adc_base_struct;
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adc_base_config_type adc_base_struct;
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/* adc clock configuration */
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/* adc clock configuration */
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@@ -115,52 +135,38 @@ static void adc0_init(void){
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adc_base_config(ADC2, &adc_base_struct);
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adc_base_config(ADC2, &adc_base_struct);
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/* ordinary channel configuration */
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/* ordinary channel configuration */
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- adc_ordinary_channel_set(ADC1, MOS_TEMP_ADC_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC1, MOTOR_TEMP_ADC_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC1, THROTTLE_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC1, THROTTLE2_CHAN, 4, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC1, ZERO_ADC_CHAN, 5, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
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- adc_ordinary_channel_set(ADC1, ADC_CHANNEL_17, 6, ADC_REGCHAN_SAMPLE_TIME); //mcu内部vref
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- adc_ordinary_channel_set(ADC1, THROTTLE2_5V_CHAN, 7, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC1, U_VOL_ADC_CHAN, 8, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC1, ZERO_ADC_CHAN, 9, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
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+ adc_ordinary_channel_set(ADC1, U_VOL_ADC_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
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+ adc_ordinary_channel_set(ADC1, W_VOL_ADC_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
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+ adc_ordinary_channel_set(ADC1, MOS_TEMP_ADC_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
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adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
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adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
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- adc_ordinary_channel_set(ADC2, VBUS_V_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, ACC_V_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, VBUS_I_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, V_VOL_ADC_CHAN, 4, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, W_VOL_ADC_CHAN, 5, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, ZERO_ADC_CHAN, 6, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
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- adc_ordinary_channel_set(ADC2, THROTTLE_5V_CHAN, 7, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, ZERO_ADC_CHAN, 8, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
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- adc_ordinary_channel_set(ADC2, DC5V_ADC_CHAN, 9, ADC_REGCHAN_SAMPLE_TIME);
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+ adc_ordinary_channel_set(ADC2, V_VOL_ADC_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
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+ adc_ordinary_channel_set(ADC2, VBUS_I_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
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+ adc_ordinary_channel_set(ADC2, VBUS_V_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
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adc_ordinary_conversion_trigger_set(ADC2, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
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adc_ordinary_conversion_trigger_set(ADC2, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
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- adc_preempt_channel_length_set(ADC1, 3);
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- adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 1, ADC_INSERT_SAMPLE_TIME);
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- adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 2, ADC_INSERT_SAMPLE_TIME);
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- adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 3, ADC_INSERT_SAMPLE_TIME);
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- //adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 4, ADC_INSERT_SAMPLE_TIME);
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+ adc_preempt_channel_length_set(ADC1, 1);
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+ adc_preempt_channel_set(ADC1, U_PHASE_I_CHAN, 1, ADC_INSERT_SAMPLE_TIME);
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+ adc_preempt_channel_set_samples(ADC1, V_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
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+ adc_preempt_channel_set_samples(ADC1, W_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
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/* adc prempt trigger source */
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/* adc prempt trigger source */
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adc_preempt_conversion_trigger_set(ADC1, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
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adc_preempt_conversion_trigger_set(ADC1, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
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- adc_preempt_channel_length_set(ADC2, 3);
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- adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 1, ADC_INSERT_SAMPLE_TIME);
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- adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 2, ADC_INSERT_SAMPLE_TIME);
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- adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 3, ADC_INSERT_SAMPLE_TIME);
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- //adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 4, ADC_INSERT_SAMPLE_TIME);
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+ adc_preempt_channel_length_set(ADC2, 1);
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+ adc_preempt_channel_set(ADC2, V_PHASE_I_CHAN, 1, ADC_INSERT_SAMPLE_TIME);
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+ adc_preempt_channel_set_samples(ADC2, U_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
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+ adc_preempt_channel_set_samples(ADC2, W_PHASE_I_CHAN, ADC_INSERT_SAMPLE_TIME);
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/* adc prempt trigger source */
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/* adc prempt trigger source */
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adc_preempt_conversion_trigger_set(ADC2, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
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adc_preempt_conversion_trigger_set(ADC2, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
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/* select adc mster-slave mode */
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/* select adc mster-slave mode */
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adc_combine_mode_select(ADC_ORDINARY_SMLT_PREEMPT_SMLT_MODE);
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adc_combine_mode_select(ADC_ORDINARY_SMLT_PREEMPT_SMLT_MODE);
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- adc_tempersensor_vintrv_enable(TRUE);
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+ //adc_tempersensor_vintrv_enable(TRUE);
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adc_dma_mode_enable(ADC1, TRUE);
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adc_dma_mode_enable(ADC1, TRUE);
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- adc_dma_mode_enable(ADC2, TRUE);
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+ //adc_dma_mode_enable(ADC2, TRUE);
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/* ADC enable and calibration */
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/* ADC enable and calibration */
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adc_enable(ADC1, TRUE);
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adc_enable(ADC1, TRUE);
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@@ -179,60 +185,12 @@ static void adc0_init(void){
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adc_disable_ext_trigger();
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adc_disable_ext_trigger();
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- adc_current_sample_config(0);
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+ adc_current_sample_config(PHASE_AB);
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adc_ordinary_software_trigger_enable(ADC1, TRUE);
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adc_ordinary_software_trigger_enable(ADC1, TRUE);
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}
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}
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-static void adc1_init(void){
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-
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-#if 0
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- adc_base_config_type adc_base_struct;
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-
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- /* adc clock configuration */
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- crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
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-
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- adc_reset(ADC2);
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- adc_base_struct.sequence_mode = TRUE;
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- adc_base_struct.repeat_mode = TRUE;
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- adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
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- adc_base_struct.ordinary_channel_length = ADC2_NUM;
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- adc_base_config(ADC2, &adc_base_struct);
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-
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- /* ordinary channel configuration */
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- adc_ordinary_channel_set(ADC2, VBUS_V_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, ACC_V_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, VBUS_I_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
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- adc_ordinary_channel_set(ADC2, V_VOL_ADC_CHAN, 4, ADC_REGCHAN_SAMPLE_TIME);
|
|
|
|
|
- adc_ordinary_channel_set(ADC2, W_VOL_ADC_CHAN, 5, ADC_REGCHAN_SAMPLE_TIME);
|
|
|
|
|
- adc_ordinary_channel_set(ADC2, ZERO_ADC_CHAN, 6, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
|
|
|
|
|
- adc_ordinary_channel_set(ADC2, THROTTLE_5V_CHAN, 7, ADC_REGCHAN_SAMPLE_TIME);
|
|
|
|
|
- adc_ordinary_channel_set(ADC2, ZERO_ADC_CHAN, 8, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
|
|
|
|
|
- adc_ordinary_channel_set(ADC2, DC5V_ADC_CHAN, 9, ADC_REGCHAN_SAMPLE_TIME);
|
|
|
|
|
- adc_ordinary_conversion_trigger_set(ADC2, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
|
|
|
|
|
-
|
|
|
|
|
- adc_preempt_channel_length_set(ADC2, 3);
|
|
|
|
|
- adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 1, ADC_INSERT_SAMPLE_TIME);
|
|
|
|
|
- adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 2, ADC_INSERT_SAMPLE_TIME);
|
|
|
|
|
- adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 3, ADC_INSERT_SAMPLE_TIME);
|
|
|
|
|
- //adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 4, ADC_INSERT_SAMPLE_TIME);
|
|
|
|
|
- /* adc prempt trigger source */
|
|
|
|
|
- adc_preempt_conversion_trigger_set(ADC2, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
|
|
|
|
|
-
|
|
|
|
|
- adc_dma_mode_enable(ADC2, TRUE);
|
|
|
|
|
- /* ADC enable and calibration */
|
|
|
|
|
- adc_enable(ADC2, TRUE);
|
|
|
|
|
- adc_calibration_init(ADC2);
|
|
|
|
|
- while(adc_calibration_init_status_get(ADC2));
|
|
|
|
|
- adc_calibration_start(ADC2);
|
|
|
|
|
- while(adc_calibration_status_get(ADC2));
|
|
|
|
|
-#endif
|
|
|
|
|
-}
|
|
|
|
|
-
|
|
|
|
|
-
|
|
|
|
|
static void adc_gpio_init(void) {
|
|
static void adc_gpio_init(void) {
|
|
|
-
|
|
|
|
|
- /* configure ADC pin, current sampling -- ADC_IN1(PA1) ADC_IN12(PC2) ADC_IN13(PC3) */
|
|
|
|
|
#ifdef U_PHASE_ADC_GROUP
|
|
#ifdef U_PHASE_ADC_GROUP
|
|
|
crm_periph_clock_enable(U_PHASE_ADC_RCU, TRUE);
|
|
crm_periph_clock_enable(U_PHASE_ADC_RCU, TRUE);
|
|
|
analog_gpio_init(U_PHASE_ADC_GROUP, U_PHASE_ADC_PIN);
|
|
analog_gpio_init(U_PHASE_ADC_GROUP, U_PHASE_ADC_PIN);
|
|
@@ -245,47 +203,14 @@ static void adc_gpio_init(void) {
|
|
|
crm_periph_clock_enable(W_PHASE_ADC_RCU, TRUE);
|
|
crm_periph_clock_enable(W_PHASE_ADC_RCU, TRUE);
|
|
|
analog_gpio_init(W_PHASE_ADC_GROUP, W_PHASE_ADC_PIN);
|
|
analog_gpio_init(W_PHASE_ADC_GROUP, W_PHASE_ADC_PIN);
|
|
|
#endif
|
|
#endif
|
|
|
-
|
|
|
|
|
#ifdef VBUS_V_ADC_GROUP
|
|
#ifdef VBUS_V_ADC_GROUP
|
|
|
crm_periph_clock_enable(VBUS_V_ADC_RCU, TRUE);
|
|
crm_periph_clock_enable(VBUS_V_ADC_RCU, TRUE);
|
|
|
- /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
|
|
|
|
|
analog_gpio_init(VBUS_V_ADC_GROUP, VBUS_V_ADC_PIN);
|
|
analog_gpio_init(VBUS_V_ADC_GROUP, VBUS_V_ADC_PIN);
|
|
|
#endif
|
|
#endif
|
|
|
-
|
|
|
|
|
#ifdef VBUS_I_ADC_GROUP
|
|
#ifdef VBUS_I_ADC_GROUP
|
|
|
crm_periph_clock_enable(VBUS_I_ADC_RCU, TRUE);
|
|
crm_periph_clock_enable(VBUS_I_ADC_RCU, TRUE);
|
|
|
- /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
|
|
|
|
|
analog_gpio_init(VBUS_I_ADC_GROUP, VBUS_I_ADC_PIN);
|
|
analog_gpio_init(VBUS_I_ADC_GROUP, VBUS_I_ADC_PIN);
|
|
|
#endif
|
|
#endif
|
|
|
-
|
|
|
|
|
-
|
|
|
|
|
-#ifdef ACC_V_ADC_GROUP
|
|
|
|
|
- crm_periph_clock_enable(ACC_V_ADC_RCU, TRUE);
|
|
|
|
|
- /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
|
|
|
|
|
- analog_gpio_init(ACC_V_ADC_GROUP, ACC_V_ADC_PIN);
|
|
|
|
|
-#endif
|
|
|
|
|
-
|
|
|
|
|
-#ifdef THROTTLE_V_ADC_GROUP
|
|
|
|
|
- crm_periph_clock_enable(THROTTLE_V_ADC_RCU, TRUE);
|
|
|
|
|
- /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
|
|
|
|
|
- analog_gpio_init(THROTTLE_V_ADC_GROUP, THROTTLE_V_ADC_PIN);
|
|
|
|
|
-#endif
|
|
|
|
|
-#ifdef THROTTLE2_V_ADC_GROUP
|
|
|
|
|
- crm_periph_clock_enable(THROTTLE2_V_ADC_RCU, TRUE);
|
|
|
|
|
- analog_gpio_init(THROTTLE2_V_ADC_GROUP, THROTTLE2_V_ADC_PIN);
|
|
|
|
|
-#endif
|
|
|
|
|
-
|
|
|
|
|
-#ifdef THROTTLE_5V_ADC_GROUP
|
|
|
|
|
- crm_periph_clock_enable(THROTTLE_5V_ADC_RCU, TRUE);
|
|
|
|
|
- /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
|
|
|
|
|
- analog_gpio_init(THROTTLE_5V_ADC_GROUP, THROTTLE_5V_ADC_PIN);
|
|
|
|
|
-#endif
|
|
|
|
|
-#ifdef THROTTLE2_5V_ADC_GROUP
|
|
|
|
|
- crm_periph_clock_enable(THROTTLE2_5V_ADC_RCU, TRUE);
|
|
|
|
|
- /* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
|
|
|
|
|
- analog_gpio_init(THROTTLE2_5V_ADC_GROUP, THROTTLE2_5V_ADC_PIN);
|
|
|
|
|
-#endif
|
|
|
|
|
-
|
|
|
|
|
#ifdef U_VOL_ADC_GROUP
|
|
#ifdef U_VOL_ADC_GROUP
|
|
|
crm_periph_clock_enable(U_VOL_ADC_RCU, TRUE);
|
|
crm_periph_clock_enable(U_VOL_ADC_RCU, TRUE);
|
|
|
analog_gpio_init(U_VOL_ADC_GROUP, U_VOL_ADC_PIN);
|
|
analog_gpio_init(U_VOL_ADC_GROUP, U_VOL_ADC_PIN);
|
|
@@ -302,64 +227,37 @@ static void adc_gpio_init(void) {
|
|
|
crm_periph_clock_enable(MOS_TEMP_ADC_RCU, TRUE);
|
|
crm_periph_clock_enable(MOS_TEMP_ADC_RCU, TRUE);
|
|
|
analog_gpio_init(MOS_TEMP_ADC_GROUP, MOS_TEMP_ADC_PIN);
|
|
analog_gpio_init(MOS_TEMP_ADC_GROUP, MOS_TEMP_ADC_PIN);
|
|
|
#endif
|
|
#endif
|
|
|
-#ifdef MOS_TEMP1_ADC_GROUP
|
|
|
|
|
- crm_periph_clock_enable(MOS_TEMP1_ADC_RCU, TRUE);
|
|
|
|
|
- analog_gpio_init(MOS_TEMP1_ADC_GROUP, MOS_TEMP1_ADC_PIN);
|
|
|
|
|
-#endif
|
|
|
|
|
-
|
|
|
|
|
-#ifdef MOTOR_TEMP_ADC_GROUP
|
|
|
|
|
- crm_periph_clock_enable(MOTOR_TEMP_ADC_RCU, TRUE);
|
|
|
|
|
- analog_gpio_init(MOTOR_TEMP_ADC_GROUP, MOTOR_TEMP_ADC_PIN);
|
|
|
|
|
-#endif
|
|
|
|
|
-
|
|
|
|
|
-#ifdef ZERO_ADC_GROUP
|
|
|
|
|
- crm_periph_clock_enable(ZERO_ADC_RCU, TRUE);
|
|
|
|
|
- analog_gpio_init(ZERO_ADC_GROUP, ZERO_ADC_PIN);
|
|
|
|
|
-#endif
|
|
|
|
|
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
-void adc_init(void) {
|
|
|
|
|
|
|
+void adc_init(bool mot_ind) {
|
|
|
adc_gpio_init();
|
|
adc_gpio_init();
|
|
|
adc01_dma_init();
|
|
adc01_dma_init();
|
|
|
- adc0_init();
|
|
|
|
|
- adc1_init();
|
|
|
|
|
|
|
+ adc01_init();
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
void adc_set_vref_calc(float v) {
|
|
void adc_set_vref_calc(float v) {
|
|
|
- vref_adc = v;
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
void adc_set_5vref_calc(float v) {
|
|
void adc_set_5vref_calc(float v) {
|
|
|
- vref_5v_adc = v;
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
-#define VREF_COMP_LFP_CEOF (0.0001F)
|
|
|
|
|
|
|
+
|
|
|
static float vref_compestion_filter = 1.0f;
|
|
static float vref_compestion_filter = 1.0f;
|
|
|
-#define VREF_3V3_COMPESTION() (vref_adc/(float)adc_buffer[VREF_BUFF_IDX])
|
|
|
|
|
-void adc_3v3ref_filter(void) {
|
|
|
|
|
- float value = VREF_3V3_COMPESTION();
|
|
|
|
|
- LowPass_Filter(vref_compestion_filter, value, VREF_COMP_LFP_CEOF);
|
|
|
|
|
-}
|
|
|
|
|
|
|
+#define VREF_3V3_COMPESTION() (vref_compestion_filter)
|
|
|
|
|
|
|
|
float adc_vref_compesion(void) {
|
|
float adc_vref_compesion(void) {
|
|
|
return vref_compestion_filter;
|
|
return vref_compestion_filter;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
static float vref_5v_compestion_filter = 1.0f;
|
|
static float vref_5v_compestion_filter = 1.0f;
|
|
|
-#define VREF_5V_COMPESTION() (vref_5v_adc/(float)adc_buffer[VREF5v_BUFF_IDX])
|
|
|
|
|
-void adc_5vref_filter(void) {
|
|
|
|
|
- float value = VREF_5V_COMPESTION();
|
|
|
|
|
- LowPass_Filter(vref_5v_compestion_filter, value, VREF_COMP_LFP_CEOF);
|
|
|
|
|
-}
|
|
|
|
|
|
|
+#define VREF_5V_COMPESTION() (vref_5v_compestion_filter)
|
|
|
|
|
|
|
|
float adc_5vref_compesion(void) {
|
|
float adc_5vref_compesion(void) {
|
|
|
return vref_5v_compestion_filter;
|
|
return vref_5v_compestion_filter;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
void adc_vref_filter(void) {
|
|
void adc_vref_filter(void) {
|
|
|
- adc_3v3ref_filter();
|
|
|
|
|
- adc_5vref_filter();
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_vbus(void) {
|
|
u16 adc_get_vbus(void) {
|
|
@@ -367,47 +265,27 @@ u16 adc_get_vbus(void) {
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_acc(void) {
|
|
u16 adc_get_acc(void) {
|
|
|
-#ifdef CONFIG_BOARD_MCXXX
|
|
|
|
|
- return (float)adc_buffer[ACC_V_BUFF_IDX] * VREF_3V3_COMPESTION();
|
|
|
|
|
-#else
|
|
|
|
|
return adc_get_vbus();
|
|
return adc_get_vbus();
|
|
|
-#endif
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_ibus(void) {
|
|
u16 adc_get_ibus(void) {
|
|
|
-#ifdef CONFIG_BOARD_MCXXX
|
|
|
|
|
return (float)adc_buffer[VBUS_I_BUFF_IDX] * VREF_5V_COMPESTION();
|
|
return (float)adc_buffer[VBUS_I_BUFF_IDX] * VREF_5V_COMPESTION();
|
|
|
-#else
|
|
|
|
|
- return 0;
|
|
|
|
|
-#endif
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_throttle(void) {
|
|
u16 adc_get_throttle(void) {
|
|
|
- return adc_buffer[THROTTLE_BUFF_IDX] * VREF_3V3_COMPESTION();
|
|
|
|
|
|
|
+ return 0;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_throttle2(void) {
|
|
u16 adc_get_throttle2(void) {
|
|
|
-#ifdef THROTTLE2_BUFF_IDX
|
|
|
|
|
- return adc_buffer[THROTTLE2_BUFF_IDX] * VREF_3V3_COMPESTION();
|
|
|
|
|
-#else
|
|
|
|
|
return adc_get_throttle();
|
|
return adc_get_throttle();
|
|
|
-#endif
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_thro_5v(void) {
|
|
u16 adc_get_thro_5v(void) {
|
|
|
-#ifdef THROTTLE_5V_BUFF_IDX
|
|
|
|
|
- return adc_buffer[THROTTLE_5V_BUFF_IDX] * VREF_3V3_COMPESTION();
|
|
|
|
|
-#else
|
|
|
|
|
return 0;
|
|
return 0;
|
|
|
-#endif
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_thro2_5v(void) {
|
|
u16 adc_get_thro2_5v(void) {
|
|
|
-#ifdef THROTTLE2_5V_BUFF_IDX
|
|
|
|
|
- return adc_buffer[THROTTLE2_5V_BUFF_IDX] * VREF_3V3_COMPESTION();
|
|
|
|
|
-#else
|
|
|
|
|
return 0;
|
|
return 0;
|
|
|
-#endif
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
void adc_get_uvw_phaseV(u16 *uvw) {
|
|
void adc_get_uvw_phaseV(u16 *uvw) {
|
|
@@ -421,23 +299,15 @@ u16 adc_get_mos_temp(void) {
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_motor_temp(void) {
|
|
u16 adc_get_motor_temp(void) {
|
|
|
- return adc_buffer[MOTOR_TEMP_BUFF_IDX];
|
|
|
|
|
|
|
+ return 0;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_vref(void) {
|
|
u16 adc_get_vref(void) {
|
|
|
-#ifdef CONFIG_BOARD_MCXXX
|
|
|
|
|
- return adc_buffer[VREF_BUFF_IDX];
|
|
|
|
|
-#else
|
|
|
|
|
return 0;
|
|
return 0;
|
|
|
-#endif
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
u16 adc_get_5v_ref(void) {
|
|
u16 adc_get_5v_ref(void) {
|
|
|
-#ifdef CONFIG_BOARD_MCXXX
|
|
|
|
|
- return adc_buffer[VREF5v_BUFF_IDX];
|
|
|
|
|
-#else
|
|
|
|
|
return 0;
|
|
return 0;
|
|
|
-#endif
|
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
void adc_start_convert(void) {
|
|
void adc_start_convert(void) {
|