Bläddra i källkod

change pwm_timer to MOS_PWM_TIMER

Signed-off-by: huhui <huhui@sharkgulf.com>
huhui 3 år sedan
förälder
incheckning
5474c1f6c6

+ 2 - 1
Applications/bsp/at32/board_at_mc100_v1.h

@@ -55,8 +55,9 @@
 #define ADC_FULL_MAX          (4095.0F)
 
 /* MOS驱动 */
-#define pwm_timer TIMER0
+#define MOS_PWM_TIMER TIMER0
 #define PWM_MODE TIMER_OC_MODE_PWM0
+
 #define PWM_U_P_GROUP 	GPIOA
 #define PWM_U_P_PIN 	GPIO_PIN_8
 #define PWM_U_P_RCU 	RCU_GPIOA

+ 1 - 1
Applications/bsp/at32/board_at_mc105_v3.h

@@ -56,7 +56,7 @@
 #define ADC_FULL_MAX          (4095.0F)
 
 /* MOS驱动 */
-#define pwm_timer 		TMR1
+#define MOS_PWM_TIMER 		TMR1
 #define PWM_MODE 		TMR_OUTPUT_CONTROL_PWM_MODE_A
 #define PWM_CRM_CLK     CRM_TMR1_PERIPH_CLOCK
 #define PWM_U_P_GROUP 	GPIOA

+ 4 - 4
Applications/bsp/at32/mc_irqs.c

@@ -105,15 +105,15 @@ void ADC1_2_IRQHandler(void)
 }
 
 void TMR1_OVF_TMR10_IRQHandler(void) {
-	if (tmr_flag_get(pwm_timer, TMR_OVF_FLAG)) {
-		tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+	if (tmr_flag_get(MOS_PWM_TIMER, TMR_OVF_FLAG)) {
+		tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_FLAG);
 		TIMER_UP_IRQHandler();
 	}
 }
 
 void TMR1_BRK_TMR9_IRQHandler(void) {
-	if (tmr_flag_get(pwm_timer, TMR_BRK_FLAG)) {
-		tmr_flag_clear(pwm_timer, TMR_BRK_FLAG);
+	if (tmr_flag_get(MOS_PWM_TIMER, TMR_BRK_FLAG)) {
+		tmr_flag_clear(MOS_PWM_TIMER, TMR_BRK_FLAG);
 		MC_Protect_IRQHandler();
 	}
 }

+ 42 - 42
Applications/bsp/at32/pwm.c

@@ -45,7 +45,7 @@ void pwm_3phase_sides(bool hon, bool lon) {
 	if (hon && lon) {
 		return;
 	}
-	tmr_reset(pwm_timer);
+	tmr_reset(MOS_PWM_TIMER);
 	crm_periph_clock_enable(PWM_CRM_CLK, TRUE);
     pwm_gpio_init(PWM_U_P_GROUP,GPIO_MODE_OUTPUT,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_NONE, PWM_U_P_PIN);
     pwm_gpio_init(PWM_V_P_GROUP,GPIO_MODE_OUTPUT,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_NONE,PWM_V_P_PIN);
@@ -133,18 +133,18 @@ static void _init_pwm_timer(bool enable_brk) {
 	tmr_output_config_type tmr_output_struct;
 	tmr_brkdt_config_type tmr_brkdt_config_struct;
 
-	tmr_reset(pwm_timer);
+	tmr_reset(MOS_PWM_TIMER);
 	crm_periph_clock_enable(PWM_CRM_CLK, TRUE);
-	tmr_repetition_counter_set(pwm_timer, 1); 		 /* the pwm cycle isr in underflow (high-side pwm on) */
-	tmr_base_init(pwm_timer, FOC_PWM_Half_Period, 0);
-	tmr_cnt_dir_set(pwm_timer, TMR_COUNT_TWO_WAY_1);	/* output compare interrupt flags are set only count-down */
+	tmr_repetition_counter_set(MOS_PWM_TIMER, 1); 		 /* the pwm cycle isr in underflow (high-side pwm on) */
+	tmr_base_init(MOS_PWM_TIMER, FOC_PWM_Half_Period, 0);
+	tmr_cnt_dir_set(MOS_PWM_TIMER, TMR_COUNT_TWO_WAY_1);	/* output compare interrupt flags are set only count-down */
 	/* set dead time clock */
-	tmr_clock_source_div_set(pwm_timer, TMR_CLOCK_DIV1);
+	tmr_clock_source_div_set(MOS_PWM_TIMER, TMR_CLOCK_DIV1);
 
 	/* channel 1,2,3,1C,2C,3C configuration in output mode */
-	tmr_channel_value_set(pwm_timer, TMR_SELECT_CHANNEL_1, FOC_PWM_Half_Period/2);
-	tmr_channel_value_set(pwm_timer, TMR_SELECT_CHANNEL_2, FOC_PWM_Half_Period/2);
-	tmr_channel_value_set(pwm_timer, TMR_SELECT_CHANNEL_3, FOC_PWM_Half_Period/2);
+	tmr_channel_value_set(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_1, FOC_PWM_Half_Period/2);
+	tmr_channel_value_set(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_2, FOC_PWM_Half_Period/2);
+	tmr_channel_value_set(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_3, FOC_PWM_Half_Period/2);
 
 	tmr_output_default_para_init(&tmr_output_struct);
 	tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
@@ -156,18 +156,18 @@ static void _init_pwm_timer(bool enable_brk) {
 	tmr_output_struct.occ_idle_state = FALSE;
 	
 	/* channel 1, 2, 3 */
-	tmr_output_channel_config(pwm_timer, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
-	tmr_output_channel_config(pwm_timer, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
-	tmr_output_channel_config(pwm_timer, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
+	tmr_output_channel_config(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
+	tmr_output_channel_config(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
+	tmr_output_channel_config(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
 	
-	tmr_output_channel_buffer_enable(pwm_timer, TMR_SELECT_CHANNEL_1, TRUE);
-	tmr_output_channel_buffer_enable(pwm_timer, TMR_SELECT_CHANNEL_2, TRUE);
-	tmr_output_channel_buffer_enable(pwm_timer, TMR_SELECT_CHANNEL_3, TRUE);
+	tmr_output_channel_buffer_enable(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_1, TRUE);
+	tmr_output_channel_buffer_enable(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_2, TRUE);
+	tmr_output_channel_buffer_enable(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_3, TRUE);
 
 	tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
-	tmr_output_channel_config(pwm_timer, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
-	tmr_channel_value_set(pwm_timer, TMR_SELECT_CHANNEL_4, FOC_PWM_Half_Period-1);
-	tmr_output_channel_buffer_enable(pwm_timer, TMR_SELECT_CHANNEL_4, TRUE);
+	tmr_output_channel_config(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
+	tmr_channel_value_set(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_4, FOC_PWM_Half_Period-1);
+	tmr_output_channel_buffer_enable(MOS_PWM_TIMER, TMR_SELECT_CHANNEL_4, TRUE);
 #ifdef PWM_BRAKE_GROUP
 	/* automatic output enable, break, dead time and lock configuration */
 	tmr_brkdt_default_para_init(&tmr_brkdt_config_struct);
@@ -178,25 +178,25 @@ static void _init_pwm_timer(bool enable_brk) {
 	tmr_brkdt_config_struct.fcsoen_state = FALSE;
 	tmr_brkdt_config_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW;
 	tmr_brkdt_config_struct.wp_level = TMR_WP_OFF;
-	tmr_brkdt_config(pwm_timer, &tmr_brkdt_config_struct);
+	tmr_brkdt_config(MOS_PWM_TIMER, &tmr_brkdt_config_struct);
 #endif
-	tmr_primary_mode_select(pwm_timer, TMR_PRIMARY_SEL_OVERFLOW);
+	tmr_primary_mode_select(MOS_PWM_TIMER, TMR_PRIMARY_SEL_OVERFLOW);
 
-	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG | TMR_BRK_FLAG | TMR_C4_INT);
-	tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, TRUE);
-	tmr_interrupt_enable(pwm_timer, TMR_BRK_INT, TRUE);
+	tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_FLAG | TMR_BRK_FLAG | TMR_C4_INT);
+	tmr_interrupt_enable(MOS_PWM_TIMER, TMR_OVF_INT, TRUE);
+	tmr_interrupt_enable(MOS_PWM_TIMER, TMR_BRK_INT, TRUE);
 
 	/* disable single pulse mode */
-	tmr_one_cycle_mode_enable(pwm_timer, FALSE);
+	tmr_one_cycle_mode_enable(MOS_PWM_TIMER, FALSE);
 
 	/* pwm timer output enable */
-	tmr_output_enable(pwm_timer, FALSE);
+	tmr_output_enable(MOS_PWM_TIMER, FALSE);
 
 	nvic_irq_enable(TMR1_BRK_TMR9_IRQn, EBREAK_IRQ_PRIORITY, 0);
 	nvic_irq_enable(TMR1_OVF_TMR10_IRQn, TIMER_UP_IRQ_PRIORITY, 0);
 
 	/* enable pwm timer */
-	tmr_counter_enable(pwm_timer, TRUE);
+	tmr_counter_enable(MOS_PWM_TIMER, TRUE);
 }
 
 
@@ -204,32 +204,32 @@ void pwm_start(void){
 	pwm_update_duty(FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2);
 	pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1);
 	/* wait for a new PWM period to flush last HF task */
-	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+	tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_FLAG);
 
-	tmr_event_sw_trigger(pwm_timer, TMR_OVERFLOW_SWTRIG);
-	while ( tmr_flag_get(pwm_timer, TMR_OVF_FLAG) == RESET ){}
+	tmr_event_sw_trigger(MOS_PWM_TIMER, TMR_OVERFLOW_SWTRIG);
+	while ( tmr_flag_get(MOS_PWM_TIMER, TMR_OVF_FLAG) == RESET ){}
 	/* Clear Update Flag */
-	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+	tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_FLAG);
 
-	tmr_output_enable(pwm_timer, TRUE);
+	tmr_output_enable(MOS_PWM_TIMER, TRUE);
 }
 
 void pwm_stop(void){
-	tmr_output_enable(pwm_timer, FALSE);
+	tmr_output_enable(MOS_PWM_TIMER, FALSE);
 
-	tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, FALSE);
+	tmr_interrupt_enable(MOS_PWM_TIMER, TMR_OVF_INT, FALSE);
 	/* wait for a new PWM period to flush last HF task */
-	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
-	while ( tmr_flag_get(pwm_timer, TMR_OVF_FLAG) == RESET ){}
+	tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_FLAG);
+	while ( tmr_flag_get(MOS_PWM_TIMER, TMR_OVF_FLAG) == RESET ){}
 	/* Clear Update Flag */
-	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+	tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_FLAG);
 }
 
 void pwm_enable_output(bool enable) {
 	if (enable) {
-		tmr_output_enable(pwm_timer,TRUE);
+		tmr_output_enable(MOS_PWM_TIMER,TRUE);
 	}else {
-		tmr_output_enable(pwm_timer,FALSE);
+		tmr_output_enable(MOS_PWM_TIMER,FALSE);
 	}
 }
 
@@ -238,11 +238,11 @@ void pwm_turn_on_low_side(void)
 {
 	pwm_update_duty(0, 0, 0);
 	pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1);
-	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
-	tmr_event_sw_trigger(pwm_timer, TMR_OVERFLOW_SWTRIG);
-  	while ( tmr_flag_get(pwm_timer, TMR_OVF_FLAG) == RESET ){}
+	tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_FLAG);
+	tmr_event_sw_trigger(MOS_PWM_TIMER, TMR_OVERFLOW_SWTRIG);
+  	while ( tmr_flag_get(MOS_PWM_TIMER, TMR_OVF_FLAG) == RESET ){}
   	/* Main PWM Output Enable */
-  	tmr_output_enable(pwm_timer,TRUE);
+  	tmr_output_enable(MOS_PWM_TIMER,TRUE);
 }
 
 void pwm_update_sample(u32 samp1, u32 samp2, u8 sector) {

+ 17 - 17
Applications/bsp/at32/pwm.h

@@ -21,14 +21,14 @@
                                                  TIMER_CHCTL2_CH1EN|TIMER_CHCTL2_CH1NEN|\
                                                  TIMER_CHCTL2_CH2EN|TIMER_CHCTL2_CH2NEN))
 #define TIMxCCER_MASK_CP           ((uint16_t) TIMER_CHCTL2_CH0NP | TIMER_CHCTL2_CH1NP |TIMER_CHCTL2_CH2NP)
-#define pwm_enable_channel() {pwm_timer->cctrl |= TIMxCCER_MASK_CH012;}
-#define pwm_disable_channel() {pwm_timer->cctrl &= ~TIMxCCER_MASK_CH012;}
+#define pwm_enable_channel() {MOS_PWM_TIMER->cctrl |= TIMxCCER_MASK_CH012;}
+#define pwm_disable_channel() {MOS_PWM_TIMER->cctrl &= ~TIMxCCER_MASK_CH012;}
 
 
-#define ch0_update_duty(duty) 	pwm_timer->c1dt = (uint32_t)duty
-#define ch1_update_duty(duty) 	pwm_timer->c2dt = (uint32_t)duty
-#define ch2_update_duty(duty) 	pwm_timer->c3dt = (uint32_t)duty
-#define update_adc_trigger(time) pwm_timer->c4dt = (uint32_t)time
+#define ch0_update_duty(duty) 	MOS_PWM_TIMER->c1dt = (uint32_t)duty
+#define ch1_update_duty(duty) 	MOS_PWM_TIMER->c2dt = (uint32_t)duty
+#define ch2_update_duty(duty) 	MOS_PWM_TIMER->c3dt = (uint32_t)duty
+#define update_adc_trigger(time) MOS_PWM_TIMER->c4dt = (uint32_t)time
 
 #ifdef CONFIG_PWM_UV_SWAP
 #define pwm_update_duty(dutyA, dutyB, dutyC) \
@@ -50,23 +50,23 @@
 
 #define pwm_update_2smaples(samp1, sampl2) \
 	do { \
-		pwm_timer->c4dt = (uint32_t)samp1; \
+		MOS_PWM_TIMER->c4dt = (uint32_t)samp1; \
 	}while(0)
 
 
 #define pwm_clear_updata() \
-	tmr_flag_clear(pwm_timer, TMR_OVF_INT);
+	tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_INT);
 
 #define pwm_wait_and_clear_updata() \
 	do { \
-		while ( tmr_flag_get(pwm_timer, TMR_OVF_INT) == RESET ); \
-		timer_flag_clear(pwm_timer, TMR_OVF_INT); \
+		while ( tmr_flag_get(MOS_PWM_TIMER, TMR_OVF_INT) == RESET ); \
+		timer_flag_clear(MOS_PWM_TIMER, TMR_OVF_INT); \
 	}while(0)
 
 #define pwm_change_t3_mode(m) \
 	do { \
-		if (pwm_timer->cm2_output_bit.c4octrl != m) { \
-			pwm_timer->cm2_output_bit.c4octrl = m; \
+		if (MOS_PWM_TIMER->cm2_output_bit.c4octrl != m) { \
+			MOS_PWM_TIMER->cm2_output_bit.c4octrl = m; \
 		} \
 	}while(0)
 
@@ -82,15 +82,15 @@
 #define pwm_up_enable(n) \
 	do { \
 		if (n) { \
-			tmr_flag_clear(pwm_timer, TMR_OVF_INT); \
-			tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, TRUE); \
+			tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_INT); \
+			tmr_interrupt_enable(MOS_PWM_TIMER, TMR_OVF_INT, TRUE); \
 		}else { \
-			tmr_flag_clear(pwm_timer, TMR_OVF_INT); \
-			tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, FALSE); \
+			tmr_flag_clear(MOS_PWM_TIMER, TMR_OVF_INT); \
+			tmr_interrupt_enable(MOS_PWM_TIMER, TMR_OVF_INT, FALSE); \
 		} \
 	}while(0)
 
-#define get_deadtime() (pwm_timer->brk_bit.dtc)
+#define get_deadtime() (MOS_PWM_TIMER->brk_bit.dtc)
 
 void pwm_3phase_init(void);
 void pwm_3phase_sides(bool hon, bool lon);

+ 1 - 1
Applications/bsp/gd32/board_gd32demo.h

@@ -31,7 +31,7 @@
 #define ADC_REFERENCE_VOLTAGE  (3.3F)
 
 /* MOS 驱动 */
-#define pwm_timer TIMER0
+#define MOS_PWM_TIMER TIMER0
 #define PWM_MODE TIMER_OC_MODE_PWM0
 #define PWM_U_P_GROUP 	GPIOA
 #define PWM_U_P_PIN 	GPIO_PIN_8

+ 1 - 1
Applications/bsp/gd32/board_mc100_v1.h

@@ -55,7 +55,7 @@
 #define ADC_FULL_MAX          (4095.0F)
 
 /* MOS驱动 */
-#define pwm_timer TIMER0
+#define MOS_PWM_TIMER TIMER0
 #define PWM_MODE TIMER_OC_MODE_PWM0
 #define PWM_U_P_GROUP 	GPIOA
 #define PWM_U_P_PIN 	GPIO_PIN_8

+ 1 - 1
Applications/bsp/gd32/board_mc105_v3.h

@@ -56,7 +56,7 @@
 #define ADC_FULL_MAX          (4095.0F)
 
 /* MOS驱动 */
-#define pwm_timer TIMER0
+#define MOS_PWM_TIMER TIMER0
 #define PWM_MODE TIMER_OC_MODE_PWM0
 #define PWM_U_P_GROUP 	GPIOA
 #define PWM_U_P_PIN 	GPIO_PIN_8

+ 1 - 1
Applications/bsp/gd32/board_yuanqu.h

@@ -53,7 +53,7 @@
 #define ADC_FULL_MAX          (4096.0F)
 
 /* MOS驱动 */
-#define pwm_timer TIMER0
+#define MOS_PWM_TIMER TIMER0
 #define PWM_MODE TIMER_OC_MODE_PWM0
 #define PWM_U_P_GROUP 	GPIOA
 #define PWM_U_P_PIN 	GPIO_PIN_8

+ 21 - 21
Applications/bsp/gd32/pwm.c

@@ -46,8 +46,8 @@ void pwm_3phase_sides(bool hon, bool lon) {
 	if (hon && lon) {
 		return;
 	}
-	timer_deinit(pwm_timer);
-	rcu_periph_clock_enable(_rcu_clk(pwm_timer));
+	timer_deinit(MOS_PWM_TIMER);
+	rcu_periph_clock_enable(_rcu_clk(MOS_PWM_TIMER));
     gpio_init(PWM_U_P_GROUP,GPIO_MODE_OUT_PP,GPIO_OSPEED_50MHZ,PWM_U_P_PIN);
     gpio_init(PWM_V_P_GROUP,GPIO_MODE_OUT_PP,GPIO_OSPEED_50MHZ,PWM_V_P_PIN);
     gpio_init(PWM_W_P_GROUP,GPIO_MODE_OUT_PP,GPIO_OSPEED_50MHZ,PWM_W_P_PIN);
@@ -135,7 +135,7 @@ static void _init_pwm_timer(bool enable_brk) {
 	timer_oc_parameter_struct timer_ocintpara;
 	timer_parameter_struct timer_initpara;
 	
-	u32 timer = pwm_timer;
+	u32 timer = MOS_PWM_TIMER;
 	u32 half_period = FOC_PWM_Half_Period;
 	rcu_periph_clock_enable(_rcu_clk(timer));
 
@@ -247,32 +247,32 @@ void pwm_start(void){
 	pwm_update_duty(FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2);
 	pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1);
 	/* wait for a new PWM period to flush last HF task */
-	timer_flag_clear(pwm_timer, TIMER_FLAG_UP);
+	timer_flag_clear(MOS_PWM_TIMER, TIMER_FLAG_UP);
 
-	timer_event_software_generate(pwm_timer, TIMER_EVENT_SRC_UPG);
-	while ( timer_flag_get(pwm_timer, TIMER_FLAG_UP) == RESET ){}
+	timer_event_software_generate(MOS_PWM_TIMER, TIMER_EVENT_SRC_UPG);
+	while ( timer_flag_get(MOS_PWM_TIMER, TIMER_FLAG_UP) == RESET ){}
 	/* Clear Update Flag */
-	timer_flag_clear(pwm_timer, TIMER_FLAG_UP);
+	timer_flag_clear(MOS_PWM_TIMER, TIMER_FLAG_UP);
 
-	timer_primary_output_config(pwm_timer,ENABLE);
+	timer_primary_output_config(MOS_PWM_TIMER,ENABLE);
 }
 
 void pwm_stop(void){
-	timer_primary_output_config(pwm_timer,DISABLE);
+	timer_primary_output_config(MOS_PWM_TIMER,DISABLE);
 
-	timer_interrupt_disable(pwm_timer, TIMER_INT_UP);
+	timer_interrupt_disable(MOS_PWM_TIMER, TIMER_INT_UP);
 	/* wait for a new PWM period to flush last HF task */
-	timer_flag_clear(pwm_timer, TIMER_FLAG_UP);
-	while ( timer_flag_get(pwm_timer, TIMER_FLAG_UP) == RESET ){}
+	timer_flag_clear(MOS_PWM_TIMER, TIMER_FLAG_UP);
+	while ( timer_flag_get(MOS_PWM_TIMER, TIMER_FLAG_UP) == RESET ){}
 	/* Clear Update Flag */
-	timer_flag_clear(pwm_timer, TIMER_FLAG_UP);
+	timer_flag_clear(MOS_PWM_TIMER, TIMER_FLAG_UP);
 }
 
 void pwm_enable_output(bool enable) {
 	if (enable) {
-		timer_primary_output_config(pwm_timer,ENABLE);
+		timer_primary_output_config(MOS_PWM_TIMER,ENABLE);
 	}else {
-		timer_primary_output_config(pwm_timer,DISABLE);
+		timer_primary_output_config(MOS_PWM_TIMER,DISABLE);
 	}
 }
 
@@ -281,19 +281,19 @@ void pwm_turn_on_low_side(void)
 {
 	pwm_update_duty(0, 0, 0);
 	pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1);
-	timer_flag_clear(pwm_timer,TIMER_FLAG_UP);
-	timer_event_software_generate(pwm_timer, TIMER_EVENT_SRC_UPG);
-  	while (timer_flag_get(pwm_timer,TIMER_FLAG_UP) == RESET );
+	timer_flag_clear(MOS_PWM_TIMER,TIMER_FLAG_UP);
+	timer_event_software_generate(MOS_PWM_TIMER, TIMER_EVENT_SRC_UPG);
+  	while (timer_flag_get(MOS_PWM_TIMER,TIMER_FLAG_UP) == RESET );
   	/* Main PWM Output Enable */
-  	timer_primary_output_config(pwm_timer, ENABLE);
+  	timer_primary_output_config(MOS_PWM_TIMER, ENABLE);
 }
 
 void pwm_update_sample(u32 samp1, u32 samp2, u8 sector) {
 	if (samp1 < FOC_PWM_Half_Period) {
-		TIMER_CH3CV(pwm_timer) = samp1;
+		TIMER_CH3CV(MOS_PWM_TIMER) = samp1;
 		pwm_change_t3_mode(TIMER_OC_MODE_PWM1);
 	}else {
-		TIMER_CH3CV(pwm_timer) = samp2;
+		TIMER_CH3CV(MOS_PWM_TIMER) = samp2;
 		pwm_change_t3_mode(TIMER_OC_MODE_PWM0);
 	}
 	adc_current_sample_config(sector);

+ 20 - 20
Applications/bsp/gd32/pwm.h

@@ -7,14 +7,14 @@
                                                  TIMER_CHCTL2_CH1EN|TIMER_CHCTL2_CH1NEN|\
                                                  TIMER_CHCTL2_CH2EN|TIMER_CHCTL2_CH2NEN))
 
-#define pwm_enable_channel() {TIMER_CHCTL2(pwm_timer) |= TIMxCCER_MASK_CH012;}
-#define pwm_disable_channel() {TIMER_CHCTL2(pwm_timer) &= ~TIMxCCER_MASK_CH012;}
+#define pwm_enable_channel() {TIMER_CHCTL2(MOS_PWM_TIMER) |= TIMxCCER_MASK_CH012;}
+#define pwm_disable_channel() {TIMER_CHCTL2(MOS_PWM_TIMER) &= ~TIMxCCER_MASK_CH012;}
 
 
-#define ch0_update_duty(duty) 	TIMER_CH0CV(pwm_timer) = (uint32_t)duty
-#define ch1_update_duty(duty) 	TIMER_CH1CV(pwm_timer) = (uint32_t)duty
-#define ch2_update_duty(duty) 	TIMER_CH2CV(pwm_timer) = (uint32_t)duty
-#define update_adc_trigger(time) TIMER_CH3CV(pwm_timer) = (uint32_t)time
+#define ch0_update_duty(duty) 	TIMER_CH0CV(MOS_PWM_TIMER) = (uint32_t)duty
+#define ch1_update_duty(duty) 	TIMER_CH1CV(MOS_PWM_TIMER) = (uint32_t)duty
+#define ch2_update_duty(duty) 	TIMER_CH2CV(MOS_PWM_TIMER) = (uint32_t)duty
+#define update_adc_trigger(time) TIMER_CH3CV(MOS_PWM_TIMER) = (uint32_t)time
 
 #ifdef CONFIG_PWM_UV_SWAP
 #define pwm_update_duty(dutyA, dutyB, dutyC) \
@@ -36,29 +36,29 @@
 
 #define pwm_update_2smaples(samp1, sampl2) \
 	do { \
-		TIMER_CH3CV(pwm_timer) = (uint32_t)samp1; \
+		TIMER_CH3CV(MOS_PWM_TIMER) = (uint32_t)samp1; \
 	}while(0)
 
 
 
-#define enable_pwm_timer_dma() TIMER_DMAINTEN(pwm_timer) |= (uint32_t) TIMER_DMA_CH3D
-#define disable_pwm_timer_dma() TIMER_DMAINTEN(pwm_timer) &= ~((uint32_t) TIMER_DMA_CH3D)
+#define enable_pwm_timer_dma() TIMER_DMAINTEN(MOS_PWM_TIMER) |= (uint32_t) TIMER_DMA_CH3D
+#define disable_pwm_timer_dma() TIMER_DMAINTEN(MOS_PWM_TIMER) &= ~((uint32_t) TIMER_DMA_CH3D)
 
 
 #define pwm_clear_updata() \
-	timer_flag_clear(pwm_timer, TIMER_FLAG_UP);
+	timer_flag_clear(MOS_PWM_TIMER, TIMER_FLAG_UP);
 
 #define pwm_wait_and_clear_updata() \
 	do { \
-		while ( timer_flag_get(pwm_timer, TIMER_FLAG_UP) == RESET ); \
-		timer_flag_clear(pwm_timer, TIMER_FLAG_UP); \
+		while ( timer_flag_get(MOS_PWM_TIMER, TIMER_FLAG_UP) == RESET ); \
+		timer_flag_clear(MOS_PWM_TIMER, TIMER_FLAG_UP); \
 	}while(0)
 
 #define pwm_change_t3_mode(m) \
 	do { \
-		if (((TIMER_CHCTL1(pwm_timer) >> 12) & 0x7) != m) { \
-			TIMER_CHCTL1(pwm_timer) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); \
-        	TIMER_CHCTL1(pwm_timer) |= (uint32_t)((uint32_t)(m) << 8U); \
+		if (((TIMER_CHCTL1(MOS_PWM_TIMER) >> 12) & 0x7) != m) { \
+			TIMER_CHCTL1(MOS_PWM_TIMER) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); \
+        	TIMER_CHCTL1(MOS_PWM_TIMER) |= (uint32_t)((uint32_t)(m) << 8U); \
 		} \
 	}while(0)
 
@@ -74,15 +74,15 @@
 #define pwm_up_enable(n) \
 	do { \
 		if (n) { \
-			timer_flag_clear(pwm_timer, TIMER_FLAG_UP); \
-			timer_interrupt_enable(pwm_timer, TIMER_INT_UP); \
+			timer_flag_clear(MOS_PWM_TIMER, TIMER_FLAG_UP); \
+			timer_interrupt_enable(MOS_PWM_TIMER, TIMER_INT_UP); \
 		}else { \
-			timer_flag_clear(pwm_timer, TIMER_FLAG_UP); \
-			timer_interrupt_disable(pwm_timer, TIMER_INT_UP); \
+			timer_flag_clear(MOS_PWM_TIMER, TIMER_FLAG_UP); \
+			timer_interrupt_disable(MOS_PWM_TIMER, TIMER_INT_UP); \
 		} \
 	}while(0)
 
-#define get_deadtime() (TIMER_CCHP(pwm_timer) & 0xFF)
+#define get_deadtime() (TIMER_CCHP(MOS_PWM_TIMER) & 0xFF)
 
 void pwm_3phase_init(void);
 void pwm_3phase_sides(bool hon, bool lon);

+ 1 - 1
Applications/bsp/n32/board_n32_mc105_v3.h

@@ -51,7 +51,7 @@
 #define ADC_FULL_MAX          (4095.0F)
 
 /* MOS驱动 */
-#define pwm_timer 		TIM1
+#define MOS_PWM_TIMER 		TIM1
 #define PWM_TIM_CLK     RCU_TIMER1
 #define PWM_MODE 		TIM_OCMODE_PWM1
 #define PWM_U_P_GROUP 	GPIOA

+ 4 - 4
Applications/bsp/n32/mc_irqs.c

@@ -113,15 +113,15 @@ void ADC1_2_IRQHandler(void)
 }
 
 void PWM_UP_IRQHandler(void) {
-	if (TIM_GetIntStatus(pwm_timer, TIM_INT_UPDATE)) {
-		TIM_ClrIntPendingBit(pwm_timer, TIM_INT_UPDATE);
+	if (TIM_GetIntStatus(MOS_PWM_TIMER, TIM_INT_UPDATE)) {
+		TIM_ClrIntPendingBit(MOS_PWM_TIMER, TIM_INT_UPDATE);
 		TIMER_UP_IRQHandler();
 	}
 }
 
 void PWM_BRK_IRQHandler(void) {
-	if (TIM_GetIntStatus(pwm_timer, TIM_INT_BREAK)) {
-		TIM_ClrIntPendingBit(pwm_timer, TIM_INT_BREAK);
+	if (TIM_GetIntStatus(MOS_PWM_TIMER, TIM_INT_BREAK)) {
+		TIM_ClrIntPendingBit(MOS_PWM_TIMER, TIM_INT_BREAK);
 		MC_Protect_IRQHandler();
 	}
 }

+ 20 - 20
Applications/bsp/n32/pwm.c

@@ -34,7 +34,7 @@ void pwm_3phase_sides(bool hon, bool lon) {
 	if (hon && lon) {
 		return;
 	}
-	TIM_DeInit(pwm_timer);
+	TIM_DeInit(MOS_PWM_TIMER);
 	rcu_apb2_periph_clock_enable(PWM_TIM_CLK);
     gpio_init(PWM_U_P_GROUP,GPIO_MODE_OUT_PP,GPIO_OSPEED_50MHZ,PWM_U_P_PIN);
     gpio_init(PWM_V_P_GROUP,GPIO_MODE_OUT_PP,GPIO_OSPEED_50MHZ,PWM_V_P_PIN);
@@ -123,7 +123,7 @@ static void _init_pwm_timer(bool enable_brk) {
 	TIM_TimeBaseInitType TIM1_TimeBaseStructure;
 	OCInitType TIM1_OCInitStructure;
 	TIM_BDTRInitType TIM1_BDTRInitStructure;
-	TIM_Module *TIMx = pwm_timer;
+	TIM_Module *TIMx = MOS_PWM_TIMER;
 	u32 half_period = FOC_PWM_Half_Period;
 
 	rcu_apb2_periph_clock_enable(PWM_TIM_CLK);
@@ -189,32 +189,32 @@ void pwm_start(void){
 	pwm_update_duty(FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2);
 	pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1);
 	/* wait for a new PWM period to flush last HF task */
-	TIM_ClearFlag(pwm_timer, TIM_FLAG_UPDATE);
+	TIM_ClearFlag(MOS_PWM_TIMER, TIM_FLAG_UPDATE);
 
-	TIM_GenerateEvent(pwm_timer, TIM_EVT_SRC_UPDATE);
-	while ( TIM_GetFlagStatus(pwm_timer, TIM_FLAG_UPDATE) == RESET ){}
+	TIM_GenerateEvent(MOS_PWM_TIMER, TIM_EVT_SRC_UPDATE);
+	while ( TIM_GetFlagStatus(MOS_PWM_TIMER, TIM_FLAG_UPDATE) == RESET ){}
 	/* Clear Update Flag */
-	TIM_ClearFlag(pwm_timer, TIM_FLAG_UPDATE);
+	TIM_ClearFlag(MOS_PWM_TIMER, TIM_FLAG_UPDATE);
 
-	TIM_EnableCtrlPwmOutputs(pwm_timer,ENABLE);
+	TIM_EnableCtrlPwmOutputs(MOS_PWM_TIMER,ENABLE);
 }
 
 void pwm_stop(void){
-	TIM_EnableCtrlPwmOutputs(pwm_timer,DISABLE);
+	TIM_EnableCtrlPwmOutputs(MOS_PWM_TIMER,DISABLE);
 
-	TIM_ConfigInt(pwm_timer, TIM_INT_UPDATE, DISABLE);
+	TIM_ConfigInt(MOS_PWM_TIMER, TIM_INT_UPDATE, DISABLE);
 	/* wait for a new PWM period to flush last HF task */
-	TIM_ClearFlag(pwm_timer, TIM_FLAG_UPDATE);
-	while ( TIM_GetFlagStatus(pwm_timer, TIM_FLAG_UPDATE) == RESET ){}
+	TIM_ClearFlag(MOS_PWM_TIMER, TIM_FLAG_UPDATE);
+	while ( TIM_GetFlagStatus(MOS_PWM_TIMER, TIM_FLAG_UPDATE) == RESET ){}
 	/* Clear Update Flag */
-	TIM_ClearFlag(pwm_timer, TIM_FLAG_UPDATE);
+	TIM_ClearFlag(MOS_PWM_TIMER, TIM_FLAG_UPDATE);
 }
 
 void pwm_enable_output(bool enable) {
 	if (enable) {
-		TIM_EnableCtrlPwmOutputs(pwm_timer,ENABLE);
+		TIM_EnableCtrlPwmOutputs(MOS_PWM_TIMER,ENABLE);
 	}else {
-		TIM_EnableCtrlPwmOutputs(pwm_timer,DISABLE);
+		TIM_EnableCtrlPwmOutputs(MOS_PWM_TIMER,DISABLE);
 	}
 }
 
@@ -223,19 +223,19 @@ void pwm_turn_on_low_side(void)
 {
 	pwm_update_duty(0, 0, 0);
 	pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1);
-	TIM_ClearFlag(pwm_timer,TIM_FLAG_UPDATE);
-	TIM_GenerateEvent(pwm_timer, TIM_EVT_SRC_UPDATE);
-  	while (TIM_GetFlagStatus(pwm_timer, TIM_FLAG_UPDATE) == RESET );
+	TIM_ClearFlag(MOS_PWM_TIMER,TIM_FLAG_UPDATE);
+	TIM_GenerateEvent(MOS_PWM_TIMER, TIM_EVT_SRC_UPDATE);
+  	while (TIM_GetFlagStatus(MOS_PWM_TIMER, TIM_FLAG_UPDATE) == RESET );
   	/* Main PWM Output Enable */
-  	TIM_EnableCtrlPwmOutputs(pwm_timer, ENABLE);
+  	TIM_EnableCtrlPwmOutputs(MOS_PWM_TIMER, ENABLE);
 }
 
 void pwm_update_sample(u32 samp1, u32 samp2, u8 sector) {
 	if (samp1 < FOC_PWM_Half_Period) {
-		TIMER_CH3CV(pwm_timer) = samp1;
+		TIMER_CH3CV(MOS_PWM_TIMER) = samp1;
 		pwm_change_t3_mode(TIM_OCMODE_PWM2);
 	}else {
-		TIMER_CH3CV(pwm_timer) = samp2;
+		TIMER_CH3CV(MOS_PWM_TIMER) = samp2;
 		pwm_change_t3_mode(TIM_OCMODE_PWM1);
 	}
 	adc_current_sample_config(sector);

+ 17 - 17
Applications/bsp/n32/pwm.h

@@ -20,14 +20,14 @@
                                                  TIMER_CHCTL2_CH1EN|TIMER_CHCTL2_CH1NEN|\
                                                  TIMER_CHCTL2_CH2EN|TIMER_CHCTL2_CH2NEN))
 
-#define pwm_enable_channel() {TIMER_CHCTL2(pwm_timer) |= TIMxCCER_MASK_CH012;}
-#define pwm_disable_channel() {TIMER_CHCTL2(pwm_timer) &= ~TIMxCCER_MASK_CH012;}
+#define pwm_enable_channel() {TIMER_CHCTL2(MOS_PWM_TIMER) |= TIMxCCER_MASK_CH012;}
+#define pwm_disable_channel() {TIMER_CHCTL2(MOS_PWM_TIMER) &= ~TIMxCCER_MASK_CH012;}
 
 
-#define ch0_update_duty(duty) 	TIMER_CH0CV(pwm_timer) = (uint32_t)duty
-#define ch1_update_duty(duty) 	TIMER_CH1CV(pwm_timer) = (uint32_t)duty
-#define ch2_update_duty(duty) 	TIMER_CH2CV(pwm_timer) = (uint32_t)duty
-#define update_adc_trigger(time) TIMER_CH3CV(pwm_timer) = (uint32_t)time
+#define ch0_update_duty(duty) 	TIMER_CH0CV(MOS_PWM_TIMER) = (uint32_t)duty
+#define ch1_update_duty(duty) 	TIMER_CH1CV(MOS_PWM_TIMER) = (uint32_t)duty
+#define ch2_update_duty(duty) 	TIMER_CH2CV(MOS_PWM_TIMER) = (uint32_t)duty
+#define update_adc_trigger(time) TIMER_CH3CV(MOS_PWM_TIMER) = (uint32_t)time
 
 #ifdef CONFIG_PWM_UV_SWAP
 #define pwm_update_duty(dutyA, dutyB, dutyC) \
@@ -49,21 +49,21 @@
 
 #define pwm_update_2smaples(samp1, sampl2) \
 	do { \
-		TIMER_CH3CV(pwm_timer) = (uint32_t)samp1; \
+		TIMER_CH3CV(MOS_PWM_TIMER) = (uint32_t)samp1; \
 	}while(0)
 
 
 #define pwm_wait_and_clear_updata() \
 	do { \
-		while ( TIM_GetFlagStatus(pwm_timer, TIM_FLAG_UPDATE) == RESET ); \
-		TIM_ClearFlag(pwm_timer, TIM_FLAG_UPDATE); \
+		while ( TIM_GetFlagStatus(MOS_PWM_TIMER, TIM_FLAG_UPDATE) == RESET ); \
+		TIM_ClearFlag(MOS_PWM_TIMER, TIM_FLAG_UPDATE); \
 	}while(0)
 
 #define pwm_change_t3_mode(m) \
 	do { \
-		if (((TIMER_CHCTL1(pwm_timer) >> 8)) != m) { \
-			TIMER_CHCTL1(pwm_timer) &= (~(uint32_t)TIM_CCMOD2_OC4MD); \
-        	TIMER_CHCTL1(pwm_timer) |= (m << 8); \
+		if (((TIMER_CHCTL1(MOS_PWM_TIMER) >> 8)) != m) { \
+			TIMER_CHCTL1(MOS_PWM_TIMER) &= (~(uint32_t)TIM_CCMOD2_OC4MD); \
+        	TIMER_CHCTL1(MOS_PWM_TIMER) |= (m << 8); \
 		} \
 	}while(0)
 
@@ -79,15 +79,15 @@
 #define pwm_up_enable(n) \
 	do { \
 		if (n) { \
-			TIM_ClearFlag(pwm_timer, TIM_FLAG_UPDATE); \
-			TIM_ConfigInt(pwm_timer, TIM_INT_UPDATE, ENABLE); \
+			TIM_ClearFlag(MOS_PWM_TIMER, TIM_FLAG_UPDATE); \
+			TIM_ConfigInt(MOS_PWM_TIMER, TIM_INT_UPDATE, ENABLE); \
 		}else { \
-			TIM_ConfigInt(pwm_timer, TIM_INT_UPDATE, DISABLE); \
-			TIM_ClrIntPendingBit(pwm_timer, TIM_INT_UPDATE); \
+			TIM_ConfigInt(MOS_PWM_TIMER, TIM_INT_UPDATE, DISABLE); \
+			TIM_ClrIntPendingBit(MOS_PWM_TIMER, TIM_INT_UPDATE); \
 		} \
 	}while(0)
 
-#define get_deadtime() (TIMER_CCHP(pwm_timer) & 0xFF)
+#define get_deadtime() (TIMER_CCHP(MOS_PWM_TIMER) & 0xFF)
 
 void pwm_3phase_init(void);
 void pwm_3phase_sides(bool hon, bool lon);

+ 1 - 1
Applications/foc/motor/motor_param.h

@@ -60,7 +60,7 @@ float motor_get_lq_from_iq(s16 iq);
 #define MOTOR_NR 0x16
 
 //4000->10, 34; 8000->8, 15
-#define CONFIG_CURRENT_BANDWITH  (1600 * 2 * PI) /* 电流环带宽 = bandwith / (2 * pi)*/
+#define CONFIG_CURRENT_BANDWITH  (800 * 2 * PI) /* 电流环带宽 = bandwith / (2 * pi)*/
 #define CONFIG_DEFAULT_PHASE_CURR_LIM 500
 #define CONFIG_MAX_FW_D_CURR     300.0F //d轴最大的退磁电流
 #define CONFIG_CURRENT_LOOP_DECOUPE    //电流环解耦