update new simulink modle and C code

Signed-off-by: huhui <huhui@sharkgulf.com>

Applications/bsp/adc.c

@@ -85,7 +85,7 @@ void adc_init(void){
 static void _gpio_init(void) {
 	rcu_periph_clock_enable(RCU_GPIOA);
 	rcu_periph_clock_enable(RCU_GPIOB);
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
 	/* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
 	gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);
 

Applications/bsp/adc.h

@@ -8,7 +8,7 @@ inserted ADC 由timer0 ch3触发，
 注意：adc所有外部触发都是下降沿触发 
 */
 
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
 #define U_PHASE_I_CHAN  ADC_CHANNEL_1
 #define V_PHASE_I_CHAN  ADC_CHANNEL_12
 #define W_PHASE_I_CHAN  ADC_CHANNEL_13

Applications/bsp/bsp.h

@@ -13,7 +13,7 @@
 #include "bsp/fmc_flash.h"
 #include "bsp/can.h"
 
-//#define GD32_DEMO
+//#define GD32_FOC_DEMO
 #define USER_ITMER_BRAKE 0
 
 
@@ -31,7 +31,7 @@
 #define ADC_TRIG_CONV_LATENCY_CYCLES 12.5f
 #define ADC_SAMPLING_CYCLES 7.5f
 
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
 #define TIMER_DT_NS      400U
 #define MOSDRV_DT_NS     400U
 #define HW_DEAD_TIME_NS  (TIMER_DT_NS+MOSDRV_DT_NS)
@@ -57,8 +57,6 @@
 #define MAX_VBUS_VOLTAGE (54) 
 #define ADC_REFERENCE_VOLTAGE  (3.3F)
 
-#define MAX_CURRENT      50.0F
-
 #define pwm_timer TIMER0
 #define adc_timer TIMER1
 #define aux_timer TIMER2

Applications/bsp/gpio.c

@@ -1,11 +1,16 @@
-
 #include "bsp/gpio.h"
+#include "libs/utils.h"
 
+#define IR2136S_Enable_pin 0
 /*
 * gpio.c
 * all pins used as gpio(in/out/irq) must be init&accessed here
 */
-
+const static gpio_pin_config_t _pins[] = {
+#ifdef GD32_FOC_DEMO
+	[IR2136S_Enable_pin] = {GPIOA, GPIO_PIN_12, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, 0},
+#endif	
+};
 void gpio_pin_init(void){
 	rcu_periph_clock_enable(RCU_GPIOA);
     rcu_periph_clock_enable(RCU_GPIOB);
@@ -13,6 +18,13 @@ void gpio_pin_init(void){
 	rcu_periph_clock_enable(RCU_GPIOD);
 	rcu_periph_clock_enable(RCU_GPIOF);
 	rcu_periph_clock_enable(RCU_AF);
+	
+	for (int i = 0; i < ARRAY_SIZE(_pins); i++){
+		if (_pins[i].init_value != -1){
+			gpio_bit_write(_pins[i].group, _pins[i].pin, (bit_status)_pins[i].init_value);
+		}		
+		gpio_init(_pins[i].group, _pins[i].mode, _pins[i].speed, _pins[i].pin);
+	}	
 }
 
 
@@ -20,3 +32,7 @@ bool gpio_get_brake(void) {
 	return 0;
 }
 
+void gpio_ir2136_enable(bool enable) {
+	gpio_bit_write(_pins[IR2136S_Enable_pin].group, _pins[IR2136S_Enable_pin].pin, (enable)?SET:RESET);
+}
+

Applications/bsp/gpio.h

@@ -15,6 +15,6 @@ typedef struct {
 
 void gpio_pin_init(void);
 bool gpio_get_brake(void) ;
-
+void gpio_ir2136_enable(bool enable);
 
 #endif /* _GPIO_PIN_H__ */

Applications/bsp/mc_hall_gpio.c

@@ -48,25 +48,22 @@ u32 hall_get_hwcount(u8 *hall) {
 	hall[2] = READ_HALL3();
 	if (g_hall.is_edged) {
 		g_hall.is_edged = 0;
-		return g_hall.delta_time;
+		return g_hall.hall_time;
 	}
-	u32 now = timer_count32_get();
-	return timer_get_5us_ticks(now, g_hall.hall_time);
+	return timer_count32_get();
 }
 
 
 void hall_sensor_handler(void){
 	os_disable_irq();
 	g_hall.is_edged = 1;
-	u32 now = timer_count32_get();
-	g_hall.delta_time = timer_get_5us_ticks(now, g_hall.hall_time);
-	g_hall.hall_time = now;
+	g_hall.hall_time = timer_count32_get();
 	os_enable_irq();
 }
 
 
 
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
 static void _gpio_irq_enable(void){
 	gpio_exti_source_select(GPIO_PORT_SOURCE_GPIOA, GPIO_PIN_SOURCE_6);
 	exti_init(EXTI_6, EXTI_INTERRUPT, EXTI_TRIG_BOTH);

Applications/bsp/mc_hall_gpio.h

@@ -5,7 +5,7 @@
 //51ms, 77.6
 //52.2ms 
 //25.2
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
 #define HALL_GPOI_CLK RCU_GPIOB
 #define HALL_1_PIN GPIO_PIN_6
 #define HALL_1_GROUP GPIOA
@@ -49,7 +49,6 @@ static int __inline__ hall_bit_get(uint32_t gpio_periph,uint32_t pin)
 typedef struct _hall_io {
 	u8 hall[3];
 	u32 hall_time;
-	u32 delta_time;
 	u8 is_edged;
 }hall_io_t;
 

Applications/bsp/mc_irqs.c

@@ -108,7 +108,7 @@ void TIMER5_IRQHandler(void) {
 	}
 }
 
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
 void EXTI0_IRQHandler(void)
 {
 	if(RESET != exti_interrupt_flag_get(EXTI_0)){
@@ -158,7 +158,7 @@ void EXTI5_9_IRQHandler(void){
 	}
 	if(RESET != exti_interrupt_flag_get(EXTI_8)){
 		exti_interrupt_flag_clear(EXTI_8);
-#ifndef GD32_DEMO		
+#ifndef GD32_FOC_DEMO		
 		hall_sensor_handler();
 #endif
 	}

Applications/bsp/pwm.c

@@ -74,7 +74,7 @@ static void _pwm_gpio_config(void)
     gpio_init(GPIOB,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_15);
 	/*configure BRAKE IN*/
 #if USER_ITMER_BRAKE==1
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
     /* TIMER0 BKIN */
     gpio_init(GPIOB, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_12);
 #else
@@ -84,7 +84,7 @@ static void _pwm_gpio_config(void)
 	gpio_init(GPIOB,GPIO_MODE_IN_FLOATING,GPIO_OSPEED_50MHZ,GPIO_PIN_4);//高刹车
 	gpio_init(GPIOB,GPIO_MODE_IN_FLOATING,GPIO_OSPEED_50MHZ,GPIO_PIN_5);//低刹车
 #endif
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
 	/* IR2136S enable pin */
 	gpio_bit_reset(GPIOA, GPIO_PIN_12);
     gpio_init(GPIOA, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, GPIO_PIN_12);
@@ -193,9 +193,10 @@ static void _init_pwm_timer(void) {
 #if SHUNT_NUM==THREE_SHUNTS_SAMPLE	
     timer_enable(timer);
 #endif
-#ifdef GD32_DEMO
+
+#ifdef GD32_FOC_DEMO
 	/* IR2136S enable */
-    gpio_bit_set(GPIOA, GPIO_PIN_12);
+    gpio_ir2136_enable(true);
 #endif
 
 }

Applications/bsp/timer_count32.h

@@ -6,7 +6,7 @@
 void timer_count32_init(void);
 u32  timer_count32_get(void);
 
-#define COUNT_CLK (200 * 1000)
+#define COUNT_CLK (1000 * 1000)
 
 static __inline__ u32 timer_get_5us_ticks(u32 now, u32 count) {
 	u32 delta = now - count;

Applications/bsp/uart.c

@@ -6,7 +6,7 @@
 
 #define SHARK_UART_BAUDRATE				921600
 
-#ifdef GD32_DEMO
+#ifdef GD32_FOC_DEMO
 #define SHARK_UART0_com					USART1
 #define SHARK_UART0_tx_port				GPIOA
 #define SHARK_UART0_tx_pin				GPIO_PIN_2
@@ -22,6 +22,8 @@
 #define SHARK_UART0_rx_dma				DMA0
 #define SHARK_UART0_rx_dma_ch			DMA_CH5
 #define SHARK_UART0_rx_dma_clk			RCU_DMA0
+#define SHARK_UART0_DMA_TX_IRQ          DMA0_Channel6_IRQn
+#define UART_DMA_IRQHandler             DMA0_Channel6_IRQHandler
 #else
 #define SHARK_UART0_com					USART2
 #define SHARK_UART0_tx_port				GPIOB
@@ -38,6 +40,8 @@
 #define SHARK_UART0_rx_dma				DMA0
 #define SHARK_UART0_rx_dma_ch			DMA_CH2
 #define SHARK_UART0_rx_dma_clk			RCU_DMA0
+#define SHARK_UART0_DMA_TX_IRQ          DMA0_Channel1_IRQn
+#define UART_DMA_IRQHandler             DMA0_Channel1_IRQHandler
 #endif
 
 // ================================================================================
@@ -168,7 +172,7 @@ static void shark_uart_write(shark_uart_t *uart, const u8 *buff, u16 size)
 
 static void shark_uart_write_byte(shark_uart_t *uart, u8 value)
 {
-	shark_uart_write(uart, &value, 1);
+	byte_queue_write(&uart->tx_queue, &value, 1);
 }
 
 
@@ -197,14 +201,8 @@ static void shark_uart_tx_dma_init(shark_uart_t *uart){
 	dma_circulation_disable(SHARK_UART0_tx_dma, uart->tx_dma_ch);
 	dma_memory_to_memory_disable(SHARK_UART0_tx_dma, uart->tx_dma_ch);
 	usart_dma_transmit_config(uart->uart_com, USART_DENT_ENABLE);
-#if 0
-	if (uart->tx_dma_ch == DMA_CH1) {
-		nvic_irq_enable(DMA_Channel1_2_IRQn ,4, 0);
-	}else {
-		nvic_irq_enable(DMA_Channel3_4_IRQn ,4, 0);
-	}
-	dma_interrupt_enable(uart->tx_dma_ch, DMA_INT_FTF);
-#endif
+	//nvic_irq_enable(SHARK_UART0_DMA_TX_IRQ ,4, 0);
+	//dma_interrupt_enable(uart->tx_dma_ch, DMA_INT_FTF);
 }
 
 #if ENABLE_RX_DMA==1
@@ -376,6 +374,11 @@ void USART3_IRQHandler(void){
 }
 #endif
 
+
+void UART_DMA_IRQHandler(void) {
+	
+}
+
 static void shark_uart_write_byte_esc(shark_uart_t *uart, u8 value)
 {
 	switch (value) {
@@ -430,6 +433,7 @@ void shark_uart_write_frame(uart_enum_t uart_no, uint8_t *bytes, int len){
 	shark_uart_tx_start(uart);
 	shark_uart_tx_continue(uart, bytes, len);
 	shark_uart_tx_end(uart);
+	shark_uart_dma_tx(uart);
 }
 
 void shark_uart_frame_start(uart_enum_t uart_no, uint8_t *bytes, int len){

Applications/bsp/uart.h

@@ -11,7 +11,7 @@
 #define CH_ESC_END						0x06
 #define CH_ESC_ESC						0x07
 
-#define SHARK_UART_TX_MEM_SIZE			512
+#define SHARK_UART_TX_MEM_SIZE			(22 * 1024)
 #define SHARK_UART_RX_MEM_SIZE			512
 #define RX_FRAME_MAX_LEN 260
 #define RX_OLD_FRAME_MAX_LEN 256

Applications/foc/commands.c

@@ -93,6 +93,11 @@ static void process_foc_command(foc_cmd_body_t *command) {
 			PMSM_FOC_HallCalibrate(true, decode_s32((u8 *)command->data));
 			break;
 		}
+		case Foc_Cali_Hall_Offset:
+		{
+			mc_hall_calibrate(decode_s16((u8 *)command->data));
+			break;
+		}
 		case Foc_Set_Open_Dq_Vol:
 		{
 			s32 vq = decode_s32(((u8 *)command->data) + 4);

Applications/foc/core/foc_core.c

@@ -42,7 +42,7 @@ static __INLINE void PMSM_FOC_PWMCurrent_Update(void) {
 	}else {
 		current_samp_t *cs = get_phase_sample_point(pmsm_foc.FOC_Out->n_Sector);
 	
-		pwm_update_duty(pmsm_foc.FOC_Out->pwm_Duty[0], pmsm_foc.FOC_Out->pwm_Duty[1], pmsm_foc.FOC_Out->pwm_Duty[2]);
+		pwm_update_duty(pmsm_foc.FOC_Out->n_Duty[0], pmsm_foc.FOC_Out->n_Duty[1], pmsm_foc.FOC_Out->n_Duty[2]);
 	
 		pwm_update_sample(cs->time.Samp_p1, cs->time.Samp_p2, cs->sector);
 	}
@@ -50,18 +50,14 @@ static __INLINE void PMSM_FOC_PWMCurrent_Update(void) {
 
 
 void PMSM_FOC_Schedule(void) {
-	u8  hall[3];
 	pwm_clear_updata();
-	phase_current_sample(&pmsm_foc.FOC_In->adc_Pha, &pmsm_foc.FOC_In->adc_Phb);
-	pmsm_foc.FOC_In->us_Count = hall_get_hwcount(hall);
-	pmsm_foc.FOC_In->hall_A = hall[0];
-	pmsm_foc.FOC_In->hall_B = hall[1];
-	pmsm_foc.FOC_In->hall_C = hall[2];
+	phase_current_sample(&pmsm_foc.FOC_In->adc_Phase[0], &pmsm_foc.FOC_In->adc_Phase[1], &pmsm_foc.FOC_In->adc_Phase[2]);
+	pmsm_foc.FOC_In->sys_ticks = hall_get_hwcount(pmsm_foc.FOC_In->hall_abc);
 
-	if (pmsm_foc.FOC_In->n_ctrlModReq == SPD_MODE) {
+	if (pmsm_foc.FOC_In->n_ctrlMod == SPD_MODE) {
 		pmsm_foc.FOC_In->spd_Target = S32Q4(eCtrl_get_RefSpd());
 		pmsm_foc.FOC_In->idq_Target = S16Q5(eCtrl_get_FinalTorque());
-	}else if(pmsm_foc.FOC_In->n_ctrlModReq == TRQ_MODE){
+	}else if(pmsm_foc.FOC_In->n_ctrlMod == TRQ_MODE){
 		pmsm_foc.FOC_In->spd_Target = S32Q4(eCtrl_get_FinalSpd());
 		pmsm_foc.FOC_In->idq_Target = S16Q5(eCtrl_get_RefTorque());
 	}
@@ -77,13 +73,12 @@ void PMSM_FOC_Start(u8 nCtrlMode) {
 	}
 	pmsm_foc.b_FocEna = true;
 	pmsm_foc.FOC_In->b_motEna = true;
-	pmsm_foc.FOC_In->n_ctrlModReq = nCtrlMode;
+	pmsm_foc.FOC_In->n_ctrlMod = nCtrlMode;
 	pmsm_foc.FOC_In->b_cruiseEna = 0;
-	pmsm_foc.FOC_In->FOC_Flags = 0;
 	pmsm_foc.FOC_In->spd_Target = 0;
 	pmsm_foc.FOC_In->idq_Target = 0;
-	pmsm_foc.FOC_In->vdq_Open[0] = 0;
-	pmsm_foc.FOC_In->vdq_Open[1] = 0;
+	pmsm_foc.FOC_In->vdq_Target[0] = 0;
+	pmsm_foc.FOC_In->vdq_Target[1] = 0;
 }
 
 void PMSM_FOC_Stop(void) {
@@ -94,6 +89,10 @@ void PMSM_FOC_Stop(void) {
 	memset(pmsm_foc.FOC_In, 0, sizeof(ExtU));
 }
 
+bool PMSM_FOC_Is_Start(void) {
+	return pmsm_foc.FOC_In->b_motEna;
+}
+
 void PMSM_FOC_iBusLimit(_s16q5_t ibusLimit) {
 	pmsm_foc.FOC_In->iDC_Limit = (ibusLimit);
 }
@@ -111,12 +110,12 @@ void PMSM_FOC_VbusVoltage(_s16q5_t vbusVol) {
 }
 
 void PMSM_FOC_SetCtrlMode(uint8_T mode) {
-	pmsm_foc.FOC_In->n_ctrlModReq = mode;
+	pmsm_foc.FOC_In->n_ctrlMod = mode;
 }
 
 void PMSM_FOC_SetOpenVdq(_s16q5_t vd, _s16q5_t vq) {
-	pmsm_foc.FOC_In->vdq_Open[0] = (vd);
-	pmsm_foc.FOC_In->vdq_Open[1] = (vq);
+	pmsm_foc.FOC_In->vdq_Target[0] = (vd);
+	pmsm_foc.FOC_In->vdq_Target[1] = (vq);
 }
 
 bool PMSM_FOC_EnableCruise(boolean_T enable) {
@@ -133,7 +132,7 @@ bool PMSM_FOC_EnableCruise(boolean_T enable) {
 }
 
 bool PMSM_FOC_Is_CruiseEnabled(void) {
-	return (pmsm_foc.FOC_In->b_cruiseEna && (pmsm_foc.FOC_Out->n_runingMode == SPD_MODE));
+	return (pmsm_foc.FOC_In->b_cruiseEna && (pmsm_foc.FOC_Out->n_FocMode == SPD_MODE));
 }
 
 bool PMSM_FOC_Set_Speed(float rpm) {
@@ -158,23 +157,23 @@ bool PMSM_FOC_Set_CruiseSpeed(float rpm) {
 	return false;
 }
 
-void PMSM_FOC_HallCalibrate(boolean_T b_caliHall, _s16q5_t open_vd) {
-	uint16_T foc_cali = 0;
-	if (b_caliHall) {
-		foc_cali = FOC_CALIMOD_HALL;
-	}
-	if ((pmsm_foc.FOC_In->FOC_Flags & FOC_CALIMOD_HALL) == foc_cali) {
-		return;
-	}
+void PMSM_FOC_HallCalibrate(boolean_T b_caliHall, s16 open_vd) {
+
 	if (pmsm_foc.FOC_In->b_motEna == b_caliHall) { //motor must be stoped when start cali
 		return;
 	}
-	pmsm_foc.FOC_In->FOC_Flags &= ~(FOC_CALIMOD_HALL);
-	pmsm_foc.FOC_In->b_motEna = b_caliHall;
-	pmsm_foc.FOC_In->FOC_Flags |= foc_cali;
-	pmsm_foc.FOC_In->vdq_Open[0] = (open_vd);
-	pmsm_foc.FOC_In->vdq_Open[1] = 0;
-	pmsm_foc.FOC_In->n_ctrlModReq = OPEN_MODE;
+	pmsm_foc.FOC_In->vdq_Target[0] = S16Q4(open_vd);
+	pmsm_foc.FOC_In->vdq_Target[1] = 0;
+	pmsm_foc.FOC_In->n_ctrlMod = OPEN_MODE;
+}
+
+void PMSM_FOC_Set_Vdq(s16 vd, s16 vq) {
+	pmsm_foc.FOC_In->vdq_Target[0] = S16Q4(vd);
+	pmsm_foc.FOC_In->vdq_Target[1] = S16Q4(vq);
+}
+
+void PMSM_FOC_Set_Angle(s16 angle) {
+	pmsm_foc.FOC_In->set_Angle = S16Q14(angle);
 }
 
 float PMSM_FOC_GetSpeed(void) {
@@ -214,9 +213,7 @@ void PMSM_FOC_SetIQPid(float kp, float ki, float kb) {
 }
 
 void PMSM_FOC_SetTrqPid(float kp, float ki, float kb) {
-	pmsm_foc.FOC_P->cf_TrqLimKp = S16Q10(kp);
-	pmsm_foc.FOC_P->cf_TrqLimKi = S16Q14(ki);
-	pmsm_foc.FOC_P->cf_TrqLimKb = S16Q14(kb);
+
 }
 
 void PMSM_FOC_SetFW_I(float ki, float kb) {
@@ -225,6 +222,11 @@ void PMSM_FOC_SetFW_I(float ki, float kb) {
 
 }
 
+s16 PMSM_FOC_Add_Hall_Offset(s16 offset) {
+	pmsm_foc.FOC_P->i_hall_offset = S16Q4(offset);
+	return (s16)S16Q4toF(pmsm_foc.FOC_P->i_hall_offset);
+}
+
 //获取母线电流
 float PMSM_FOC_Get_iDC(void) {
 	s32 vd = pmsm_foc.FOC_Out->f_Vdq[0];

Applications/foc/core/foc_core.h

@@ -29,6 +29,10 @@ void PMSM_FOC_SetIDPid(float kp, float ki, float kb);
 void PMSM_FOC_SetIQPid(float kp, float ki, float kb);
 void PMSM_FOC_SetTrqPid(float kp, float ki, float kb);
 void PMSM_FOC_SetFW_I(float ki, float kb);
+s16 PMSM_FOC_Add_Hall_Offset(s16 offset);
+void PMSM_FOC_Set_Angle(s16 angle);
+bool PMSM_FOC_Is_Start(void);
+void PMSM_FOC_Set_Vdq(s16 vd, s16 vq);
 
 #endif /* _FOC_CORE_H__ */
 

Applications/foc/motor/current.c

@@ -89,7 +89,7 @@ bool phase_current_offset(void) {
 
 
 #define LowPass_filter 1.0f
-void phase_current_sample(s16 *ia, s16 *ib){
+void phase_current_sample(s16 *ia, s16 *ib, s16 *ic){
 	current_samp_t *cs = &g_cs;
 	s32 phase_current1, phase_current2;
 	phase_time_t *time = &cs->time;
@@ -121,6 +121,7 @@ void phase_current_sample(s16 *ia, s16 *ib){
 	}
 	*ia = cs->adc_ia;
 	*ib = cs->adc_ib;
+	*ic = cs->adc_ic;
 }
 
 

Applications/foc/motor/current.h

@@ -32,7 +32,7 @@ typedef struct current_sample {
 }current_samp_t;
 
 void phase_current_init(void);
-void phase_current_sample(s16 *ia, s16 *ib);
+void phase_current_sample(s16 *ia, s16 *ib, s16 *ic);
 bool phase_current_offset(void);
 current_samp_t * get_phase_sample_point(u8 sector);
 void phase_current_adc_triger(void);

Applications/foc/motor/motor.c

@@ -67,6 +67,33 @@ bool mc_stop(void) {
 	return true;
 }
 
+void mc_hall_calibrate(s16 vd) {
+	if (PMSM_FOC_Is_Start()) {
+		return;
+	}
+	pwm_turn_on_low_side();
+	task_udelay(500);
+	phase_current_calibrate();
+	PMSM_FOC_Start(OPEN_MODE);
+	pwm_start();
+	adc_start_convert();
+	PMSM_FOC_Set_Vdq(vd, 0);
+	delay_ms(1000);
+
+	for (int i = 0; i < 5; i++) {
+		for (s16 angle = 0; angle < 360; angle++) {
+			PMSM_FOC_Set_Angle(angle);
+		}
+	}
+	delay_ms(1000);
+
+	adc_stop_convert();
+
+	pwm_stop();
+
+	PMSM_FOC_Stop();
+}
+
 bool mc_lock_motor(bool lock) {
 	if (lock && (PMSM_FOC_GetSpeed() > 10)) {
 		PMSM_FOC_SetErrCode(FOC_NowAllowed_With_Speed);

Applications/foc/motor/motor.h

@@ -6,6 +6,7 @@
 void mc_init(void);
 bool mc_start(u8 mode);
 bool mc_stop(void);
+void mc_hall_calibrate(s16 vd);
 bool mc_throttle_released(void);
 bool mc_lock_motor(bool lock);
 

Applications/libs/logger.c

@@ -3,39 +3,33 @@
 #include "bsp/bsp.h"
 #include "logger.h"
 #include "os/os_task.h"
-
+#include "bsp/uart.h"
+#include "libs/utils.h"
 static uint32_t level_data[2];
 static char log_cache[128];
 //static co_queue_t log_queue = NULL;
 int can_fputc(char c);
 
-#if 0
-static void log_co_task(void *args) {
-	log_chan_t log_v;
-	while(1) {
-		if (queue_get(log_queue, &log_v)){
-			if (log_v.id != 1) {
-				sys_debug("%d: %d\n", log_v.id, log_v.value);
-			}else {
-				extern void shark_uart_write_log(char *buffer);
-				char buffer[128] = {0};
-				sprintf(buffer, "$%d;", log_v.value);
-				shark_uart_write_log(buffer);
-			}
-		}
-		co_task_yield();
-	}
-}
 
-void log_start_task(void) {
-	log_queue = queue_create(5000, sizeof(log_chan_t));
-	co_task_create(log_co_task, NULL, 512);
+void plot_3data16(s16 v1, s16 v2, s16 v3) {
+	u8 data[6] = {0};
+	encode_s16(data, v1);
+	encode_s16(data + 2, v2);
+	encode_s16(data + 2, v3);
+	shark_uart_write_frame(SHARK_UART0, data, sizeof(data));
 }
-#endif
-
 
-void log_chan_value(u16 id, s32 value) {
+void plot_2data16(s16 v1, s16 v2) {
+	u8 data[4] = {0};
+	encode_s16(data, v1);
+	encode_s16(data + 2, v2);
+	shark_uart_write_frame(SHARK_UART0, data, sizeof(data));
+}
 
+void plot_1data16(s16 v1) {
+	u8 data[2] = {0};
+	encode_s16(data, v1);
+	shark_uart_write_frame(SHARK_UART0, data, sizeof(data));
 }
 
 static int _get_level(int mod){

Applications/os/heap_4.c

@@ -38,7 +38,7 @@
 
 #define portBYTE_ALIGNMENT			8
 #define portBYTE_ALIGNMENT_MASK 	0x0007
-#define configTOTAL_HEAP_SIZE    (40*1024)
+#define configTOTAL_HEAP_SIZE    (16*1024)
 #define configASSERT(x)
 /* Block sizes must not get too small. */
 #define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )

Librarys/CMSIS/GD/GD32F30x/Source/system_gd32f30x.c

@@ -41,6 +41,9 @@
 #define __HXTAL           (HXTAL_VALUE)            /* high speed crystal oscillator frequency */
 #define __SYS_OSC_CLK     (__HXTAL)                /* main oscillator frequency */
 
+/* Vector Table base offset */
+#define VECT_TAB_OFFSET  0x00                      /* This value must be a multiple of 0x200. */
+
 /* select a system clock by uncommenting the following line */
 /* use IRC8M */
 //#define __SYSTEM_CLOCK_IRC8M                    (uint32_t)(__IRC8M) 
@@ -134,6 +137,10 @@ void SystemInit (void)
 
     /* configure the system clock source, PLL Multiplier, AHB/APBx prescalers and Flash settings */
     system_clock_config();
+
+#ifndef CONFIG_CAN_IAP
+  	nvic_vector_table_set(NVIC_VECTTAB_FLASH,VECT_TAB_OFFSET);
+#endif	
 }
 /*!
     \brief      configure the system clock

Project/MC100.uvoptx

@@ -28,7 +28,7 @@
     <TargetOption>
       <CLKADS>12000000</CLKADS>
       <OPTTT>
-        <gFlags>0</gFlags>
+        <gFlags>1</gFlags>
         <BeepAtEnd>1</BeepAtEnd>
         <RunSim>0</RunSim>
         <RunTarget>1</RunTarget>
@@ -103,7 +103,7 @@
         <bEvRecOn>1</bEvRecOn>
         <bSchkAxf>0</bSchkAxf>
         <bTchkAxf>0</bTchkAxf>
-        <nTsel>0</nTsel>
+        <nTsel>4</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -114,9 +114,34 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile></tIfile>
-        <pMon>BIN\UL2CM3.DLL</pMon>
+        <pMon>Segger\JL2CM3.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U81480416 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_HD.FLM -FS08000000 -FL080000 -FP0($$Device:GD32F303RC$Flash\GD32F30x_HD.FLM)</Name>
+        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
@@ -130,12 +155,12 @@
       <DebugFlag>
         <trace>0</trace>
         <periodic>0</periodic>
-        <aLwin>0</aLwin>
+        <aLwin>1</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
         <aSer2>0</aSer2>
         <aPa>0</aPa>
-        <viewmode>0</viewmode>
+        <viewmode>1</viewmode>
         <vrSel>0</vrSel>
         <aSym>0</aSym>
         <aTbox>0</aTbox>
@@ -327,7 +352,7 @@
 
   <Group>
     <GroupName>Simulink</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -435,7 +460,7 @@
 
   <Group>
     <GroupName>BSP</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -691,7 +716,7 @@
 
   <Group>
     <GroupName>OS</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -935,7 +960,7 @@
 
   <Group>
     <GroupName>StartUp</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>

Project/MC100.uvprojx

@@ -134,11 +134,11 @@
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
             <Capability>1</Capability>
-            <DriverSelection>-1</DriverSelection>
+            <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3></Flash3>
+          <Flash3>"" ()</Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
           <pFcarmGrp></pFcarmGrp>
@@ -337,7 +337,7 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls>--gnu</MiscControls>
-              <Define>USE_STDPERIPH_DRIVER,GD32F30X_HD,BACK_TRACE,CONFIG_CAN_IAP</Define>
+              <Define>USE_STDPERIPH_DRIVER,GD32F30X_HD,BACK_TRACE</Define>
               <Undefine></Undefine>
               <IncludePath>..\Librarys\CMSIS\Include,..\Librarys\CMSIS\GD\GD32F30x\Include,..\Librarys\GD32F30x_Drivers\include,..\Applications;..\Simulink\PMSM_Controller_ert_rtw</IncludePath>
             </VariousControls>

Simulink/PMSM_Controller_ert_rtw/PMSM_Controller.bat

@@ -1,12 +1,12 @@
 
-call "setup_msvc.bat"
+call "%SLREALTIME_QNX_SP_ROOT%\qnx700\qnxsdp-env.bat"
 
 
 call  "\\DESKTOP-C3O4FD7\D$\Program Files\R2020b\bin\win64\checkMATLABRootForDriveMap.exe" "\\DESKTOP-C3O4FD7\D$\Program Files\R2020b"  > mlEnv.txt
 for /f %%a in (mlEnv.txt) do set "%%a"\n
 cd .
 
-if "%1"=="" (nmake MATLAB_ROOT=%MATLAB_ROOT% ALT_MATLAB_ROOT=%ALT_MATLAB_ROOT% MATLAB_BIN=%MATLAB_BIN% ALT_MATLAB_BIN=%ALT_MATLAB_BIN%  -f PMSM_Controller.mk all) else (nmake MATLAB_ROOT=%MATLAB_ROOT% ALT_MATLAB_ROOT=%ALT_MATLAB_ROOT% MATLAB_BIN=%MATLAB_BIN% ALT_MATLAB_BIN=%ALT_MATLAB_BIN%  -f PMSM_Controller.mk %1)
+if "%1"=="" (make MATLAB_ROOT=%MATLAB_ROOT% ALT_MATLAB_ROOT=%ALT_MATLAB_ROOT% MATLAB_BIN=%MATLAB_BIN% ALT_MATLAB_BIN=%ALT_MATLAB_BIN%  -f PMSM_Controller.mk all) else (make MATLAB_ROOT=%MATLAB_ROOT% ALT_MATLAB_ROOT=%ALT_MATLAB_ROOT% MATLAB_BIN=%MATLAB_BIN% ALT_MATLAB_BIN=%ALT_MATLAB_BIN%  -f PMSM_Controller.mk %1)
 @if errorlevel 1 goto error_exit
 
 exit 0

Simulink/PMSM_Controller_ert_rtw/PMSM_Controller.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'PMSM_Controller'.
  *
- * Model version                  : 1.1460
+ * Model version                  : 1.1529
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Sat May 28 14:25:47 2022
+ * C/C++ source code generated on : Tue Aug  2 19:43:20 2022
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: ARM Compatible->ARM Cortex-M
@@ -39,272 +39,262 @@
 /* Forward declaration for rtModel */
 typedef struct tag_RTM RT_MODEL;
 
-/* Block signals and states (default storage) for system '<S48>/Low_Pass_Filter' */
+/* Block signals and states (default storage) for system '<S39>/Low_Pass_Filter' */
 typedef struct {
-  int32_T UnitDelay1_DSTATE[2];        /* '<S56>/UnitDelay1' */
+  int32_T UnitDelay1_DSTATE[2];        /* '<S47>/UnitDelay1' */
 } DW_Low_Pass_Filter;
 
-/* Block signals and states (default storage) for system '<S87>/PI_Speed' */
+/* Block signals and states (default storage) for system '<S79>/PI_Speed' */
 typedef struct {
-  int32_T UnitDelay_DSTATE;            /* '<S89>/UnitDelay' */
-  int32_T ResettableDelay_DSTATE;      /* '<S90>/Resettable Delay' */
-  uint8_T icLoad;                      /* '<S90>/Resettable Delay' */
+  int32_T UnitDelay_DSTATE;            /* '<S81>/UnitDelay' */
+  int32_T ResettableDelay_DSTATE;      /* '<S82>/Resettable Delay' */
+  uint8_T icLoad;                      /* '<S82>/Resettable Delay' */
 } DW_PI_backCalc_fixdt;
 
-/* Zero-crossing (trigger) state for system '<S87>/PI_Speed' */
+/* Zero-crossing (trigger) state for system '<S79>/PI_Speed' */
 typedef struct {
-  ZCSigState ResettableDelay_Reset_ZCE_f;/* '<S90>/Resettable Delay' */
+  ZCSigState ResettableDelay_Reset_ZCE_fm;/* '<S82>/Resettable Delay' */
 } ZCE_PI_backCalc_fixdt;
 
-/* Block signals and states (default storage) for system '<S95>/PI_backCalc_fixdt' */
+/* Block signals and states (default storage) for system '<S85>/PI_backCalc_fixdt' */
 typedef struct {
-  int32_T UnitDelay_DSTATE;            /* '<S100>/UnitDelay' */
-  int32_T ResettableDelay_DSTATE;      /* '<S102>/Resettable Delay' */
-  uint8_T icLoad;                      /* '<S102>/Resettable Delay' */
-} DW_PI_backCalc_fixdt_i;
+  int32_T UnitDelay_DSTATE;            /* '<S90>/UnitDelay' */
+  int32_T ResettableDelay_DSTATE;      /* '<S92>/Resettable Delay' */
+  uint8_T icLoad;                      /* '<S92>/Resettable Delay' */
+} DW_PI_backCalc_fixdt_j;
 
-/* Zero-crossing (trigger) state for system '<S95>/PI_backCalc_fixdt' */
+/* Zero-crossing (trigger) state for system '<S85>/PI_backCalc_fixdt' */
 typedef struct {
-  ZCSigState ResettableDelay_Reset_ZCE;/* '<S102>/Resettable Delay' */
-} ZCE_PI_backCalc_fixdt_e;
+  ZCSigState ResettableDelay_Reset_ZCE;/* '<S92>/Resettable Delay' */
+} ZCE_PI_backCalc_fixdt_n;
 
 /* Block signals and states (default storage) for system '<Root>' */
 typedef struct {
-  DW_PI_backCalc_fixdt_i PI_backCalc_fixdt1;/* '<S95>/PI_backCalc_fixdt1' */
-  DW_PI_backCalc_fixdt_i PI_backCalc_fixdt_o3;/* '<S95>/PI_backCalc_fixdt' */
-  DW_PI_backCalc_fixdt PI_Speed;       /* '<S87>/PI_Speed' */
-  DW_Low_Pass_Filter Low_Pass_Filter_h;/* '<S76>/Low_Pass_Filter' */
-  DW_Low_Pass_Filter Low_Pass_Filter_d;/* '<S48>/Low_Pass_Filter' */
-  int32_T Merge1;                      /* '<S26>/Merge1' */
-  int32_T Divide11;                    /* '<S20>/Divide11' */
-  int32_T UnitDelay_DSTATE;            /* '<S77>/Unit Delay' */
-  int32_T ResettableDelay_DSTATE;      /* '<S78>/Resettable Delay' */
-  int32_T UnitDelay_DSTATE_n;          /* '<S92>/Unit Delay' */
-  int32_T ResettableDelay_DSTATE_c;    /* '<S93>/Resettable Delay' */
-  uint32_T z_counterRawPrev;           /* '<S20>/z_counterRawPrev' */
-  uint32_T UnitDelay3_DSTATE;          /* '<S14>/UnitDelay3' */
-  uint32_T UnitDelay1_DSTATE;          /* '<S7>/UnitDelay1' */
-  uint32_T UnitDelay2_DSTATE;          /* '<S20>/UnitDelay2' */
-  uint32_T UnitDelay3_DSTATE_l;        /* '<S20>/UnitDelay3' */
-  uint32_T UnitDelay5_DSTATE;          /* '<S20>/UnitDelay5' */
-  uint32_T UnitDelay4_DSTATE;          /* '<S14>/UnitDelay4' */
-  int16_T Merge[2];                    /* '<S26>/Merge' */
-  int16_T Merge_c[2];                  /* '<S75>/Merge' */
-  int16_T UnitDelay1_DSTATE_f[2];      /* '<S6>/UnitDelay1' */
-  int16_T Divide;                      /* '<S33>/Divide' */
-  int16_T Max;                         /* '<S116>/Max' */
-  int16_T Max1;                        /* '<S116>/Max1' */
-  int16_T Max_g;                       /* '<S109>/Max' */
-  int16_T Max1_j;                      /* '<S109>/Max1' */
-  int16_T Merge_f;                     /* '<S73>/Merge' */
-  int16_T Switch;                      /* '<S76>/Switch' */
-  int16_T Switch2;                     /* '<S84>/Switch2' */
-  int16_T r_currTgt;                   /* '<S30>/r_currTgt' */
-  int16_T Max_p;                       /* '<S33>/Max' */
-  int16_T Max1_g;                      /* '<S33>/Max1' */
-  int16_T Merge_i;                     /* '<S3>/Merge' */
-  int16_T Divide_l;                    /* '<S116>/Divide' */
-  int16_T Divide_n;                    /* '<S109>/Divide' */
-  int16_T UnitDelay_DSTATE_h;          /* '<S106>/UnitDelay' */
-  int16_T UnitDelay1_DSTATE_i;         /* '<S97>/Unit Delay1' */
-  int16_T UnitDelay_DSTATE_b;          /* '<S112>/UnitDelay' */
-  int16_T UnitDelay_DSTATE_g;          /* '<S108>/Unit Delay' */
-  int16_T UnitDelay_DSTATE_o;          /* '<S113>/UnitDelay' */
-  int16_T UnitDelay1_DSTATE_b;         /* '<S98>/Unit Delay1' */
-  int16_T UnitDelay_DSTATE_d;          /* '<S119>/UnitDelay' */
-  int16_T UnitDelay_DSTATE_a;          /* '<S115>/Unit Delay' */
-  int16_T UnitDelay1_DSTATE_g;         /* '<S70>/Unit Delay1' */
-  int16_T Delay_DSTATE;                /* '<S88>/Delay' */
-  int16_T UnitDelay_DSTATE_l;          /* '<S87>/Unit Delay' */
-  int16_T UnitDelay_DSTATE_e;          /* '<S31>/UnitDelay' */
-  int16_T UnitDelay_DSTATE_fv;         /* '<S36>/UnitDelay' */
-  int16_T UnitDelay_DSTATE_i;          /* '<S32>/Unit Delay' */
-  uint16_T UnitDelay_DSTATE_f;         /* '<S45>/UnitDelay' */
-  uint16_T UnitDelay_DSTATE_p;         /* '<S47>/UnitDelay' */
-  uint16_T UnitDelay2_DSTATE_f;        /* '<S19>/UnitDelay2' */
-  uint16_T UnitDelay3_DSTATE_lh;       /* '<S19>/UnitDelay3' */
-  uint16_T UnitDelay5_DSTATE_f;        /* '<S19>/UnitDelay5' */
-  uint16_T UnitDelay1_DSTATE_c;        /* '<S74>/Unit Delay1' */
-  int8_T Switch2_i;                    /* '<S8>/Switch2' */
-  int8_T UnitDelay2_DSTATE_j;          /* '<S8>/UnitDelay2' */
-  int8_T If_ActiveSubsystem_h;         /* '<S73>/If' */
-  uint8_T UnitDelay_DSTATE_j;          /* '<S37>/UnitDelay' */
-  uint8_T Delay_DSTATE_d;              /* '<S9>/Delay' */
-  uint8_T Delay1_DSTATE;               /* '<S9>/Delay1' */
-  uint8_T Delay2_DSTATE;               /* '<S9>/Delay2' */
-  uint8_T UnitDelay_DSTATE_bm;         /* '<S54>/Unit Delay' */
-  uint8_T UnitDelay_DSTATE_p2;         /* '<S70>/Unit Delay' */
-  uint8_T icLoad;                      /* '<S78>/Resettable Delay' */
-  uint8_T icLoad_p;                    /* '<S88>/Delay' */
-  uint8_T icLoad_k;                    /* '<S93>/Resettable Delay' */
-  uint8_T is_active_c5_PMSM_Controller;/* '<S4>/Control_Mode_Manager' */
-  uint8_T is_c5_PMSM_Controller;       /* '<S4>/Control_Mode_Manager' */
-  uint8_T is_ACTIVE;                   /* '<S4>/Control_Mode_Manager' */
-  boolean_T Compare;                   /* '<S21>/Compare' */
-  boolean_T UnitDelay_DSTATE_k;        /* '<S38>/UnitDelay' */
-  boolean_T UnitDelay_DSTATE_nx;       /* '<S42>/UnitDelay' */
-  boolean_T UnitDelay_DSTATE_bv;       /* '<S39>/UnitDelay' */
-  boolean_T UnitDelay1_DSTATE_iv;      /* '<S20>/UnitDelay1' */
-  boolean_T n_SpeedCtrl_Mode;          /* '<S25>/n_SpeedCtrl' */
-  boolean_T n_commDeacv_Mode;          /* '<S19>/n_commDeacv' */
+  DW_PI_backCalc_fixdt_j PI_backCalc_fixdt1;/* '<S85>/PI_backCalc_fixdt1' */
+  DW_PI_backCalc_fixdt_j PI_backCalc_fixdt_ig;/* '<S85>/PI_backCalc_fixdt' */
+  DW_PI_backCalc_fixdt PI_Speed;       /* '<S79>/PI_Speed' */
+  DW_Low_Pass_Filter Low_Pass_Filter_e;/* '<S68>/Low_Pass_Filter' */
+  DW_Low_Pass_Filter Low_Pass_Filter_l;/* '<S39>/Low_Pass_Filter' */
+  int32_T Divide11;                    /* '<S29>/Divide11' */
+  int32_T UnitDelay_DSTATE_l;          /* '<S69>/Unit Delay' */
+  int32_T ResettableDelay_DSTATE;      /* '<S70>/Resettable Delay' */
+  uint32_T OutportBufferFordelta_count;
+  uint32_T i_count;                    /* '<S16>/i_count' */
+  uint32_T Switch4;                    /* '<S29>/Switch4' */
+  uint32_T UnitDelay1_DSTATE;          /* '<S38>/UnitDelay1' */
+  uint32_T UnitDelay_DSTATE;           /* '<S29>/Unit Delay' */
+  uint32_T UnitDelay2_DSTATE;          /* '<S29>/UnitDelay2' */
+  uint32_T UnitDelay3_DSTATE;          /* '<S29>/UnitDelay3' */
+  uint32_T UnitDelay5_DSTATE;          /* '<S29>/UnitDelay5' */
+  uint32_T UnitDelay4_DSTATE;          /* '<S20>/UnitDelay4' */
+  uint32_T UnitDelay4_DSTATE_o;        /* '<S29>/UnitDelay4' */
+  int16_T Switch[2];                   /* '<S111>/Switch' */
+  int16_T Merge_i[2];                  /* '<S67>/Merge' */
+  int16_T UnitDelay_DSTATE_k[2];       /* '<S1>/Unit Delay' */
+  int16_T UnitDelay1_DSTATE_o[2];      /* '<S35>/UnitDelay1' */
+  int16_T UnitDelay_DSTATE_e[2];       /* '<S4>/Unit Delay' */
+  int16_T Divide;                      /* '<S120>/Divide' */
+  int16_T Divide_o;                    /* '<S116>/Divide' */
+  int16_T Max;                         /* '<S120>/Max' */
+  int16_T Max1;                        /* '<S120>/Max1' */
+  int16_T Max_l;                       /* '<S116>/Max' */
+  int16_T Max1_j;                      /* '<S116>/Max1' */
+  int16_T Max_p;                       /* '<S106>/Max' */
+  int16_T Max1_i;                      /* '<S106>/Max1' */
+  int16_T Max_i;                       /* '<S99>/Max' */
+  int16_T Max1_e;                      /* '<S99>/Max1' */
+  int16_T Merge;                       /* '<S65>/Merge' */
+  int16_T Switch_p;                    /* '<S68>/Switch' */
+  int16_T Switch2;                     /* '<S76>/Switch2' */
+  int16_T Divide_g;                    /* '<S106>/Divide' */
+  int16_T Divide_d;                    /* '<S99>/Divide' */
+  int16_T UnitDelay_DSTATE_l5;         /* '<S96>/UnitDelay' */
+  int16_T UnitDelay1_DSTATE_j;         /* '<S87>/Unit Delay1' */
+  int16_T UnitDelay_DSTATE_g;          /* '<S102>/UnitDelay' */
+  int16_T UnitDelay_DSTATE_b;          /* '<S98>/Unit Delay' */
+  int16_T UnitDelay_DSTATE_er;         /* '<S103>/UnitDelay' */
+  int16_T UnitDelay1_DSTATE_p;         /* '<S88>/Unit Delay1' */
+  int16_T UnitDelay_DSTATE_o;          /* '<S109>/UnitDelay' */
+  int16_T UnitDelay_DSTATE_d;          /* '<S105>/Unit Delay' */
+  int16_T UnitDelay_DSTATE_lz;         /* '<S112>/UnitDelay' */
+  int16_T UnitDelay_DSTATE_j;          /* '<S119>/UnitDelay' */
+  int16_T UnitDelay_DSTATE_h;          /* '<S113>/Unit Delay' */
+  int16_T UnitDelay_DSTATE_n;          /* '<S114>/UnitDelay' */
+  int16_T UnitDelay_DSTATE_ox;         /* '<S123>/UnitDelay' */
+  int16_T UnitDelay_DSTATE_gt;         /* '<S115>/Unit Delay' */
+  int16_T UnitDelay1_DSTATE_jp;        /* '<S62>/Unit Delay1' */
+  int16_T Delay_DSTATE;                /* '<S80>/Delay' */
+  int16_T UnitDelay_DSTATE_di;         /* '<S79>/Unit Delay' */
+  uint16_T UnitDelay2_DSTATE_o;        /* '<S28>/UnitDelay2' */
+  uint16_T UnitDelay3_DSTATE_p;        /* '<S28>/UnitDelay3' */
+  uint16_T UnitDelay5_DSTATE_m;        /* '<S28>/UnitDelay5' */
+  uint16_T UnitDelay_DSTATE_i;         /* '<S13>/UnitDelay' */
+  uint16_T UnitDelay_DSTATE_m;         /* '<S15>/UnitDelay' */
+  uint16_T UnitDelay1_DSTATE_pl;       /* '<S66>/Unit Delay1' */
+  int8_T UnitDelay3;                   /* '<S16>/UnitDelay3' */
+  int8_T Switch2_o;                    /* '<S16>/Switch2' */
+  int8_T UnitDelay2_DSTATE_i;          /* '<S16>/UnitDelay2' */
+  int8_T If_ActiveSubsystem_k;         /* '<S65>/If' */
+  uint8_T Delay_DSTATE_p;              /* '<S17>/Delay' */
+  uint8_T Delay1_DSTATE;               /* '<S17>/Delay1' */
+  uint8_T Delay2_DSTATE;               /* '<S17>/Delay2' */
+  uint8_T UnitDelay_DSTATE_p;          /* '<S5>/UnitDelay' */
+  uint8_T UnitDelay_DSTATE_h3;         /* '<S45>/Unit Delay' */
+  uint8_T UnitDelay_DSTATE_lv;         /* '<S62>/Unit Delay' */
+  uint8_T UnitDelay1_DSTATE_k;         /* '<S29>/Unit Delay1' */
+  uint8_T is_active_c11_PMSM_Controller;/* '<S36>/Control_Mode_Manager' */
+  uint8_T is_c11_PMSM_Controller;      /* '<S36>/Control_Mode_Manager' */
+  uint8_T is_ACTIVE;                   /* '<S36>/Control_Mode_Manager' */
+  uint8_T icLoad;                      /* '<S70>/Resettable Delay' */
+  uint8_T icLoad_i;                    /* '<S80>/Delay' */
+  boolean_T UnitDelay_DSTATE_gv;       /* '<S6>/UnitDelay' */
+  boolean_T UnitDelay_DSTATE_oy;       /* '<S10>/UnitDelay' */
+  boolean_T UnitDelay_DSTATE_f;        /* '<S7>/UnitDelay' */
+  boolean_T UnitDelay1_DSTATE_m;       /* '<S29>/UnitDelay1' */
+  boolean_T n_SpeedCtrl_Mode;          /* '<S36>/n_SpeedCtrl' */
+  boolean_T dz_cntTrnsDet_Mode;        /* '<S29>/dz_cntTrnsDet' */
+  boolean_T n_commDeacv_Mode;          /* '<S28>/n_commDeacv' */
 } DW;
 
 /* Zero-crossing (trigger) state */
 typedef struct {
-  ZCE_PI_backCalc_fixdt_e PI_backCalc_fixdt1;/* '<S95>/PI_backCalc_fixdt1' */
-  ZCE_PI_backCalc_fixdt_e PI_backCalc_fixdt_o3;/* '<S95>/PI_backCalc_fixdt' */
-  ZCSigState ResettableDelay_Reset_ZCE_o;/* '<S78>/Resettable Delay' */
-  ZCSigState ResettableDelay_Reset_ZCE_a;/* '<S93>/Resettable Delay' */
-  ZCE_PI_backCalc_fixdt PI_Speed;      /* '<S87>/PI_Speed' */
+  ZCE_PI_backCalc_fixdt_n PI_backCalc_fixdt1;/* '<S85>/PI_backCalc_fixdt1' */
+  ZCE_PI_backCalc_fixdt_n PI_backCalc_fixdt_ig;/* '<S85>/PI_backCalc_fixdt' */
+  ZCSigState ResettableDelay_Reset_ZCE_f;/* '<S70>/Resettable Delay' */
+  ZCE_PI_backCalc_fixdt PI_Speed;      /* '<S79>/PI_Speed' */
 } PrevZCX;
 
 /* Constant parameters (default storage) */
 typedef struct {
   /* Pooled Parameter (Expression: r_sin_M1)
    * Referenced by:
-   *   '<S58>/r_sin_M1'
-   *   '<S82>/r_sin_M1'
+   *   '<S49>/r_sin_M1'
+   *   '<S74>/r_sin_M1'
    */
-  int16_T pooled8[361];
+  int16_T pooled12[361];
 
   /* Pooled Parameter (Expression: r_cos_M1)
    * Referenced by:
-   *   '<S58>/r_cos_M1'
-   *   '<S82>/r_cos_M1'
+   *   '<S49>/r_cos_M1'
+   *   '<S74>/r_cos_M1'
    */
-  int16_T pooled9[361];
+  int16_T pooled13[361];
 
   /* Computed Parameter: vec_hallToPos_Value
-   * Referenced by: '<S11>/vec_hallToPos'
+   * Referenced by: '<S19>/vec_hallToPos'
    */
   int8_T vec_hallToPos_Value[8];
 } ConstP;
 
 /* External inputs (root inport signals with default storage) */
 typedef struct {
-  int16_T adc_Pha;                     /* '<Root>/adc_Pha' */
-  int16_T adc_Phb;                     /* '<Root>/adc_Phb' */
+  int16_T adc_Phase[3];                /* '<Root>/adc_Phase' */
+  uint8_T hall_abc[3];                 /* '<Root>/hall_abc' */
   int32_T spd_Target;                  /* '<Root>/spd_Target' */
   int16_T idq_Target;                  /* '<Root>/idq_Target' */
-  uint8_T hall_A;                      /* '<Root>/hall_A' */
-  uint8_T hall_B;                      /* '<Root>/hall_B' */
-  uint8_T hall_C;                      /* '<Root>/hall_C' */
-  uint32_T us_Count;                   /* '<Root>/us_Count' */
+  int16_T vdq_Target[2];               /* '<Root>/vdq_Target' */
+  int16_T idq_Limit;                   /* '<Root>/idq_Limit' */
   boolean_T b_motEna;                  /* '<Root>/b_motEna' */
   boolean_T b_cruiseEna;               /* '<Root>/b_cruiseEna' */
-  uint8_T n_ctrlModReq;                /* '<Root>/n_ctrlModReq' */
+  uint8_T n_ctrlMod;                   /* '<Root>/n_ctrlMod' */
   int16_T iDC_Limit;                   /* '<Root>/iDC_Limit' */
   int32_T spd_Limit;                   /* '<Root>/spd_Limit' */
   int16_T vDC;                         /* '<Root>/vDC' */
-  uint16_T FOC_Flags;                  /* '<Root>/FOC_Flags' */
-  int16_T vdq_Open[2];                 /* '<Root>/vdq_Open' */
-  int16_T theta_Open;                  /* '<Root>/theta_Open' */
+  uint32_T sys_ticks;                  /* '<Root>/sys_ticks' */
+  int16_T set_Angle;                   /* '<Root>/set_Angle' */
 } ExtU;
 
 /* External outputs (root outports fed by signals with default storage) */
 typedef struct {
-  int16_T pwm_Duty[3];                 /* '<Root>/pwm_Duty' */
+  int16_T n_Duty[3];                   /* '<Root>/n_Duty' */
   uint8_T n_Sector;                    /* '<Root>/n_Sector' */
   uint8_T n_MotError;                  /* '<Root>/n_MotError' */
   int16_T f_Vdq[2];                    /* '<Root>/f_Vdq' */
   int16_T f_Idq[2];                    /* '<Root>/f_Idq' */
   int16_T f_MotAngle;                  /* '<Root>/f_MotAngle' */
   int32_T f_MotRPM;                    /* '<Root>/f_MotRPM' */
-  int16_T f_hallAngle;                 /* '<Root>/f_hallAngle' */
   uint8_T n_hallStat;                  /* '<Root>/n_hallStat' */
-  uint8_T n_runingMode;                /* '<Root>/n_runingMode' */
+  uint8_T n_FocMode;                   /* '<Root>/n_FocMode' */
+  boolean_T b_advCtrl;                 /* '<Root>/b_advCtrl' */
 } ExtY;
 
 /* Parameters (default storage) */
 struct P_ {
-  uint32_T n_hall_count_ps;            /* Variable: n_hall_count_ps
-                                        * Referenced by:
-                                        *   '<S14>/z_maxCntRst'
-                                        *   '<S20>/z_counter'
-                                        *   '<S20>/UnitDelay2'
-                                        */
-  uint32_T n_polePairs;                /* Variable: n_polePairs
-                                        * Referenced by: '<S20>/cf_speedCoef1'
-                                        */
   int16_T cf_Fw_Kb;                    /* Variable: cf_Fw_Kb
-                                        * Referenced by: '<S74>/Constant5'
+                                        * Referenced by: '<S66>/Constant5'
                                         */
   int16_T cf_Fw_Ki;                    /* Variable: cf_Fw_Ki
-                                        * Referenced by: '<S74>/Constant2'
-                                        */
-  int16_T cf_TrqLimKb;                 /* Variable: cf_TrqLimKb
-                                        * Referenced by: '<S88>/Constant2'
-                                        */
-  int16_T cf_TrqLimKi;                 /* Variable: cf_TrqLimKi
-                                        * Referenced by: '<S88>/Constant1'
-                                        */
-  int16_T cf_TrqLimKp;                 /* Variable: cf_TrqLimKp
-                                        * Referenced by: '<S88>/Constant4'
+                                        * Referenced by: '<S66>/Constant2'
                                         */
   int16_T cf_idKp;                     /* Variable: cf_idKp
-                                        * Referenced by: '<S95>/Constant3'
+                                        * Referenced by: '<S85>/Constant3'
                                         */
   int16_T cf_iqKp;                     /* Variable: cf_iqKp
-                                        * Referenced by: '<S95>/Constant7'
+                                        * Referenced by: '<S85>/Constant7'
                                         */
   int16_T cf_nKp;                      /* Variable: cf_nKp
-                                        * Referenced by: '<S87>/Constant4'
+                                        * Referenced by: '<S79>/Constant4'
                                         */
   int16_T V_modulation;                /* Variable: V_modulation
                                         * Referenced by:
-                                        *   '<S51>/Constant'
-                                        *   '<S95>/Constant2'
-                                        *   '<S74>/Constant3'
+                                        *   '<S42>/Constant'
+                                        *   '<S85>/Constant2'
+                                        *   '<S66>/Constant3'
                                         */
   int16_T cf_idKb;                     /* Variable: cf_idKb
-                                        * Referenced by: '<S95>/Constant6'
+                                        * Referenced by: '<S85>/Constant6'
                                         */
   int16_T cf_idKi;                     /* Variable: cf_idKi
-                                        * Referenced by: '<S95>/Constant4'
+                                        * Referenced by: '<S85>/Constant4'
                                         */
   int16_T cf_iqKb;                     /* Variable: cf_iqKb
-                                        * Referenced by: '<S95>/Constant1'
+                                        * Referenced by: '<S85>/Constant1'
                                         */
   int16_T cf_iqKi;                     /* Variable: cf_iqKi
-                                        * Referenced by: '<S95>/Constant8'
+                                        * Referenced by: '<S85>/Constant8'
                                         */
   int16_T cf_nKb;                      /* Variable: cf_nKb
-                                        * Referenced by: '<S87>/Constant11'
+                                        * Referenced by: '<S79>/Constant11'
                                         */
   int16_T cf_nKi;                      /* Variable: cf_nKi
-                                        * Referenced by: '<S87>/Constant1'
+                                        * Referenced by: '<S79>/Constant1'
                                         */
   int16_T f_adc_curr_ceof;             /* Variable: f_adc_curr_ceof
-                                        * Referenced by: '<S52>/Constant'
+                                        * Referenced by: '<S43>/Constant'
                                         */
   int16_T cf_lastIqGain;               /* Variable: cf_lastIqGain
-                                        * Referenced by: '<S70>/Gain'
+                                        * Referenced by: '<S62>/Gain'
                                         */
   int16_T i_hall_offset;               /* Variable: i_hall_offset
-                                        * Referenced by: '<S15>/Constant2'
+                                        * Referenced by: '<S22>/Constant2'
                                         */
   int16_T i_dqMax;                     /* Variable: i_dqMax
                                         * Referenced by:
-                                        *   '<S76>/Constant1'
-                                        *   '<S76>/Constant2'
-                                        *   '<S76>/Constant3'
-                                        *   '<S76>/Constant5'
-                                        *   '<S87>/Constant6'
+                                        *   '<S68>/Constant1'
+                                        *   '<S68>/Constant2'
+                                        *   '<S68>/Constant3'
+                                        *   '<S68>/Constant5'
+                                        *   '<S79>/Constant6'
                                         */
   int16_T id_fieldWeakMax;             /* Variable: id_fieldWeakMax
-                                        * Referenced by: '<S74>/Constant6'
+                                        * Referenced by: '<S66>/Constant6'
                                         */
   int16_T dz_OpenStepVol;              /* Variable: dz_OpenStepVol
-                                        * Referenced by: '<S29>/Constant5'
+                                        * Referenced by:
+                                        *   '<S111>/Constant1'
+                                        *   '<S111>/Constant5'
                                         */
   uint16_T f_lpf_idq;                  /* Variable: f_lpf_idq
-                                        * Referenced by: '<S48>/Constant'
+                                        * Referenced by: '<S39>/Constant'
                                         */
   uint16_T f_lpf_vdq;                  /* Variable: f_lpf_vdq
-                                        * Referenced by: '<S76>/Constant'
+                                        * Referenced by: '<S68>/Constant'
                                         */
   uint16_T i_pwm_count;                /* Variable: i_pwm_count
-                                        * Referenced by: '<S61>/Constant1'
+                                        * Referenced by: '<S53>/Constant1'
+                                        */
+  uint8_T n_polePairs;                 /* Variable: n_polePairs
+                                        * Referenced by: '<S29>/polePairs'
                                         */
 };
 
@@ -333,79 +323,69 @@ extern void PMSM_Controller_step(RT_MODEL *const rtM);
 /*-
  * These blocks were eliminated from the model due to optimizations:
  *
- * Block '<S2>/Scope' : Unused code path elimination
- * Block '<S8>/Scope' : Unused code path elimination
- * Block '<S10>/Scope' : Unused code path elimination
- * Block '<S11>/Scope' : Unused code path elimination
+ * Block '<S19>/Scope' : Unused code path elimination
  * Block '<S3>/Scope' : Unused code path elimination
- * Block '<S14>/Logical Operator4' : Unused code path elimination
- * Block '<S20>/Abs2' : Unused code path elimination
- * Block '<S20>/Add' : Unused code path elimination
- * Block '<S22>/Compare' : Unused code path elimination
- * Block '<S22>/Constant' : Unused code path elimination
- * Block '<S20>/Sum7' : Unused code path elimination
- * Block '<S20>/UnitDelay4' : Unused code path elimination
- * Block '<S20>/UnitDelay6' : Unused code path elimination
- * Block '<S20>/UnitDelay7' : Unused code path elimination
- * Block '<S20>/UnitDelay8' : Unused code path elimination
- * Block '<S20>/dz_cntTrnsDet' : Unused code path elimination
- * Block '<S14>/Scope1' : Unused code path elimination
- * Block '<S14>/Scope2' : Unused code path elimination
- * Block '<S4>/Scope' : Unused code path elimination
- * Block '<S26>/Scope' : Unused code path elimination
- * Block '<S34>/Data Type Duplicate' : Unused code path elimination
- * Block '<S34>/Data Type Propagation' : Unused code path elimination
- * Block '<S1>/Scope2' : Unused code path elimination
- * Block '<S55>/Scope' : Unused code path elimination
- * Block '<S48>/Scope' : Unused code path elimination
- * Block '<S58>/Scope' : Unused code path elimination
- * Block '<S59>/Data Type Duplicate' : Unused code path elimination
- * Block '<S59>/Data Type Propagation' : Unused code path elimination
- * Block '<S60>/Scope' : Unused code path elimination
- * Block '<S69>/Scope' : Unused code path elimination
- * Block '<S6>/Scope12' : Unused code path elimination
- * Block '<S51>/Scope' : Unused code path elimination
- * Block '<S79>/Data Type Duplicate' : Unused code path elimination
- * Block '<S79>/Data Type Propagation' : Unused code path elimination
- * Block '<S82>/Scope' : Unused code path elimination
+ * Block '<S20>/Logical Operator4' : Unused code path elimination
+ * Block '<S29>/Scope' : Unused code path elimination
+ * Block '<S20>/Scope1' : Unused code path elimination
+ * Block '<S20>/Scope2' : Unused code path elimination
+ * Block '<S46>/Scope' : Unused code path elimination
+ * Block '<S39>/Scope' : Unused code path elimination
+ * Block '<S49>/Scope' : Unused code path elimination
+ * Block '<S40>/Constant1' : Unused code path elimination
+ * Block '<S40>/Min' : Unused code path elimination
+ * Block '<S50>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S50>/Data Type Propagation' : Unused code path elimination
+ * Block '<S51>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S51>/Data Type Propagation' : Unused code path elimination
+ * Block '<S52>/Scope' : Unused code path elimination
+ * Block '<S61>/Scope' : Unused code path elimination
+ * Block '<S42>/Scope' : Unused code path elimination
+ * Block '<S71>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S71>/Data Type Propagation' : Unused code path elimination
+ * Block '<S74>/Scope' : Unused code path elimination
+ * Block '<S76>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S76>/Data Type Propagation' : Unused code path elimination
+ * Block '<S77>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S77>/Data Type Propagation' : Unused code path elimination
+ * Block '<S83>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S83>/Data Type Propagation' : Unused code path elimination
  * Block '<S84>/Data Type Duplicate' : Unused code path elimination
  * Block '<S84>/Data Type Propagation' : Unused code path elimination
- * Block '<S85>/Data Type Duplicate' : Unused code path elimination
- * Block '<S85>/Data Type Propagation' : Unused code path elimination
- * Block '<S91>/Data Type Duplicate' : Unused code path elimination
- * Block '<S91>/Data Type Propagation' : Unused code path elimination
- * Block '<S94>/Data Type Duplicate' : Unused code path elimination
- * Block '<S94>/Data Type Propagation' : Unused code path elimination
- * Block '<S103>/Data Type Duplicate' : Unused code path elimination
- * Block '<S103>/Data Type Propagation' : Unused code path elimination
- * Block '<S105>/Data Type Duplicate' : Unused code path elimination
- * Block '<S105>/Data Type Propagation' : Unused code path elimination
- * Block '<S54>/Scope' : Unused code path elimination
- * Block '<S110>/Data Type Duplicate' : Unused code path elimination
- * Block '<S110>/Data Type Propagation' : Unused code path elimination
+ * Block '<S93>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S93>/Data Type Propagation' : Unused code path elimination
+ * Block '<S95>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S95>/Data Type Propagation' : Unused code path elimination
+ * Block '<S45>/Scope' : Unused code path elimination
+ * Block '<S100>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S100>/Data Type Propagation' : Unused code path elimination
+ * Block '<S107>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S107>/Data Type Propagation' : Unused code path elimination
+ * Block '<S4>/Scope' : Unused code path elimination
+ * Block '<S37>/Scope' : Unused code path elimination
  * Block '<S117>/Data Type Duplicate' : Unused code path elimination
  * Block '<S117>/Data Type Propagation' : Unused code path elimination
- * Block '<S10>/Manual Switch' : Eliminated due to constant selection input
- * Block '<S26>/Data Type Conversion' : Eliminate redundant data type conversion
- * Block '<S6>/Data Type Conversion' : Eliminate redundant data type conversion
- * Block '<S78>/Data Type Conversion1' : Eliminate redundant data type conversion
- * Block '<S80>/Data Type Conversion' : Eliminate redundant data type conversion
- * Block '<S10>/Constant' : Unused code path elimination
- * Block '<S20>/Divide14' : Unused code path elimination
- * Block '<S20>/smooth' : Unused code path elimination
- * Block '<S74>/Constant1' : Unused code path elimination
- * Block '<S99>/Add' : Unused code path elimination
- * Block '<S99>/Constant1' : Unused code path elimination
- * Block '<S99>/Constant3' : Unused code path elimination
- * Block '<S99>/Constant4' : Unused code path elimination
- * Block '<S99>/Constant5' : Unused code path elimination
- * Block '<S99>/Constant6' : Unused code path elimination
- * Block '<S99>/Divide' : Unused code path elimination
- * Block '<S99>/Divide1' : Unused code path elimination
- * Block '<S99>/Divide2' : Unused code path elimination
- * Block '<S99>/Divide4' : Unused code path elimination
- * Block '<S99>/Gain' : Unused code path elimination
- * Block '<S95>/Gain' : Unused code path elimination
+ * Block '<S121>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S121>/Data Type Propagation' : Unused code path elimination
+ * Block '<S1>/Data Type Conversion4' : Eliminate redundant data type conversion
+ * Block '<S1>/Data Type Conversion6' : Eliminate redundant data type conversion
+ * Block '<S1>/Data Type Conversion7' : Eliminate redundant data type conversion
+ * Block '<S70>/Data Type Conversion1' : Eliminate redundant data type conversion
+ * Block '<S72>/Data Type Conversion' : Eliminate redundant data type conversion
+ * Block '<S36>/Data Type Conversion' : Eliminate redundant data type conversion
+ * Block '<S66>/Constant1' : Unused code path elimination
+ * Block '<S89>/Add' : Unused code path elimination
+ * Block '<S89>/Constant1' : Unused code path elimination
+ * Block '<S89>/Constant3' : Unused code path elimination
+ * Block '<S89>/Constant4' : Unused code path elimination
+ * Block '<S89>/Constant5' : Unused code path elimination
+ * Block '<S89>/Constant6' : Unused code path elimination
+ * Block '<S89>/Divide' : Unused code path elimination
+ * Block '<S89>/Divide1' : Unused code path elimination
+ * Block '<S89>/Divide2' : Unused code path elimination
+ * Block '<S89>/Divide4' : Unused code path elimination
+ * Block '<S89>/Gain' : Unused code path elimination
+ * Block '<S85>/Gain' : Unused code path elimination
  */
 
 /*-
@@ -420,131 +400,135 @@ extern void PMSM_Controller_step(RT_MODEL *const rtM);
  * MATLAB hilite_system command to trace the generated code back
  * to the parent model.  For example,
  *
- * hilite_system('MotorController_FOC/PMSM_Controller')    - opens subsystem MotorController_FOC/PMSM_Controller
- * hilite_system('MotorController_FOC/PMSM_Controller/Kp') - opens and selects block Kp
+ * hilite_system('MotorController_FOC_hall/PMSM_Controller')    - opens subsystem MotorController_FOC_hall/PMSM_Controller
+ * hilite_system('MotorController_FOC_hall/PMSM_Controller/Kp') - opens and selects block Kp
  *
  * Here is the system hierarchy for this model
  *
- * '<Root>' : 'MotorController_FOC'
- * '<S1>'   : 'MotorController_FOC/PMSM_Controller'
- * '<S2>'   : 'MotorController_FOC/PMSM_Controller/1ms_Scheduler'
- * '<S3>'   : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation'
- * '<S4>'   : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager'
- * '<S5>'   : 'MotorController_FOC/PMSM_Controller/Diagnostics'
- * '<S6>'   : 'MotorController_FOC/PMSM_Controller/controller'
- * '<S7>'   : 'MotorController_FOC/PMSM_Controller/1ms_Scheduler/counter'
- * '<S8>'   : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Direction_Detection'
- * '<S9>'   : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Edge_Detect'
- * '<S10>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation'
- * '<S11>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Hall_Angle_Raw'
- * '<S12>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/If Action Subsystem'
- * '<S13>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/If Action Subsystem1'
- * '<S14>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation'
- * '<S15>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation/degree_rad'
- * '<S16>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem'
- * '<S17>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem1'
- * '<S18>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem2'
- * '<S19>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation/AdvCtrlDetect'
- * '<S20>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation'
- * '<S21>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation/AdvCtrlDetect/Compare To Constant'
- * '<S22>'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Compare To Constant'
- * '<S23>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/Control_Mode_Manager'
- * '<S24>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/Limitition'
- * '<S25>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/Mode_Transition_Calculation'
- * '<S26>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale'
- * '<S27>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/If Action Subsystem'
- * '<S28>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/If Action Subsystem1'
- * '<S29>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode'
- * '<S30>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/torque_mode'
- * '<S31>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Edge'
- * '<S32>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control'
- * '<S33>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control/RateInit'
- * '<S34>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control/Saturation Dynamic'
- * '<S35>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control/StepAdd'
- * '<S36>'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control/StepAdd/delayUnit'
- * '<S37>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled'
- * '<S38>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter'
- * '<S39>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Edge'
- * '<S40>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Default'
- * '<S41>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification'
- * '<S42>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Edge'
- * '<S43>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification'
- * '<S44>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter'
- * '<S45>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter/rst_Delay1'
- * '<S46>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter'
- * '<S47>'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter/rst_Delay1'
- * '<S48>'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward'
- * '<S49>'  : 'MotorController_FOC/PMSM_Controller/controller/Motor_Limitations_Enabled'
- * '<S50>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM'
- * '<S51>'  : 'MotorController_FOC/PMSM_Controller/controller/circle_limiter'
- * '<S52>'  : 'MotorController_FOC/PMSM_Controller/controller/current_sample'
- * '<S53>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc'
- * '<S54>'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc'
- * '<S55>'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward/Clarke'
- * '<S56>'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward/Low_Pass_Filter'
- * '<S57>'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward/Park'
- * '<S58>'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward/Sine_Cosine_Approximation'
- * '<S59>'  : 'MotorController_FOC/PMSM_Controller/controller/Motor_Limitations_Enabled/Saturation Dynamic'
- * '<S60>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/Park_Transform_Inverse'
- * '<S61>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM'
- * '<S62>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen'
- * '<S63>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/sector_select'
- * '<S64>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector1'
- * '<S65>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector2'
- * '<S66>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector3'
- * '<S67>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector4'
- * '<S68>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector5'
- * '<S69>'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector6'
- * '<S70>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc'
- * '<S71>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/pid_schdule'
- * '<S72>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign'
- * '<S73>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get'
- * '<S74>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/FW_Calc'
- * '<S75>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc'
- * '<S76>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter'
- * '<S77>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl'
- * '<S78>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Intergrator_z'
- * '<S79>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Saturation Dynamic'
- * '<S80>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Calc'
- * '<S81>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali'
- * '<S82>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali/Sine_Cosine_Approximation'
- * '<S83>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Low_Pass_Filter'
- * '<S84>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic1'
- * '<S85>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic3'
- * '<S86>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/sqrtSum'
- * '<S87>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/speed_mode'
- * '<S88>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/torque_mode'
- * '<S89>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed'
- * '<S90>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Rst_Integrator'
- * '<S91>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Saturation Dynamic1'
- * '<S92>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/torque_mode/PI_TrqSpdLim'
- * '<S93>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/torque_mode/PI_TrqSpdLim/Rst_Integrator'
- * '<S94>'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/torque_mode/PI_TrqSpdLim/Saturation Dynamic'
- * '<S95>'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop'
- * '<S96>'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/OpenLoop'
- * '<S97>'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep'
- * '<S98>'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep'
- * '<S99>'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/FeedForward'
- * '<S100>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt'
- * '<S101>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1'
- * '<S102>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Rst_Integrator'
- * '<S103>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Saturation Dynamic1'
- * '<S104>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Rst_Integrator'
- * '<S105>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Saturation Dynamic1'
- * '<S106>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Edge'
- * '<S107>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Enabled Subsystem'
- * '<S108>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control'
- * '<S109>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control/RateInit'
- * '<S110>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control/Saturation Dynamic'
- * '<S111>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control/StepAdd'
- * '<S112>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control/StepAdd/delayUnit'
- * '<S113>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Edge'
- * '<S114>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Enabled Subsystem'
- * '<S115>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control'
- * '<S116>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control/RateInit'
- * '<S117>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control/Saturation Dynamic'
- * '<S118>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control/StepAdd'
- * '<S119>' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control/StepAdd/delayUnit'
+ * '<Root>' : 'MotorController_FOC_hall'
+ * '<S1>'   : 'MotorController_FOC_hall/PMSM_Controller'
+ * '<S2>'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics'
+ * '<S3>'   : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation'
+ * '<S4>'   : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC'
+ * '<S5>'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled'
+ * '<S6>'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter'
+ * '<S7>'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Edge'
+ * '<S8>'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Default'
+ * '<S9>'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification'
+ * '<S10>'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Edge'
+ * '<S11>'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification'
+ * '<S12>'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter'
+ * '<S13>'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter/rst_Delay1'
+ * '<S14>'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter'
+ * '<S15>'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter/rst_Delay1'
+ * '<S16>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Direction_Detection'
+ * '<S17>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Edge_Detect'
+ * '<S18>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation'
+ * '<S19>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Hall_Angle_Raw'
+ * '<S20>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation'
+ * '<S21>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta'
+ * '<S22>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad'
+ * '<S23>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta/normal'
+ * '<S24>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta/wrapper'
+ * '<S25>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem'
+ * '<S26>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem1'
+ * '<S27>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem2'
+ * '<S28>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/AdvCtrlDetect'
+ * '<S29>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation'
+ * '<S30>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/AdvCtrlDetect/Compare To Constant'
+ * '<S31>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta'
+ * '<S32>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta/normal'
+ * '<S33>'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta/wrapper'
+ * '<S34>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Call_Schduler'
+ * '<S35>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core'
+ * '<S36>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Ctrl_Mode_Transition'
+ * '<S37>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale'
+ * '<S38>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Call_Schduler/counter'
+ * '<S39>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park'
+ * '<S40>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation'
+ * '<S41>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM'
+ * '<S42>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/circle_limiter'
+ * '<S43>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/current_sample'
+ * '<S44>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc'
+ * '<S45>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc'
+ * '<S46>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Clarke'
+ * '<S47>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Low_Pass_Filter'
+ * '<S48>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Park'
+ * '<S49>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Sine_Cosine_Approximation'
+ * '<S50>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation/Saturation Dynamic'
+ * '<S51>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation/Saturation Dynamic1'
+ * '<S52>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/Park_Transform_Inverse'
+ * '<S53>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM'
+ * '<S54>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen'
+ * '<S55>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/sector_select'
+ * '<S56>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector1'
+ * '<S57>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector2'
+ * '<S58>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector3'
+ * '<S59>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector4'
+ * '<S60>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector5'
+ * '<S61>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector6'
+ * '<S62>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc'
+ * '<S63>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/pid_schdule'
+ * '<S64>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign'
+ * '<S65>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get'
+ * '<S66>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc'
+ * '<S67>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc'
+ * '<S68>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter'
+ * '<S69>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl'
+ * '<S70>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Intergrator_z'
+ * '<S71>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Saturation Dynamic'
+ * '<S72>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Calc'
+ * '<S73>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali'
+ * '<S74>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali/Sine_Cosine_Approximation'
+ * '<S75>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Low_Pass_Filter'
+ * '<S76>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic1'
+ * '<S77>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic3'
+ * '<S78>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/sqrtSum'
+ * '<S79>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode'
+ * '<S80>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/torque_mode'
+ * '<S81>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed'
+ * '<S82>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Rst_Integrator'
+ * '<S83>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Saturation Dynamic1'
+ * '<S84>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/torque_mode/Saturation Dynamic1'
+ * '<S85>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop'
+ * '<S86>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/OpenLoop'
+ * '<S87>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep'
+ * '<S88>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep'
+ * '<S89>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/FeedForward'
+ * '<S90>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt'
+ * '<S91>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1'
+ * '<S92>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Rst_Integrator'
+ * '<S93>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Saturation Dynamic1'
+ * '<S94>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Rst_Integrator'
+ * '<S95>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Saturation Dynamic1'
+ * '<S96>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Edge'
+ * '<S97>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Enabled Subsystem'
+ * '<S98>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control'
+ * '<S99>'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/RateInit'
+ * '<S100>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/Saturation Dynamic'
+ * '<S101>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/StepAdd'
+ * '<S102>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/StepAdd/delayUnit'
+ * '<S103>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Edge'
+ * '<S104>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Enabled Subsystem'
+ * '<S105>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control'
+ * '<S106>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/RateInit'
+ * '<S107>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/Saturation Dynamic'
+ * '<S108>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/StepAdd'
+ * '<S109>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/StepAdd/delayUnit'
+ * '<S110>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Ctrl_Mode_Transition/Control_Mode_Manager'
+ * '<S111>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode'
+ * '<S112>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_dege'
+ * '<S113>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl'
+ * '<S114>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_edge'
+ * '<S115>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl'
+ * '<S116>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/RateInit'
+ * '<S117>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/Saturation Dynamic'
+ * '<S118>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/StepAdd'
+ * '<S119>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/StepAdd/delayUnit'
+ * '<S120>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/RateInit'
+ * '<S121>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/Saturation Dynamic'
+ * '<S122>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/StepAdd'
+ * '<S123>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/StepAdd/delayUnit'
  */
 #endif                                 /* RTW_HEADER_PMSM_Controller_h_ */
 

Simulink/PMSM_Controller_ert_rtw/PMSM_Controller.mk

@@ -2,8 +2,8 @@
 ## Makefile generated for component 'PMSM_Controller'. 
 ## 
 ## Makefile     : PMSM_Controller.mk
-## Generated on : Wed Apr 06 15:47:47 2022
-## Final product: $(RELATIVE_PATH_TO_ANCHOR)\PMSM_Controller.exe
+## Generated on : Tue Aug 02 19:35:36 2022
+## Final product: $(RELATIVE_PATH_TO_ANCHOR)/PMSM_Controller
 ## Product type : executable
 ## 
 ###########################################################################
@@ -15,33 +15,28 @@
 # Macro Descriptions:
 # PRODUCT_NAME            Name of the system to build
 # MAKEFILE                Name of this makefile
-# COMPILER_COMMAND_FILE   Compiler command listing model reference header paths
-# CMD_FILE                Command file
 
 PRODUCT_NAME              = PMSM_Controller
 MAKEFILE                  = PMSM_Controller.mk
-MATLAB_ROOT               = D:\Program Files\R2020b
-MATLAB_BIN                = D:\Program Files\R2020b\bin
-MATLAB_ARCH_BIN           = $(MATLAB_BIN)\win64
-START_DIR                 = E:\works\mcu\MC100\Simulink
+MATLAB_ROOT               = D:/Program Files/R2020b
+MATLAB_BIN                = D:/Program Files/R2020b/bin
+MATLAB_ARCH_BIN           = $(MATLAB_BIN)/win64
+START_DIR                 = E:/works/mcu/MC100/Simulink
 SOLVER                    = 
 SOLVER_OBJ                = 
 CLASSIC_INTERFACE         = 0
 TGT_FCN_LIB               = ISO_C
 MODEL_HAS_DYNAMICALLY_LOADED_SFCNS = 0
 RELATIVE_PATH_TO_ANCHOR   = ..
-COMPILER_COMMAND_FILE     = PMSM_Controller_comp.rsp
-CMD_FILE                  = PMSM_Controller.rsp
 C_STANDARD_OPTS           = 
 CPP_STANDARD_OPTS         = 
-NODEBUG                   = 1
 
 ###########################################################################
 ## TOOLCHAIN SPECIFICATIONS
 ###########################################################################
 
-# Toolchain Name:          Microsoft Visual C++ 2019 v16.0 | nmake (64-bit Windows)
-# Supported Version(s):    16.0
+# Toolchain Name:          Simulink Real-Time Toolchain
+# Supported Version(s):    
 # ToolchainInfo Version:   2020b
 # Specification Revision:  1.0
 # 
@@ -49,106 +44,74 @@ NODEBUG                   = 1
 # Macros assumed to be defined elsewhere
 #-------------------------------------------
 
-# NODEBUG
-# cvarsdll
-# cvarsmt
-# conlibsmt
-# ldebug
-# conflags
-# cflags
+# SLREALTIME_QNX_SP_ROOT
 
 #-----------
 # MACROS
 #-----------
 
-MW_EXTERNLIB_DIR    = $(MATLAB_ROOT)\extern\lib\win64\microsoft
-MW_LIB_DIR          = $(MATLAB_ROOT)\lib\win64
-CPU                 = AMD64
-APPVER              = 5.02
-CVARSFLAG           = $(cvarsmt)
-CFLAGS_ADDITIONAL   = -D_CRT_SECURE_NO_WARNINGS
-CPPFLAGS_ADDITIONAL = -EHs -D_CRT_SECURE_NO_WARNINGS /wd4251
-LIBS_TOOLCHAIN      = $(conlibs)
+QCC_TARGET             = gcc_ntox86_64
 
 TOOLCHAIN_SRCS = 
 TOOLCHAIN_INCS = 
-TOOLCHAIN_LIBS = 
+TOOLCHAIN_LIBS = -L$(MATLAB_ROOT)/toolbox/slrealtime/target/lib -ltraceparser -lpps -lslrealtime_kernel -lslrealtime_rtps -lsocket -lboost_system -lboost_log -lpci -lopenblas
 
 #------------------------
 # BUILD TOOL COMMANDS
 #------------------------
 
-# C Compiler: Microsoft Visual C Compiler
-CC = cl
+# C Compiler: QNX C Compiler
+CC = qcc
 
-# Linker: Microsoft Visual C Linker
-LD = link
+# Linker: QCC Linker
+LD = q++
 
-# C++ Compiler: Microsoft Visual C++ Compiler
-CPP = cl
+# C++ Compiler: QNX C++ Compiler
+CPP = q++
 
-# C++ Linker: Microsoft Visual C++ Linker
-CPP_LD = link
+# C++ Linker: QCC C++ Linker
+CPP_LD = q++
 
-# Archiver: Microsoft Visual C/C++ Archiver
-AR = lib
+# Archiver: QNX Archiver
+AR = ntox86_64-gcc-ar
 
-# MEX Tool: MEX Tool
-MEX_PATH = $(MATLAB_ARCH_BIN)
-MEX = "$(MEX_PATH)\mex"
-
-# Download: Download
-DOWNLOAD =
-
-# Execute: Execute
-EXECUTE = $(PRODUCT)
-
-# Builder: NMAKE Utility
-MAKE = nmake
+# Builder: GMAKE Utility
+MAKE = make
 
 
 #-------------------------
 # Directives/Utilities
 #-------------------------
 
-CDEBUG              = -Zi
-C_OUTPUT_FLAG       = -Fo
-LDDEBUG             = /DEBUG
-OUTPUT_FLAG         = -out:
-CPPDEBUG            = -Zi
-CPP_OUTPUT_FLAG     = -Fo
-CPPLDDEBUG          = /DEBUG
-OUTPUT_FLAG         = -out:
+CDEBUG              = -g -O0 -finstrument-functions
+C_OUTPUT_FLAG       = -o
+LDDEBUG             = -g
+OUTPUT_FLAG         = -o
+CPPDEBUG            = -g -O0 -finstrument-functions
+CPP_OUTPUT_FLAG     = -o
+CPPLDDEBUG          = -g
+OUTPUT_FLAG         = -o
 ARDEBUG             =
-STATICLIB_OUTPUT_FLAG = -out:
-MEX_DEBUG           = -g
-RM                  = @del
+STATICLIB_OUTPUT_FLAG =
+RM                  = @del /F
 ECHO                = @echo
-MV                  = @ren
-RUN                 = @cmd /C
+MV                  = @move
+RUN                 =
 
 #----------------------------------------
 # "Faster Builds" Build Configuration
 #----------------------------------------
 
-ARFLAGS              = /nologo
-CFLAGS               = $(cflags) $(CVARSFLAG) $(CFLAGS_ADDITIONAL) \
-                       /Od /Oy-
-CPPFLAGS             = /TP $(cflags) $(CVARSFLAG) $(CPPFLAGS_ADDITIONAL) \
-                       /Od /Oy-
-CPP_LDFLAGS          = $(ldebug) $(conflags) $(LIBS_TOOLCHAIN)
-CPP_SHAREDLIB_LDFLAGS  = $(ldebug) $(conflags) $(LIBS_TOOLCHAIN) \
-                         -dll -def:$(DEF_FILE)
-DOWNLOAD_FLAGS       =
-EXECUTE_FLAGS        =
-LDFLAGS              = $(ldebug) $(conflags) $(LIBS_TOOLCHAIN)
-MEX_CPPFLAGS         =
-MEX_CPPLDFLAGS       =
-MEX_CFLAGS           =
-MEX_LDFLAGS          =
+ARFLAGS              = ruvs
+CFLAGS               = -c -V$(QCC_TARGET) -g \
+                       -O2 -ffast-math -fwrapv
+CPPFLAGS             = -c -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++ \
+                       -O2 -ffast-math -fwrapv
+CPP_LDFLAGS          = -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++
+CPP_SHAREDLIB_LDFLAGS  = -V$(QCC_TARGET) -shared -Wl,--no-undefined -g
+LDFLAGS              = -V$(QCC_TARGET) -g -std=gnu++14 -stdlib=libstdc++
 MAKE_FLAGS           = -f $(MAKEFILE)
-SHAREDLIB_LDFLAGS    = $(ldebug) $(conflags) $(LIBS_TOOLCHAIN) \
-                       -dll -def:$(DEF_FILE)
+SHAREDLIB_LDFLAGS    = -V$(QCC_TARGET) -shared -Wl,--no-undefined -g
 
 
 
@@ -156,7 +119,7 @@ SHAREDLIB_LDFLAGS    = $(ldebug) $(conflags) $(LIBS_TOOLCHAIN) \
 ## OUTPUT INFO
 ###########################################################################
 
-PRODUCT = $(RELATIVE_PATH_TO_ANCHOR)\PMSM_Controller.exe
+PRODUCT = $(RELATIVE_PATH_TO_ANCHOR)/PMSM_Controller
 PRODUCT_TYPE = "executable"
 BUILD_TYPE = "Top-Level Standalone Executable"
 
@@ -164,7 +127,7 @@ BUILD_TYPE = "Top-Level Standalone Executable"
 ## INCLUDE PATHS
 ###########################################################################
 
-INCLUDES_BUILDINFO = 
+INCLUDES_BUILDINFO = -I$(START_DIR) -I$(START_DIR)/PMSM_Controller_ert_rtw -I$(MATLAB_ROOT)/extern/include -I$(MATLAB_ROOT)/simulink/include -I$(MATLAB_ROOT)/rtw/c/src -I$(MATLAB_ROOT)/rtw/c/src/ext_mode/common -I$(MATLAB_ROOT)/rtw/c/ert
 
 INCLUDES = $(INCLUDES_BUILDINFO)
 
@@ -183,9 +146,9 @@ DEFINES = $(DEFINES_BUILD_ARGS) $(DEFINES_CUSTOM) $(DEFINES_OPTS) $(DEFINES_STAN
 ## SOURCE FILES
 ###########################################################################
 
-SRCS = $(START_DIR)\PMSM_Controller_ert_rtw\PMSM_Controller.c $(START_DIR)\PMSM_Controller_ert_rtw\PMSM_Controller_data.c
+SRCS = $(START_DIR)/PMSM_Controller_ert_rtw/PMSM_Controller.c $(START_DIR)/PMSM_Controller_ert_rtw/PMSM_Controller_data.c
 
-MAIN_SRC = $(START_DIR)\PMSM_Controller_ert_rtw\ert_main.c
+MAIN_SRC = $(START_DIR)/PMSM_Controller_ert_rtw/ert_main.c
 
 ALL_SRCS = $(SRCS) $(MAIN_SRC)
 
@@ -193,9 +156,9 @@ ALL_SRCS = $(SRCS) $(MAIN_SRC)
 ## OBJECTS
 ###########################################################################
 
-OBJS = PMSM_Controller.obj PMSM_Controller_data.obj
+OBJS = PMSM_Controller.o PMSM_Controller_data.o
 
-MAIN_OBJ = ert_main.obj
+MAIN_OBJ = ert_main.o
 
 ALL_OBJS = $(OBJS) $(MAIN_OBJ)
 
@@ -225,61 +188,43 @@ SYSTEM_LIBS =
 # C Compiler
 #---------------
 
-CFLAGS_BASIC = $(DEFINES) @$(COMPILER_COMMAND_FILE)
+CFLAGS_BASIC = $(DEFINES) $(INCLUDES)
 
-CFLAGS = $(CFLAGS) $(CFLAGS_BASIC)
+CFLAGS += $(CFLAGS_BASIC)
 
 #-----------------
 # C++ Compiler
 #-----------------
 
-CPPFLAGS_BASIC = $(DEFINES) @$(COMPILER_COMMAND_FILE)
+CPPFLAGS_BASIC = $(DEFINES) $(INCLUDES)
 
-CPPFLAGS = $(CPPFLAGS) $(CPPFLAGS_BASIC)
+CPPFLAGS += $(CPPFLAGS_BASIC)
 
 ###########################################################################
 ## INLINED COMMANDS
 ###########################################################################
 
-
-!include $(MATLAB_ROOT)\rtw\c\tools\vcdefs.mak
-
-
 ###########################################################################
 ## PHONY TARGETS
 ###########################################################################
 
-.PHONY : all build buildobj clean info prebuild download execute set_environment_variables
+.PHONY : all build buildobj clean info prebuild
 
 
 all : build
-	@cmd /C "@echo ### Successfully generated all binary outputs."
+	@echo "### Successfully generated all binary outputs."
 
 
-build : set_environment_variables prebuild $(PRODUCT)
+build : prebuild $(PRODUCT)
 
 
-buildobj : set_environment_variables prebuild $(OBJS) $(PREBUILT_OBJS)
-	@cmd /C "@echo ### Successfully generated all binary outputs."
+buildobj : prebuild $(OBJS) $(PREBUILT_OBJS)
+	@echo "### Successfully generated all binary outputs."
 
 
 prebuild : 
 
 
-download : $(PRODUCT)
-
-
-execute : download
-	@cmd /C "@echo ### Invoking postbuild tool "Execute" ..."
-	$(EXECUTE) $(EXECUTE_FLAGS)
-	@cmd /C "@echo ### Done invoking postbuild tool."
-
-
-set_environment_variables : 
-	@set INCLUDE=$(INCLUDES);$(INCLUDE)
-	@set LIB=$(LIB)
-
-
 ###########################################################################
 ## FINAL TARGET
 ###########################################################################
@@ -289,9 +234,9 @@ set_environment_variables :
 #-------------------------------------------
 
 $(PRODUCT) : $(OBJS) $(PREBUILT_OBJS) $(MAIN_OBJ)
-	@cmd /C "@echo ### Creating standalone executable "$(PRODUCT)" ..."
-	$(LD) $(LDFLAGS) -out:$(PRODUCT) @$(CMD_FILE) $(SYSTEM_LIBS) $(TOOLCHAIN_LIBS)
-	@cmd /C "@echo ### Created: $(PRODUCT)"
+	@echo "### Creating standalone executable "$(PRODUCT)" ..."
+	$(LD) $(LDFLAGS) -o $(PRODUCT) $(OBJS) $(MAIN_OBJ) $(SYSTEM_LIBS) $(TOOLCHAIN_LIBS)
+	@echo "### Created: $(PRODUCT)"
 
 
 ###########################################################################
@@ -302,71 +247,71 @@ $(PRODUCT) : $(OBJS) $(PREBUILT_OBJS) $(MAIN_OBJ)
 # SOURCE-TO-OBJECT
 #---------------------
 
-.c.obj :
-	$(CC) $(CFLAGS) -Fo"$@" "$<"
+%.o : %.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
-.cpp.obj :
-	$(CPP) $(CPPFLAGS) -Fo"$@" "$<"
+%.o : %.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
 
 
-{$(RELATIVE_PATH_TO_ANCHOR)}.c.obj :
-	$(CC) $(CFLAGS) -Fo"$@" "$<"
+%.o : $(RELATIVE_PATH_TO_ANCHOR)/%.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
-{$(RELATIVE_PATH_TO_ANCHOR)}.cpp.obj :
-	$(CPP) $(CPPFLAGS) -Fo"$@" "$<"
+%.o : $(RELATIVE_PATH_TO_ANCHOR)/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
 
 
-{$(START_DIR)}.c.obj :
-	$(CC) $(CFLAGS) -Fo"$@" "$<"
+%.o : $(START_DIR)/%.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
-{$(START_DIR)}.cpp.obj :
-	$(CPP) $(CPPFLAGS) -Fo"$@" "$<"
+%.o : $(START_DIR)/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
 
 
-{$(START_DIR)\PMSM_Controller_ert_rtw}.c.obj :
-	$(CC) $(CFLAGS) -Fo"$@" "$<"
+%.o : $(START_DIR)/PMSM_Controller_ert_rtw/%.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
-{$(START_DIR)\PMSM_Controller_ert_rtw}.cpp.obj :
-	$(CPP) $(CPPFLAGS) -Fo"$@" "$<"
+%.o : $(START_DIR)/PMSM_Controller_ert_rtw/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
 
 
-{$(MATLAB_ROOT)\rtw\c\src}.c.obj :
-	$(CC) $(CFLAGS) -Fo"$@" "$<"
+%.o : $(MATLAB_ROOT)/rtw/c/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
-{$(MATLAB_ROOT)\rtw\c\src}.cpp.obj :
-	$(CPP) $(CPPFLAGS) -Fo"$@" "$<"
+%.o : $(MATLAB_ROOT)/rtw/c/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
 
 
-{$(MATLAB_ROOT)\simulink\src}.c.obj :
-	$(CC) $(CFLAGS) -Fo"$@" "$<"
+%.o : $(MATLAB_ROOT)/simulink/src/%.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
-{$(MATLAB_ROOT)\simulink\src}.cpp.obj :
-	$(CPP) $(CPPFLAGS) -Fo"$@" "$<"
+%.o : $(MATLAB_ROOT)/simulink/src/%.cpp
+	$(CPP) $(CPPFLAGS) -o $@ $<
 
 
-PMSM_Controller.obj : $(START_DIR)\PMSM_Controller_ert_rtw\PMSM_Controller.c
-	$(CC) $(CFLAGS) -Fo"$@" $(START_DIR)\PMSM_Controller_ert_rtw\PMSM_Controller.c
+PMSM_Controller.o : $(START_DIR)/PMSM_Controller_ert_rtw/PMSM_Controller.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
-PMSM_Controller_data.obj : $(START_DIR)\PMSM_Controller_ert_rtw\PMSM_Controller_data.c
-	$(CC) $(CFLAGS) -Fo"$@" $(START_DIR)\PMSM_Controller_ert_rtw\PMSM_Controller_data.c
+PMSM_Controller_data.o : $(START_DIR)/PMSM_Controller_ert_rtw/PMSM_Controller_data.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
-ert_main.obj : $(START_DIR)\PMSM_Controller_ert_rtw\ert_main.c
-	$(CC) $(CFLAGS) -Fo"$@" $(START_DIR)\PMSM_Controller_ert_rtw\ert_main.c
+ert_main.o : $(START_DIR)/PMSM_Controller_ert_rtw/ert_main.c
+	$(CC) $(CFLAGS) -o $@ $<
 
 
 ###########################################################################
 ## DEPENDENCIES
 ###########################################################################
 
-$(ALL_OBJS) : rtw_proj.tmw $(COMPILER_COMMAND_FILE) $(MAKEFILE)
+$(ALL_OBJS) : rtw_proj.tmw $(MAKEFILE)
 
 
 ###########################################################################
@@ -374,37 +319,31 @@ $(ALL_OBJS) : rtw_proj.tmw $(COMPILER_COMMAND_FILE) $(MAKEFILE)
 ###########################################################################
 
 info : 
-	@cmd /C "@echo ### PRODUCT = $(PRODUCT)"
-	@cmd /C "@echo ### PRODUCT_TYPE = $(PRODUCT_TYPE)"
-	@cmd /C "@echo ### BUILD_TYPE = $(BUILD_TYPE)"
-	@cmd /C "@echo ### INCLUDES = $(INCLUDES)"
-	@cmd /C "@echo ### DEFINES = $(DEFINES)"
-	@cmd /C "@echo ### ALL_SRCS = $(ALL_SRCS)"
-	@cmd /C "@echo ### ALL_OBJS = $(ALL_OBJS)"
-	@cmd /C "@echo ### LIBS = $(LIBS)"
-	@cmd /C "@echo ### MODELREF_LIBS = $(MODELREF_LIBS)"
-	@cmd /C "@echo ### SYSTEM_LIBS = $(SYSTEM_LIBS)"
-	@cmd /C "@echo ### TOOLCHAIN_LIBS = $(TOOLCHAIN_LIBS)"
-	@cmd /C "@echo ### CFLAGS = $(CFLAGS)"
-	@cmd /C "@echo ### LDFLAGS = $(LDFLAGS)"
-	@cmd /C "@echo ### SHAREDLIB_LDFLAGS = $(SHAREDLIB_LDFLAGS)"
-	@cmd /C "@echo ### CPPFLAGS = $(CPPFLAGS)"
-	@cmd /C "@echo ### CPP_LDFLAGS = $(CPP_LDFLAGS)"
-	@cmd /C "@echo ### CPP_SHAREDLIB_LDFLAGS = $(CPP_SHAREDLIB_LDFLAGS)"
-	@cmd /C "@echo ### ARFLAGS = $(ARFLAGS)"
-	@cmd /C "@echo ### MEX_CFLAGS = $(MEX_CFLAGS)"
-	@cmd /C "@echo ### MEX_CPPFLAGS = $(MEX_CPPFLAGS)"
-	@cmd /C "@echo ### MEX_LDFLAGS = $(MEX_LDFLAGS)"
-	@cmd /C "@echo ### MEX_CPPLDFLAGS = $(MEX_CPPLDFLAGS)"
-	@cmd /C "@echo ### DOWNLOAD_FLAGS = $(DOWNLOAD_FLAGS)"
-	@cmd /C "@echo ### EXECUTE_FLAGS = $(EXECUTE_FLAGS)"
-	@cmd /C "@echo ### MAKE_FLAGS = $(MAKE_FLAGS)"
+	@echo "### PRODUCT = $(PRODUCT)"
+	@echo "### PRODUCT_TYPE = $(PRODUCT_TYPE)"
+	@echo "### BUILD_TYPE = $(BUILD_TYPE)"
+	@echo "### INCLUDES = $(INCLUDES)"
+	@echo "### DEFINES = $(DEFINES)"
+	@echo "### ALL_SRCS = $(ALL_SRCS)"
+	@echo "### ALL_OBJS = $(ALL_OBJS)"
+	@echo "### LIBS = $(LIBS)"
+	@echo "### MODELREF_LIBS = $(MODELREF_LIBS)"
+	@echo "### SYSTEM_LIBS = $(SYSTEM_LIBS)"
+	@echo "### TOOLCHAIN_LIBS = $(TOOLCHAIN_LIBS)"
+	@echo "### CFLAGS = $(CFLAGS)"
+	@echo "### LDFLAGS = $(LDFLAGS)"
+	@echo "### SHAREDLIB_LDFLAGS = $(SHAREDLIB_LDFLAGS)"
+	@echo "### CPPFLAGS = $(CPPFLAGS)"
+	@echo "### CPP_LDFLAGS = $(CPP_LDFLAGS)"
+	@echo "### CPP_SHAREDLIB_LDFLAGS = $(CPP_SHAREDLIB_LDFLAGS)"
+	@echo "### ARFLAGS = $(ARFLAGS)"
+	@echo "### MAKE_FLAGS = $(MAKE_FLAGS)"
 
 
 clean : 
 	$(ECHO) "### Deleting all derived files..."
-	@if exist $(PRODUCT) $(RM) $(PRODUCT)
-	$(RM) $(ALL_OBJS)
+	$(RM) $(subst /,\,$(PRODUCT))
+	$(RM) $(subst /,\,$(ALL_OBJS))
 	$(ECHO) "### Deleted all derived files."
 
 

Simulink/PMSM_Controller_ert_rtw/PMSM_Controller.rsp

@@ -1,3 +0,0 @@
-PMSM_Controller.obj
-PMSM_Controller_data.obj
-ert_main.obj

Simulink/PMSM_Controller_ert_rtw/PMSM_Controller_comp.rsp

@@ -1,7 +0,0 @@
--IE:\works\mcu\MC100\Simulink
--IE:\works\mcu\MC100\Simulink\PMSM_Controller_ert_rtw
--I"D:\Program Files\R2020b\extern\include"
--I"D:\Program Files\R2020b\simulink\include"
--I"D:\Program Files\R2020b\rtw\c\src"
--I"D:\Program Files\R2020b\rtw\c\src\ext_mode\common"
--I"D:\Program Files\R2020b\rtw\c\ert"

Simulink/PMSM_Controller_ert_rtw/PMSM_Controller_data.c

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'PMSM_Controller'.
  *
- * Model version                  : 1.1460
+ * Model version                  : 1.1529
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Sat May 28 14:25:47 2022
+ * C/C++ source code generated on : Tue Aug  2 19:43:20 2022
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: ARM Compatible->ARM Cortex-M
@@ -19,154 +19,133 @@
 
 /* Block parameters (default storage) */
 P rtP = {
-  /* Variable: n_hall_count_ps
-   * Referenced by:
-   *   '<S14>/z_maxCntRst'
-   *   '<S20>/z_counter'
-   *   '<S20>/UnitDelay2'
-   */
-  1000000U,
-
-  /* Variable: n_polePairs
-   * Referenced by: '<S20>/cf_speedCoef1'
-   */
-  4U,
-
   /* Variable: cf_Fw_Kb
-   * Referenced by: '<S74>/Constant5'
+   * Referenced by: '<S66>/Constant5'
    */
   102,
 
   /* Variable: cf_Fw_Ki
-   * Referenced by: '<S74>/Constant2'
+   * Referenced by: '<S66>/Constant2'
    */
   512,
 
-  /* Variable: cf_TrqLimKb
-   * Referenced by: '<S88>/Constant2'
-   */
-  1024,
-
-  /* Variable: cf_TrqLimKi
-   * Referenced by: '<S88>/Constant1'
-   */
-  9,
-
-  /* Variable: cf_TrqLimKp
-   * Referenced by: '<S88>/Constant4'
-   */
-  154,
-
   /* Variable: cf_idKp
-   * Referenced by: '<S95>/Constant3'
+   * Referenced by: '<S85>/Constant3'
    */
   17877,
 
   /* Variable: cf_iqKp
-   * Referenced by: '<S95>/Constant7'
+   * Referenced by: '<S85>/Constant7'
    */
   19765,
 
   /* Variable: cf_nKp
-   * Referenced by: '<S87>/Constant4'
+   * Referenced by: '<S79>/Constant4'
    */
   154,
 
   /* Variable: V_modulation
    * Referenced by:
-   *   '<S51>/Constant'
-   *   '<S95>/Constant2'
-   *   '<S74>/Constant3'
+   *   '<S42>/Constant'
+   *   '<S85>/Constant2'
+   *   '<S66>/Constant3'
    */
   15565,
 
   /* Variable: cf_idKb
-   * Referenced by: '<S95>/Constant6'
+   * Referenced by: '<S85>/Constant6'
    */
   81,
 
   /* Variable: cf_idKi
-   * Referenced by: '<S95>/Constant4'
+   * Referenced by: '<S85>/Constant4'
    */
   81,
 
   /* Variable: cf_iqKb
-   * Referenced by: '<S95>/Constant1'
+   * Referenced by: '<S85>/Constant1'
    */
   73,
 
   /* Variable: cf_iqKi
-   * Referenced by: '<S95>/Constant8'
+   * Referenced by: '<S85>/Constant8'
    */
   73,
 
   /* Variable: cf_nKb
-   * Referenced by: '<S87>/Constant11'
+   * Referenced by: '<S79>/Constant11'
    */
   147,
 
   /* Variable: cf_nKi
-   * Referenced by: '<S87>/Constant1'
+   * Referenced by: '<S79>/Constant1'
    */
   147,
 
   /* Variable: f_adc_curr_ceof
-   * Referenced by: '<S52>/Constant'
+   * Referenced by: '<S43>/Constant'
    */
   1543,
 
   /* Variable: cf_lastIqGain
-   * Referenced by: '<S70>/Gain'
+   * Referenced by: '<S62>/Gain'
    */
   16384,
 
   /* Variable: i_hall_offset
-   * Referenced by: '<S15>/Constant2'
+   * Referenced by: '<S22>/Constant2'
    */
   -480,
 
   /* Variable: i_dqMax
    * Referenced by:
-   *   '<S76>/Constant1'
-   *   '<S76>/Constant2'
-   *   '<S76>/Constant3'
-   *   '<S76>/Constant5'
-   *   '<S87>/Constant6'
+   *   '<S68>/Constant1'
+   *   '<S68>/Constant2'
+   *   '<S68>/Constant3'
+   *   '<S68>/Constant5'
+   *   '<S79>/Constant6'
    */
   4800,
 
   /* Variable: id_fieldWeakMax
-   * Referenced by: '<S74>/Constant6'
+   * Referenced by: '<S66>/Constant6'
    */
   -1600,
 
   /* Variable: dz_OpenStepVol
-   * Referenced by: '<S29>/Constant5'
+   * Referenced by:
+   *   '<S111>/Constant1'
+   *   '<S111>/Constant5'
    */
   1280,
 
   /* Variable: f_lpf_idq
-   * Referenced by: '<S48>/Constant'
+   * Referenced by: '<S39>/Constant'
    */
   26214U,
 
   /* Variable: f_lpf_vdq
-   * Referenced by: '<S76>/Constant'
+   * Referenced by: '<S68>/Constant'
    */
   655U,
 
   /* Variable: i_pwm_count
-   * Referenced by: '<S61>/Constant1'
+   * Referenced by: '<S53>/Constant1'
+   */
+  3000U,
+
+  /* Variable: n_polePairs
+   * Referenced by: '<S29>/polePairs'
    */
-  3000U
+  4U
 };
 
 /* Constant parameters (default storage) */
 const ConstP rtConstP = {
   /* Pooled Parameter (Expression: r_sin_M1)
    * Referenced by:
-   *   '<S58>/r_sin_M1'
-   *   '<S82>/r_sin_M1'
+   *   '<S49>/r_sin_M1'
+   *   '<S74>/r_sin_M1'
    */
   { 0, 286, 572, 857, 1143, 1428, 1713, 1997, 2280, 2563, 2845, 3126, 3406, 3686,
     3964, 4240, 4516, 4790, 5063, 5334, 5604, 5872, 6138, 6402, 6664, 6924, 7182,
@@ -205,8 +184,8 @@ const ConstP rtConstP = {
 
   /* Pooled Parameter (Expression: r_cos_M1)
    * Referenced by:
-   *   '<S58>/r_cos_M1'
-   *   '<S82>/r_cos_M1'
+   *   '<S49>/r_cos_M1'
+   *   '<S74>/r_cos_M1'
    */
   { 16384, 16382, 16374, 16362, 16344, 16322, 16294, 16262, 16225, 16182, 16135,
     16083, 16026, 15964, 15897, 15826, 15749, 15668, 15582, 15491, 15396, 15296,
@@ -244,7 +223,7 @@ const ConstP rtConstP = {
     16225, 16262, 16294, 16322, 16344, 16362, 16374, 16382, 16384 },
 
   /* Computed Parameter: vec_hallToPos_Value
-   * Referenced by: '<S11>/vec_hallToPos'
+   * Referenced by: '<S19>/vec_hallToPos'
    */
   { 7, 5, 1, 0, 3, 4, 2, 7 }
 };

Simulink/PMSM_Controller_ert_rtw/ert_main.c

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'PMSM_Controller'.
  *
- * Model version                  : 1.1460
+ * Model version                  : 1.1529
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Sat May 28 14:25:47 2022
+ * C/C++ source code generated on : Tue Aug  2 19:43:20 2022
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: ARM Compatible->ARM Cortex-M

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_c.html

@@ -21,11 +21,11 @@
 <tr name="5" id="5">
 <td><a id="l5" class='ln'>5</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="6" id="6">
-<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1460</span></td></tr>
+<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1529</span></td></tr>
 <tr name="7" id="7">
 <td><a id="l7" class='ln'>7</a></td><td><span class="ct"> * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020</span></td></tr>
 <tr name="8" id="8">
-<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Sat May 28 14:25:47 2022</span></td></tr>
+<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Tue Aug  2 19:43:20 2022</span></td></tr>
 <tr name="9" id="9">
 <td><a id="l9" class='ln'>9</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="10" id="10">
@@ -49,7 +49,7 @@
 <tr name="19" id="19">
 <td><a id="l19" class='ln'>19</a></td><td></td></tr>
 <tr name="20" id="20">
-<td><a id="l20" class='ln'>20</a></td><td><span class="ct">/* Named constants for Chart: '&lt;S4&gt;/Control_Mode_Manager' */</span></td></tr>
+<td><a id="l20" class='ln'>20</a></td><td><span class="ct">/* Named constants for Chart: '&lt;S36&gt;/Control_Mode_Manager' */</span></td></tr>
 <tr name="21" id="21">
 <td><a id="l21" class='ln'>21</a></td><td><span class="pp">#define</span> <a id="21c9" class="tk">IN_ACTIVE</a>                      ((<a id="21c42" class="tk">uint8_T</a>)1U)</td></tr>
 <tr name="22" id="22">
@@ -165,6467 +165,6425 @@
 <tr name="77" id="77">
 <td><a id="l77" class='ln'>77</a></td><td><span class="ct">/* Skipping ulong_long/long_long check: insufficient preprocessor integer range. */</span></td></tr>
 <tr name="78" id="78">
-<td><a id="l78" class='ln'>78</a></td><td><span class="kw">extern</span> <a id="78c8" class="tk">int16_T</a> <a id="78c16" class="tk">rt_sqrt_Us32En6_Ys16En_1bhh77n4</a>(<a id="78c48" class="tk">int32_T</a> <a id="78c56" class="tk">u</a>);</td></tr>
+<td><a id="l78" class='ln'>78</a></td><td><span class="kw">extern</span> <a id="78c8" class="tk">int16_T</a> <a id="78c16" class="tk">rt_sqrt_Us32En6_Ys16En5_Is64En10_f_s</a>(<a id="78c53" class="tk">int32_T</a> <a id="78c61" class="tk">u</a>);</td></tr>
 <tr name="79" id="79">
-<td><a id="l79" class='ln'>79</a></td><td><span class="kw">extern</span> <a id="79c8" class="tk">int16_T</a> <a id="79c16" class="tk">rt_sqrt_Us32En10_Ys16E_7VJYwqF9</a>(<a id="79c48" class="tk">int32_T</a> <a id="79c56" class="tk">u</a>);</td></tr>
+<td><a id="l79" class='ln'>79</a></td><td><span class="kw">extern</span> <a id="79c8" class="tk">int16_T</a> <a id="79c16" class="tk">rt_sqrt_Us32En10_Ys16En5_Is32En10_s_s</a>(<a id="79c54" class="tk">int32_T</a> <a id="79c62" class="tk">u</a>);</td></tr>
 <tr name="80" id="80">
-<td><a id="l80" class='ln'>80</a></td><td><span class="kw">extern</span> <a id="80c8" class="tk">uint16_T</a> <a id="80c17" class="tk">rt_sqrt_Uu16En14_Yu16E_WMwW1mku</a>(<a id="80c49" class="tk">uint16_T</a> <a id="80c58" class="tk">u</a>);</td></tr>
+<td><a id="l80" class='ln'>80</a></td><td><span class="kw">extern</span> <a id="80c8" class="tk">uint16_T</a> <a id="80c17" class="tk">rt_sqrt_Uu16En14_Yu16En14_Iu32En28_s_s</a>(<a id="80c56" class="tk">uint16_T</a> <a id="80c65" class="tk">u</a>);</td></tr>
 <tr name="81" id="81">
-<td><a id="l81" class='ln'>81</a></td><td><a id="81c1" class="tk">uint16_T</a> <a id="81c10" class="tk">plook_u16s16_evencka</a>(<a id="81c31" class="tk">int16_T</a> <a id="81c39" class="tk">u</a>, <a id="81c42" class="tk">int16_T</a> <a id="81c50" class="tk">bp0</a>, <a id="81c55" class="tk">uint16_T</a> <a id="81c64" class="tk">bpSpace</a>, <a id="81c73" class="tk">uint32_T</a></td></tr>
+<td><a id="l81" class='ln'>81</a></td><td><span class="kw">static</span> <a id="81c8" class="tk">uint16_T</a> <a id="81c17" class="tk">plook_u16s16_evencka</a>(<a id="81c38" class="tk">int16_T</a> <a id="81c46" class="tk">u</a>, <a id="81c49" class="tk">int16_T</a> <a id="81c57" class="tk">bp0</a>, <a id="81c62" class="tk">uint16_T</a> <a id="81c71" class="tk">bpSpace</a>,</td></tr>
 <tr name="82" id="82">
-<td><a id="l82" class='ln'>82</a></td><td>  <a id="82c3" class="tk">maxIndex</a>);</td></tr>
+<td><a id="l82" class='ln'>82</a></td><td>  <a id="82c3" class="tk">uint32_T</a> <a id="82c12" class="tk">maxIndex</a>);</td></tr>
 <tr name="83" id="83">
-<td><a id="l83" class='ln'>83</a></td><td><a id="83c1" class="tk">int32_T</a> <a id="83c9" class="tk">div_nde_s32_floor</a>(<a id="83c27" class="tk">int32_T</a> <a id="83c35" class="tk">numerator</a>, <a id="83c46" class="tk">int32_T</a> <a id="83c54" class="tk">denominator</a>);</td></tr>
+<td><a id="l83" class='ln'>83</a></td><td><span class="kw">static</span> <a id="83c8" class="tk">int32_T</a> <a id="83c16" class="tk">div_nde_s32_floor</a>(<a id="83c34" class="tk">int32_T</a> <a id="83c42" class="tk">numerator</a>, <a id="83c53" class="tk">int32_T</a> <a id="83c61" class="tk">denominator</a>);</td></tr>
 <tr name="84" id="84">
-<td><a id="l84" class='ln'>84</a></td><td><span class="kw">extern</span> <span class="kw">void</span> <a id="84c13" class="tk">Low_Pass_Filter</a>(<span class="kw">const</span> <a id="84c35" class="tk">int16_T</a> <a id="84c43" class="tk">rtu_u</a>[2], <a id="84c53" class="tk">uint16_T</a> <a id="84c62" class="tk">rtu_coef</a>, <a id="84c72" class="tk">int16_T</a></td></tr>
+<td><a id="l84" class='ln'>84</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="84c13" class="tk">wrapper</a>(<a id="84c21" class="tk">uint32_T</a> <a id="84c30" class="tk">rtu_In1</a>, <a id="84c39" class="tk">uint32_T</a> <a id="84c48" class="tk">rtu_In2</a>, <a id="84c57" class="tk">uint32_T</a> <a id="84c66" class="tk">*</a><a id="84c67" class="tk">rty_Out1</a>);</td></tr>
 <tr name="85" id="85">
-<td><a id="l85" class='ln'>85</a></td><td>  <a id="85c3" class="tk">rty_y</a>[2], <a id="85c13" class="tk">DW_Low_Pass_Filter</a> <a id="85c32" class="tk">*</a><a id="85c33" class="tk">localDW</a>);</td></tr>
+<td><a id="l85" class='ln'>85</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="85c13" class="tk">Low_Pass_Filter</a>(<span class="kw">const</span> <a id="85c35" class="tk">int16_T</a> <a id="85c43" class="tk">rtu_u</a>[2], <a id="85c53" class="tk">uint16_T</a> <a id="85c62" class="tk">rtu_coef</a>, <a id="85c72" class="tk">int16_T</a></td></tr>
 <tr name="86" id="86">
-<td><a id="l86" class='ln'>86</a></td><td><span class="kw">extern</span> <span class="kw">void</span> <a id="86c13" class="tk">PI_backCalc_fixdt_Init</a>(<a id="86c36" class="tk">DW_PI_backCalc_fixdt</a> <a id="86c57" class="tk">*</a><a id="86c58" class="tk">localDW</a>);</td></tr>
+<td><a id="l86" class='ln'>86</a></td><td>  <a id="86c3" class="tk">rty_y</a>[2], <a id="86c13" class="tk">DW_Low_Pass_Filter</a> <a id="86c32" class="tk">*</a><a id="86c33" class="tk">localDW</a>);</td></tr>
 <tr name="87" id="87">
-<td><a id="l87" class='ln'>87</a></td><td><span class="kw">extern</span> <a id="87c8" class="tk">int32_T</a> <a id="87c16" class="tk">PI_backCalc_fixdt</a>(<a id="87c34" class="tk">int32_T</a> <a id="87c42" class="tk">rtu_err</a>, <a id="87c51" class="tk">int16_T</a> <a id="87c59" class="tk">rtu_P</a>, <a id="87c66" class="tk">int16_T</a> <a id="87c74" class="tk">rtu_I</a>,</td></tr>
+<td><a id="l87" class='ln'>87</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="87c13" class="tk">PI_backCalc_fixdt_Init</a>(<a id="87c36" class="tk">DW_PI_backCalc_fixdt</a> <a id="87c57" class="tk">*</a><a id="87c58" class="tk">localDW</a>);</td></tr>
 <tr name="88" id="88">
-<td><a id="l88" class='ln'>88</a></td><td>  <a id="88c3" class="tk">int16_T</a> <a id="88c11" class="tk">rtu_Kb</a>, <a id="88c19" class="tk">int16_T</a> <a id="88c27" class="tk">rtu_satMax</a>, <a id="88c39" class="tk">int16_T</a> <a id="88c47" class="tk">rtu_satMin</a>, <a id="88c59" class="tk">int16_T</a> <a id="88c67" class="tk">rtu_init</a>,</td></tr>
+<td><a id="l88" class='ln'>88</a></td><td><span class="kw">static</span> <a id="88c8" class="tk">int32_T</a> <a id="88c16" class="tk">PI_backCalc_fixdt</a>(<a id="88c34" class="tk">int32_T</a> <a id="88c42" class="tk">rtu_err</a>, <a id="88c51" class="tk">int16_T</a> <a id="88c59" class="tk">rtu_P</a>, <a id="88c66" class="tk">int16_T</a> <a id="88c74" class="tk">rtu_I</a>,</td></tr>
 <tr name="89" id="89">
-<td><a id="l89" class='ln'>89</a></td><td>  <a id="89c3" class="tk">uint8_T</a> <a id="89c11" class="tk">rtu_reset</a>, <a id="89c22" class="tk">DW_PI_backCalc_fixdt</a> <a id="89c43" class="tk">*</a><a id="89c44" class="tk">localDW</a>, <a id="89c53" class="tk">ZCE_PI_backCalc_fixdt</a></td></tr>
+<td><a id="l89" class='ln'>89</a></td><td>  <a id="89c3" class="tk">int16_T</a> <a id="89c11" class="tk">rtu_Kb</a>, <a id="89c19" class="tk">int16_T</a> <a id="89c27" class="tk">rtu_satMax</a>, <a id="89c39" class="tk">int16_T</a> <a id="89c47" class="tk">rtu_satMin</a>, <a id="89c59" class="tk">int16_T</a> <a id="89c67" class="tk">rtu_init</a>,</td></tr>
 <tr name="90" id="90">
-<td><a id="l90" class='ln'>90</a></td><td>  <a id="90c3" class="tk">*</a><a id="90c4" class="tk">localZCE</a>);</td></tr>
+<td><a id="l90" class='ln'>90</a></td><td>  <a id="90c3" class="tk">uint8_T</a> <a id="90c11" class="tk">rtu_reset</a>, <a id="90c22" class="tk">DW_PI_backCalc_fixdt</a> <a id="90c43" class="tk">*</a><a id="90c44" class="tk">localDW</a>, <a id="90c53" class="tk">ZCE_PI_backCalc_fixdt</a></td></tr>
 <tr name="91" id="91">
-<td><a id="l91" class='ln'>91</a></td><td><span class="kw">extern</span> <span class="kw">void</span> <a id="91c13" class="tk">PI_backCalc_fixdt_p_Init</a>(<a id="91c38" class="tk">DW_PI_backCalc_fixdt_i</a> <a id="91c61" class="tk">*</a><a id="91c62" class="tk">localDW</a>);</td></tr>
+<td><a id="l91" class='ln'>91</a></td><td>  <a id="91c3" class="tk">*</a><a id="91c4" class="tk">localZCE</a>);</td></tr>
 <tr name="92" id="92">
-<td><a id="l92" class='ln'>92</a></td><td><span class="kw">extern</span> <a id="92c8" class="tk">int32_T</a> <a id="92c16" class="tk">PI_backCalc_fixdt_o</a>(<a id="92c36" class="tk">int16_T</a> <a id="92c44" class="tk">rtu_err</a>, <a id="92c53" class="tk">int16_T</a> <a id="92c61" class="tk">rtu_P</a>, <a id="92c68" class="tk">int16_T</a> <a id="92c76" class="tk">rtu_I</a>,</td></tr>
+<td><a id="l92" class='ln'>92</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="92c13" class="tk">PI_backCalc_fixdt_g_Init</a>(<a id="92c38" class="tk">DW_PI_backCalc_fixdt_j</a> <a id="92c61" class="tk">*</a><a id="92c62" class="tk">localDW</a>);</td></tr>
 <tr name="93" id="93">
-<td><a id="l93" class='ln'>93</a></td><td>  <a id="93c3" class="tk">int16_T</a> <a id="93c11" class="tk">rtu_Kb</a>, <a id="93c19" class="tk">int16_T</a> <a id="93c27" class="tk">rtu_satMax</a>, <a id="93c39" class="tk">int16_T</a> <a id="93c47" class="tk">rtu_satMin</a>, <a id="93c59" class="tk">int16_T</a> <a id="93c67" class="tk">rtu_init</a>,</td></tr>
+<td><a id="l93" class='ln'>93</a></td><td><span class="kw">static</span> <a id="93c8" class="tk">int32_T</a> <a id="93c16" class="tk">PI_backCalc_fixdt_i</a>(<a id="93c36" class="tk">int16_T</a> <a id="93c44" class="tk">rtu_err</a>, <a id="93c53" class="tk">int16_T</a> <a id="93c61" class="tk">rtu_P</a>, <a id="93c68" class="tk">int16_T</a> <a id="93c76" class="tk">rtu_I</a>,</td></tr>
 <tr name="94" id="94">
-<td><a id="l94" class='ln'>94</a></td><td>  <a id="94c3" class="tk">uint8_T</a> <a id="94c11" class="tk">rtu_reset</a>, <a id="94c22" class="tk">DW_PI_backCalc_fixdt_i</a> <a id="94c45" class="tk">*</a><a id="94c46" class="tk">localDW</a>, <a id="94c55" class="tk">ZCE_PI_backCalc_fixdt_e</a></td></tr>
+<td><a id="l94" class='ln'>94</a></td><td>  <a id="94c3" class="tk">int16_T</a> <a id="94c11" class="tk">rtu_Kb</a>, <a id="94c19" class="tk">int16_T</a> <a id="94c27" class="tk">rtu_satMax</a>, <a id="94c39" class="tk">int16_T</a> <a id="94c47" class="tk">rtu_satMin</a>, <a id="94c59" class="tk">int16_T</a> <a id="94c67" class="tk">rtu_init</a>,</td></tr>
 <tr name="95" id="95">
-<td><a id="l95" class='ln'>95</a></td><td>  <a id="95c3" class="tk">*</a><a id="95c4" class="tk">localZCE</a>);</td></tr>
+<td><a id="l95" class='ln'>95</a></td><td>  <a id="95c3" class="tk">uint8_T</a> <a id="95c11" class="tk">rtu_reset</a>, <a id="95c22" class="tk">DW_PI_backCalc_fixdt_j</a> <a id="95c45" class="tk">*</a><a id="95c46" class="tk">localDW</a>, <a id="95c55" class="tk">ZCE_PI_backCalc_fixdt_n</a></td></tr>
 <tr name="96" id="96">
-<td><a id="l96" class='ln'>96</a></td><td><span class="kw">extern</span> <span class="kw">void</span> <a id="96c13" class="tk">RateInit</a>(<a id="96c22" class="tk">int16_T</a> <a id="96c30" class="tk">rtu_initVal</a>, <a id="96c43" class="tk">int16_T</a> <a id="96c51" class="tk">rtu_target</a>, <a id="96c63" class="tk">int16_T</a> <a id="96c71" class="tk">rtu_step</a>,</td></tr>
+<td><a id="l96" class='ln'>96</a></td><td>  <a id="96c3" class="tk">*</a><a id="96c4" class="tk">localZCE</a>);</td></tr>
 <tr name="97" id="97">
-<td><a id="l97" class='ln'>97</a></td><td>                     <a id="97c22" class="tk">int16_T</a> <a id="97c30" class="tk">*</a><a id="97c31" class="tk">rty_s_step</a>, <a id="97c43" class="tk">int16_T</a> <a id="97c51" class="tk">*</a><a id="97c52" class="tk">rty_High</a>, <a id="97c62" class="tk">int16_T</a> <a id="97c70" class="tk">*</a><a id="97c71" class="tk">rty_Low</a>);</td></tr>
+<td><a id="l97" class='ln'>97</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="97c13" class="tk">RateInit</a>(<a id="97c22" class="tk">int16_T</a> <a id="97c30" class="tk">rtu_initVal</a>, <a id="97c43" class="tk">int16_T</a> <a id="97c51" class="tk">rtu_target</a>, <a id="97c63" class="tk">int16_T</a> <a id="97c71" class="tk">rtu_step</a>,</td></tr>
 <tr name="98" id="98">
-<td><a id="l98" class='ln'>98</a></td><td><a id="98c1" class="tk">uint16_T</a> <a id="98c10" class="tk">plook_u16s16_evencka</a>(<a id="98c31" class="tk">int16_T</a> <a id="98c39" class="tk">u</a>, <a id="98c42" class="tk">int16_T</a> <a id="98c50" class="tk">bp0</a>, <a id="98c55" class="tk">uint16_T</a> <a id="98c64" class="tk">bpSpace</a>, <a id="98c73" class="tk">uint32_T</a></td></tr>
+<td><a id="l98" class='ln'>98</a></td><td>                     <a id="98c22" class="tk">int16_T</a> <a id="98c30" class="tk">*</a><a id="98c31" class="tk">rty_s_step</a>, <a id="98c43" class="tk">int16_T</a> <a id="98c51" class="tk">*</a><a id="98c52" class="tk">rty_High</a>, <a id="98c62" class="tk">int16_T</a> <a id="98c70" class="tk">*</a><a id="98c71" class="tk">rty_Low</a>);</td></tr>
 <tr name="99" id="99">
-<td><a id="l99" class='ln'>99</a></td><td>  <a id="99c3" class="tk">maxIndex</a>)</td></tr>
+<td><a id="l99" class='ln'>99</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="99c13" class="tk">RateInit_a</a>(<a id="99c24" class="tk">int16_T</a> <a id="99c32" class="tk">rtu_initVal</a>, <a id="99c45" class="tk">int16_T</a> <a id="99c53" class="tk">rtu_target</a>, <a id="99c65" class="tk">int16_T</a> <a id="99c73" class="tk">rtu_step</a>,</td></tr>
 <tr name="100" id="100">
-<td><a id="l100" class='ln'>100</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l100" class='ln'>100</a></td><td>  <a id="100c3" class="tk">int16_T</a> <a id="100c11" class="tk">*</a><a id="100c12" class="tk">rty_s_step</a>, <a id="100c24" class="tk">int16_T</a> <a id="100c32" class="tk">*</a><a id="100c33" class="tk">rty_High</a>, <a id="100c43" class="tk">int16_T</a> <a id="100c51" class="tk">*</a><a id="100c52" class="tk">rty_Low</a>);</td></tr>
 <tr name="101" id="101">
-<td><a id="l101" class='ln'>101</a></td><td>  <a id="101c3" class="tk">uint16_T</a> <a id="101c12" class="tk">bpIndex</a>;</td></tr>
+<td><a id="l101" class='ln'>101</a></td><td><span class="kw">static</span> <a id="101c8" class="tk">uint16_T</a> <a id="101c17" class="tk">plook_u16s16_evencka</a>(<a id="101c38" class="tk">int16_T</a> <a id="101c46" class="tk">u</a>, <a id="101c49" class="tk">int16_T</a> <a id="101c57" class="tk">bp0</a>, <a id="101c62" class="tk">uint16_T</a> <a id="101c71" class="tk">bpSpace</a>,</td></tr>
 <tr name="102" id="102">
-<td><a id="l102" class='ln'>102</a></td><td></td></tr>
+<td><a id="l102" class='ln'>102</a></td><td>  <a id="102c3" class="tk">uint32_T</a> <a id="102c12" class="tk">maxIndex</a>)</td></tr>
 <tr name="103" id="103">
-<td><a id="l103" class='ln'>103</a></td><td>  <span class="ct">/* Prelookup - Index only</span></td></tr>
+<td><a id="l103" class='ln'>103</a></td><td><span class="br">{</span></td></tr>
 <tr name="104" id="104">
-<td><a id="l104" class='ln'>104</a></td><td><span class="ct">     Index Search method: 'even'</span></td></tr>
+<td><a id="l104" class='ln'>104</a></td><td>  <a id="104c3" class="tk">uint16_T</a> <a id="104c12" class="tk">bpIndex</a>;</td></tr>
 <tr name="105" id="105">
-<td><a id="l105" class='ln'>105</a></td><td><span class="ct">     Extrapolation method: 'Clip'</span></td></tr>
+<td><a id="l105" class='ln'>105</a></td><td></td></tr>
 <tr name="106" id="106">
-<td><a id="l106" class='ln'>106</a></td><td><span class="ct">     Use previous index: 'off'</span></td></tr>
+<td><a id="l106" class='ln'>106</a></td><td>  <span class="ct">/* Prelookup - Index only</span></td></tr>
 <tr name="107" id="107">
-<td><a id="l107" class='ln'>107</a></td><td><span class="ct">     Use last breakpoint for index at or above upper limit: 'on'</span></td></tr>
+<td><a id="l107" class='ln'>107</a></td><td><span class="ct">     Index Search method: 'even'</span></td></tr>
 <tr name="108" id="108">
-<td><a id="l108" class='ln'>108</a></td><td><span class="ct">     Remove protection against out-of-range input in generated code: 'off'</span></td></tr>
+<td><a id="l108" class='ln'>108</a></td><td><span class="ct">     Extrapolation method: 'Clip'</span></td></tr>
 <tr name="109" id="109">
-<td><a id="l109" class='ln'>109</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l109" class='ln'>109</a></td><td><span class="ct">     Use previous index: 'off'</span></td></tr>
 <tr name="110" id="110">
-<td><a id="l110" class='ln'>110</a></td><td>  <span class="kw">if</span> (<a id="110c7" class="tk">u</a> <a id="110c9" class="tk">&lt;=</a> <a id="110c12" class="tk">bp0</a>) <span class="br">{</span></td></tr>
+<td><a id="l110" class='ln'>110</a></td><td><span class="ct">     Use last breakpoint for index at or above upper limit: 'on'</span></td></tr>
 <tr name="111" id="111">
-<td><a id="l111" class='ln'>111</a></td><td>    <a id="111c5" class="tk">bpIndex</a> = 0U;</td></tr>
+<td><a id="l111" class='ln'>111</a></td><td><span class="ct">     Remove protection against out-of-range input in generated code: 'off'</span></td></tr>
 <tr name="112" id="112">
-<td><a id="l112" class='ln'>112</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l112" class='ln'>112</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="113" id="113">
-<td><a id="l113" class='ln'>113</a></td><td>    <a id="113c5" class="tk">bpIndex</a> = (<a id="113c16" class="tk">uint16_T</a>)((<a id="113c27" class="tk">uint32_T</a>)(<a id="113c37" class="tk">uint16_T</a>)(<a id="113c47" class="tk">u</a> <a id="113c49" class="tk">-</a> <a id="113c51" class="tk">bp0</a>) <a id="113c56" class="tk">/</a> <a id="113c58" class="tk">bpSpace</a>);</td></tr>
+<td><a id="l113" class='ln'>113</a></td><td>  <span class="kw">if</span> (<a id="113c7" class="tk">u</a> <a id="113c9" class="tk">&lt;=</a> <a id="113c12" class="tk">bp0</a>) <span class="br">{</span></td></tr>
 <tr name="114" id="114">
-<td><a id="l114" class='ln'>114</a></td><td>    <span class="kw">if</span> (<a id="114c9" class="tk">bpIndex</a> <a id="114c17" class="tk">&lt;</a> <a id="114c19" class="tk">maxIndex</a>) <span class="br">{</span></td></tr>
+<td><a id="l114" class='ln'>114</a></td><td>    <a id="114c5" class="tk">bpIndex</a> = 0U;</td></tr>
 <tr name="115" id="115">
-<td><a id="l115" class='ln'>115</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l115" class='ln'>115</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="116" id="116">
-<td><a id="l116" class='ln'>116</a></td><td>      <a id="116c7" class="tk">bpIndex</a> = (<a id="116c18" class="tk">uint16_T</a>)<a id="116c27" class="tk">maxIndex</a>;</td></tr>
+<td><a id="l116" class='ln'>116</a></td><td>    <a id="116c5" class="tk">bpIndex</a> = (<a id="116c16" class="tk">uint16_T</a>)((<a id="116c27" class="tk">uint32_T</a>)(<a id="116c37" class="tk">uint16_T</a>)(<a id="116c47" class="tk">u</a> <a id="116c49" class="tk">-</a> <a id="116c51" class="tk">bp0</a>) <a id="116c56" class="tk">/</a> <a id="116c58" class="tk">bpSpace</a>);</td></tr>
 <tr name="117" id="117">
-<td><a id="l117" class='ln'>117</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l117" class='ln'>117</a></td><td>    <span class="kw">if</span> (<a id="117c9" class="tk">bpIndex</a> <a id="117c17" class="tk">&lt;</a> <a id="117c19" class="tk">maxIndex</a>) <span class="br">{</span></td></tr>
 <tr name="118" id="118">
-<td><a id="l118" class='ln'>118</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l118" class='ln'>118</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="119" id="119">
-<td><a id="l119" class='ln'>119</a></td><td></td></tr>
+<td><a id="l119" class='ln'>119</a></td><td>      <a id="119c7" class="tk">bpIndex</a> = (<a id="119c18" class="tk">uint16_T</a>)<a id="119c27" class="tk">maxIndex</a>;</td></tr>
 <tr name="120" id="120">
-<td><a id="l120" class='ln'>120</a></td><td>  <span class="kw">return</span> <a id="120c10" class="tk">bpIndex</a>;</td></tr>
+<td><a id="l120" class='ln'>120</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="121" id="121">
-<td><a id="l121" class='ln'>121</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l121" class='ln'>121</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="122" id="122">
 <td><a id="l122" class='ln'>122</a></td><td></td></tr>
 <tr name="123" id="123">
-<td><a id="l123" class='ln'>123</a></td><td><a id="123c1" class="tk">int32_T</a> <a id="123c9" class="tk">div_nde_s32_floor</a>(<a id="123c27" class="tk">int32_T</a> <a id="123c35" class="tk">numerator</a>, <a id="123c46" class="tk">int32_T</a> <a id="123c54" class="tk">denominator</a>)</td></tr>
+<td><a id="l123" class='ln'>123</a></td><td>  <span class="kw">return</span> <a id="123c10" class="tk">bpIndex</a>;</td></tr>
 <tr name="124" id="124">
-<td><a id="l124" class='ln'>124</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l124" class='ln'>124</a></td><td><span class="br">}</span></td></tr>
 <tr name="125" id="125">
-<td><a id="l125" class='ln'>125</a></td><td>  <span class="kw">return</span> (((<a id="125c13" class="tk">numerator</a> <a id="125c23" class="tk">&lt;</a> 0) <a id="125c28" class="tk">!=</a> (<a id="125c32" class="tk">denominator</a> <a id="125c44" class="tk">&lt;</a> 0)) <a id="125c50" class="tk">&amp;&amp;</a> (<a id="125c54" class="tk">numerator</a> <a id="125c64" class="tk">%</a> <a id="125c66" class="tk">denominator</a> <a id="125c78" class="tk">!=</a></td></tr>
+<td><a id="l125" class='ln'>125</a></td><td></td></tr>
 <tr name="126" id="126">
-<td><a id="l126" class='ln'>126</a></td><td>           0) <a id="126c15" class="tk">?</a> <a id="126c17" class="tk">-</a>1 <a id="126c20" class="tk">:</a> 0) <a id="126c25" class="tk">+</a> <a id="126c27" class="tk">numerator</a> <a id="126c37" class="tk">/</a> <a id="126c39" class="tk">denominator</a>;</td></tr>
+<td><a id="l126" class='ln'>126</a></td><td><span class="kw">static</span> <a id="126c8" class="tk">int32_T</a> <a id="126c16" class="tk">div_nde_s32_floor</a>(<a id="126c34" class="tk">int32_T</a> <a id="126c42" class="tk">numerator</a>, <a id="126c53" class="tk">int32_T</a> <a id="126c61" class="tk">denominator</a>)</td></tr>
 <tr name="127" id="127">
-<td><a id="l127" class='ln'>127</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l127" class='ln'>127</a></td><td><span class="br">{</span></td></tr>
 <tr name="128" id="128">
-<td><a id="l128" class='ln'>128</a></td><td></td></tr>
+<td><a id="l128" class='ln'>128</a></td><td>  <span class="kw">return</span> (((<a id="128c13" class="tk">numerator</a> <a id="128c23" class="tk">&lt;</a> 0) <a id="128c28" class="tk">!=</a> (<a id="128c32" class="tk">denominator</a> <a id="128c44" class="tk">&lt;</a> 0)) <a id="128c50" class="tk">&amp;&amp;</a> (<a id="128c54" class="tk">numerator</a> <a id="128c64" class="tk">%</a> <a id="128c66" class="tk">denominator</a> <a id="128c78" class="tk">!=</a></td></tr>
 <tr name="129" id="129">
-<td><a id="l129" class='ln'>129</a></td><td><span class="ct">/*</span></td></tr>
+<td><a id="l129" class='ln'>129</a></td><td>           0) <a id="129c15" class="tk">?</a> <a id="129c17" class="tk">-</a>1 <a id="129c20" class="tk">:</a> 0) <a id="129c25" class="tk">+</a> <a id="129c27" class="tk">numerator</a> <a id="129c37" class="tk">/</a> <a id="129c39" class="tk">denominator</a>;</td></tr>
 <tr name="130" id="130">
-<td><a id="l130" class='ln'>130</a></td><td><span class="ct"> * Output and update for atomic system:</span></td></tr>
+<td><a id="l130" class='ln'>130</a></td><td><span class="br">}</span></td></tr>
 <tr name="131" id="131">
-<td><a id="l131" class='ln'>131</a></td><td><span class="ct"> *    '&lt;S48&gt;/Low_Pass_Filter'</span></td></tr>
+<td><a id="l131" class='ln'>131</a></td><td></td></tr>
 <tr name="132" id="132">
-<td><a id="l132" class='ln'>132</a></td><td><span class="ct"> *    '&lt;S76&gt;/Low_Pass_Filter'</span></td></tr>
+<td><a id="l132" class='ln'>132</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="133" id="133">
-<td><a id="l133" class='ln'>133</a></td><td><span class="ct"> */</span></td></tr>
+<td><a id="l133" class='ln'>133</a></td><td><span class="ct"> * Output and update for action system:</span></td></tr>
 <tr name="134" id="134">
-<td><a id="l134" class='ln'>134</a></td><td><span class="kw">void</span> <a id="134c6" class="tk">Low_Pass_Filter</a>(<span class="kw">const</span> <a id="134c28" class="tk">int16_T</a> <a id="134c36" class="tk">rtu_u</a>[2], <a id="134c46" class="tk">uint16_T</a> <a id="134c55" class="tk">rtu_coef</a>, <a id="134c65" class="tk">int16_T</a> <a id="134c73" class="tk">rty_y</a>[2],</td></tr>
+<td><a id="l134" class='ln'>134</a></td><td><span class="ct"> *    '&lt;S21&gt;/wrapper'</span></td></tr>
 <tr name="135" id="135">
-<td><a id="l135" class='ln'>135</a></td><td>                     <a id="135c22" class="tk">DW_Low_Pass_Filter</a> <a id="135c41" class="tk">*</a><a id="135c42" class="tk">localDW</a>)</td></tr>
+<td><a id="l135" class='ln'>135</a></td><td><span class="ct"> *    '&lt;S31&gt;/wrapper'</span></td></tr>
 <tr name="136" id="136">
-<td><a id="l136" class='ln'>136</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l136" class='ln'>136</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="137" id="137">
-<td><a id="l137" class='ln'>137</a></td><td>  <a id="137c3" class="tk">int32_T</a> <a id="137c11" class="tk">rtb_Sum3_m</a>;</td></tr>
+<td><a id="l137" class='ln'>137</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="137c13" class="tk">wrapper</a>(<a id="137c21" class="tk">uint32_T</a> <a id="137c30" class="tk">rtu_In1</a>, <a id="137c39" class="tk">uint32_T</a> <a id="137c48" class="tk">rtu_In2</a>, <a id="137c57" class="tk">uint32_T</a> <a id="137c66" class="tk">*</a><a id="137c67" class="tk">rty_Out1</a>)</td></tr>
 <tr name="138" id="138">
-<td><a id="l138" class='ln'>138</a></td><td></td></tr>
+<td><a id="l138" class='ln'>138</a></td><td><span class="br">{</span></td></tr>
 <tr name="139" id="139">
-<td><a id="l139" class='ln'>139</a></td><td>  <span class="ct">/* Sum: '&lt;S56&gt;/Sum2' incorporates:</span></td></tr>
+<td><a id="l139" class='ln'>139</a></td><td>  <span class="ct">/* Sum: '&lt;S24&gt;/Add1' incorporates:</span></td></tr>
 <tr name="140" id="140">
-<td><a id="l140" class='ln'>140</a></td><td><span class="ct">   *  UnitDelay: '&lt;S56&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l140" class='ln'>140</a></td><td><span class="ct">   *  Sum: '&lt;S24&gt;/Add'</span></td></tr>
 <tr name="141" id="141">
-<td><a id="l141" class='ln'>141</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l141" class='ln'>141</a></td><td><span class="ct">   *  Sum: '&lt;S24&gt;/Subtract'</span></td></tr>
 <tr name="142" id="142">
-<td><a id="l142" class='ln'>142</a></td><td>  <a id="142c3" class="tk">rtb_Sum3_m</a> = <a id="142c16" class="tk">rtu_u</a>[0] <a id="142c25" class="tk">-</a> (<a id="142c28" class="tk">localDW</a>-&gt;<a id="142c37" class="tk">UnitDelay1_DSTATE</a>[0] <a id="142c58" class="tk">&gt;&gt;</a> 16);</td></tr>
+<td><a id="l142" class='ln'>142</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="143" id="143">
-<td><a id="l143" class='ln'>143</a></td><td>  <span class="kw">if</span> (<a id="143c7" class="tk">rtb_Sum3_m</a> <a id="143c18" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l143" class='ln'>143</a></td><td>  <a id="143c3" class="tk">*</a><a id="143c4" class="tk">rty_Out1</a> = <a id="143c15" class="tk">rtu_In1</a> <a id="143c23" class="tk">-</a> <a id="143c25" class="tk">rtu_In2</a>;</td></tr>
 <tr name="144" id="144">
-<td><a id="l144" class='ln'>144</a></td><td>    <a id="144c5" class="tk">rtb_Sum3_m</a> = 32767;</td></tr>
+<td><a id="l144" class='ln'>144</a></td><td><span class="br">}</span></td></tr>
 <tr name="145" id="145">
-<td><a id="l145" class='ln'>145</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l145" class='ln'>145</a></td><td></td></tr>
 <tr name="146" id="146">
-<td><a id="l146" class='ln'>146</a></td><td>    <span class="kw">if</span> (<a id="146c9" class="tk">rtb_Sum3_m</a> <a id="146c20" class="tk">&lt;</a> <a id="146c22" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l146" class='ln'>146</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="147" id="147">
-<td><a id="l147" class='ln'>147</a></td><td>      <a id="147c7" class="tk">rtb_Sum3_m</a> = <a id="147c20" class="tk">-</a>32768;</td></tr>
+<td><a id="l147" class='ln'>147</a></td><td><span class="ct"> * Output and update for atomic system:</span></td></tr>
 <tr name="148" id="148">
-<td><a id="l148" class='ln'>148</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l148" class='ln'>148</a></td><td><span class="ct"> *    '&lt;S39&gt;/Low_Pass_Filter'</span></td></tr>
 <tr name="149" id="149">
-<td><a id="l149" class='ln'>149</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l149" class='ln'>149</a></td><td><span class="ct"> *    '&lt;S68&gt;/Low_Pass_Filter'</span></td></tr>
 <tr name="150" id="150">
-<td><a id="l150" class='ln'>150</a></td><td></td></tr>
+<td><a id="l150" class='ln'>150</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="151" id="151">
-<td><a id="l151" class='ln'>151</a></td><td>  <span class="ct">/* Sum: '&lt;S56&gt;/Sum3' incorporates:</span></td></tr>
+<td><a id="l151" class='ln'>151</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="151c13" class="tk">Low_Pass_Filter</a>(<span class="kw">const</span> <a id="151c35" class="tk">int16_T</a> <a id="151c43" class="tk">rtu_u</a>[2], <a id="151c53" class="tk">uint16_T</a> <a id="151c62" class="tk">rtu_coef</a>, <a id="151c72" class="tk">int16_T</a></td></tr>
 <tr name="152" id="152">
-<td><a id="l152" class='ln'>152</a></td><td><span class="ct">   *  Product: '&lt;S56&gt;/Divide3'</span></td></tr>
+<td><a id="l152" class='ln'>152</a></td><td>  <a id="152c3" class="tk">rty_y</a>[2], <a id="152c13" class="tk">DW_Low_Pass_Filter</a> <a id="152c32" class="tk">*</a><a id="152c33" class="tk">localDW</a>)</td></tr>
 <tr name="153" id="153">
-<td><a id="l153" class='ln'>153</a></td><td><span class="ct">   *  Sum: '&lt;S56&gt;/Sum2'</span></td></tr>
+<td><a id="l153" class='ln'>153</a></td><td><span class="br">{</span></td></tr>
 <tr name="154" id="154">
-<td><a id="l154" class='ln'>154</a></td><td><span class="ct">   *  UnitDelay: '&lt;S56&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l154" class='ln'>154</a></td><td>  <a id="154c3" class="tk">int32_T</a> <a id="154c11" class="tk">rtb_Sum3_i</a>;</td></tr>
 <tr name="155" id="155">
-<td><a id="l155" class='ln'>155</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l155" class='ln'>155</a></td><td></td></tr>
 <tr name="156" id="156">
-<td><a id="l156" class='ln'>156</a></td><td>  <a id="156c3" class="tk">rtb_Sum3_m</a> = <a id="156c16" class="tk">rtu_coef</a> <a id="156c25" class="tk">*</a> <a id="156c27" class="tk">rtb_Sum3_m</a> <a id="156c38" class="tk">+</a> <a id="156c40" class="tk">localDW</a>-&gt;<a id="156c49" class="tk">UnitDelay1_DSTATE</a>[0];</td></tr>
+<td><a id="l156" class='ln'>156</a></td><td>  <span class="ct">/* Sum: '&lt;S47&gt;/Sum2' incorporates:</span></td></tr>
 <tr name="157" id="157">
-<td><a id="l157" class='ln'>157</a></td><td></td></tr>
+<td><a id="l157" class='ln'>157</a></td><td><span class="ct">   *  UnitDelay: '&lt;S47&gt;/UnitDelay1'</span></td></tr>
 <tr name="158" id="158">
-<td><a id="l158" class='ln'>158</a></td><td>  <span class="ct">/* DataTypeConversion: '&lt;S56&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l158" class='ln'>158</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="159" id="159">
-<td><a id="l159" class='ln'>159</a></td><td>  <a id="159c3" class="tk">rty_y</a>[0] = (<a id="159c15" class="tk">int16_T</a>)(<a id="159c24" class="tk">rtb_Sum3_m</a> <a id="159c35" class="tk">&gt;&gt;</a> 16);</td></tr>
+<td><a id="l159" class='ln'>159</a></td><td>  <a id="159c3" class="tk">rtb_Sum3_i</a> = <a id="159c16" class="tk">rtu_u</a>[0] <a id="159c25" class="tk">-</a> (<a id="159c28" class="tk">localDW</a>-&gt;<a id="159c37" class="tk">UnitDelay1_DSTATE</a>[0] <a id="159c58" class="tk">&gt;&gt;</a> 16);</td></tr>
 <tr name="160" id="160">
-<td><a id="l160" class='ln'>160</a></td><td></td></tr>
+<td><a id="l160" class='ln'>160</a></td><td>  <span class="kw">if</span> (<a id="160c7" class="tk">rtb_Sum3_i</a> <a id="160c18" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="161" id="161">
-<td><a id="l161" class='ln'>161</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S56&gt;/UnitDelay1' */</span></td></tr>
+<td><a id="l161" class='ln'>161</a></td><td>    <a id="161c5" class="tk">rtb_Sum3_i</a> = 32767;</td></tr>
 <tr name="162" id="162">
-<td><a id="l162" class='ln'>162</a></td><td>  <a id="162c3" class="tk">localDW</a>-&gt;<a id="162c12" class="tk">UnitDelay1_DSTATE</a>[0] = <a id="162c35" class="tk">rtb_Sum3_m</a>;</td></tr>
+<td><a id="l162" class='ln'>162</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="163" id="163">
-<td><a id="l163" class='ln'>163</a></td><td></td></tr>
+<td><a id="l163" class='ln'>163</a></td><td>    <span class="kw">if</span> (<a id="163c9" class="tk">rtb_Sum3_i</a> <a id="163c20" class="tk">&lt;</a> <a id="163c22" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="164" id="164">
-<td><a id="l164" class='ln'>164</a></td><td>  <span class="ct">/* Sum: '&lt;S56&gt;/Sum2' incorporates:</span></td></tr>
+<td><a id="l164" class='ln'>164</a></td><td>      <a id="164c7" class="tk">rtb_Sum3_i</a> = <a id="164c20" class="tk">-</a>32768;</td></tr>
 <tr name="165" id="165">
-<td><a id="l165" class='ln'>165</a></td><td><span class="ct">   *  UnitDelay: '&lt;S56&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l165" class='ln'>165</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="166" id="166">
-<td><a id="l166" class='ln'>166</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l166" class='ln'>166</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="167" id="167">
-<td><a id="l167" class='ln'>167</a></td><td>  <a id="167c3" class="tk">rtb_Sum3_m</a> = <a id="167c16" class="tk">rtu_u</a>[1] <a id="167c25" class="tk">-</a> (<a id="167c28" class="tk">localDW</a>-&gt;<a id="167c37" class="tk">UnitDelay1_DSTATE</a>[1] <a id="167c58" class="tk">&gt;&gt;</a> 16);</td></tr>
+<td><a id="l167" class='ln'>167</a></td><td></td></tr>
 <tr name="168" id="168">
-<td><a id="l168" class='ln'>168</a></td><td>  <span class="kw">if</span> (<a id="168c7" class="tk">rtb_Sum3_m</a> <a id="168c18" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l168" class='ln'>168</a></td><td>  <span class="ct">/* Sum: '&lt;S47&gt;/Sum3' incorporates:</span></td></tr>
 <tr name="169" id="169">
-<td><a id="l169" class='ln'>169</a></td><td>    <a id="169c5" class="tk">rtb_Sum3_m</a> = 32767;</td></tr>
+<td><a id="l169" class='ln'>169</a></td><td><span class="ct">   *  Product: '&lt;S47&gt;/Divide3'</span></td></tr>
 <tr name="170" id="170">
-<td><a id="l170" class='ln'>170</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l170" class='ln'>170</a></td><td><span class="ct">   *  Sum: '&lt;S47&gt;/Sum2'</span></td></tr>
 <tr name="171" id="171">
-<td><a id="l171" class='ln'>171</a></td><td>    <span class="kw">if</span> (<a id="171c9" class="tk">rtb_Sum3_m</a> <a id="171c20" class="tk">&lt;</a> <a id="171c22" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l171" class='ln'>171</a></td><td><span class="ct">   *  UnitDelay: '&lt;S47&gt;/UnitDelay1'</span></td></tr>
 <tr name="172" id="172">
-<td><a id="l172" class='ln'>172</a></td><td>      <a id="172c7" class="tk">rtb_Sum3_m</a> = <a id="172c20" class="tk">-</a>32768;</td></tr>
+<td><a id="l172" class='ln'>172</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="173" id="173">
-<td><a id="l173" class='ln'>173</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l173" class='ln'>173</a></td><td>  <a id="173c3" class="tk">rtb_Sum3_i</a> = <a id="173c16" class="tk">rtu_coef</a> <a id="173c25" class="tk">*</a> <a id="173c27" class="tk">rtb_Sum3_i</a> <a id="173c38" class="tk">+</a> <a id="173c40" class="tk">localDW</a>-&gt;<a id="173c49" class="tk">UnitDelay1_DSTATE</a>[0];</td></tr>
 <tr name="174" id="174">
-<td><a id="l174" class='ln'>174</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l174" class='ln'>174</a></td><td></td></tr>
 <tr name="175" id="175">
-<td><a id="l175" class='ln'>175</a></td><td></td></tr>
+<td><a id="l175" class='ln'>175</a></td><td>  <span class="ct">/* DataTypeConversion: '&lt;S47&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="176" id="176">
-<td><a id="l176" class='ln'>176</a></td><td>  <span class="ct">/* Sum: '&lt;S56&gt;/Sum3' incorporates:</span></td></tr>
+<td><a id="l176" class='ln'>176</a></td><td>  <a id="176c3" class="tk">rty_y</a>[0] = (<a id="176c15" class="tk">int16_T</a>)(<a id="176c24" class="tk">rtb_Sum3_i</a> <a id="176c35" class="tk">&gt;&gt;</a> 16);</td></tr>
 <tr name="177" id="177">
-<td><a id="l177" class='ln'>177</a></td><td><span class="ct">   *  Product: '&lt;S56&gt;/Divide3'</span></td></tr>
+<td><a id="l177" class='ln'>177</a></td><td></td></tr>
 <tr name="178" id="178">
-<td><a id="l178" class='ln'>178</a></td><td><span class="ct">   *  Sum: '&lt;S56&gt;/Sum2'</span></td></tr>
+<td><a id="l178" class='ln'>178</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S47&gt;/UnitDelay1' */</span></td></tr>
 <tr name="179" id="179">
-<td><a id="l179" class='ln'>179</a></td><td><span class="ct">   *  UnitDelay: '&lt;S56&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l179" class='ln'>179</a></td><td>  <a id="179c3" class="tk">localDW</a>-&gt;<a id="179c12" class="tk">UnitDelay1_DSTATE</a>[0] = <a id="179c35" class="tk">rtb_Sum3_i</a>;</td></tr>
 <tr name="180" id="180">
-<td><a id="l180" class='ln'>180</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l180" class='ln'>180</a></td><td></td></tr>
 <tr name="181" id="181">
-<td><a id="l181" class='ln'>181</a></td><td>  <a id="181c3" class="tk">rtb_Sum3_m</a> = <a id="181c16" class="tk">rtu_coef</a> <a id="181c25" class="tk">*</a> <a id="181c27" class="tk">rtb_Sum3_m</a> <a id="181c38" class="tk">+</a> <a id="181c40" class="tk">localDW</a>-&gt;<a id="181c49" class="tk">UnitDelay1_DSTATE</a>[1];</td></tr>
+<td><a id="l181" class='ln'>181</a></td><td>  <span class="ct">/* Sum: '&lt;S47&gt;/Sum2' incorporates:</span></td></tr>
 <tr name="182" id="182">
-<td><a id="l182" class='ln'>182</a></td><td></td></tr>
+<td><a id="l182" class='ln'>182</a></td><td><span class="ct">   *  UnitDelay: '&lt;S47&gt;/UnitDelay1'</span></td></tr>
 <tr name="183" id="183">
-<td><a id="l183" class='ln'>183</a></td><td>  <span class="ct">/* DataTypeConversion: '&lt;S56&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l183" class='ln'>183</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="184" id="184">
-<td><a id="l184" class='ln'>184</a></td><td>  <a id="184c3" class="tk">rty_y</a>[1] = (<a id="184c15" class="tk">int16_T</a>)(<a id="184c24" class="tk">rtb_Sum3_m</a> <a id="184c35" class="tk">&gt;&gt;</a> 16);</td></tr>
+<td><a id="l184" class='ln'>184</a></td><td>  <a id="184c3" class="tk">rtb_Sum3_i</a> = <a id="184c16" class="tk">rtu_u</a>[1] <a id="184c25" class="tk">-</a> (<a id="184c28" class="tk">localDW</a>-&gt;<a id="184c37" class="tk">UnitDelay1_DSTATE</a>[1] <a id="184c58" class="tk">&gt;&gt;</a> 16);</td></tr>
 <tr name="185" id="185">
-<td><a id="l185" class='ln'>185</a></td><td></td></tr>
+<td><a id="l185" class='ln'>185</a></td><td>  <span class="kw">if</span> (<a id="185c7" class="tk">rtb_Sum3_i</a> <a id="185c18" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="186" id="186">
-<td><a id="l186" class='ln'>186</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S56&gt;/UnitDelay1' */</span></td></tr>
+<td><a id="l186" class='ln'>186</a></td><td>    <a id="186c5" class="tk">rtb_Sum3_i</a> = 32767;</td></tr>
 <tr name="187" id="187">
-<td><a id="l187" class='ln'>187</a></td><td>  <a id="187c3" class="tk">localDW</a>-&gt;<a id="187c12" class="tk">UnitDelay1_DSTATE</a>[1] = <a id="187c35" class="tk">rtb_Sum3_m</a>;</td></tr>
+<td><a id="l187" class='ln'>187</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="188" id="188">
-<td><a id="l188" class='ln'>188</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l188" class='ln'>188</a></td><td>    <span class="kw">if</span> (<a id="188c9" class="tk">rtb_Sum3_i</a> <a id="188c20" class="tk">&lt;</a> <a id="188c22" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="189" id="189">
-<td><a id="l189" class='ln'>189</a></td><td></td></tr>
+<td><a id="l189" class='ln'>189</a></td><td>      <a id="189c7" class="tk">rtb_Sum3_i</a> = <a id="189c20" class="tk">-</a>32768;</td></tr>
 <tr name="190" id="190">
-<td><a id="l190" class='ln'>190</a></td><td><span class="ct">/* System initialize for atomic system: '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l190" class='ln'>190</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="191" id="191">
-<td><a id="l191" class='ln'>191</a></td><td><span class="kw">void</span> <a id="191c6" class="tk">PI_backCalc_fixdt_Init</a>(<a id="191c29" class="tk">DW_PI_backCalc_fixdt</a> <a id="191c50" class="tk">*</a><a id="191c51" class="tk">localDW</a>)</td></tr>
+<td><a id="l191" class='ln'>191</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="192" id="192">
-<td><a id="l192" class='ln'>192</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l192" class='ln'>192</a></td><td></td></tr>
 <tr name="193" id="193">
-<td><a id="l193" class='ln'>193</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S90&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l193" class='ln'>193</a></td><td>  <span class="ct">/* Sum: '&lt;S47&gt;/Sum3' incorporates:</span></td></tr>
 <tr name="194" id="194">
-<td><a id="l194" class='ln'>194</a></td><td>  <a id="194c3" class="tk">localDW</a>-&gt;<a id="194c12" class="tk">icLoad</a> = 1U;</td></tr>
+<td><a id="l194" class='ln'>194</a></td><td><span class="ct">   *  Product: '&lt;S47&gt;/Divide3'</span></td></tr>
 <tr name="195" id="195">
-<td><a id="l195" class='ln'>195</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l195" class='ln'>195</a></td><td><span class="ct">   *  Sum: '&lt;S47&gt;/Sum2'</span></td></tr>
 <tr name="196" id="196">
-<td><a id="l196" class='ln'>196</a></td><td></td></tr>
+<td><a id="l196" class='ln'>196</a></td><td><span class="ct">   *  UnitDelay: '&lt;S47&gt;/UnitDelay1'</span></td></tr>
 <tr name="197" id="197">
-<td><a id="l197" class='ln'>197</a></td><td><span class="ct">/* Output and update for atomic system: '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l197" class='ln'>197</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="198" id="198">
-<td><a id="l198" class='ln'>198</a></td><td><a id="198c1" class="tk">int32_T</a> <a id="198c9" class="tk">PI_backCalc_fixdt</a>(<a id="198c27" class="tk">int32_T</a> <a id="198c35" class="tk">rtu_err</a>, <a id="198c44" class="tk">int16_T</a> <a id="198c52" class="tk">rtu_P</a>, <a id="198c59" class="tk">int16_T</a> <a id="198c67" class="tk">rtu_I</a>, <a id="198c74" class="tk">int16_T</a></td></tr>
+<td><a id="l198" class='ln'>198</a></td><td>  <a id="198c3" class="tk">rtb_Sum3_i</a> = <a id="198c16" class="tk">rtu_coef</a> <a id="198c25" class="tk">*</a> <a id="198c27" class="tk">rtb_Sum3_i</a> <a id="198c38" class="tk">+</a> <a id="198c40" class="tk">localDW</a>-&gt;<a id="198c49" class="tk">UnitDelay1_DSTATE</a>[1];</td></tr>
 <tr name="199" id="199">
-<td><a id="l199" class='ln'>199</a></td><td>  <a id="199c3" class="tk">rtu_Kb</a>, <a id="199c11" class="tk">int16_T</a> <a id="199c19" class="tk">rtu_satMax</a>, <a id="199c31" class="tk">int16_T</a> <a id="199c39" class="tk">rtu_satMin</a>, <a id="199c51" class="tk">int16_T</a> <a id="199c59" class="tk">rtu_init</a>, <a id="199c69" class="tk">uint8_T</a></td></tr>
+<td><a id="l199" class='ln'>199</a></td><td></td></tr>
 <tr name="200" id="200">
-<td><a id="l200" class='ln'>200</a></td><td>  <a id="200c3" class="tk">rtu_reset</a>, <a id="200c14" class="tk">DW_PI_backCalc_fixdt</a> <a id="200c35" class="tk">*</a><a id="200c36" class="tk">localDW</a>, <a id="200c45" class="tk">ZCE_PI_backCalc_fixdt</a> <a id="200c67" class="tk">*</a><a id="200c68" class="tk">localZCE</a>)</td></tr>
+<td><a id="l200" class='ln'>200</a></td><td>  <span class="ct">/* DataTypeConversion: '&lt;S47&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="201" id="201">
-<td><a id="l201" class='ln'>201</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l201" class='ln'>201</a></td><td>  <a id="201c3" class="tk">rty_y</a>[1] = (<a id="201c15" class="tk">int16_T</a>)(<a id="201c24" class="tk">rtb_Sum3_i</a> <a id="201c35" class="tk">&gt;&gt;</a> 16);</td></tr>
 <tr name="202" id="202">
-<td><a id="l202" class='ln'>202</a></td><td>  <a id="202c3" class="tk">int32_T</a> <a id="202c11" class="tk">rty_pi_out_0</a>;</td></tr>
+<td><a id="l202" class='ln'>202</a></td><td></td></tr>
 <tr name="203" id="203">
-<td><a id="l203" class='ln'>203</a></td><td>  <a id="203c3" class="tk">int64_T</a> <a id="203c11" class="tk">tmp</a>;</td></tr>
+<td><a id="l203" class='ln'>203</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S47&gt;/UnitDelay1' */</span></td></tr>
 <tr name="204" id="204">
-<td><a id="l204" class='ln'>204</a></td><td>  <a id="204c3" class="tk">int64_T</a> <a id="204c11" class="tk">tmp_0</a>;</td></tr>
+<td><a id="l204" class='ln'>204</a></td><td>  <a id="204c3" class="tk">localDW</a>-&gt;<a id="204c12" class="tk">UnitDelay1_DSTATE</a>[1] = <a id="204c35" class="tk">rtb_Sum3_i</a>;</td></tr>
 <tr name="205" id="205">
-<td><a id="l205" class='ln'>205</a></td><td></td></tr>
+<td><a id="l205" class='ln'>205</a></td><td><span class="br">}</span></td></tr>
 <tr name="206" id="206">
-<td><a id="l206" class='ln'>206</a></td><td>  <span class="ct">/* Product: '&lt;S89&gt;/Divide4' */</span></td></tr>
+<td><a id="l206" class='ln'>206</a></td><td></td></tr>
 <tr name="207" id="207">
-<td><a id="l207" class='ln'>207</a></td><td>  <a id="207c3" class="tk">tmp_0</a> = (<a id="207c12" class="tk">int64_T</a>)<a id="207c20" class="tk">rtu_err</a> <a id="207c28" class="tk">*</a> <a id="207c30" class="tk">rtu_P</a>;</td></tr>
+<td><a id="l207" class='ln'>207</a></td><td><span class="ct">/* System initialize for atomic system: '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="208" id="208">
-<td><a id="l208" class='ln'>208</a></td><td>  <span class="kw">if</span> (<a id="208c7" class="tk">tmp_0</a> <a id="208c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l208" class='ln'>208</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="208c13" class="tk">PI_backCalc_fixdt_Init</a>(<a id="208c36" class="tk">DW_PI_backCalc_fixdt</a> <a id="208c57" class="tk">*</a><a id="208c58" class="tk">localDW</a>)</td></tr>
 <tr name="209" id="209">
-<td><a id="l209" class='ln'>209</a></td><td>    <a id="209c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
+<td><a id="l209" class='ln'>209</a></td><td><span class="br">{</span></td></tr>
 <tr name="210" id="210">
-<td><a id="l210" class='ln'>210</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l210" class='ln'>210</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S82&gt;/Resettable Delay' */</span></td></tr>
 <tr name="211" id="211">
-<td><a id="l211" class='ln'>211</a></td><td>    <span class="kw">if</span> (<a id="211c9" class="tk">tmp_0</a> <a id="211c15" class="tk">&lt;</a> <a id="211c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l211" class='ln'>211</a></td><td>  <a id="211c3" class="tk">localDW</a>-&gt;<a id="211c12" class="tk">icLoad</a> = 1U;</td></tr>
 <tr name="212" id="212">
-<td><a id="l212" class='ln'>212</a></td><td>      <a id="212c7" class="tk">tmp_0</a> = <a id="212c15" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l212" class='ln'>212</a></td><td><span class="br">}</span></td></tr>
 <tr name="213" id="213">
-<td><a id="l213" class='ln'>213</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l213" class='ln'>213</a></td><td></td></tr>
 <tr name="214" id="214">
-<td><a id="l214" class='ln'>214</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l214" class='ln'>214</a></td><td><span class="ct">/* Output and update for atomic system: '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="215" id="215">
-<td><a id="l215" class='ln'>215</a></td><td></td></tr>
+<td><a id="l215" class='ln'>215</a></td><td><span class="kw">static</span> <a id="215c8" class="tk">int32_T</a> <a id="215c16" class="tk">PI_backCalc_fixdt</a>(<a id="215c34" class="tk">int32_T</a> <a id="215c42" class="tk">rtu_err</a>, <a id="215c51" class="tk">int16_T</a> <a id="215c59" class="tk">rtu_P</a>, <a id="215c66" class="tk">int16_T</a> <a id="215c74" class="tk">rtu_I</a>,</td></tr>
 <tr name="216" id="216">
-<td><a id="l216" class='ln'>216</a></td><td>  <span class="ct">/* Delay: '&lt;S90&gt;/Resettable Delay' incorporates:</span></td></tr>
+<td><a id="l216" class='ln'>216</a></td><td>  <a id="216c3" class="tk">int16_T</a> <a id="216c11" class="tk">rtu_Kb</a>, <a id="216c19" class="tk">int16_T</a> <a id="216c27" class="tk">rtu_satMax</a>, <a id="216c39" class="tk">int16_T</a> <a id="216c47" class="tk">rtu_satMin</a>, <a id="216c59" class="tk">int16_T</a> <a id="216c67" class="tk">rtu_init</a>,</td></tr>
 <tr name="217" id="217">
-<td><a id="l217" class='ln'>217</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S90&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l217" class='ln'>217</a></td><td>  <a id="217c3" class="tk">uint8_T</a> <a id="217c11" class="tk">rtu_reset</a>, <a id="217c22" class="tk">DW_PI_backCalc_fixdt</a> <a id="217c43" class="tk">*</a><a id="217c44" class="tk">localDW</a>, <a id="217c53" class="tk">ZCE_PI_backCalc_fixdt</a></td></tr>
 <tr name="218" id="218">
-<td><a id="l218" class='ln'>218</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l218" class='ln'>218</a></td><td>  <a id="218c3" class="tk">*</a><a id="218c4" class="tk">localZCE</a>)</td></tr>
 <tr name="219" id="219">
-<td><a id="l219" class='ln'>219</a></td><td>  <span class="kw">if</span> ((<a id="219c8" class="tk">rtu_reset</a> <a id="219c18" class="tk">&gt;</a> 0) <a id="219c23" class="tk">&amp;&amp;</a> (<a id="219c27" class="tk">localZCE</a>-&gt;<a id="219c37" class="tk">ResettableDelay_Reset_ZCE_f</a> <a id="219c65" class="tk">!=</a> <a id="219c68" class="tk">POS_ZCSIG</a>)) <span class="br">{</span></td></tr>
+<td><a id="l219" class='ln'>219</a></td><td><span class="br">{</span></td></tr>
 <tr name="220" id="220">
-<td><a id="l220" class='ln'>220</a></td><td>    <a id="220c5" class="tk">localDW</a>-&gt;<a id="220c14" class="tk">icLoad</a> = 1U;</td></tr>
+<td><a id="l220" class='ln'>220</a></td><td>  <a id="220c3" class="tk">int32_T</a> <a id="220c11" class="tk">rty_pi_out_0</a>;</td></tr>
 <tr name="221" id="221">
-<td><a id="l221" class='ln'>221</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l221" class='ln'>221</a></td><td>  <a id="221c3" class="tk">int64_T</a> <a id="221c11" class="tk">tmp</a>;</td></tr>
 <tr name="222" id="222">
-<td><a id="l222" class='ln'>222</a></td><td></td></tr>
+<td><a id="l222" class='ln'>222</a></td><td>  <a id="222c3" class="tk">int64_T</a> <a id="222c11" class="tk">tmp_0</a>;</td></tr>
 <tr name="223" id="223">
-<td><a id="l223" class='ln'>223</a></td><td>  <a id="223c3" class="tk">localZCE</a>-&gt;<a id="223c13" class="tk">ResettableDelay_Reset_ZCE_f</a> = (<a id="223c44" class="tk">ZCSigState</a>)(<a id="223c56" class="tk">rtu_reset</a> <a id="223c66" class="tk">&gt;</a> 0);</td></tr>
+<td><a id="l223" class='ln'>223</a></td><td></td></tr>
 <tr name="224" id="224">
-<td><a id="l224" class='ln'>224</a></td><td>  <span class="kw">if</span> (<a id="224c7" class="tk">localDW</a>-&gt;<a id="224c16" class="tk">icLoad</a> <a id="224c23" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l224" class='ln'>224</a></td><td>  <span class="ct">/* Product: '&lt;S81&gt;/Divide4' */</span></td></tr>
 <tr name="225" id="225">
-<td><a id="l225" class='ln'>225</a></td><td>    <a id="225c5" class="tk">localDW</a>-&gt;<a id="225c14" class="tk">ResettableDelay_DSTATE</a> = <a id="225c39" class="tk">rtu_init</a> <a id="225c48" class="tk">&lt;&lt;</a> 7;</td></tr>
+<td><a id="l225" class='ln'>225</a></td><td>  <a id="225c3" class="tk">tmp_0</a> = (<a id="225c12" class="tk">int64_T</a>)<a id="225c20" class="tk">rtu_err</a> <a id="225c28" class="tk">*</a> <a id="225c30" class="tk">rtu_P</a>;</td></tr>
 <tr name="226" id="226">
-<td><a id="l226" class='ln'>226</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l226" class='ln'>226</a></td><td>  <span class="kw">if</span> (<a id="226c7" class="tk">tmp_0</a> <a id="226c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="227" id="227">
-<td><a id="l227" class='ln'>227</a></td><td></td></tr>
+<td><a id="l227" class='ln'>227</a></td><td>    <a id="227c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
 <tr name="228" id="228">
-<td><a id="l228" class='ln'>228</a></td><td>  <span class="ct">/* Product: '&lt;S89&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l228" class='ln'>228</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="229" id="229">
-<td><a id="l229" class='ln'>229</a></td><td><span class="ct">   *  Product: '&lt;S89&gt;/Divide4'</span></td></tr>
+<td><a id="l229" class='ln'>229</a></td><td>    <span class="kw">if</span> (<a id="229c9" class="tk">tmp_0</a> <a id="229c15" class="tk">&lt;</a> <a id="229c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="230" id="230">
-<td><a id="l230" class='ln'>230</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l230" class='ln'>230</a></td><td>      <a id="230c7" class="tk">tmp_0</a> = <a id="230c15" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="231" id="231">
-<td><a id="l231" class='ln'>231</a></td><td>  <a id="231c3" class="tk">tmp</a> = ((<a id="231c11" class="tk">int64_T</a>)(<a id="231c20" class="tk">int32_T</a>)<a id="231c28" class="tk">tmp_0</a> <a id="231c34" class="tk">*</a> <a id="231c36" class="tk">rtu_I</a>) <a id="231c43" class="tk">&gt;&gt;</a> 14;</td></tr>
+<td><a id="l231" class='ln'>231</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="232" id="232">
-<td><a id="l232" class='ln'>232</a></td><td>  <span class="kw">if</span> (<a id="232c7" class="tk">tmp</a> <a id="232c11" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l232" class='ln'>232</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="233" id="233">
-<td><a id="l233" class='ln'>233</a></td><td>    <a id="233c5" class="tk">tmp</a> = 2147483647LL;</td></tr>
+<td><a id="l233" class='ln'>233</a></td><td></td></tr>
 <tr name="234" id="234">
-<td><a id="l234" class='ln'>234</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l234" class='ln'>234</a></td><td>  <span class="ct">/* Delay: '&lt;S82&gt;/Resettable Delay' incorporates:</span></td></tr>
 <tr name="235" id="235">
-<td><a id="l235" class='ln'>235</a></td><td>    <span class="kw">if</span> (<a id="235c9" class="tk">tmp</a> <a id="235c13" class="tk">&lt;</a> <a id="235c15" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l235" class='ln'>235</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S82&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="236" id="236">
-<td><a id="l236" class='ln'>236</a></td><td>      <a id="236c7" class="tk">tmp</a> = <a id="236c13" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l236" class='ln'>236</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="237" id="237">
-<td><a id="l237" class='ln'>237</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l237" class='ln'>237</a></td><td>  <span class="kw">if</span> ((<a id="237c8" class="tk">rtu_reset</a> <a id="237c18" class="tk">&gt;</a> 0) <a id="237c23" class="tk">&amp;&amp;</a> (<a id="237c27" class="tk">localZCE</a>-&gt;<a id="237c37" class="tk">ResettableDelay_Reset_ZCE_fm</a> <a id="237c66" class="tk">!=</a> <a id="237c69" class="tk">POS_ZCSIG</a>))</td></tr>
 <tr name="238" id="238">
-<td><a id="l238" class='ln'>238</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l238" class='ln'>238</a></td><td>  <span class="br">{</span></td></tr>
 <tr name="239" id="239">
-<td><a id="l239" class='ln'>239</a></td><td></td></tr>
+<td><a id="l239" class='ln'>239</a></td><td>    <a id="239c5" class="tk">localDW</a>-&gt;<a id="239c14" class="tk">icLoad</a> = 1U;</td></tr>
 <tr name="240" id="240">
-<td><a id="l240" class='ln'>240</a></td><td>  <span class="ct">/* Sum: '&lt;S89&gt;/Sum2' incorporates:</span></td></tr>
+<td><a id="l240" class='ln'>240</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="241" id="241">
-<td><a id="l241" class='ln'>241</a></td><td><span class="ct">   *  Product: '&lt;S89&gt;/Divide1'</span></td></tr>
+<td><a id="l241" class='ln'>241</a></td><td></td></tr>
 <tr name="242" id="242">
-<td><a id="l242" class='ln'>242</a></td><td><span class="ct">   *  UnitDelay: '&lt;S89&gt;/UnitDelay'</span></td></tr>
+<td><a id="l242" class='ln'>242</a></td><td>  <a id="242c3" class="tk">localZCE</a>-&gt;<a id="242c13" class="tk">ResettableDelay_Reset_ZCE_fm</a> = (<a id="242c45" class="tk">ZCSigState</a>)(<a id="242c57" class="tk">rtu_reset</a> <a id="242c67" class="tk">&gt;</a> 0);</td></tr>
 <tr name="243" id="243">
-<td><a id="l243" class='ln'>243</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l243" class='ln'>243</a></td><td>  <span class="kw">if</span> (<a id="243c7" class="tk">localDW</a>-&gt;<a id="243c16" class="tk">icLoad</a> <a id="243c23" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
 <tr name="244" id="244">
-<td><a id="l244" class='ln'>244</a></td><td>  <a id="244c3" class="tk">tmp</a> = (<a id="244c10" class="tk">int64_T</a>)(<a id="244c19" class="tk">int32_T</a>)<a id="244c27" class="tk">tmp</a> <a id="244c31" class="tk">+</a> <a id="244c33" class="tk">localDW</a>-&gt;<a id="244c42" class="tk">UnitDelay_DSTATE</a>;</td></tr>
+<td><a id="l244" class='ln'>244</a></td><td>    <a id="244c5" class="tk">localDW</a>-&gt;<a id="244c14" class="tk">ResettableDelay_DSTATE</a> = <a id="244c39" class="tk">rtu_init</a> <a id="244c48" class="tk">&lt;&lt;</a> 7;</td></tr>
 <tr name="245" id="245">
-<td><a id="l245" class='ln'>245</a></td><td>  <span class="kw">if</span> (<a id="245c7" class="tk">tmp</a> <a id="245c11" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l245" class='ln'>245</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="246" id="246">
-<td><a id="l246" class='ln'>246</a></td><td>    <a id="246c5" class="tk">tmp</a> = 2147483647LL;</td></tr>
+<td><a id="l246" class='ln'>246</a></td><td></td></tr>
 <tr name="247" id="247">
-<td><a id="l247" class='ln'>247</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l247" class='ln'>247</a></td><td>  <span class="ct">/* Product: '&lt;S81&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="248" id="248">
-<td><a id="l248" class='ln'>248</a></td><td>    <span class="kw">if</span> (<a id="248c9" class="tk">tmp</a> <a id="248c13" class="tk">&lt;</a> <a id="248c15" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l248" class='ln'>248</a></td><td><span class="ct">   *  Product: '&lt;S81&gt;/Divide4'</span></td></tr>
 <tr name="249" id="249">
-<td><a id="l249" class='ln'>249</a></td><td>      <a id="249c7" class="tk">tmp</a> = <a id="249c13" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l249" class='ln'>249</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="250" id="250">
-<td><a id="l250" class='ln'>250</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l250" class='ln'>250</a></td><td>  <a id="250c3" class="tk">tmp</a> = ((<a id="250c11" class="tk">int64_T</a>)(<a id="250c20" class="tk">int32_T</a>)<a id="250c28" class="tk">tmp_0</a> <a id="250c34" class="tk">*</a> <a id="250c36" class="tk">rtu_I</a>) <a id="250c43" class="tk">&gt;&gt;</a> 14;</td></tr>
 <tr name="251" id="251">
-<td><a id="l251" class='ln'>251</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l251" class='ln'>251</a></td><td>  <span class="kw">if</span> (<a id="251c7" class="tk">tmp</a> <a id="251c11" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="252" id="252">
-<td><a id="l252" class='ln'>252</a></td><td></td></tr>
+<td><a id="l252" class='ln'>252</a></td><td>    <a id="252c5" class="tk">tmp</a> = 2147483647LL;</td></tr>
 <tr name="253" id="253">
-<td><a id="l253" class='ln'>253</a></td><td>  <span class="ct">/* Sum: '&lt;S90&gt;/Sum1' incorporates:</span></td></tr>
+<td><a id="l253" class='ln'>253</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="254" id="254">
-<td><a id="l254" class='ln'>254</a></td><td><span class="ct">   *  Delay: '&lt;S90&gt;/Resettable Delay'</span></td></tr>
+<td><a id="l254" class='ln'>254</a></td><td>    <span class="kw">if</span> (<a id="254c9" class="tk">tmp</a> <a id="254c13" class="tk">&lt;</a> <a id="254c15" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="255" id="255">
-<td><a id="l255" class='ln'>255</a></td><td><span class="ct">   *  Sum: '&lt;S89&gt;/Sum2'</span></td></tr>
+<td><a id="l255" class='ln'>255</a></td><td>      <a id="255c7" class="tk">tmp</a> = <a id="255c13" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="256" id="256">
-<td><a id="l256" class='ln'>256</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l256" class='ln'>256</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="257" id="257">
-<td><a id="l257" class='ln'>257</a></td><td>  <a id="257c3" class="tk">tmp</a> = (((<a id="257c12" class="tk">int64_T</a>)<a id="257c20" class="tk">localDW</a>-&gt;<a id="257c29" class="tk">ResettableDelay_DSTATE</a> <a id="257c52" class="tk">&lt;&lt;</a> 2) <a id="257c58" class="tk">+</a> (<a id="257c61" class="tk">int32_T</a>)<a id="257c69" class="tk">tmp</a>) <a id="257c74" class="tk">&gt;&gt;</a> 2;</td></tr>
+<td><a id="l257" class='ln'>257</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="258" id="258">
-<td><a id="l258" class='ln'>258</a></td><td>  <span class="kw">if</span> (<a id="258c7" class="tk">tmp</a> <a id="258c11" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l258" class='ln'>258</a></td><td></td></tr>
 <tr name="259" id="259">
-<td><a id="l259" class='ln'>259</a></td><td>    <a id="259c5" class="tk">tmp</a> = 2147483647LL;</td></tr>
+<td><a id="l259" class='ln'>259</a></td><td>  <span class="ct">/* Sum: '&lt;S81&gt;/Sum2' incorporates:</span></td></tr>
 <tr name="260" id="260">
-<td><a id="l260" class='ln'>260</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l260" class='ln'>260</a></td><td><span class="ct">   *  Product: '&lt;S81&gt;/Divide1'</span></td></tr>
 <tr name="261" id="261">
-<td><a id="l261" class='ln'>261</a></td><td>    <span class="kw">if</span> (<a id="261c9" class="tk">tmp</a> <a id="261c13" class="tk">&lt;</a> <a id="261c15" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l261" class='ln'>261</a></td><td><span class="ct">   *  UnitDelay: '&lt;S81&gt;/UnitDelay'</span></td></tr>
 <tr name="262" id="262">
-<td><a id="l262" class='ln'>262</a></td><td>      <a id="262c7" class="tk">tmp</a> = <a id="262c13" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l262" class='ln'>262</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="263" id="263">
-<td><a id="l263" class='ln'>263</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l263" class='ln'>263</a></td><td>  <a id="263c3" class="tk">tmp</a> = (<a id="263c10" class="tk">int64_T</a>)(<a id="263c19" class="tk">int32_T</a>)<a id="263c27" class="tk">tmp</a> <a id="263c31" class="tk">+</a> <a id="263c33" class="tk">localDW</a>-&gt;<a id="263c42" class="tk">UnitDelay_DSTATE</a>;</td></tr>
 <tr name="264" id="264">
-<td><a id="l264" class='ln'>264</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l264" class='ln'>264</a></td><td>  <span class="kw">if</span> (<a id="264c7" class="tk">tmp</a> <a id="264c11" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="265" id="265">
-<td><a id="l265" class='ln'>265</a></td><td></td></tr>
+<td><a id="l265" class='ln'>265</a></td><td>    <a id="265c5" class="tk">tmp</a> = 2147483647LL;</td></tr>
 <tr name="266" id="266">
-<td><a id="l266" class='ln'>266</a></td><td>  <span class="ct">/* Sum: '&lt;S89&gt;/Sum6' incorporates:</span></td></tr>
+<td><a id="l266" class='ln'>266</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="267" id="267">
-<td><a id="l267" class='ln'>267</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S90&gt;/Data Type Conversion1'</span></td></tr>
+<td><a id="l267" class='ln'>267</a></td><td>    <span class="kw">if</span> (<a id="267c9" class="tk">tmp</a> <a id="267c13" class="tk">&lt;</a> <a id="267c15" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="268" id="268">
-<td><a id="l268" class='ln'>268</a></td><td><span class="ct">   *  Product: '&lt;S89&gt;/Divide4'</span></td></tr>
+<td><a id="l268" class='ln'>268</a></td><td>      <a id="268c7" class="tk">tmp</a> = <a id="268c13" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="269" id="269">
-<td><a id="l269" class='ln'>269</a></td><td><span class="ct">   *  Sum: '&lt;S90&gt;/Sum1'</span></td></tr>
+<td><a id="l269" class='ln'>269</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="270" id="270">
-<td><a id="l270" class='ln'>270</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l270" class='ln'>270</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="271" id="271">
-<td><a id="l271" class='ln'>271</a></td><td>  <a id="271c3" class="tk">tmp_0</a> = (<a id="271c12" class="tk">int64_T</a>)((<a id="271c22" class="tk">int32_T</a>)<a id="271c30" class="tk">tmp</a> <a id="271c34" class="tk">&lt;&lt;</a> 2) <a id="271c40" class="tk">+</a> (<a id="271c43" class="tk">int32_T</a>)<a id="271c51" class="tk">tmp_0</a>;</td></tr>
+<td><a id="l271" class='ln'>271</a></td><td></td></tr>
 <tr name="272" id="272">
-<td><a id="l272" class='ln'>272</a></td><td>  <span class="kw">if</span> (<a id="272c7" class="tk">tmp_0</a> <a id="272c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l272" class='ln'>272</a></td><td>  <span class="ct">/* Sum: '&lt;S82&gt;/Sum1' incorporates:</span></td></tr>
 <tr name="273" id="273">
-<td><a id="l273" class='ln'>273</a></td><td>    <a id="273c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
+<td><a id="l273" class='ln'>273</a></td><td><span class="ct">   *  Delay: '&lt;S82&gt;/Resettable Delay'</span></td></tr>
 <tr name="274" id="274">
-<td><a id="l274" class='ln'>274</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l274" class='ln'>274</a></td><td><span class="ct">   *  Sum: '&lt;S81&gt;/Sum2'</span></td></tr>
 <tr name="275" id="275">
-<td><a id="l275" class='ln'>275</a></td><td>    <span class="kw">if</span> (<a id="275c9" class="tk">tmp_0</a> <a id="275c15" class="tk">&lt;</a> <a id="275c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l275" class='ln'>275</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="276" id="276">
-<td><a id="l276" class='ln'>276</a></td><td>      <a id="276c7" class="tk">tmp_0</a> = <a id="276c15" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l276" class='ln'>276</a></td><td>  <a id="276c3" class="tk">tmp</a> = (((<a id="276c12" class="tk">int64_T</a>)<a id="276c20" class="tk">localDW</a>-&gt;<a id="276c29" class="tk">ResettableDelay_DSTATE</a> <a id="276c52" class="tk">&lt;&lt;</a> 2) <a id="276c58" class="tk">+</a> (<a id="276c61" class="tk">int32_T</a>)<a id="276c69" class="tk">tmp</a>) <a id="276c74" class="tk">&gt;&gt;</a> 2;</td></tr>
 <tr name="277" id="277">
-<td><a id="l277" class='ln'>277</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l277" class='ln'>277</a></td><td>  <span class="kw">if</span> (<a id="277c7" class="tk">tmp</a> <a id="277c11" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="278" id="278">
-<td><a id="l278" class='ln'>278</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l278" class='ln'>278</a></td><td>    <a id="278c5" class="tk">tmp</a> = 2147483647LL;</td></tr>
 <tr name="279" id="279">
-<td><a id="l279" class='ln'>279</a></td><td></td></tr>
+<td><a id="l279" class='ln'>279</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="280" id="280">
-<td><a id="l280" class='ln'>280</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S91&gt;/LowerRelop1' incorporates:</span></td></tr>
+<td><a id="l280" class='ln'>280</a></td><td>    <span class="kw">if</span> (<a id="280c9" class="tk">tmp</a> <a id="280c13" class="tk">&lt;</a> <a id="280c15" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="281" id="281">
-<td><a id="l281" class='ln'>281</a></td><td><span class="ct">   *  Switch: '&lt;S91&gt;/Switch2'</span></td></tr>
+<td><a id="l281" class='ln'>281</a></td><td>      <a id="281c7" class="tk">tmp</a> = <a id="281c13" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="282" id="282">
-<td><a id="l282" class='ln'>282</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l282" class='ln'>282</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="283" id="283">
-<td><a id="l283" class='ln'>283</a></td><td>  <a id="283c3" class="tk">rty_pi_out_0</a> = <a id="283c18" class="tk">rtu_satMax</a> <a id="283c29" class="tk">&lt;&lt;</a> 9;</td></tr>
+<td><a id="l283" class='ln'>283</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="284" id="284">
 <td><a id="l284" class='ln'>284</a></td><td></td></tr>
 <tr name="285" id="285">
-<td><a id="l285" class='ln'>285</a></td><td>  <span class="ct">/* Switch: '&lt;S91&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l285" class='ln'>285</a></td><td>  <span class="ct">/* Sum: '&lt;S81&gt;/Sum6' incorporates:</span></td></tr>
 <tr name="286" id="286">
-<td><a id="l286" class='ln'>286</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S91&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l286" class='ln'>286</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S82&gt;/Data Type Conversion1'</span></td></tr>
 <tr name="287" id="287">
-<td><a id="l287" class='ln'>287</a></td><td><span class="ct">   *  Sum: '&lt;S89&gt;/Sum6'</span></td></tr>
+<td><a id="l287" class='ln'>287</a></td><td><span class="ct">   *  Product: '&lt;S81&gt;/Divide4'</span></td></tr>
 <tr name="288" id="288">
-<td><a id="l288" class='ln'>288</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l288" class='ln'>288</a></td><td><span class="ct">   *  Sum: '&lt;S82&gt;/Sum1'</span></td></tr>
 <tr name="289" id="289">
-<td><a id="l289" class='ln'>289</a></td><td>  <span class="kw">if</span> ((<a id="289c8" class="tk">int32_T</a>)<a id="289c16" class="tk">tmp_0</a> <a id="289c22" class="tk">&lt;=</a> <a id="289c25" class="tk">rty_pi_out_0</a>) <span class="br">{</span></td></tr>
+<td><a id="l289" class='ln'>289</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="290" id="290">
-<td><a id="l290" class='ln'>290</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S91&gt;/UpperRelop' incorporates:</span></td></tr>
+<td><a id="l290" class='ln'>290</a></td><td>  <a id="290c3" class="tk">tmp_0</a> = (<a id="290c12" class="tk">int64_T</a>)((<a id="290c22" class="tk">int32_T</a>)<a id="290c30" class="tk">tmp</a> <a id="290c34" class="tk">&lt;&lt;</a> 2) <a id="290c40" class="tk">+</a> (<a id="290c43" class="tk">int32_T</a>)<a id="290c51" class="tk">tmp_0</a>;</td></tr>
 <tr name="291" id="291">
-<td><a id="l291" class='ln'>291</a></td><td><span class="ct">     *  Switch: '&lt;S91&gt;/Switch'</span></td></tr>
+<td><a id="l291" class='ln'>291</a></td><td>  <span class="kw">if</span> (<a id="291c7" class="tk">tmp_0</a> <a id="291c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="292" id="292">
-<td><a id="l292" class='ln'>292</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l292" class='ln'>292</a></td><td>    <a id="292c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
 <tr name="293" id="293">
-<td><a id="l293" class='ln'>293</a></td><td>    <a id="293c5" class="tk">rty_pi_out_0</a> = <a id="293c20" class="tk">rtu_satMin</a> <a id="293c31" class="tk">&lt;&lt;</a> 9;</td></tr>
+<td><a id="l293" class='ln'>293</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="294" id="294">
-<td><a id="l294" class='ln'>294</a></td><td></td></tr>
+<td><a id="l294" class='ln'>294</a></td><td>    <span class="kw">if</span> (<a id="294c9" class="tk">tmp_0</a> <a id="294c15" class="tk">&lt;</a> <a id="294c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="295" id="295">
-<td><a id="l295" class='ln'>295</a></td><td>    <span class="ct">/* Switch: '&lt;S91&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l295" class='ln'>295</a></td><td>      <a id="295c7" class="tk">tmp_0</a> = <a id="295c15" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="296" id="296">
-<td><a id="l296" class='ln'>296</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S91&gt;/UpperRelop'</span></td></tr>
+<td><a id="l296" class='ln'>296</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="297" id="297">
-<td><a id="l297" class='ln'>297</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l297" class='ln'>297</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="298" id="298">
-<td><a id="l298" class='ln'>298</a></td><td>    <span class="kw">if</span> ((<a id="298c10" class="tk">int32_T</a>)<a id="298c18" class="tk">tmp_0</a> <a id="298c24" class="tk">&gt;=</a> <a id="298c27" class="tk">rty_pi_out_0</a>) <span class="br">{</span></td></tr>
+<td><a id="l298" class='ln'>298</a></td><td></td></tr>
 <tr name="299" id="299">
-<td><a id="l299" class='ln'>299</a></td><td>      <a id="299c7" class="tk">rty_pi_out_0</a> = (<a id="299c23" class="tk">int32_T</a>)<a id="299c31" class="tk">tmp_0</a>;</td></tr>
+<td><a id="l299" class='ln'>299</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S83&gt;/LowerRelop1' incorporates:</span></td></tr>
 <tr name="300" id="300">
-<td><a id="l300" class='ln'>300</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l300" class='ln'>300</a></td><td><span class="ct">   *  Switch: '&lt;S83&gt;/Switch2'</span></td></tr>
 <tr name="301" id="301">
-<td><a id="l301" class='ln'>301</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l301" class='ln'>301</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="302" id="302">
-<td><a id="l302" class='ln'>302</a></td><td></td></tr>
+<td><a id="l302" class='ln'>302</a></td><td>  <a id="302c3" class="tk">rty_pi_out_0</a> = <a id="302c18" class="tk">rtu_satMax</a> <a id="302c29" class="tk">&lt;&lt;</a> 9;</td></tr>
 <tr name="303" id="303">
-<td><a id="l303" class='ln'>303</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S89&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l303" class='ln'>303</a></td><td></td></tr>
 <tr name="304" id="304">
-<td><a id="l304" class='ln'>304</a></td><td><span class="ct">   *  Product: '&lt;S89&gt;/Divide2'</span></td></tr>
+<td><a id="l304" class='ln'>304</a></td><td>  <span class="ct">/* Switch: '&lt;S83&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="305" id="305">
-<td><a id="l305" class='ln'>305</a></td><td><span class="ct">   *  Sum: '&lt;S89&gt;/Sum3'</span></td></tr>
+<td><a id="l305" class='ln'>305</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S83&gt;/LowerRelop1'</span></td></tr>
 <tr name="306" id="306">
-<td><a id="l306" class='ln'>306</a></td><td><span class="ct">   *  Sum: '&lt;S89&gt;/Sum6'</span></td></tr>
+<td><a id="l306" class='ln'>306</a></td><td><span class="ct">   *  Sum: '&lt;S81&gt;/Sum6'</span></td></tr>
 <tr name="307" id="307">
 <td><a id="l307" class='ln'>307</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="308" id="308">
-<td><a id="l308" class='ln'>308</a></td><td>  <a id="308c3" class="tk">localDW</a>-&gt;<a id="308c12" class="tk">UnitDelay_DSTATE</a> = (<a id="308c32" class="tk">int32_T</a>)(((<a id="308c43" class="tk">int64_T</a>)(<a id="308c52" class="tk">rty_pi_out_0</a> <a id="308c65" class="tk">-</a> (<a id="308c68" class="tk">int32_T</a>)<a id="308c76" class="tk">tmp_0</a>)</td></tr>
+<td><a id="l308" class='ln'>308</a></td><td>  <span class="kw">if</span> ((<a id="308c8" class="tk">int32_T</a>)<a id="308c16" class="tk">tmp_0</a> <a id="308c22" class="tk">&lt;=</a> <a id="308c25" class="tk">rty_pi_out_0</a>) <span class="br">{</span></td></tr>
 <tr name="309" id="309">
-<td><a id="l309" class='ln'>309</a></td><td>    <a id="309c5" class="tk">*</a> <a id="309c7" class="tk">rtu_Kb</a>) <a id="309c15" class="tk">&gt;&gt;</a> 14);</td></tr>
+<td><a id="l309" class='ln'>309</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S83&gt;/UpperRelop' incorporates:</span></td></tr>
 <tr name="310" id="310">
-<td><a id="l310" class='ln'>310</a></td><td></td></tr>
+<td><a id="l310" class='ln'>310</a></td><td><span class="ct">     *  Switch: '&lt;S83&gt;/Switch'</span></td></tr>
 <tr name="311" id="311">
-<td><a id="l311" class='ln'>311</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S90&gt;/Resettable Delay' incorporates:</span></td></tr>
+<td><a id="l311" class='ln'>311</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="312" id="312">
-<td><a id="l312" class='ln'>312</a></td><td><span class="ct">   *  Sum: '&lt;S90&gt;/Sum1'</span></td></tr>
+<td><a id="l312" class='ln'>312</a></td><td>    <a id="312c5" class="tk">rty_pi_out_0</a> = <a id="312c20" class="tk">rtu_satMin</a> <a id="312c31" class="tk">&lt;&lt;</a> 9;</td></tr>
 <tr name="313" id="313">
-<td><a id="l313" class='ln'>313</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l313" class='ln'>313</a></td><td></td></tr>
 <tr name="314" id="314">
-<td><a id="l314" class='ln'>314</a></td><td>  <a id="314c3" class="tk">localDW</a>-&gt;<a id="314c12" class="tk">icLoad</a> = 0U;</td></tr>
+<td><a id="l314" class='ln'>314</a></td><td>    <span class="ct">/* Switch: '&lt;S83&gt;/Switch' incorporates:</span></td></tr>
 <tr name="315" id="315">
-<td><a id="l315" class='ln'>315</a></td><td>  <a id="315c3" class="tk">localDW</a>-&gt;<a id="315c12" class="tk">ResettableDelay_DSTATE</a> = (<a id="315c38" class="tk">int32_T</a>)<a id="315c46" class="tk">tmp</a>;</td></tr>
+<td><a id="l315" class='ln'>315</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S83&gt;/UpperRelop'</span></td></tr>
 <tr name="316" id="316">
-<td><a id="l316" class='ln'>316</a></td><td>  <span class="kw">return</span> <a id="316c10" class="tk">rty_pi_out_0</a>;</td></tr>
+<td><a id="l316" class='ln'>316</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="317" id="317">
-<td><a id="l317" class='ln'>317</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l317" class='ln'>317</a></td><td>    <span class="kw">if</span> ((<a id="317c10" class="tk">int32_T</a>)<a id="317c18" class="tk">tmp_0</a> <a id="317c24" class="tk">&gt;=</a> <a id="317c27" class="tk">rty_pi_out_0</a>) <span class="br">{</span></td></tr>
 <tr name="318" id="318">
-<td><a id="l318" class='ln'>318</a></td><td></td></tr>
+<td><a id="l318" class='ln'>318</a></td><td>      <a id="318c7" class="tk">rty_pi_out_0</a> = (<a id="318c23" class="tk">int32_T</a>)<a id="318c31" class="tk">tmp_0</a>;</td></tr>
 <tr name="319" id="319">
-<td><a id="l319" class='ln'>319</a></td><td><span class="ct">/*</span></td></tr>
+<td><a id="l319" class='ln'>319</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="320" id="320">
-<td><a id="l320" class='ln'>320</a></td><td><span class="ct"> * System initialize for atomic system:</span></td></tr>
+<td><a id="l320" class='ln'>320</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="321" id="321">
-<td><a id="l321" class='ln'>321</a></td><td><span class="ct"> *    '&lt;S95&gt;/PI_backCalc_fixdt'</span></td></tr>
+<td><a id="l321" class='ln'>321</a></td><td></td></tr>
 <tr name="322" id="322">
-<td><a id="l322" class='ln'>322</a></td><td><span class="ct"> *    '&lt;S95&gt;/PI_backCalc_fixdt1'</span></td></tr>
+<td><a id="l322" class='ln'>322</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S81&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="323" id="323">
-<td><a id="l323" class='ln'>323</a></td><td><span class="ct"> */</span></td></tr>
+<td><a id="l323" class='ln'>323</a></td><td><span class="ct">   *  Product: '&lt;S81&gt;/Divide2'</span></td></tr>
 <tr name="324" id="324">
-<td><a id="l324" class='ln'>324</a></td><td><span class="kw">void</span> <a id="324c6" class="tk">PI_backCalc_fixdt_p_Init</a>(<a id="324c31" class="tk">DW_PI_backCalc_fixdt_i</a> <a id="324c54" class="tk">*</a><a id="324c55" class="tk">localDW</a>)</td></tr>
+<td><a id="l324" class='ln'>324</a></td><td><span class="ct">   *  Sum: '&lt;S81&gt;/Sum3'</span></td></tr>
 <tr name="325" id="325">
-<td><a id="l325" class='ln'>325</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l325" class='ln'>325</a></td><td><span class="ct">   *  Sum: '&lt;S81&gt;/Sum6'</span></td></tr>
 <tr name="326" id="326">
-<td><a id="l326" class='ln'>326</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S102&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l326" class='ln'>326</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="327" id="327">
-<td><a id="l327" class='ln'>327</a></td><td>  <a id="327c3" class="tk">localDW</a>-&gt;<a id="327c12" class="tk">icLoad</a> = 1U;</td></tr>
+<td><a id="l327" class='ln'>327</a></td><td>  <a id="327c3" class="tk">localDW</a>-&gt;<a id="327c12" class="tk">UnitDelay_DSTATE</a> = (<a id="327c32" class="tk">int32_T</a>)(((<a id="327c43" class="tk">int64_T</a>)(<a id="327c52" class="tk">rty_pi_out_0</a> <a id="327c65" class="tk">-</a> (<a id="327c68" class="tk">int32_T</a>)<a id="327c76" class="tk">tmp_0</a>)</td></tr>
 <tr name="328" id="328">
-<td><a id="l328" class='ln'>328</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l328" class='ln'>328</a></td><td>    <a id="328c5" class="tk">*</a> <a id="328c7" class="tk">rtu_Kb</a>) <a id="328c15" class="tk">&gt;&gt;</a> 14);</td></tr>
 <tr name="329" id="329">
 <td><a id="l329" class='ln'>329</a></td><td></td></tr>
 <tr name="330" id="330">
-<td><a id="l330" class='ln'>330</a></td><td><span class="ct">/*</span></td></tr>
+<td><a id="l330" class='ln'>330</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S82&gt;/Resettable Delay' incorporates:</span></td></tr>
 <tr name="331" id="331">
-<td><a id="l331" class='ln'>331</a></td><td><span class="ct"> * Output and update for atomic system:</span></td></tr>
+<td><a id="l331" class='ln'>331</a></td><td><span class="ct">   *  Sum: '&lt;S82&gt;/Sum1'</span></td></tr>
 <tr name="332" id="332">
-<td><a id="l332" class='ln'>332</a></td><td><span class="ct"> *    '&lt;S95&gt;/PI_backCalc_fixdt'</span></td></tr>
+<td><a id="l332" class='ln'>332</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="333" id="333">
-<td><a id="l333" class='ln'>333</a></td><td><span class="ct"> *    '&lt;S95&gt;/PI_backCalc_fixdt1'</span></td></tr>
+<td><a id="l333" class='ln'>333</a></td><td>  <a id="333c3" class="tk">localDW</a>-&gt;<a id="333c12" class="tk">icLoad</a> = 0U;</td></tr>
 <tr name="334" id="334">
-<td><a id="l334" class='ln'>334</a></td><td><span class="ct"> */</span></td></tr>
+<td><a id="l334" class='ln'>334</a></td><td>  <a id="334c3" class="tk">localDW</a>-&gt;<a id="334c12" class="tk">ResettableDelay_DSTATE</a> = (<a id="334c38" class="tk">int32_T</a>)<a id="334c46" class="tk">tmp</a>;</td></tr>
 <tr name="335" id="335">
-<td><a id="l335" class='ln'>335</a></td><td><a id="335c1" class="tk">int32_T</a> <a id="335c9" class="tk">PI_backCalc_fixdt_o</a>(<a id="335c29" class="tk">int16_T</a> <a id="335c37" class="tk">rtu_err</a>, <a id="335c46" class="tk">int16_T</a> <a id="335c54" class="tk">rtu_P</a>, <a id="335c61" class="tk">int16_T</a> <a id="335c69" class="tk">rtu_I</a>,</td></tr>
+<td><a id="l335" class='ln'>335</a></td><td>  <span class="kw">return</span> <a id="335c10" class="tk">rty_pi_out_0</a>;</td></tr>
 <tr name="336" id="336">
-<td><a id="l336" class='ln'>336</a></td><td>  <a id="336c3" class="tk">int16_T</a> <a id="336c11" class="tk">rtu_Kb</a>, <a id="336c19" class="tk">int16_T</a> <a id="336c27" class="tk">rtu_satMax</a>, <a id="336c39" class="tk">int16_T</a> <a id="336c47" class="tk">rtu_satMin</a>, <a id="336c59" class="tk">int16_T</a> <a id="336c67" class="tk">rtu_init</a>,</td></tr>
+<td><a id="l336" class='ln'>336</a></td><td><span class="br">}</span></td></tr>
 <tr name="337" id="337">
-<td><a id="l337" class='ln'>337</a></td><td>  <a id="337c3" class="tk">uint8_T</a> <a id="337c11" class="tk">rtu_reset</a>, <a id="337c22" class="tk">DW_PI_backCalc_fixdt_i</a> <a id="337c45" class="tk">*</a><a id="337c46" class="tk">localDW</a>, <a id="337c55" class="tk">ZCE_PI_backCalc_fixdt_e</a></td></tr>
+<td><a id="l337" class='ln'>337</a></td><td></td></tr>
 <tr name="338" id="338">
-<td><a id="l338" class='ln'>338</a></td><td>  <a id="338c3" class="tk">*</a><a id="338c4" class="tk">localZCE</a>)</td></tr>
+<td><a id="l338" class='ln'>338</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="339" id="339">
-<td><a id="l339" class='ln'>339</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l339" class='ln'>339</a></td><td><span class="ct"> * System initialize for atomic system:</span></td></tr>
 <tr name="340" id="340">
-<td><a id="l340" class='ln'>340</a></td><td>  <a id="340c3" class="tk">int32_T</a> <a id="340c11" class="tk">rty_pi_out_0</a>;</td></tr>
+<td><a id="l340" class='ln'>340</a></td><td><span class="ct"> *    '&lt;S85&gt;/PI_backCalc_fixdt'</span></td></tr>
 <tr name="341" id="341">
-<td><a id="l341" class='ln'>341</a></td><td>  <a id="341c3" class="tk">int64_T</a> <a id="341c11" class="tk">tmp</a>;</td></tr>
+<td><a id="l341" class='ln'>341</a></td><td><span class="ct"> *    '&lt;S85&gt;/PI_backCalc_fixdt1'</span></td></tr>
 <tr name="342" id="342">
-<td><a id="l342" class='ln'>342</a></td><td>  <a id="342c3" class="tk">int64_T</a> <a id="342c11" class="tk">tmp_0</a>;</td></tr>
+<td><a id="l342" class='ln'>342</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="343" id="343">
-<td><a id="l343" class='ln'>343</a></td><td>  <a id="343c3" class="tk">int32_T</a> <a id="343c11" class="tk">rtb_Divide4_n</a>;</td></tr>
+<td><a id="l343" class='ln'>343</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="343c13" class="tk">PI_backCalc_fixdt_g_Init</a>(<a id="343c38" class="tk">DW_PI_backCalc_fixdt_j</a> <a id="343c61" class="tk">*</a><a id="343c62" class="tk">localDW</a>)</td></tr>
 <tr name="344" id="344">
-<td><a id="l344" class='ln'>344</a></td><td></td></tr>
+<td><a id="l344" class='ln'>344</a></td><td><span class="br">{</span></td></tr>
 <tr name="345" id="345">
-<td><a id="l345" class='ln'>345</a></td><td>  <span class="ct">/* Product: '&lt;S100&gt;/Divide4' */</span></td></tr>
+<td><a id="l345" class='ln'>345</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S92&gt;/Resettable Delay' */</span></td></tr>
 <tr name="346" id="346">
-<td><a id="l346" class='ln'>346</a></td><td>  <a id="346c3" class="tk">rtb_Divide4_n</a> = (<a id="346c20" class="tk">rtu_err</a> <a id="346c28" class="tk">*</a> <a id="346c30" class="tk">rtu_P</a>) <a id="346c37" class="tk">&gt;&gt;</a> 1;</td></tr>
+<td><a id="l346" class='ln'>346</a></td><td>  <a id="346c3" class="tk">localDW</a>-&gt;<a id="346c12" class="tk">icLoad</a> = 1U;</td></tr>
 <tr name="347" id="347">
-<td><a id="l347" class='ln'>347</a></td><td></td></tr>
+<td><a id="l347" class='ln'>347</a></td><td><span class="br">}</span></td></tr>
 <tr name="348" id="348">
-<td><a id="l348" class='ln'>348</a></td><td>  <span class="ct">/* Delay: '&lt;S102&gt;/Resettable Delay' incorporates:</span></td></tr>
+<td><a id="l348" class='ln'>348</a></td><td></td></tr>
 <tr name="349" id="349">
-<td><a id="l349" class='ln'>349</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S102&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l349" class='ln'>349</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="350" id="350">
-<td><a id="l350" class='ln'>350</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l350" class='ln'>350</a></td><td><span class="ct"> * Output and update for atomic system:</span></td></tr>
 <tr name="351" id="351">
-<td><a id="l351" class='ln'>351</a></td><td>  <span class="kw">if</span> ((<a id="351c8" class="tk">rtu_reset</a> <a id="351c18" class="tk">&gt;</a> 0) <a id="351c23" class="tk">&amp;&amp;</a> (<a id="351c27" class="tk">localZCE</a>-&gt;<a id="351c37" class="tk">ResettableDelay_Reset_ZCE</a> <a id="351c63" class="tk">!=</a> <a id="351c66" class="tk">POS_ZCSIG</a>)) <span class="br">{</span></td></tr>
+<td><a id="l351" class='ln'>351</a></td><td><span class="ct"> *    '&lt;S85&gt;/PI_backCalc_fixdt'</span></td></tr>
 <tr name="352" id="352">
-<td><a id="l352" class='ln'>352</a></td><td>    <a id="352c5" class="tk">localDW</a>-&gt;<a id="352c14" class="tk">icLoad</a> = 1U;</td></tr>
+<td><a id="l352" class='ln'>352</a></td><td><span class="ct"> *    '&lt;S85&gt;/PI_backCalc_fixdt1'</span></td></tr>
 <tr name="353" id="353">
-<td><a id="l353" class='ln'>353</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l353" class='ln'>353</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="354" id="354">
-<td><a id="l354" class='ln'>354</a></td><td></td></tr>
+<td><a id="l354" class='ln'>354</a></td><td><span class="kw">static</span> <a id="354c8" class="tk">int32_T</a> <a id="354c16" class="tk">PI_backCalc_fixdt_i</a>(<a id="354c36" class="tk">int16_T</a> <a id="354c44" class="tk">rtu_err</a>, <a id="354c53" class="tk">int16_T</a> <a id="354c61" class="tk">rtu_P</a>, <a id="354c68" class="tk">int16_T</a> <a id="354c76" class="tk">rtu_I</a>,</td></tr>
 <tr name="355" id="355">
-<td><a id="l355" class='ln'>355</a></td><td>  <a id="355c3" class="tk">localZCE</a>-&gt;<a id="355c13" class="tk">ResettableDelay_Reset_ZCE</a> = (<a id="355c42" class="tk">ZCSigState</a>)(<a id="355c54" class="tk">rtu_reset</a> <a id="355c64" class="tk">&gt;</a> 0);</td></tr>
+<td><a id="l355" class='ln'>355</a></td><td>  <a id="355c3" class="tk">int16_T</a> <a id="355c11" class="tk">rtu_Kb</a>, <a id="355c19" class="tk">int16_T</a> <a id="355c27" class="tk">rtu_satMax</a>, <a id="355c39" class="tk">int16_T</a> <a id="355c47" class="tk">rtu_satMin</a>, <a id="355c59" class="tk">int16_T</a> <a id="355c67" class="tk">rtu_init</a>,</td></tr>
 <tr name="356" id="356">
-<td><a id="l356" class='ln'>356</a></td><td>  <span class="kw">if</span> (<a id="356c7" class="tk">localDW</a>-&gt;<a id="356c16" class="tk">icLoad</a> <a id="356c23" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l356" class='ln'>356</a></td><td>  <a id="356c3" class="tk">uint8_T</a> <a id="356c11" class="tk">rtu_reset</a>, <a id="356c22" class="tk">DW_PI_backCalc_fixdt_j</a> <a id="356c45" class="tk">*</a><a id="356c46" class="tk">localDW</a>, <a id="356c55" class="tk">ZCE_PI_backCalc_fixdt_n</a></td></tr>
 <tr name="357" id="357">
-<td><a id="l357" class='ln'>357</a></td><td>    <a id="357c5" class="tk">localDW</a>-&gt;<a id="357c14" class="tk">ResettableDelay_DSTATE</a> = <a id="357c39" class="tk">rtu_init</a> <a id="357c48" class="tk">&lt;&lt;</a> 7;</td></tr>
+<td><a id="l357" class='ln'>357</a></td><td>  <a id="357c3" class="tk">*</a><a id="357c4" class="tk">localZCE</a>)</td></tr>
 <tr name="358" id="358">
-<td><a id="l358" class='ln'>358</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l358" class='ln'>358</a></td><td><span class="br">{</span></td></tr>
 <tr name="359" id="359">
-<td><a id="l359" class='ln'>359</a></td><td></td></tr>
+<td><a id="l359" class='ln'>359</a></td><td>  <a id="359c3" class="tk">int32_T</a> <a id="359c11" class="tk">rty_pi_out_0</a>;</td></tr>
 <tr name="360" id="360">
-<td><a id="l360" class='ln'>360</a></td><td>  <span class="ct">/* Product: '&lt;S100&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l360" class='ln'>360</a></td><td>  <a id="360c3" class="tk">int64_T</a> <a id="360c11" class="tk">tmp</a>;</td></tr>
 <tr name="361" id="361">
-<td><a id="l361" class='ln'>361</a></td><td><span class="ct">   *  Product: '&lt;S100&gt;/Divide4'</span></td></tr>
+<td><a id="l361" class='ln'>361</a></td><td>  <a id="361c3" class="tk">int64_T</a> <a id="361c11" class="tk">tmp_0</a>;</td></tr>
 <tr name="362" id="362">
-<td><a id="l362" class='ln'>362</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l362" class='ln'>362</a></td><td>  <a id="362c3" class="tk">int32_T</a> <a id="362c11" class="tk">rtb_Divide4_px</a>;</td></tr>
 <tr name="363" id="363">
-<td><a id="l363" class='ln'>363</a></td><td>  <a id="363c3" class="tk">tmp_0</a> = ((<a id="363c13" class="tk">int64_T</a>)<a id="363c21" class="tk">rtb_Divide4_n</a> <a id="363c35" class="tk">*</a> <a id="363c37" class="tk">rtu_I</a>) <a id="363c44" class="tk">&gt;&gt;</a> 14;</td></tr>
+<td><a id="l363" class='ln'>363</a></td><td></td></tr>
 <tr name="364" id="364">
-<td><a id="l364" class='ln'>364</a></td><td>  <span class="kw">if</span> (<a id="364c7" class="tk">tmp_0</a> <a id="364c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l364" class='ln'>364</a></td><td>  <span class="ct">/* Product: '&lt;S90&gt;/Divide4' */</span></td></tr>
 <tr name="365" id="365">
-<td><a id="l365" class='ln'>365</a></td><td>    <a id="365c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
+<td><a id="l365" class='ln'>365</a></td><td>  <a id="365c3" class="tk">rtb_Divide4_px</a> = (<a id="365c21" class="tk">rtu_err</a> <a id="365c29" class="tk">*</a> <a id="365c31" class="tk">rtu_P</a>) <a id="365c38" class="tk">&gt;&gt;</a> 1;</td></tr>
 <tr name="366" id="366">
-<td><a id="l366" class='ln'>366</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l366" class='ln'>366</a></td><td></td></tr>
 <tr name="367" id="367">
-<td><a id="l367" class='ln'>367</a></td><td>    <span class="kw">if</span> (<a id="367c9" class="tk">tmp_0</a> <a id="367c15" class="tk">&lt;</a> <a id="367c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l367" class='ln'>367</a></td><td>  <span class="ct">/* Delay: '&lt;S92&gt;/Resettable Delay' incorporates:</span></td></tr>
 <tr name="368" id="368">
-<td><a id="l368" class='ln'>368</a></td><td>      <a id="368c7" class="tk">tmp_0</a> = <a id="368c15" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l368" class='ln'>368</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S92&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="369" id="369">
-<td><a id="l369" class='ln'>369</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l369" class='ln'>369</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="370" id="370">
-<td><a id="l370" class='ln'>370</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l370" class='ln'>370</a></td><td>  <span class="kw">if</span> ((<a id="370c8" class="tk">rtu_reset</a> <a id="370c18" class="tk">&gt;</a> 0) <a id="370c23" class="tk">&amp;&amp;</a> (<a id="370c27" class="tk">localZCE</a>-&gt;<a id="370c37" class="tk">ResettableDelay_Reset_ZCE</a> <a id="370c63" class="tk">!=</a> <a id="370c66" class="tk">POS_ZCSIG</a>)) <span class="br">{</span></td></tr>
 <tr name="371" id="371">
-<td><a id="l371" class='ln'>371</a></td><td></td></tr>
+<td><a id="l371" class='ln'>371</a></td><td>    <a id="371c5" class="tk">localDW</a>-&gt;<a id="371c14" class="tk">icLoad</a> = 1U;</td></tr>
 <tr name="372" id="372">
-<td><a id="l372" class='ln'>372</a></td><td>  <span class="ct">/* Sum: '&lt;S100&gt;/Sum2' incorporates:</span></td></tr>
+<td><a id="l372" class='ln'>372</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="373" id="373">
-<td><a id="l373" class='ln'>373</a></td><td><span class="ct">   *  Product: '&lt;S100&gt;/Divide1'</span></td></tr>
+<td><a id="l373" class='ln'>373</a></td><td></td></tr>
 <tr name="374" id="374">
-<td><a id="l374" class='ln'>374</a></td><td><span class="ct">   *  UnitDelay: '&lt;S100&gt;/UnitDelay'</span></td></tr>
+<td><a id="l374" class='ln'>374</a></td><td>  <a id="374c3" class="tk">localZCE</a>-&gt;<a id="374c13" class="tk">ResettableDelay_Reset_ZCE</a> = (<a id="374c42" class="tk">ZCSigState</a>)(<a id="374c54" class="tk">rtu_reset</a> <a id="374c64" class="tk">&gt;</a> 0);</td></tr>
 <tr name="375" id="375">
-<td><a id="l375" class='ln'>375</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l375" class='ln'>375</a></td><td>  <span class="kw">if</span> (<a id="375c7" class="tk">localDW</a>-&gt;<a id="375c16" class="tk">icLoad</a> <a id="375c23" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
 <tr name="376" id="376">
-<td><a id="l376" class='ln'>376</a></td><td>  <a id="376c3" class="tk">tmp_0</a> = (<a id="376c12" class="tk">int64_T</a>)(<a id="376c21" class="tk">int32_T</a>)<a id="376c29" class="tk">tmp_0</a> <a id="376c35" class="tk">+</a> <a id="376c37" class="tk">localDW</a>-&gt;<a id="376c46" class="tk">UnitDelay_DSTATE</a>;</td></tr>
+<td><a id="l376" class='ln'>376</a></td><td>    <a id="376c5" class="tk">localDW</a>-&gt;<a id="376c14" class="tk">ResettableDelay_DSTATE</a> = <a id="376c39" class="tk">rtu_init</a> <a id="376c48" class="tk">&lt;&lt;</a> 7;</td></tr>
 <tr name="377" id="377">
-<td><a id="l377" class='ln'>377</a></td><td>  <span class="kw">if</span> (<a id="377c7" class="tk">tmp_0</a> <a id="377c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l377" class='ln'>377</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="378" id="378">
-<td><a id="l378" class='ln'>378</a></td><td>    <a id="378c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
+<td><a id="l378" class='ln'>378</a></td><td></td></tr>
 <tr name="379" id="379">
-<td><a id="l379" class='ln'>379</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l379" class='ln'>379</a></td><td>  <span class="ct">/* Product: '&lt;S90&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="380" id="380">
-<td><a id="l380" class='ln'>380</a></td><td>    <span class="kw">if</span> (<a id="380c9" class="tk">tmp_0</a> <a id="380c15" class="tk">&lt;</a> <a id="380c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l380" class='ln'>380</a></td><td><span class="ct">   *  Product: '&lt;S90&gt;/Divide4'</span></td></tr>
 <tr name="381" id="381">
-<td><a id="l381" class='ln'>381</a></td><td>      <a id="381c7" class="tk">tmp_0</a> = <a id="381c15" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l381" class='ln'>381</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="382" id="382">
-<td><a id="l382" class='ln'>382</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l382" class='ln'>382</a></td><td>  <a id="382c3" class="tk">tmp_0</a> = ((<a id="382c13" class="tk">int64_T</a>)<a id="382c21" class="tk">rtb_Divide4_px</a> <a id="382c36" class="tk">*</a> <a id="382c38" class="tk">rtu_I</a>) <a id="382c45" class="tk">&gt;&gt;</a> 14;</td></tr>
 <tr name="383" id="383">
-<td><a id="l383" class='ln'>383</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l383" class='ln'>383</a></td><td>  <span class="kw">if</span> (<a id="383c7" class="tk">tmp_0</a> <a id="383c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="384" id="384">
-<td><a id="l384" class='ln'>384</a></td><td></td></tr>
+<td><a id="l384" class='ln'>384</a></td><td>    <a id="384c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
 <tr name="385" id="385">
-<td><a id="l385" class='ln'>385</a></td><td>  <span class="ct">/* Sum: '&lt;S102&gt;/Sum1' incorporates:</span></td></tr>
+<td><a id="l385" class='ln'>385</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="386" id="386">
-<td><a id="l386" class='ln'>386</a></td><td><span class="ct">   *  Delay: '&lt;S102&gt;/Resettable Delay'</span></td></tr>
+<td><a id="l386" class='ln'>386</a></td><td>    <span class="kw">if</span> (<a id="386c9" class="tk">tmp_0</a> <a id="386c15" class="tk">&lt;</a> <a id="386c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="387" id="387">
-<td><a id="l387" class='ln'>387</a></td><td><span class="ct">   *  Sum: '&lt;S100&gt;/Sum2'</span></td></tr>
+<td><a id="l387" class='ln'>387</a></td><td>      <a id="387c7" class="tk">tmp_0</a> = <a id="387c15" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="388" id="388">
-<td><a id="l388" class='ln'>388</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l388" class='ln'>388</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="389" id="389">
-<td><a id="l389" class='ln'>389</a></td><td>  <a id="389c3" class="tk">tmp_0</a> = (((<a id="389c14" class="tk">int64_T</a>)<a id="389c22" class="tk">localDW</a>-&gt;<a id="389c31" class="tk">ResettableDelay_DSTATE</a> <a id="389c54" class="tk">&lt;&lt;</a> 2) <a id="389c60" class="tk">+</a> (<a id="389c63" class="tk">int32_T</a>)<a id="389c71" class="tk">tmp_0</a>) <a id="389c78" class="tk">&gt;&gt;</a></td></tr>
+<td><a id="l389" class='ln'>389</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="390" id="390">
-<td><a id="l390" class='ln'>390</a></td><td>    2;</td></tr>
+<td><a id="l390" class='ln'>390</a></td><td></td></tr>
 <tr name="391" id="391">
-<td><a id="l391" class='ln'>391</a></td><td>  <span class="kw">if</span> (<a id="391c7" class="tk">tmp_0</a> <a id="391c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l391" class='ln'>391</a></td><td>  <span class="ct">/* Sum: '&lt;S90&gt;/Sum2' incorporates:</span></td></tr>
 <tr name="392" id="392">
-<td><a id="l392" class='ln'>392</a></td><td>    <a id="392c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
+<td><a id="l392" class='ln'>392</a></td><td><span class="ct">   *  Product: '&lt;S90&gt;/Divide1'</span></td></tr>
 <tr name="393" id="393">
-<td><a id="l393" class='ln'>393</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l393" class='ln'>393</a></td><td><span class="ct">   *  UnitDelay: '&lt;S90&gt;/UnitDelay'</span></td></tr>
 <tr name="394" id="394">
-<td><a id="l394" class='ln'>394</a></td><td>    <span class="kw">if</span> (<a id="394c9" class="tk">tmp_0</a> <a id="394c15" class="tk">&lt;</a> <a id="394c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l394" class='ln'>394</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="395" id="395">
-<td><a id="l395" class='ln'>395</a></td><td>      <a id="395c7" class="tk">tmp_0</a> = <a id="395c15" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l395" class='ln'>395</a></td><td>  <a id="395c3" class="tk">tmp_0</a> = (<a id="395c12" class="tk">int64_T</a>)(<a id="395c21" class="tk">int32_T</a>)<a id="395c29" class="tk">tmp_0</a> <a id="395c35" class="tk">+</a> <a id="395c37" class="tk">localDW</a>-&gt;<a id="395c46" class="tk">UnitDelay_DSTATE</a>;</td></tr>
 <tr name="396" id="396">
-<td><a id="l396" class='ln'>396</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l396" class='ln'>396</a></td><td>  <span class="kw">if</span> (<a id="396c7" class="tk">tmp_0</a> <a id="396c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="397" id="397">
-<td><a id="l397" class='ln'>397</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l397" class='ln'>397</a></td><td>    <a id="397c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
 <tr name="398" id="398">
-<td><a id="l398" class='ln'>398</a></td><td></td></tr>
+<td><a id="l398" class='ln'>398</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="399" id="399">
-<td><a id="l399" class='ln'>399</a></td><td>  <span class="ct">/* Sum: '&lt;S100&gt;/Sum6' incorporates:</span></td></tr>
+<td><a id="l399" class='ln'>399</a></td><td>    <span class="kw">if</span> (<a id="399c9" class="tk">tmp_0</a> <a id="399c15" class="tk">&lt;</a> <a id="399c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="400" id="400">
-<td><a id="l400" class='ln'>400</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S102&gt;/Data Type Conversion1'</span></td></tr>
+<td><a id="l400" class='ln'>400</a></td><td>      <a id="400c7" class="tk">tmp_0</a> = <a id="400c15" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="401" id="401">
-<td><a id="l401" class='ln'>401</a></td><td><span class="ct">   *  Product: '&lt;S100&gt;/Divide4'</span></td></tr>
+<td><a id="l401" class='ln'>401</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="402" id="402">
-<td><a id="l402" class='ln'>402</a></td><td><span class="ct">   *  Sum: '&lt;S102&gt;/Sum1'</span></td></tr>
+<td><a id="l402" class='ln'>402</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="403" id="403">
-<td><a id="l403" class='ln'>403</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l403" class='ln'>403</a></td><td></td></tr>
 <tr name="404" id="404">
-<td><a id="l404" class='ln'>404</a></td><td>  <a id="404c3" class="tk">tmp</a> = (<a id="404c10" class="tk">int64_T</a>)((<a id="404c20" class="tk">int32_T</a>)<a id="404c28" class="tk">tmp_0</a> <a id="404c34" class="tk">&lt;&lt;</a> 2) <a id="404c40" class="tk">+</a> <a id="404c42" class="tk">rtb_Divide4_n</a>;</td></tr>
+<td><a id="l404" class='ln'>404</a></td><td>  <span class="ct">/* Sum: '&lt;S92&gt;/Sum1' incorporates:</span></td></tr>
 <tr name="405" id="405">
-<td><a id="l405" class='ln'>405</a></td><td>  <span class="kw">if</span> (<a id="405c7" class="tk">tmp</a> <a id="405c11" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l405" class='ln'>405</a></td><td><span class="ct">   *  Delay: '&lt;S92&gt;/Resettable Delay'</span></td></tr>
 <tr name="406" id="406">
-<td><a id="l406" class='ln'>406</a></td><td>    <a id="406c5" class="tk">tmp</a> = 2147483647LL;</td></tr>
+<td><a id="l406" class='ln'>406</a></td><td><span class="ct">   *  Sum: '&lt;S90&gt;/Sum2'</span></td></tr>
 <tr name="407" id="407">
-<td><a id="l407" class='ln'>407</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l407" class='ln'>407</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="408" id="408">
-<td><a id="l408" class='ln'>408</a></td><td>    <span class="kw">if</span> (<a id="408c9" class="tk">tmp</a> <a id="408c13" class="tk">&lt;</a> <a id="408c15" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l408" class='ln'>408</a></td><td>  <a id="408c3" class="tk">tmp_0</a> = (((<a id="408c14" class="tk">int64_T</a>)<a id="408c22" class="tk">localDW</a>-&gt;<a id="408c31" class="tk">ResettableDelay_DSTATE</a> <a id="408c54" class="tk">&lt;&lt;</a> 2) <a id="408c60" class="tk">+</a> (<a id="408c63" class="tk">int32_T</a>)<a id="408c71" class="tk">tmp_0</a>) <a id="408c78" class="tk">&gt;&gt;</a></td></tr>
 <tr name="409" id="409">
-<td><a id="l409" class='ln'>409</a></td><td>      <a id="409c7" class="tk">tmp</a> = <a id="409c13" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l409" class='ln'>409</a></td><td>    2;</td></tr>
 <tr name="410" id="410">
-<td><a id="l410" class='ln'>410</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l410" class='ln'>410</a></td><td>  <span class="kw">if</span> (<a id="410c7" class="tk">tmp_0</a> <a id="410c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="411" id="411">
-<td><a id="l411" class='ln'>411</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l411" class='ln'>411</a></td><td>    <a id="411c5" class="tk">tmp_0</a> = 2147483647LL;</td></tr>
 <tr name="412" id="412">
-<td><a id="l412" class='ln'>412</a></td><td></td></tr>
+<td><a id="l412" class='ln'>412</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="413" id="413">
-<td><a id="l413" class='ln'>413</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S103&gt;/LowerRelop1' incorporates:</span></td></tr>
+<td><a id="l413" class='ln'>413</a></td><td>    <span class="kw">if</span> (<a id="413c9" class="tk">tmp_0</a> <a id="413c15" class="tk">&lt;</a> <a id="413c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="414" id="414">
-<td><a id="l414" class='ln'>414</a></td><td><span class="ct">   *  Switch: '&lt;S103&gt;/Switch2'</span></td></tr>
+<td><a id="l414" class='ln'>414</a></td><td>      <a id="414c7" class="tk">tmp_0</a> = <a id="414c15" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="415" id="415">
-<td><a id="l415" class='ln'>415</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l415" class='ln'>415</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="416" id="416">
-<td><a id="l416" class='ln'>416</a></td><td>  <a id="416c3" class="tk">rty_pi_out_0</a> = <a id="416c18" class="tk">rtu_satMax</a> <a id="416c29" class="tk">&lt;&lt;</a> 9;</td></tr>
+<td><a id="l416" class='ln'>416</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="417" id="417">
 <td><a id="l417" class='ln'>417</a></td><td></td></tr>
 <tr name="418" id="418">
-<td><a id="l418" class='ln'>418</a></td><td>  <span class="ct">/* Switch: '&lt;S103&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l418" class='ln'>418</a></td><td>  <span class="ct">/* Sum: '&lt;S90&gt;/Sum6' incorporates:</span></td></tr>
 <tr name="419" id="419">
-<td><a id="l419" class='ln'>419</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S103&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l419" class='ln'>419</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S92&gt;/Data Type Conversion1'</span></td></tr>
 <tr name="420" id="420">
-<td><a id="l420" class='ln'>420</a></td><td><span class="ct">   *  Sum: '&lt;S100&gt;/Sum6'</span></td></tr>
+<td><a id="l420" class='ln'>420</a></td><td><span class="ct">   *  Product: '&lt;S90&gt;/Divide4'</span></td></tr>
 <tr name="421" id="421">
-<td><a id="l421" class='ln'>421</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l421" class='ln'>421</a></td><td><span class="ct">   *  Sum: '&lt;S92&gt;/Sum1'</span></td></tr>
 <tr name="422" id="422">
-<td><a id="l422" class='ln'>422</a></td><td>  <span class="kw">if</span> ((<a id="422c8" class="tk">int32_T</a>)<a id="422c16" class="tk">tmp</a> <a id="422c20" class="tk">&lt;=</a> <a id="422c23" class="tk">rty_pi_out_0</a>) <span class="br">{</span></td></tr>
+<td><a id="l422" class='ln'>422</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="423" id="423">
-<td><a id="l423" class='ln'>423</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S103&gt;/UpperRelop' incorporates:</span></td></tr>
+<td><a id="l423" class='ln'>423</a></td><td>  <a id="423c3" class="tk">tmp</a> = (<a id="423c10" class="tk">int64_T</a>)((<a id="423c20" class="tk">int32_T</a>)<a id="423c28" class="tk">tmp_0</a> <a id="423c34" class="tk">&lt;&lt;</a> 2) <a id="423c40" class="tk">+</a> <a id="423c42" class="tk">rtb_Divide4_px</a>;</td></tr>
 <tr name="424" id="424">
-<td><a id="l424" class='ln'>424</a></td><td><span class="ct">     *  Switch: '&lt;S103&gt;/Switch'</span></td></tr>
+<td><a id="l424" class='ln'>424</a></td><td>  <span class="kw">if</span> (<a id="424c7" class="tk">tmp</a> <a id="424c11" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="425" id="425">
-<td><a id="l425" class='ln'>425</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l425" class='ln'>425</a></td><td>    <a id="425c5" class="tk">tmp</a> = 2147483647LL;</td></tr>
 <tr name="426" id="426">
-<td><a id="l426" class='ln'>426</a></td><td>    <a id="426c5" class="tk">rty_pi_out_0</a> = <a id="426c20" class="tk">rtu_satMin</a> <a id="426c31" class="tk">&lt;&lt;</a> 9;</td></tr>
+<td><a id="l426" class='ln'>426</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="427" id="427">
-<td><a id="l427" class='ln'>427</a></td><td></td></tr>
+<td><a id="l427" class='ln'>427</a></td><td>    <span class="kw">if</span> (<a id="427c9" class="tk">tmp</a> <a id="427c13" class="tk">&lt;</a> <a id="427c15" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="428" id="428">
-<td><a id="l428" class='ln'>428</a></td><td>    <span class="ct">/* Switch: '&lt;S103&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l428" class='ln'>428</a></td><td>      <a id="428c7" class="tk">tmp</a> = <a id="428c13" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="429" id="429">
-<td><a id="l429" class='ln'>429</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S103&gt;/UpperRelop'</span></td></tr>
+<td><a id="l429" class='ln'>429</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="430" id="430">
-<td><a id="l430" class='ln'>430</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l430" class='ln'>430</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="431" id="431">
-<td><a id="l431" class='ln'>431</a></td><td>    <span class="kw">if</span> ((<a id="431c10" class="tk">int32_T</a>)<a id="431c18" class="tk">tmp</a> <a id="431c22" class="tk">&gt;=</a> <a id="431c25" class="tk">rty_pi_out_0</a>) <span class="br">{</span></td></tr>
+<td><a id="l431" class='ln'>431</a></td><td></td></tr>
 <tr name="432" id="432">
-<td><a id="l432" class='ln'>432</a></td><td>      <a id="432c7" class="tk">rty_pi_out_0</a> = (<a id="432c23" class="tk">int32_T</a>)<a id="432c31" class="tk">tmp</a>;</td></tr>
+<td><a id="l432" class='ln'>432</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S93&gt;/LowerRelop1' incorporates:</span></td></tr>
 <tr name="433" id="433">
-<td><a id="l433" class='ln'>433</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l433" class='ln'>433</a></td><td><span class="ct">   *  Switch: '&lt;S93&gt;/Switch2'</span></td></tr>
 <tr name="434" id="434">
-<td><a id="l434" class='ln'>434</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l434" class='ln'>434</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="435" id="435">
-<td><a id="l435" class='ln'>435</a></td><td></td></tr>
+<td><a id="l435" class='ln'>435</a></td><td>  <a id="435c3" class="tk">rty_pi_out_0</a> = <a id="435c18" class="tk">rtu_satMax</a> <a id="435c29" class="tk">&lt;&lt;</a> 9;</td></tr>
 <tr name="436" id="436">
-<td><a id="l436" class='ln'>436</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S100&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l436" class='ln'>436</a></td><td></td></tr>
 <tr name="437" id="437">
-<td><a id="l437" class='ln'>437</a></td><td><span class="ct">   *  Product: '&lt;S100&gt;/Divide2'</span></td></tr>
+<td><a id="l437" class='ln'>437</a></td><td>  <span class="ct">/* Switch: '&lt;S93&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="438" id="438">
-<td><a id="l438" class='ln'>438</a></td><td><span class="ct">   *  Sum: '&lt;S100&gt;/Sum3'</span></td></tr>
+<td><a id="l438" class='ln'>438</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S93&gt;/LowerRelop1'</span></td></tr>
 <tr name="439" id="439">
-<td><a id="l439" class='ln'>439</a></td><td><span class="ct">   *  Sum: '&lt;S100&gt;/Sum6'</span></td></tr>
+<td><a id="l439" class='ln'>439</a></td><td><span class="ct">   *  Sum: '&lt;S90&gt;/Sum6'</span></td></tr>
 <tr name="440" id="440">
 <td><a id="l440" class='ln'>440</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="441" id="441">
-<td><a id="l441" class='ln'>441</a></td><td>  <a id="441c3" class="tk">localDW</a>-&gt;<a id="441c12" class="tk">UnitDelay_DSTATE</a> = (<a id="441c32" class="tk">int32_T</a>)(((<a id="441c43" class="tk">int64_T</a>)(<a id="441c52" class="tk">rty_pi_out_0</a> <a id="441c65" class="tk">-</a> (<a id="441c68" class="tk">int32_T</a>)<a id="441c76" class="tk">tmp</a>) <a id="441c81" class="tk">*</a></td></tr>
+<td><a id="l441" class='ln'>441</a></td><td>  <span class="kw">if</span> ((<a id="441c8" class="tk">int32_T</a>)<a id="441c16" class="tk">tmp</a> <a id="441c20" class="tk">&lt;=</a> <a id="441c23" class="tk">rty_pi_out_0</a>) <span class="br">{</span></td></tr>
 <tr name="442" id="442">
-<td><a id="l442" class='ln'>442</a></td><td>    <a id="442c5" class="tk">rtu_Kb</a>) <a id="442c13" class="tk">&gt;&gt;</a> 14);</td></tr>
+<td><a id="l442" class='ln'>442</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S93&gt;/UpperRelop' incorporates:</span></td></tr>
 <tr name="443" id="443">
-<td><a id="l443" class='ln'>443</a></td><td></td></tr>
+<td><a id="l443" class='ln'>443</a></td><td><span class="ct">     *  Switch: '&lt;S93&gt;/Switch'</span></td></tr>
 <tr name="444" id="444">
-<td><a id="l444" class='ln'>444</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S102&gt;/Resettable Delay' incorporates:</span></td></tr>
+<td><a id="l444" class='ln'>444</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="445" id="445">
-<td><a id="l445" class='ln'>445</a></td><td><span class="ct">   *  Sum: '&lt;S102&gt;/Sum1'</span></td></tr>
+<td><a id="l445" class='ln'>445</a></td><td>    <a id="445c5" class="tk">rty_pi_out_0</a> = <a id="445c20" class="tk">rtu_satMin</a> <a id="445c31" class="tk">&lt;&lt;</a> 9;</td></tr>
 <tr name="446" id="446">
-<td><a id="l446" class='ln'>446</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l446" class='ln'>446</a></td><td></td></tr>
 <tr name="447" id="447">
-<td><a id="l447" class='ln'>447</a></td><td>  <a id="447c3" class="tk">localDW</a>-&gt;<a id="447c12" class="tk">icLoad</a> = 0U;</td></tr>
+<td><a id="l447" class='ln'>447</a></td><td>    <span class="ct">/* Switch: '&lt;S93&gt;/Switch' incorporates:</span></td></tr>
 <tr name="448" id="448">
-<td><a id="l448" class='ln'>448</a></td><td>  <a id="448c3" class="tk">localDW</a>-&gt;<a id="448c12" class="tk">ResettableDelay_DSTATE</a> = (<a id="448c38" class="tk">int32_T</a>)<a id="448c46" class="tk">tmp_0</a>;</td></tr>
+<td><a id="l448" class='ln'>448</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S93&gt;/UpperRelop'</span></td></tr>
 <tr name="449" id="449">
-<td><a id="l449" class='ln'>449</a></td><td>  <span class="kw">return</span> <a id="449c10" class="tk">rty_pi_out_0</a>;</td></tr>
+<td><a id="l449" class='ln'>449</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="450" id="450">
-<td><a id="l450" class='ln'>450</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l450" class='ln'>450</a></td><td>    <span class="kw">if</span> ((<a id="450c10" class="tk">int32_T</a>)<a id="450c18" class="tk">tmp</a> <a id="450c22" class="tk">&gt;=</a> <a id="450c25" class="tk">rty_pi_out_0</a>) <span class="br">{</span></td></tr>
 <tr name="451" id="451">
-<td><a id="l451" class='ln'>451</a></td><td></td></tr>
+<td><a id="l451" class='ln'>451</a></td><td>      <a id="451c7" class="tk">rty_pi_out_0</a> = (<a id="451c23" class="tk">int32_T</a>)<a id="451c31" class="tk">tmp</a>;</td></tr>
 <tr name="452" id="452">
-<td><a id="l452" class='ln'>452</a></td><td><span class="ct">/*</span></td></tr>
+<td><a id="l452" class='ln'>452</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="453" id="453">
-<td><a id="l453" class='ln'>453</a></td><td><span class="ct"> * Output and update for action system:</span></td></tr>
+<td><a id="l453" class='ln'>453</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="454" id="454">
-<td><a id="l454" class='ln'>454</a></td><td><span class="ct"> *    '&lt;S108&gt;/RateInit'</span></td></tr>
+<td><a id="l454" class='ln'>454</a></td><td></td></tr>
 <tr name="455" id="455">
-<td><a id="l455" class='ln'>455</a></td><td><span class="ct"> *    '&lt;S115&gt;/RateInit'</span></td></tr>
+<td><a id="l455" class='ln'>455</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S90&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="456" id="456">
-<td><a id="l456" class='ln'>456</a></td><td><span class="ct"> */</span></td></tr>
+<td><a id="l456" class='ln'>456</a></td><td><span class="ct">   *  Product: '&lt;S90&gt;/Divide2'</span></td></tr>
 <tr name="457" id="457">
-<td><a id="l457" class='ln'>457</a></td><td><span class="kw">void</span> <a id="457c6" class="tk">RateInit</a>(<a id="457c15" class="tk">int16_T</a> <a id="457c23" class="tk">rtu_initVal</a>, <a id="457c36" class="tk">int16_T</a> <a id="457c44" class="tk">rtu_target</a>, <a id="457c56" class="tk">int16_T</a> <a id="457c64" class="tk">rtu_step</a>, <a id="457c74" class="tk">int16_T</a></td></tr>
+<td><a id="l457" class='ln'>457</a></td><td><span class="ct">   *  Sum: '&lt;S90&gt;/Sum3'</span></td></tr>
 <tr name="458" id="458">
-<td><a id="l458" class='ln'>458</a></td><td>              <a id="458c15" class="tk">*</a><a id="458c16" class="tk">rty_s_step</a>, <a id="458c28" class="tk">int16_T</a> <a id="458c36" class="tk">*</a><a id="458c37" class="tk">rty_High</a>, <a id="458c47" class="tk">int16_T</a> <a id="458c55" class="tk">*</a><a id="458c56" class="tk">rty_Low</a>)</td></tr>
+<td><a id="l458" class='ln'>458</a></td><td><span class="ct">   *  Sum: '&lt;S90&gt;/Sum6'</span></td></tr>
 <tr name="459" id="459">
-<td><a id="l459" class='ln'>459</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l459" class='ln'>459</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="460" id="460">
-<td><a id="l460" class='ln'>460</a></td><td>  <a id="460c3" class="tk">int16_T</a> <a id="460c11" class="tk">rtb_Add_b</a>;</td></tr>
+<td><a id="l460" class='ln'>460</a></td><td>  <a id="460c3" class="tk">localDW</a>-&gt;<a id="460c12" class="tk">UnitDelay_DSTATE</a> = (<a id="460c32" class="tk">int32_T</a>)(((<a id="460c43" class="tk">int64_T</a>)(<a id="460c52" class="tk">rty_pi_out_0</a> <a id="460c65" class="tk">-</a> (<a id="460c68" class="tk">int32_T</a>)<a id="460c76" class="tk">tmp</a>) <a id="460c81" class="tk">*</a></td></tr>
 <tr name="461" id="461">
-<td><a id="l461" class='ln'>461</a></td><td></td></tr>
+<td><a id="l461" class='ln'>461</a></td><td>    <a id="461c5" class="tk">rtu_Kb</a>) <a id="461c13" class="tk">&gt;&gt;</a> 14);</td></tr>
 <tr name="462" id="462">
-<td><a id="l462" class='ln'>462</a></td><td>  <span class="ct">/* Sum: '&lt;S109&gt;/Add' */</span></td></tr>
+<td><a id="l462" class='ln'>462</a></td><td></td></tr>
 <tr name="463" id="463">
-<td><a id="l463" class='ln'>463</a></td><td>  <a id="463c3" class="tk">rtb_Add_b</a> = (<a id="463c16" class="tk">int16_T</a>)((<a id="463c26" class="tk">rtu_target</a> <a id="463c37" class="tk">-</a> <a id="463c39" class="tk">rtu_initVal</a>) <a id="463c52" class="tk">&gt;&gt;</a> 1);</td></tr>
+<td><a id="l463" class='ln'>463</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S92&gt;/Resettable Delay' incorporates:</span></td></tr>
 <tr name="464" id="464">
-<td><a id="l464" class='ln'>464</a></td><td></td></tr>
+<td><a id="l464" class='ln'>464</a></td><td><span class="ct">   *  Sum: '&lt;S92&gt;/Sum1'</span></td></tr>
 <tr name="465" id="465">
-<td><a id="l465" class='ln'>465</a></td><td>  <span class="ct">/* Signum: '&lt;S109&gt;/Sign' incorporates:</span></td></tr>
+<td><a id="l465" class='ln'>465</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="466" id="466">
-<td><a id="l466" class='ln'>466</a></td><td><span class="ct">   *  Sum: '&lt;S109&gt;/Add'</span></td></tr>
+<td><a id="l466" class='ln'>466</a></td><td>  <a id="466c3" class="tk">localDW</a>-&gt;<a id="466c12" class="tk">icLoad</a> = 0U;</td></tr>
 <tr name="467" id="467">
-<td><a id="l467" class='ln'>467</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l467" class='ln'>467</a></td><td>  <a id="467c3" class="tk">localDW</a>-&gt;<a id="467c12" class="tk">ResettableDelay_DSTATE</a> = (<a id="467c38" class="tk">int32_T</a>)<a id="467c46" class="tk">tmp_0</a>;</td></tr>
 <tr name="468" id="468">
-<td><a id="l468" class='ln'>468</a></td><td>  <span class="kw">if</span> (<a id="468c7" class="tk">rtb_Add_b</a> <a id="468c17" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l468" class='ln'>468</a></td><td>  <span class="kw">return</span> <a id="468c10" class="tk">rty_pi_out_0</a>;</td></tr>
 <tr name="469" id="469">
-<td><a id="l469" class='ln'>469</a></td><td>    <a id="469c5" class="tk">rtb_Add_b</a> = <a id="469c17" class="tk">-</a>1;</td></tr>
+<td><a id="l469" class='ln'>469</a></td><td><span class="br">}</span></td></tr>
 <tr name="470" id="470">
-<td><a id="l470" class='ln'>470</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l470" class='ln'>470</a></td><td></td></tr>
 <tr name="471" id="471">
-<td><a id="l471" class='ln'>471</a></td><td>    <a id="471c5" class="tk">rtb_Add_b</a> = (<a id="471c18" class="tk">int16_T</a>)(<a id="471c27" class="tk">rtb_Add_b</a> <a id="471c37" class="tk">&gt;</a> 0);</td></tr>
+<td><a id="l471" class='ln'>471</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="472" id="472">
-<td><a id="l472" class='ln'>472</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l472" class='ln'>472</a></td><td><span class="ct"> * Output and update for action system:</span></td></tr>
 <tr name="473" id="473">
-<td><a id="l473" class='ln'>473</a></td><td></td></tr>
+<td><a id="l473" class='ln'>473</a></td><td><span class="ct"> *    '&lt;S98&gt;/RateInit'</span></td></tr>
 <tr name="474" id="474">
-<td><a id="l474" class='ln'>474</a></td><td>  <span class="ct">/* End of Signum: '&lt;S109&gt;/Sign' */</span></td></tr>
+<td><a id="l474" class='ln'>474</a></td><td><span class="ct"> *    '&lt;S105&gt;/RateInit'</span></td></tr>
 <tr name="475" id="475">
-<td><a id="l475" class='ln'>475</a></td><td></td></tr>
+<td><a id="l475" class='ln'>475</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="476" id="476">
-<td><a id="l476" class='ln'>476</a></td><td>  <span class="ct">/* Product: '&lt;S109&gt;/Divide' */</span></td></tr>
+<td><a id="l476" class='ln'>476</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="476c13" class="tk">RateInit</a>(<a id="476c22" class="tk">int16_T</a> <a id="476c30" class="tk">rtu_initVal</a>, <a id="476c43" class="tk">int16_T</a> <a id="476c51" class="tk">rtu_target</a>, <a id="476c63" class="tk">int16_T</a> <a id="476c71" class="tk">rtu_step</a>,</td></tr>
 <tr name="477" id="477">
-<td><a id="l477" class='ln'>477</a></td><td>  <a id="477c3" class="tk">*</a><a id="477c4" class="tk">rty_s_step</a> = (<a id="477c18" class="tk">int16_T</a>)(<a id="477c27" class="tk">rtu_step</a> <a id="477c36" class="tk">*</a> <a id="477c38" class="tk">rtb_Add_b</a>);</td></tr>
+<td><a id="l477" class='ln'>477</a></td><td>                     <a id="477c22" class="tk">int16_T</a> <a id="477c30" class="tk">*</a><a id="477c31" class="tk">rty_s_step</a>, <a id="477c43" class="tk">int16_T</a> <a id="477c51" class="tk">*</a><a id="477c52" class="tk">rty_High</a>, <a id="477c62" class="tk">int16_T</a> <a id="477c70" class="tk">*</a><a id="477c71" class="tk">rty_Low</a>)</td></tr>
 <tr name="478" id="478">
-<td><a id="l478" class='ln'>478</a></td><td></td></tr>
+<td><a id="l478" class='ln'>478</a></td><td><span class="br">{</span></td></tr>
 <tr name="479" id="479">
-<td><a id="l479" class='ln'>479</a></td><td>  <span class="ct">/* MinMax: '&lt;S109&gt;/Max' */</span></td></tr>
+<td><a id="l479" class='ln'>479</a></td><td>  <a id="479c3" class="tk">int16_T</a> <a id="479c11" class="tk">rtb_Add_c</a>;</td></tr>
 <tr name="480" id="480">
-<td><a id="l480" class='ln'>480</a></td><td>  <span class="kw">if</span> (<a id="480c7" class="tk">rtu_target</a> <a id="480c18" class="tk">&gt;</a> <a id="480c20" class="tk">rtu_initVal</a>) <span class="br">{</span></td></tr>
+<td><a id="l480" class='ln'>480</a></td><td></td></tr>
 <tr name="481" id="481">
-<td><a id="l481" class='ln'>481</a></td><td>    <a id="481c5" class="tk">*</a><a id="481c6" class="tk">rty_High</a> = <a id="481c17" class="tk">rtu_target</a>;</td></tr>
+<td><a id="l481" class='ln'>481</a></td><td>  <span class="ct">/* Sum: '&lt;S99&gt;/Add' */</span></td></tr>
 <tr name="482" id="482">
-<td><a id="l482" class='ln'>482</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l482" class='ln'>482</a></td><td>  <a id="482c3" class="tk">rtb_Add_c</a> = (<a id="482c16" class="tk">int16_T</a>)((<a id="482c26" class="tk">rtu_target</a> <a id="482c37" class="tk">-</a> <a id="482c39" class="tk">rtu_initVal</a>) <a id="482c52" class="tk">&gt;&gt;</a> 1);</td></tr>
 <tr name="483" id="483">
-<td><a id="l483" class='ln'>483</a></td><td>    <a id="483c5" class="tk">*</a><a id="483c6" class="tk">rty_High</a> = <a id="483c17" class="tk">rtu_initVal</a>;</td></tr>
+<td><a id="l483" class='ln'>483</a></td><td></td></tr>
 <tr name="484" id="484">
-<td><a id="l484" class='ln'>484</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l484" class='ln'>484</a></td><td>  <span class="ct">/* Signum: '&lt;S99&gt;/Sign' incorporates:</span></td></tr>
 <tr name="485" id="485">
-<td><a id="l485" class='ln'>485</a></td><td></td></tr>
+<td><a id="l485" class='ln'>485</a></td><td><span class="ct">   *  Sum: '&lt;S99&gt;/Add'</span></td></tr>
 <tr name="486" id="486">
-<td><a id="l486" class='ln'>486</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S109&gt;/Max' */</span></td></tr>
+<td><a id="l486" class='ln'>486</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="487" id="487">
-<td><a id="l487" class='ln'>487</a></td><td></td></tr>
+<td><a id="l487" class='ln'>487</a></td><td>  <span class="kw">if</span> (<a id="487c7" class="tk">rtb_Add_c</a> <a id="487c17" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="488" id="488">
-<td><a id="l488" class='ln'>488</a></td><td>  <span class="ct">/* MinMax: '&lt;S109&gt;/Max1' */</span></td></tr>
+<td><a id="l488" class='ln'>488</a></td><td>    <a id="488c5" class="tk">rtb_Add_c</a> = <a id="488c17" class="tk">-</a>1;</td></tr>
 <tr name="489" id="489">
-<td><a id="l489" class='ln'>489</a></td><td>  <span class="kw">if</span> (<a id="489c7" class="tk">rtu_initVal</a> <a id="489c19" class="tk">&lt;</a> <a id="489c21" class="tk">rtu_target</a>) <span class="br">{</span></td></tr>
+<td><a id="l489" class='ln'>489</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="490" id="490">
-<td><a id="l490" class='ln'>490</a></td><td>    <a id="490c5" class="tk">*</a><a id="490c6" class="tk">rty_Low</a> = <a id="490c16" class="tk">rtu_initVal</a>;</td></tr>
+<td><a id="l490" class='ln'>490</a></td><td>    <a id="490c5" class="tk">rtb_Add_c</a> = (<a id="490c18" class="tk">int16_T</a>)(<a id="490c27" class="tk">rtb_Add_c</a> <a id="490c37" class="tk">&gt;</a> 0);</td></tr>
 <tr name="491" id="491">
-<td><a id="l491" class='ln'>491</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l491" class='ln'>491</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="492" id="492">
-<td><a id="l492" class='ln'>492</a></td><td>    <a id="492c5" class="tk">*</a><a id="492c6" class="tk">rty_Low</a> = <a id="492c16" class="tk">rtu_target</a>;</td></tr>
+<td><a id="l492" class='ln'>492</a></td><td></td></tr>
 <tr name="493" id="493">
-<td><a id="l493" class='ln'>493</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l493" class='ln'>493</a></td><td>  <span class="ct">/* End of Signum: '&lt;S99&gt;/Sign' */</span></td></tr>
 <tr name="494" id="494">
 <td><a id="l494" class='ln'>494</a></td><td></td></tr>
 <tr name="495" id="495">
-<td><a id="l495" class='ln'>495</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S109&gt;/Max1' */</span></td></tr>
+<td><a id="l495" class='ln'>495</a></td><td>  <span class="ct">/* Product: '&lt;S99&gt;/Divide' */</span></td></tr>
 <tr name="496" id="496">
-<td><a id="l496" class='ln'>496</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l496" class='ln'>496</a></td><td>  <a id="496c3" class="tk">*</a><a id="496c4" class="tk">rty_s_step</a> = (<a id="496c18" class="tk">int16_T</a>)(<a id="496c27" class="tk">rtu_step</a> <a id="496c36" class="tk">*</a> <a id="496c38" class="tk">rtb_Add_c</a>);</td></tr>
 <tr name="497" id="497">
 <td><a id="l497" class='ln'>497</a></td><td></td></tr>
 <tr name="498" id="498">
-<td><a id="l498" class='ln'>498</a></td><td><a id="498c1" class="tk">int16_T</a> <a id="498c9" class="tk">rt_sqrt_Us32En6_Ys16En_1bhh77n4</a>(<a id="498c41" class="tk">int32_T</a> <a id="498c49" class="tk">u</a>)</td></tr>
+<td><a id="l498" class='ln'>498</a></td><td>  <span class="ct">/* MinMax: '&lt;S99&gt;/Max' */</span></td></tr>
 <tr name="499" id="499">
-<td><a id="l499" class='ln'>499</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l499" class='ln'>499</a></td><td>  <span class="kw">if</span> (<a id="499c7" class="tk">rtu_target</a> <a id="499c18" class="tk">&gt;</a> <a id="499c20" class="tk">rtu_initVal</a>) <span class="br">{</span></td></tr>
 <tr name="500" id="500">
-<td><a id="l500" class='ln'>500</a></td><td>  <a id="500c3" class="tk">int64_T</a> <a id="500c11" class="tk">tmp03_u</a>;</td></tr>
+<td><a id="l500" class='ln'>500</a></td><td>    <a id="500c5" class="tk">*</a><a id="500c6" class="tk">rty_High</a> = <a id="500c17" class="tk">rtu_target</a>;</td></tr>
 <tr name="501" id="501">
-<td><a id="l501" class='ln'>501</a></td><td>  <a id="501c3" class="tk">int32_T</a> <a id="501c11" class="tk">iBit</a>;</td></tr>
+<td><a id="l501" class='ln'>501</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="502" id="502">
-<td><a id="l502" class='ln'>502</a></td><td>  <a id="502c3" class="tk">int16_T</a> <a id="502c11" class="tk">shiftMask</a>;</td></tr>
+<td><a id="l502" class='ln'>502</a></td><td>    <a id="502c5" class="tk">*</a><a id="502c6" class="tk">rty_High</a> = <a id="502c17" class="tk">rtu_initVal</a>;</td></tr>
 <tr name="503" id="503">
-<td><a id="l503" class='ln'>503</a></td><td>  <a id="503c3" class="tk">int16_T</a> <a id="503c11" class="tk">tmp01_y</a>;</td></tr>
+<td><a id="l503" class='ln'>503</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="504" id="504">
-<td><a id="l504" class='ln'>504</a></td><td>  <a id="504c3" class="tk">int16_T</a> <a id="504c11" class="tk">y</a>;</td></tr>
+<td><a id="l504" class='ln'>504</a></td><td></td></tr>
 <tr name="505" id="505">
-<td><a id="l505" class='ln'>505</a></td><td></td></tr>
+<td><a id="l505" class='ln'>505</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S99&gt;/Max' */</span></td></tr>
 <tr name="506" id="506">
-<td><a id="l506" class='ln'>506</a></td><td>  <span class="ct">/* Fixed-Point Sqrt Computation by the bisection method. */</span></td></tr>
+<td><a id="l506" class='ln'>506</a></td><td></td></tr>
 <tr name="507" id="507">
-<td><a id="l507" class='ln'>507</a></td><td>  <span class="kw">if</span> (<a id="507c7" class="tk">u</a> <a id="507c9" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l507" class='ln'>507</a></td><td>  <span class="ct">/* MinMax: '&lt;S99&gt;/Max1' */</span></td></tr>
 <tr name="508" id="508">
-<td><a id="l508" class='ln'>508</a></td><td>    <a id="508c5" class="tk">y</a> = 0;</td></tr>
+<td><a id="l508" class='ln'>508</a></td><td>  <span class="kw">if</span> (<a id="508c7" class="tk">rtu_initVal</a> <a id="508c19" class="tk">&lt;</a> <a id="508c21" class="tk">rtu_target</a>) <span class="br">{</span></td></tr>
 <tr name="509" id="509">
-<td><a id="l509" class='ln'>509</a></td><td>    <a id="509c5" class="tk">shiftMask</a> = 16384;</td></tr>
+<td><a id="l509" class='ln'>509</a></td><td>    <a id="509c5" class="tk">*</a><a id="509c6" class="tk">rty_Low</a> = <a id="509c16" class="tk">rtu_initVal</a>;</td></tr>
 <tr name="510" id="510">
-<td><a id="l510" class='ln'>510</a></td><td>    <a id="510c5" class="tk">tmp03_u</a> = (<a id="510c16" class="tk">int64_T</a>)<a id="510c24" class="tk">u</a> <a id="510c26" class="tk">&lt;&lt;</a> 4;</td></tr>
+<td><a id="l510" class='ln'>510</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="511" id="511">
-<td><a id="l511" class='ln'>511</a></td><td>    <span class="kw">for</span> (<a id="511c10" class="tk">iBit</a> = 0; <a id="511c20" class="tk">iBit</a> <a id="511c25" class="tk">&lt;</a> 15; <a id="511c31" class="tk">iBit</a><a id="511c35" class="tk">++</a>) <span class="br">{</span></td></tr>
+<td><a id="l511" class='ln'>511</a></td><td>    <a id="511c5" class="tk">*</a><a id="511c6" class="tk">rty_Low</a> = <a id="511c16" class="tk">rtu_target</a>;</td></tr>
 <tr name="512" id="512">
-<td><a id="l512" class='ln'>512</a></td><td>      <a id="512c7" class="tk">tmp01_y</a> = (<a id="512c18" class="tk">int16_T</a>)(<a id="512c27" class="tk">y</a> <a id="512c29" class="tk">|</a> <a id="512c31" class="tk">shiftMask</a>);</td></tr>
+<td><a id="l512" class='ln'>512</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="513" id="513">
-<td><a id="l513" class='ln'>513</a></td><td>      <span class="kw">if</span> (<a id="513c11" class="tk">tmp01_y</a> <a id="513c19" class="tk">*</a> <a id="513c21" class="tk">tmp01_y</a> <a id="513c29" class="tk">&lt;=</a> <a id="513c32" class="tk">tmp03_u</a>) <span class="br">{</span></td></tr>
+<td><a id="l513" class='ln'>513</a></td><td></td></tr>
 <tr name="514" id="514">
-<td><a id="l514" class='ln'>514</a></td><td>        <a id="514c9" class="tk">y</a> = <a id="514c13" class="tk">tmp01_y</a>;</td></tr>
+<td><a id="l514" class='ln'>514</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S99&gt;/Max1' */</span></td></tr>
 <tr name="515" id="515">
-<td><a id="l515" class='ln'>515</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l515" class='ln'>515</a></td><td><span class="br">}</span></td></tr>
 <tr name="516" id="516">
 <td><a id="l516" class='ln'>516</a></td><td></td></tr>
 <tr name="517" id="517">
-<td><a id="l517" class='ln'>517</a></td><td>      <a id="517c7" class="tk">shiftMask</a> = (<a id="517c20" class="tk">int16_T</a>)((<a id="517c30" class="tk">uint32_T</a>)<a id="517c39" class="tk">shiftMask</a> <a id="517c49" class="tk">&gt;&gt;</a> 1U);</td></tr>
+<td><a id="l517" class='ln'>517</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="518" id="518">
-<td><a id="l518" class='ln'>518</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l518" class='ln'>518</a></td><td><span class="ct"> * Output and update for action system:</span></td></tr>
 <tr name="519" id="519">
-<td><a id="l519" class='ln'>519</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l519" class='ln'>519</a></td><td><span class="ct"> *    '&lt;S113&gt;/RateInit'</span></td></tr>
 <tr name="520" id="520">
-<td><a id="l520" class='ln'>520</a></td><td>    <a id="520c5" class="tk">y</a> = 0;</td></tr>
+<td><a id="l520" class='ln'>520</a></td><td><span class="ct"> *    '&lt;S115&gt;/RateInit'</span></td></tr>
 <tr name="521" id="521">
-<td><a id="l521" class='ln'>521</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l521" class='ln'>521</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="522" id="522">
-<td><a id="l522" class='ln'>522</a></td><td></td></tr>
+<td><a id="l522" class='ln'>522</a></td><td><span class="kw">static</span> <span class="kw">void</span> <a id="522c13" class="tk">RateInit_a</a>(<a id="522c24" class="tk">int16_T</a> <a id="522c32" class="tk">rtu_initVal</a>, <a id="522c45" class="tk">int16_T</a> <a id="522c53" class="tk">rtu_target</a>, <a id="522c65" class="tk">int16_T</a> <a id="522c73" class="tk">rtu_step</a>,</td></tr>
 <tr name="523" id="523">
-<td><a id="l523" class='ln'>523</a></td><td>  <span class="kw">return</span> <a id="523c10" class="tk">y</a>;</td></tr>
+<td><a id="l523" class='ln'>523</a></td><td>  <a id="523c3" class="tk">int16_T</a> <a id="523c11" class="tk">*</a><a id="523c12" class="tk">rty_s_step</a>, <a id="523c24" class="tk">int16_T</a> <a id="523c32" class="tk">*</a><a id="523c33" class="tk">rty_High</a>, <a id="523c43" class="tk">int16_T</a> <a id="523c51" class="tk">*</a><a id="523c52" class="tk">rty_Low</a>)</td></tr>
 <tr name="524" id="524">
-<td><a id="l524" class='ln'>524</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l524" class='ln'>524</a></td><td><span class="br">{</span></td></tr>
 <tr name="525" id="525">
-<td><a id="l525" class='ln'>525</a></td><td></td></tr>
+<td><a id="l525" class='ln'>525</a></td><td>  <a id="525c3" class="tk">int16_T</a> <a id="525c11" class="tk">rtb_Add_pn</a>;</td></tr>
 <tr name="526" id="526">
-<td><a id="l526" class='ln'>526</a></td><td><a id="526c1" class="tk">int16_T</a> <a id="526c9" class="tk">rt_sqrt_Us32En10_Ys16E_7VJYwqF9</a>(<a id="526c41" class="tk">int32_T</a> <a id="526c49" class="tk">u</a>)</td></tr>
+<td><a id="l526" class='ln'>526</a></td><td></td></tr>
 <tr name="527" id="527">
-<td><a id="l527" class='ln'>527</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l527" class='ln'>527</a></td><td>  <span class="ct">/* Sum: '&lt;S116&gt;/Add' */</span></td></tr>
 <tr name="528" id="528">
-<td><a id="l528" class='ln'>528</a></td><td>  <a id="528c3" class="tk">int32_T</a> <a id="528c11" class="tk">iBit</a>;</td></tr>
+<td><a id="l528" class='ln'>528</a></td><td>  <a id="528c3" class="tk">rtb_Add_pn</a> = (<a id="528c17" class="tk">int16_T</a>)((<a id="528c27" class="tk">rtu_target</a> <a id="528c38" class="tk">-</a> <a id="528c40" class="tk">rtu_initVal</a>) <a id="528c53" class="tk">&gt;&gt;</a> 1);</td></tr>
 <tr name="529" id="529">
-<td><a id="l529" class='ln'>529</a></td><td>  <a id="529c3" class="tk">int16_T</a> <a id="529c11" class="tk">shiftMask</a>;</td></tr>
+<td><a id="l529" class='ln'>529</a></td><td></td></tr>
 <tr name="530" id="530">
-<td><a id="l530" class='ln'>530</a></td><td>  <a id="530c3" class="tk">int16_T</a> <a id="530c11" class="tk">tmp01_y</a>;</td></tr>
+<td><a id="l530" class='ln'>530</a></td><td>  <span class="ct">/* Signum: '&lt;S116&gt;/Sign' incorporates:</span></td></tr>
 <tr name="531" id="531">
-<td><a id="l531" class='ln'>531</a></td><td>  <a id="531c3" class="tk">int16_T</a> <a id="531c11" class="tk">y</a>;</td></tr>
+<td><a id="l531" class='ln'>531</a></td><td><span class="ct">   *  Sum: '&lt;S116&gt;/Add'</span></td></tr>
 <tr name="532" id="532">
-<td><a id="l532" class='ln'>532</a></td><td></td></tr>
+<td><a id="l532" class='ln'>532</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="533" id="533">
-<td><a id="l533" class='ln'>533</a></td><td>  <span class="ct">/* Fixed-Point Sqrt Computation by the bisection method. */</span></td></tr>
+<td><a id="l533" class='ln'>533</a></td><td>  <span class="kw">if</span> (<a id="533c7" class="tk">rtb_Add_pn</a> <a id="533c18" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="534" id="534">
-<td><a id="l534" class='ln'>534</a></td><td>  <span class="kw">if</span> (<a id="534c7" class="tk">u</a> <a id="534c9" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l534" class='ln'>534</a></td><td>    <a id="534c5" class="tk">rtb_Add_pn</a> = <a id="534c18" class="tk">-</a>1;</td></tr>
 <tr name="535" id="535">
-<td><a id="l535" class='ln'>535</a></td><td>    <a id="535c5" class="tk">y</a> = 0;</td></tr>
+<td><a id="l535" class='ln'>535</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="536" id="536">
-<td><a id="l536" class='ln'>536</a></td><td>    <a id="536c5" class="tk">shiftMask</a> = 16384;</td></tr>
+<td><a id="l536" class='ln'>536</a></td><td>    <a id="536c5" class="tk">rtb_Add_pn</a> = (<a id="536c19" class="tk">int16_T</a>)(<a id="536c28" class="tk">rtb_Add_pn</a> <a id="536c39" class="tk">&gt;</a> 0);</td></tr>
 <tr name="537" id="537">
-<td><a id="l537" class='ln'>537</a></td><td>    <span class="kw">for</span> (<a id="537c10" class="tk">iBit</a> = 0; <a id="537c20" class="tk">iBit</a> <a id="537c25" class="tk">&lt;</a> 15; <a id="537c31" class="tk">iBit</a><a id="537c35" class="tk">++</a>) <span class="br">{</span></td></tr>
+<td><a id="l537" class='ln'>537</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="538" id="538">
-<td><a id="l538" class='ln'>538</a></td><td>      <a id="538c7" class="tk">tmp01_y</a> = (<a id="538c18" class="tk">int16_T</a>)(<a id="538c27" class="tk">y</a> <a id="538c29" class="tk">|</a> <a id="538c31" class="tk">shiftMask</a>);</td></tr>
+<td><a id="l538" class='ln'>538</a></td><td></td></tr>
 <tr name="539" id="539">
-<td><a id="l539" class='ln'>539</a></td><td>      <span class="kw">if</span> (<a id="539c11" class="tk">tmp01_y</a> <a id="539c19" class="tk">*</a> <a id="539c21" class="tk">tmp01_y</a> <a id="539c29" class="tk">&lt;=</a> <a id="539c32" class="tk">u</a>) <span class="br">{</span></td></tr>
+<td><a id="l539" class='ln'>539</a></td><td>  <span class="ct">/* End of Signum: '&lt;S116&gt;/Sign' */</span></td></tr>
 <tr name="540" id="540">
-<td><a id="l540" class='ln'>540</a></td><td>        <a id="540c9" class="tk">y</a> = <a id="540c13" class="tk">tmp01_y</a>;</td></tr>
+<td><a id="l540" class='ln'>540</a></td><td></td></tr>
 <tr name="541" id="541">
-<td><a id="l541" class='ln'>541</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l541" class='ln'>541</a></td><td>  <span class="ct">/* Product: '&lt;S116&gt;/Divide' */</span></td></tr>
 <tr name="542" id="542">
-<td><a id="l542" class='ln'>542</a></td><td></td></tr>
+<td><a id="l542" class='ln'>542</a></td><td>  <a id="542c3" class="tk">*</a><a id="542c4" class="tk">rty_s_step</a> = (<a id="542c18" class="tk">int16_T</a>)(<a id="542c27" class="tk">rtu_step</a> <a id="542c36" class="tk">*</a> <a id="542c38" class="tk">rtb_Add_pn</a>);</td></tr>
 <tr name="543" id="543">
-<td><a id="l543" class='ln'>543</a></td><td>      <a id="543c7" class="tk">shiftMask</a> = (<a id="543c20" class="tk">int16_T</a>)((<a id="543c30" class="tk">uint32_T</a>)<a id="543c39" class="tk">shiftMask</a> <a id="543c49" class="tk">&gt;&gt;</a> 1U);</td></tr>
+<td><a id="l543" class='ln'>543</a></td><td></td></tr>
 <tr name="544" id="544">
-<td><a id="l544" class='ln'>544</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l544" class='ln'>544</a></td><td>  <span class="ct">/* MinMax: '&lt;S116&gt;/Max' */</span></td></tr>
 <tr name="545" id="545">
-<td><a id="l545" class='ln'>545</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l545" class='ln'>545</a></td><td>  <span class="kw">if</span> (<a id="545c7" class="tk">rtu_target</a> <a id="545c18" class="tk">&gt;</a> <a id="545c20" class="tk">rtu_initVal</a>) <span class="br">{</span></td></tr>
 <tr name="546" id="546">
-<td><a id="l546" class='ln'>546</a></td><td>    <a id="546c5" class="tk">y</a> = 0;</td></tr>
+<td><a id="l546" class='ln'>546</a></td><td>    <a id="546c5" class="tk">*</a><a id="546c6" class="tk">rty_High</a> = <a id="546c17" class="tk">rtu_target</a>;</td></tr>
 <tr name="547" id="547">
-<td><a id="l547" class='ln'>547</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l547" class='ln'>547</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="548" id="548">
-<td><a id="l548" class='ln'>548</a></td><td></td></tr>
+<td><a id="l548" class='ln'>548</a></td><td>    <a id="548c5" class="tk">*</a><a id="548c6" class="tk">rty_High</a> = <a id="548c17" class="tk">rtu_initVal</a>;</td></tr>
 <tr name="549" id="549">
-<td><a id="l549" class='ln'>549</a></td><td>  <span class="kw">return</span> <a id="549c10" class="tk">y</a>;</td></tr>
+<td><a id="l549" class='ln'>549</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="550" id="550">
-<td><a id="l550" class='ln'>550</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l550" class='ln'>550</a></td><td></td></tr>
 <tr name="551" id="551">
-<td><a id="l551" class='ln'>551</a></td><td></td></tr>
+<td><a id="l551" class='ln'>551</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S116&gt;/Max' */</span></td></tr>
 <tr name="552" id="552">
-<td><a id="l552" class='ln'>552</a></td><td><a id="552c1" class="tk">uint16_T</a> <a id="552c10" class="tk">rt_sqrt_Uu16En14_Yu16E_WMwW1mku</a>(<a id="552c42" class="tk">uint16_T</a> <a id="552c51" class="tk">u</a>)</td></tr>
+<td><a id="l552" class='ln'>552</a></td><td></td></tr>
 <tr name="553" id="553">
-<td><a id="l553" class='ln'>553</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l553" class='ln'>553</a></td><td>  <span class="ct">/* MinMax: '&lt;S116&gt;/Max1' */</span></td></tr>
 <tr name="554" id="554">
-<td><a id="l554" class='ln'>554</a></td><td>  <a id="554c3" class="tk">int32_T</a> <a id="554c11" class="tk">iBit</a>;</td></tr>
+<td><a id="l554" class='ln'>554</a></td><td>  <span class="kw">if</span> (<a id="554c7" class="tk">rtu_initVal</a> <a id="554c19" class="tk">&lt;</a> <a id="554c21" class="tk">rtu_target</a>) <span class="br">{</span></td></tr>
 <tr name="555" id="555">
-<td><a id="l555" class='ln'>555</a></td><td>  <a id="555c3" class="tk">uint32_T</a> <a id="555c12" class="tk">tmp03_u</a>;</td></tr>
+<td><a id="l555" class='ln'>555</a></td><td>    <a id="555c5" class="tk">*</a><a id="555c6" class="tk">rty_Low</a> = <a id="555c16" class="tk">rtu_initVal</a>;</td></tr>
 <tr name="556" id="556">
-<td><a id="l556" class='ln'>556</a></td><td>  <a id="556c3" class="tk">uint16_T</a> <a id="556c12" class="tk">shiftMask</a>;</td></tr>
+<td><a id="l556" class='ln'>556</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="557" id="557">
-<td><a id="l557" class='ln'>557</a></td><td>  <a id="557c3" class="tk">uint16_T</a> <a id="557c12" class="tk">tmp01_y</a>;</td></tr>
+<td><a id="l557" class='ln'>557</a></td><td>    <a id="557c5" class="tk">*</a><a id="557c6" class="tk">rty_Low</a> = <a id="557c16" class="tk">rtu_target</a>;</td></tr>
 <tr name="558" id="558">
-<td><a id="l558" class='ln'>558</a></td><td>  <a id="558c3" class="tk">uint16_T</a> <a id="558c12" class="tk">y</a>;</td></tr>
+<td><a id="l558" class='ln'>558</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="559" id="559">
 <td><a id="l559" class='ln'>559</a></td><td></td></tr>
 <tr name="560" id="560">
-<td><a id="l560" class='ln'>560</a></td><td>  <span class="ct">/* Fixed-Point Sqrt Computation by the bisection method. */</span></td></tr>
+<td><a id="l560" class='ln'>560</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S116&gt;/Max1' */</span></td></tr>
 <tr name="561" id="561">
-<td><a id="l561" class='ln'>561</a></td><td>  <span class="kw">if</span> (<a id="561c7" class="tk">u</a> <a id="561c9" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l561" class='ln'>561</a></td><td><span class="br">}</span></td></tr>
 <tr name="562" id="562">
-<td><a id="l562" class='ln'>562</a></td><td>    <a id="562c5" class="tk">y</a> = 0U;</td></tr>
+<td><a id="l562" class='ln'>562</a></td><td></td></tr>
 <tr name="563" id="563">
-<td><a id="l563" class='ln'>563</a></td><td>    <a id="563c5" class="tk">shiftMask</a> = 32768U;</td></tr>
+<td><a id="l563" class='ln'>563</a></td><td><a id="563c1" class="tk">int16_T</a> <a id="563c9" class="tk">rt_sqrt_Us32En6_Ys16En5_Is64En10_f_s</a>(<a id="563c46" class="tk">int32_T</a> <a id="563c54" class="tk">u</a>)</td></tr>
 <tr name="564" id="564">
-<td><a id="l564" class='ln'>564</a></td><td>    <a id="564c5" class="tk">tmp03_u</a> = (<a id="564c16" class="tk">uint32_T</a>)<a id="564c25" class="tk">u</a> <a id="564c27" class="tk">&lt;&lt;</a> 14;</td></tr>
+<td><a id="l564" class='ln'>564</a></td><td><span class="br">{</span></td></tr>
 <tr name="565" id="565">
-<td><a id="l565" class='ln'>565</a></td><td>    <span class="kw">for</span> (<a id="565c10" class="tk">iBit</a> = 0; <a id="565c20" class="tk">iBit</a> <a id="565c25" class="tk">&lt;</a> 16; <a id="565c31" class="tk">iBit</a><a id="565c35" class="tk">++</a>) <span class="br">{</span></td></tr>
+<td><a id="l565" class='ln'>565</a></td><td>  <a id="565c3" class="tk">int64_T</a> <a id="565c11" class="tk">tmp03_u</a>;</td></tr>
 <tr name="566" id="566">
-<td><a id="l566" class='ln'>566</a></td><td>      <a id="566c7" class="tk">tmp01_y</a> = (<a id="566c18" class="tk">uint16_T</a>)(<a id="566c28" class="tk">y</a> <a id="566c30" class="tk">|</a> <a id="566c32" class="tk">shiftMask</a>);</td></tr>
+<td><a id="l566" class='ln'>566</a></td><td>  <a id="566c3" class="tk">int32_T</a> <a id="566c11" class="tk">iBit</a>;</td></tr>
 <tr name="567" id="567">
-<td><a id="l567" class='ln'>567</a></td><td>      <span class="kw">if</span> ((<a id="567c12" class="tk">uint32_T</a>)<a id="567c21" class="tk">tmp01_y</a> <a id="567c29" class="tk">*</a> <a id="567c31" class="tk">tmp01_y</a> <a id="567c39" class="tk">&lt;=</a> <a id="567c42" class="tk">tmp03_u</a>) <span class="br">{</span></td></tr>
+<td><a id="l567" class='ln'>567</a></td><td>  <a id="567c3" class="tk">int16_T</a> <a id="567c11" class="tk">shiftMask</a>;</td></tr>
 <tr name="568" id="568">
-<td><a id="l568" class='ln'>568</a></td><td>        <a id="568c9" class="tk">y</a> = <a id="568c13" class="tk">tmp01_y</a>;</td></tr>
+<td><a id="l568" class='ln'>568</a></td><td>  <a id="568c3" class="tk">int16_T</a> <a id="568c11" class="tk">tmp01_y</a>;</td></tr>
 <tr name="569" id="569">
-<td><a id="l569" class='ln'>569</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l569" class='ln'>569</a></td><td>  <a id="569c3" class="tk">int16_T</a> <a id="569c11" class="tk">y</a>;</td></tr>
 <tr name="570" id="570">
 <td><a id="l570" class='ln'>570</a></td><td></td></tr>
 <tr name="571" id="571">
-<td><a id="l571" class='ln'>571</a></td><td>      <a id="571c7" class="tk">shiftMask</a> = (<a id="571c20" class="tk">uint16_T</a>)((<a id="571c31" class="tk">uint32_T</a>)<a id="571c40" class="tk">shiftMask</a> <a id="571c50" class="tk">&gt;&gt;</a> 1U);</td></tr>
+<td><a id="l571" class='ln'>571</a></td><td>  <span class="ct">/* Fixed-Point Sqrt Computation by the bisection method. */</span></td></tr>
 <tr name="572" id="572">
-<td><a id="l572" class='ln'>572</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l572" class='ln'>572</a></td><td>  <span class="kw">if</span> (<a id="572c7" class="tk">u</a> <a id="572c9" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="573" id="573">
-<td><a id="l573" class='ln'>573</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l573" class='ln'>573</a></td><td>    <a id="573c5" class="tk">y</a> = 0;</td></tr>
 <tr name="574" id="574">
-<td><a id="l574" class='ln'>574</a></td><td>    <a id="574c5" class="tk">y</a> = 0U;</td></tr>
+<td><a id="l574" class='ln'>574</a></td><td>    <a id="574c5" class="tk">shiftMask</a> = 16384;</td></tr>
 <tr name="575" id="575">
-<td><a id="l575" class='ln'>575</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l575" class='ln'>575</a></td><td>    <a id="575c5" class="tk">tmp03_u</a> = (<a id="575c16" class="tk">int64_T</a>)<a id="575c24" class="tk">u</a> <a id="575c26" class="tk">&lt;&lt;</a> 4;</td></tr>
 <tr name="576" id="576">
-<td><a id="l576" class='ln'>576</a></td><td></td></tr>
+<td><a id="l576" class='ln'>576</a></td><td>    <span class="kw">for</span> (<a id="576c10" class="tk">iBit</a> = 0; <a id="576c20" class="tk">iBit</a> <a id="576c25" class="tk">&lt;</a> 15; <a id="576c31" class="tk">iBit</a><a id="576c35" class="tk">++</a>) <span class="br">{</span></td></tr>
 <tr name="577" id="577">
-<td><a id="l577" class='ln'>577</a></td><td>  <span class="kw">return</span> <a id="577c10" class="tk">y</a>;</td></tr>
+<td><a id="l577" class='ln'>577</a></td><td>      <a id="577c7" class="tk">tmp01_y</a> = (<a id="577c18" class="tk">int16_T</a>)(<a id="577c27" class="tk">y</a> <a id="577c29" class="tk">|</a> <a id="577c31" class="tk">shiftMask</a>);</td></tr>
 <tr name="578" id="578">
-<td><a id="l578" class='ln'>578</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l578" class='ln'>578</a></td><td>      <span class="kw">if</span> (<a id="578c11" class="tk">tmp01_y</a> <a id="578c19" class="tk">*</a> <a id="578c21" class="tk">tmp01_y</a> <a id="578c29" class="tk">&lt;=</a> <a id="578c32" class="tk">tmp03_u</a>) <span class="br">{</span></td></tr>
 <tr name="579" id="579">
-<td><a id="l579" class='ln'>579</a></td><td></td></tr>
+<td><a id="l579" class='ln'>579</a></td><td>        <a id="579c9" class="tk">y</a> = <a id="579c13" class="tk">tmp01_y</a>;</td></tr>
 <tr name="580" id="580">
-<td><a id="l580" class='ln'>580</a></td><td><span class="ct">/* Model step function */</span></td></tr>
+<td><a id="l580" class='ln'>580</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="581" id="581">
-<td><a id="l581" class='ln'>581</a></td><td><span class="kw">void</span> <a id="581c6" class="tk">PMSM_Controller_step</a>(<a id="581c27" class="tk">RT_MODEL</a> <a id="581c36" class="tk">*</a><span class="kw">const</span> <a id="581c43" class="tk">rtM</a>)</td></tr>
+<td><a id="l581" class='ln'>581</a></td><td></td></tr>
 <tr name="582" id="582">
-<td><a id="l582" class='ln'>582</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l582" class='ln'>582</a></td><td>      <a id="582c7" class="tk">shiftMask</a> = (<a id="582c20" class="tk">int16_T</a>)((<a id="582c30" class="tk">uint32_T</a>)<a id="582c39" class="tk">shiftMask</a> <a id="582c49" class="tk">&gt;&gt;</a> 1U);</td></tr>
 <tr name="583" id="583">
-<td><a id="l583" class='ln'>583</a></td><td>  <a id="583c3" class="tk">DW</a> <a id="583c6" class="tk">*</a><a id="583c7" class="tk">rtDW</a> = <a id="583c14" class="tk">rtM</a>-&gt;<a id="583c19" class="tk">dwork</a>;</td></tr>
+<td><a id="l583" class='ln'>583</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="584" id="584">
-<td><a id="l584" class='ln'>584</a></td><td>  <a id="584c3" class="tk">PrevZCX</a> <a id="584c11" class="tk">*</a><a id="584c12" class="tk">rtPrevZCX</a> = <a id="584c24" class="tk">rtM</a>-&gt;<a id="584c29" class="tk">prevZCSigState</a>;</td></tr>
+<td><a id="l584" class='ln'>584</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="585" id="585">
-<td><a id="l585" class='ln'>585</a></td><td>  <a id="585c3" class="tk">ExtU</a> <a id="585c8" class="tk">*</a><a id="585c9" class="tk">rtU</a> = (<a id="585c16" class="tk">ExtU</a> <a id="585c21" class="tk">*</a>) <a id="585c24" class="tk">rtM</a>-&gt;<a id="585c29" class="tk">inputs</a>;</td></tr>
+<td><a id="l585" class='ln'>585</a></td><td>    <a id="585c5" class="tk">y</a> = 0;</td></tr>
 <tr name="586" id="586">
-<td><a id="l586" class='ln'>586</a></td><td>  <a id="586c3" class="tk">ExtY</a> <a id="586c8" class="tk">*</a><a id="586c9" class="tk">rtY</a> = (<a id="586c16" class="tk">ExtY</a> <a id="586c21" class="tk">*</a>) <a id="586c24" class="tk">rtM</a>-&gt;<a id="586c29" class="tk">outputs</a>;</td></tr>
+<td><a id="l586" class='ln'>586</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="587" id="587">
-<td><a id="l587" class='ln'>587</a></td><td>  <a id="587c3" class="tk">int64_T</a> <a id="587c11" class="tk">tmp_1</a>;</td></tr>
+<td><a id="l587" class='ln'>587</a></td><td></td></tr>
 <tr name="588" id="588">
-<td><a id="l588" class='ln'>588</a></td><td>  <a id="588c3" class="tk">int64_T</a> <a id="588c11" class="tk">tmp_2</a>;</td></tr>
+<td><a id="l588" class='ln'>588</a></td><td>  <span class="kw">return</span> <a id="588c10" class="tk">y</a>;</td></tr>
 <tr name="589" id="589">
-<td><a id="l589" class='ln'>589</a></td><td>  <a id="589c3" class="tk">uint64_T</a> <a id="589c12" class="tk">tmp_3</a>;</td></tr>
+<td><a id="l589" class='ln'>589</a></td><td><span class="br">}</span></td></tr>
 <tr name="590" id="590">
-<td><a id="l590" class='ln'>590</a></td><td>  <a id="590c3" class="tk">int32_T</a> <a id="590c11" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l590" class='ln'>590</a></td><td></td></tr>
 <tr name="591" id="591">
-<td><a id="l591" class='ln'>591</a></td><td>  <a id="591c3" class="tk">int32_T</a> <a id="591c11" class="tk">rtb_Divide_idx_1</a>;</td></tr>
+<td><a id="l591" class='ln'>591</a></td><td><a id="591c1" class="tk">int16_T</a> <a id="591c9" class="tk">rt_sqrt_Us32En10_Ys16En5_Is32En10_s_s</a>(<a id="591c47" class="tk">int32_T</a> <a id="591c55" class="tk">u</a>)</td></tr>
 <tr name="592" id="592">
-<td><a id="l592" class='ln'>592</a></td><td>  <a id="592c3" class="tk">int32_T</a> <a id="592c11" class="tk">rtb_Gain_b0</a>;</td></tr>
+<td><a id="l592" class='ln'>592</a></td><td><span class="br">{</span></td></tr>
 <tr name="593" id="593">
-<td><a id="l593" class='ln'>593</a></td><td>  <a id="593c3" class="tk">int32_T</a> <a id="593c11" class="tk">rtb_Gain_p2</a>;</td></tr>
+<td><a id="l593" class='ln'>593</a></td><td>  <a id="593c3" class="tk">int32_T</a> <a id="593c11" class="tk">iBit</a>;</td></tr>
 <tr name="594" id="594">
-<td><a id="l594" class='ln'>594</a></td><td>  <a id="594c3" class="tk">int32_T</a> <a id="594c11" class="tk">rtb_MathFunction2_p</a>;</td></tr>
+<td><a id="l594" class='ln'>594</a></td><td>  <a id="594c3" class="tk">int16_T</a> <a id="594c11" class="tk">shiftMask</a>;</td></tr>
 <tr name="595" id="595">
-<td><a id="l595" class='ln'>595</a></td><td>  <a id="595c3" class="tk">int32_T</a> <a id="595c11" class="tk">rtb_Sum1_f</a>;</td></tr>
+<td><a id="l595" class='ln'>595</a></td><td>  <a id="595c3" class="tk">int16_T</a> <a id="595c11" class="tk">tmp01_y</a>;</td></tr>
 <tr name="596" id="596">
-<td><a id="l596" class='ln'>596</a></td><td>  <a id="596c3" class="tk">int32_T</a> <a id="596c11" class="tk">rtb_Switch3</a>;</td></tr>
+<td><a id="l596" class='ln'>596</a></td><td>  <a id="596c3" class="tk">int16_T</a> <a id="596c11" class="tk">y</a>;</td></tr>
 <tr name="597" id="597">
-<td><a id="l597" class='ln'>597</a></td><td>  <a id="597c3" class="tk">int32_T</a> <a id="597c11" class="tk">rtb_Switch_np</a>;</td></tr>
+<td><a id="l597" class='ln'>597</a></td><td></td></tr>
 <tr name="598" id="598">
-<td><a id="l598" class='ln'>598</a></td><td>  <a id="598c3" class="tk">int32_T</a> <a id="598c11" class="tk">tmp</a>;</td></tr>
+<td><a id="l598" class='ln'>598</a></td><td>  <span class="ct">/* Fixed-Point Sqrt Computation by the bisection method. */</span></td></tr>
 <tr name="599" id="599">
-<td><a id="l599" class='ln'>599</a></td><td>  <a id="599c3" class="tk">int32_T</a> <a id="599c11" class="tk">tmp_0</a>;</td></tr>
+<td><a id="l599" class='ln'>599</a></td><td>  <span class="kw">if</span> (<a id="599c7" class="tk">u</a> <a id="599c9" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="600" id="600">
-<td><a id="l600" class='ln'>600</a></td><td>  <a id="600c3" class="tk">uint32_T</a> <a id="600c12" class="tk">qY</a>;</td></tr>
+<td><a id="l600" class='ln'>600</a></td><td>    <a id="600c5" class="tk">y</a> = 0;</td></tr>
 <tr name="601" id="601">
-<td><a id="l601" class='ln'>601</a></td><td>  <a id="601c3" class="tk">uint32_T</a> <a id="601c12" class="tk">rtb_Switch2</a>;</td></tr>
+<td><a id="l601" class='ln'>601</a></td><td>    <a id="601c5" class="tk">shiftMask</a> = 16384;</td></tr>
 <tr name="602" id="602">
-<td><a id="l602" class='ln'>602</a></td><td>  <a id="602c3" class="tk">int16_T</a> <a id="602c11" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[2];</td></tr>
+<td><a id="l602" class='ln'>602</a></td><td>    <span class="kw">for</span> (<a id="602c10" class="tk">iBit</a> = 0; <a id="602c20" class="tk">iBit</a> <a id="602c25" class="tk">&lt;</a> 15; <a id="602c31" class="tk">iBit</a><a id="602c35" class="tk">++</a>) <span class="br">{</span></td></tr>
 <tr name="603" id="603">
-<td><a id="l603" class='ln'>603</a></td><td>  <a id="603c3" class="tk">int16_T</a> <a id="603c11" class="tk">rtb_UnitDelay1_m</a>[2];</td></tr>
+<td><a id="l603" class='ln'>603</a></td><td>      <a id="603c7" class="tk">tmp01_y</a> = (<a id="603c18" class="tk">int16_T</a>)(<a id="603c27" class="tk">y</a> <a id="603c29" class="tk">|</a> <a id="603c31" class="tk">shiftMask</a>);</td></tr>
 <tr name="604" id="604">
-<td><a id="l604" class='ln'>604</a></td><td>  <a id="604c3" class="tk">int16_T</a> <a id="604c11" class="tk">rtb_Divide1_m</a>;</td></tr>
+<td><a id="l604" class='ln'>604</a></td><td>      <span class="kw">if</span> (<a id="604c11" class="tk">tmp01_y</a> <a id="604c19" class="tk">*</a> <a id="604c21" class="tk">tmp01_y</a> <a id="604c29" class="tk">&lt;=</a> <a id="604c32" class="tk">u</a>) <span class="br">{</span></td></tr>
 <tr name="605" id="605">
-<td><a id="l605" class='ln'>605</a></td><td>  <a id="605c3" class="tk">int16_T</a> <a id="605c11" class="tk">rtb_Divide3_k</a>;</td></tr>
+<td><a id="l605" class='ln'>605</a></td><td>        <a id="605c9" class="tk">y</a> = <a id="605c13" class="tk">tmp01_y</a>;</td></tr>
 <tr name="606" id="606">
-<td><a id="l606" class='ln'>606</a></td><td>  <a id="606c3" class="tk">int16_T</a> <a id="606c11" class="tk">rtb_Min</a>;</td></tr>
+<td><a id="l606" class='ln'>606</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="607" id="607">
-<td><a id="l607" class='ln'>607</a></td><td>  <a id="607c3" class="tk">int16_T</a> <a id="607c11" class="tk">rtb_Sum1_a</a>;</td></tr>
+<td><a id="l607" class='ln'>607</a></td><td></td></tr>
 <tr name="608" id="608">
-<td><a id="l608" class='ln'>608</a></td><td>  <a id="608c3" class="tk">int16_T</a> <a id="608c11" class="tk">rtb_Sum3_jm</a>;</td></tr>
+<td><a id="l608" class='ln'>608</a></td><td>      <a id="608c7" class="tk">shiftMask</a> = (<a id="608c20" class="tk">int16_T</a>)((<a id="608c30" class="tk">uint32_T</a>)<a id="608c39" class="tk">shiftMask</a> <a id="608c49" class="tk">&gt;&gt;</a> 1U);</td></tr>
 <tr name="609" id="609">
-<td><a id="l609" class='ln'>609</a></td><td>  <a id="609c3" class="tk">int16_T</a> <a id="609c11" class="tk">rtb_Sum6_k</a>;</td></tr>
+<td><a id="l609" class='ln'>609</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="610" id="610">
-<td><a id="l610" class='ln'>610</a></td><td>  <a id="610c3" class="tk">int16_T</a> <a id="610c11" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l610" class='ln'>610</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="611" id="611">
-<td><a id="l611" class='ln'>611</a></td><td>  <a id="611c3" class="tk">int16_T</a> <a id="611c11" class="tk">rtb_Switch_f2_idx_0</a>;</td></tr>
+<td><a id="l611" class='ln'>611</a></td><td>    <a id="611c5" class="tk">y</a> = 0;</td></tr>
 <tr name="612" id="612">
-<td><a id="l612" class='ln'>612</a></td><td>  <a id="612c3" class="tk">int16_T</a> <a id="612c11" class="tk">rtb_Switch_f2_idx_1</a>;</td></tr>
+<td><a id="l612" class='ln'>612</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="613" id="613">
-<td><a id="l613" class='ln'>613</a></td><td>  <a id="613c3" class="tk">int16_T</a> <a id="613c11" class="tk">rtb_r_cos_M1</a>;</td></tr>
+<td><a id="l613" class='ln'>613</a></td><td></td></tr>
 <tr name="614" id="614">
-<td><a id="l614" class='ln'>614</a></td><td>  <a id="614c3" class="tk">uint16_T</a> <a id="614c12" class="tk">rtb_BitwiseOperator2</a>;</td></tr>
+<td><a id="l614" class='ln'>614</a></td><td>  <span class="kw">return</span> <a id="614c10" class="tk">y</a>;</td></tr>
 <tr name="615" id="615">
-<td><a id="l615" class='ln'>615</a></td><td>  <a id="615c3" class="tk">uint16_T</a> <a id="615c12" class="tk">rtb_LogicalOperator3</a>;</td></tr>
+<td><a id="l615" class='ln'>615</a></td><td><span class="br">}</span></td></tr>
 <tr name="616" id="616">
-<td><a id="l616" class='ln'>616</a></td><td>  <a id="616c3" class="tk">int8_T</a> <a id="616c10" class="tk">UnitDelay3</a>;</td></tr>
+<td><a id="l616" class='ln'>616</a></td><td></td></tr>
 <tr name="617" id="617">
-<td><a id="l617" class='ln'>617</a></td><td>  <a id="617c3" class="tk">int8_T</a> <a id="617c10" class="tk">rtb_Sum2</a>;</td></tr>
+<td><a id="l617" class='ln'>617</a></td><td><a id="617c1" class="tk">uint16_T</a> <a id="617c10" class="tk">rt_sqrt_Uu16En14_Yu16En14_Iu32En28_s_s</a>(<a id="617c49" class="tk">uint16_T</a> <a id="617c58" class="tk">u</a>)</td></tr>
 <tr name="618" id="618">
-<td><a id="l618" class='ln'>618</a></td><td>  <a id="618c3" class="tk">int8_T</a> <a id="618c10" class="tk">rtb_Sum2_tmp</a>;</td></tr>
+<td><a id="l618" class='ln'>618</a></td><td><span class="br">{</span></td></tr>
 <tr name="619" id="619">
-<td><a id="l619" class='ln'>619</a></td><td>  <a id="619c3" class="tk">uint8_T</a> <a id="619c11" class="tk">rtb_Add_gf</a>;</td></tr>
+<td><a id="l619" class='ln'>619</a></td><td>  <a id="619c3" class="tk">int32_T</a> <a id="619c11" class="tk">iBit</a>;</td></tr>
 <tr name="620" id="620">
-<td><a id="l620" class='ln'>620</a></td><td>  <a id="620c3" class="tk">uint8_T</a> <a id="620c11" class="tk">rtb_DataTypeConversion_j</a>;</td></tr>
+<td><a id="l620" class='ln'>620</a></td><td>  <a id="620c3" class="tk">uint32_T</a> <a id="620c12" class="tk">tmp03_u</a>;</td></tr>
 <tr name="621" id="621">
-<td><a id="l621" class='ln'>621</a></td><td>  <a id="621c3" class="tk">uint8_T</a> <a id="621c11" class="tk">rtb_Sum_i</a>;</td></tr>
+<td><a id="l621" class='ln'>621</a></td><td>  <a id="621c3" class="tk">uint16_T</a> <a id="621c12" class="tk">shiftMask</a>;</td></tr>
 <tr name="622" id="622">
-<td><a id="l622" class='ln'>622</a></td><td>  <a id="622c3" class="tk">uint8_T</a> <a id="622c11" class="tk">rtb_UnitDelay</a>;</td></tr>
+<td><a id="l622" class='ln'>622</a></td><td>  <a id="622c3" class="tk">uint16_T</a> <a id="622c12" class="tk">tmp01_y</a>;</td></tr>
 <tr name="623" id="623">
-<td><a id="l623" class='ln'>623</a></td><td>  <a id="623c3" class="tk">uint8_T</a> <a id="623c11" class="tk">rtb_z_ctrlMod</a>;</td></tr>
+<td><a id="l623" class='ln'>623</a></td><td>  <a id="623c3" class="tk">uint16_T</a> <a id="623c12" class="tk">y</a>;</td></tr>
 <tr name="624" id="624">
-<td><a id="l624" class='ln'>624</a></td><td>  <a id="624c3" class="tk">boolean_T</a> <a id="624c13" class="tk">rtb_Equal_k</a>;</td></tr>
+<td><a id="l624" class='ln'>624</a></td><td></td></tr>
 <tr name="625" id="625">
-<td><a id="l625" class='ln'>625</a></td><td>  <a id="625c3" class="tk">boolean_T</a> <a id="625c13" class="tk">rtb_LogicalOperator12</a>;</td></tr>
+<td><a id="l625" class='ln'>625</a></td><td>  <span class="ct">/* Fixed-Point Sqrt Computation by the bisection method. */</span></td></tr>
 <tr name="626" id="626">
-<td><a id="l626" class='ln'>626</a></td><td>  <a id="626c3" class="tk">boolean_T</a> <a id="626c13" class="tk">rtb_LogicalOperator2_h</a>;</td></tr>
+<td><a id="l626" class='ln'>626</a></td><td>  <span class="kw">if</span> (<a id="626c7" class="tk">u</a> <a id="626c9" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="627" id="627">
-<td><a id="l627" class='ln'>627</a></td><td>  <a id="627c3" class="tk">boolean_T</a> <a id="627c13" class="tk">rtb_LogicalOperator4_e</a>;</td></tr>
+<td><a id="l627" class='ln'>627</a></td><td>    <a id="627c5" class="tk">y</a> = 0U;</td></tr>
 <tr name="628" id="628">
-<td><a id="l628" class='ln'>628</a></td><td>  <a id="628c3" class="tk">boolean_T</a> <a id="628c13" class="tk">rtb_RelationalOperator4_f</a>;</td></tr>
+<td><a id="l628" class='ln'>628</a></td><td>    <a id="628c5" class="tk">shiftMask</a> = 32768U;</td></tr>
 <tr name="629" id="629">
-<td><a id="l629" class='ln'>629</a></td><td>  <a id="629c3" class="tk">boolean_T</a> <a id="629c13" class="tk">rtb_n_commDeacv</a>;</td></tr>
+<td><a id="l629" class='ln'>629</a></td><td>    <a id="629c5" class="tk">tmp03_u</a> = (<a id="629c16" class="tk">uint32_T</a>)<a id="629c25" class="tk">u</a> <a id="629c27" class="tk">&lt;&lt;</a> 14;</td></tr>
 <tr name="630" id="630">
-<td><a id="l630" class='ln'>630</a></td><td></td></tr>
+<td><a id="l630" class='ln'>630</a></td><td>    <span class="kw">for</span> (<a id="630c10" class="tk">iBit</a> = 0; <a id="630c20" class="tk">iBit</a> <a id="630c25" class="tk">&lt;</a> 16; <a id="630c31" class="tk">iBit</a><a id="630c35" class="tk">++</a>) <span class="br">{</span></td></tr>
 <tr name="631" id="631">
-<td><a id="l631" class='ln'>631</a></td><td>  <span class="ct">/* Outputs for Atomic SubSystem: '&lt;Root&gt;/PMSM_Controller' */</span></td></tr>
+<td><a id="l631" class='ln'>631</a></td><td>      <a id="631c7" class="tk">tmp01_y</a> = (<a id="631c18" class="tk">uint16_T</a>)(<a id="631c28" class="tk">y</a> <a id="631c30" class="tk">|</a> <a id="631c32" class="tk">shiftMask</a>);</td></tr>
 <tr name="632" id="632">
-<td><a id="l632" class='ln'>632</a></td><td>  <span class="ct">/* UnitDelay: '&lt;S6&gt;/UnitDelay1' */</span></td></tr>
+<td><a id="l632" class='ln'>632</a></td><td>      <span class="kw">if</span> ((<a id="632c12" class="tk">uint32_T</a>)<a id="632c21" class="tk">tmp01_y</a> <a id="632c29" class="tk">*</a> <a id="632c31" class="tk">tmp01_y</a> <a id="632c39" class="tk">&lt;=</a> <a id="632c42" class="tk">tmp03_u</a>) <span class="br">{</span></td></tr>
 <tr name="633" id="633">
-<td><a id="l633" class='ln'>633</a></td><td>  <a id="633c3" class="tk">rtb_UnitDelay1_m</a>[0] = <a id="633c25" class="tk">rtDW</a>-&gt;<a id="633c31" class="tk">UnitDelay1_DSTATE_f</a>[0];</td></tr>
+<td><a id="l633" class='ln'>633</a></td><td>        <a id="633c9" class="tk">y</a> = <a id="633c13" class="tk">tmp01_y</a>;</td></tr>
 <tr name="634" id="634">
-<td><a id="l634" class='ln'>634</a></td><td>  <a id="634c3" class="tk">rtb_UnitDelay1_m</a>[1] = <a id="634c25" class="tk">rtDW</a>-&gt;<a id="634c31" class="tk">UnitDelay1_DSTATE_f</a>[1];</td></tr>
+<td><a id="l634" class='ln'>634</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="635" id="635">
 <td><a id="l635" class='ln'>635</a></td><td></td></tr>
 <tr name="636" id="636">
-<td><a id="l636" class='ln'>636</a></td><td>  <span class="ct">/* S-Function (sfix_bitop): '&lt;S4&gt;/Bitwise Operator2' incorporates:</span></td></tr>
+<td><a id="l636" class='ln'>636</a></td><td>      <a id="636c7" class="tk">shiftMask</a> = (<a id="636c20" class="tk">uint16_T</a>)((<a id="636c31" class="tk">uint32_T</a>)<a id="636c40" class="tk">shiftMask</a> <a id="636c50" class="tk">&gt;&gt;</a> 1U);</td></tr>
 <tr name="637" id="637">
-<td><a id="l637" class='ln'>637</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/FOC_Flags'</span></td></tr>
+<td><a id="l637" class='ln'>637</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="638" id="638">
-<td><a id="l638" class='ln'>638</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l638" class='ln'>638</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="639" id="639">
-<td><a id="l639" class='ln'>639</a></td><td>  <a id="639c3" class="tk">rtb_BitwiseOperator2</a> = (<a id="639c27" class="tk">uint16_T</a>)(<a id="639c37" class="tk">rtU</a>-&gt;<a id="639c42" class="tk">FOC_Flags</a> <a id="639c52" class="tk">&amp;</a> 1);</td></tr>
+<td><a id="l639" class='ln'>639</a></td><td>    <a id="639c5" class="tk">y</a> = 0U;</td></tr>
 <tr name="640" id="640">
-<td><a id="l640" class='ln'>640</a></td><td></td></tr>
+<td><a id="l640" class='ln'>640</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="641" id="641">
-<td><a id="l641" class='ln'>641</a></td><td>  <span class="ct">/* UnitDelay: '&lt;S37&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l641" class='ln'>641</a></td><td></td></tr>
 <tr name="642" id="642">
-<td><a id="l642" class='ln'>642</a></td><td>  <a id="642c3" class="tk">rtb_UnitDelay</a> = <a id="642c19" class="tk">rtDW</a>-&gt;<a id="642c25" class="tk">UnitDelay_DSTATE_j</a>;</td></tr>
+<td><a id="l642" class='ln'>642</a></td><td>  <span class="kw">return</span> <a id="642c10" class="tk">y</a>;</td></tr>
 <tr name="643" id="643">
-<td><a id="l643" class='ln'>643</a></td><td></td></tr>
+<td><a id="l643" class='ln'>643</a></td><td><span class="br">}</span></td></tr>
 <tr name="644" id="644">
-<td><a id="l644" class='ln'>644</a></td><td>  <span class="ct">/* Logic: '&lt;S9&gt;/Edge_Detect' incorporates:</span></td></tr>
+<td><a id="l644" class='ln'>644</a></td><td></td></tr>
 <tr name="645" id="645">
-<td><a id="l645" class='ln'>645</a></td><td><span class="ct">   *  Delay: '&lt;S9&gt;/Delay'</span></td></tr>
+<td><a id="l645" class='ln'>645</a></td><td><span class="ct">/* Model step function */</span></td></tr>
 <tr name="646" id="646">
-<td><a id="l646" class='ln'>646</a></td><td><span class="ct">   *  Delay: '&lt;S9&gt;/Delay1'</span></td></tr>
+<td><a id="l646" class='ln'>646</a></td><td><span class="kw">void</span> <a id="646c6" class="tk">PMSM_Controller_step</a>(<a id="646c27" class="tk">RT_MODEL</a> <a id="646c36" class="tk">*</a><span class="kw">const</span> <a id="646c43" class="tk">rtM</a>)</td></tr>
 <tr name="647" id="647">
-<td><a id="l647" class='ln'>647</a></td><td><span class="ct">   *  Delay: '&lt;S9&gt;/Delay2'</span></td></tr>
+<td><a id="l647" class='ln'>647</a></td><td><span class="br">{</span></td></tr>
 <tr name="648" id="648">
-<td><a id="l648" class='ln'>648</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_A'</span></td></tr>
+<td><a id="l648" class='ln'>648</a></td><td>  <a id="648c3" class="tk">DW</a> <a id="648c6" class="tk">*</a><a id="648c7" class="tk">rtDW</a> = <a id="648c14" class="tk">rtM</a>-&gt;<a id="648c19" class="tk">dwork</a>;</td></tr>
 <tr name="649" id="649">
-<td><a id="l649" class='ln'>649</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_B'</span></td></tr>
+<td><a id="l649" class='ln'>649</a></td><td>  <a id="649c3" class="tk">PrevZCX</a> <a id="649c11" class="tk">*</a><a id="649c12" class="tk">rtPrevZCX</a> = <a id="649c24" class="tk">rtM</a>-&gt;<a id="649c29" class="tk">prevZCSigState</a>;</td></tr>
 <tr name="650" id="650">
-<td><a id="l650" class='ln'>650</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_C'</span></td></tr>
+<td><a id="l650" class='ln'>650</a></td><td>  <a id="650c3" class="tk">ExtU</a> <a id="650c8" class="tk">*</a><a id="650c9" class="tk">rtU</a> = (<a id="650c16" class="tk">ExtU</a> <a id="650c21" class="tk">*</a>) <a id="650c24" class="tk">rtM</a>-&gt;<a id="650c29" class="tk">inputs</a>;</td></tr>
 <tr name="651" id="651">
-<td><a id="l651" class='ln'>651</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l651" class='ln'>651</a></td><td>  <a id="651c3" class="tk">ExtY</a> <a id="651c8" class="tk">*</a><a id="651c9" class="tk">rtY</a> = (<a id="651c16" class="tk">ExtY</a> <a id="651c21" class="tk">*</a>) <a id="651c24" class="tk">rtM</a>-&gt;<a id="651c29" class="tk">outputs</a>;</td></tr>
 <tr name="652" id="652">
-<td><a id="l652" class='ln'>652</a></td><td>  <a id="652c3" class="tk">rtb_Equal_k</a> = (<a id="652c18" class="tk">boolean_T</a>)((<a id="652c30" class="tk">rtU</a>-&gt;<a id="652c35" class="tk">hall_A</a> <a id="652c42" class="tk">!=</a> 0) <a id="652c48" class="tk">^</a> (<a id="652c51" class="tk">rtDW</a>-&gt;<a id="652c57" class="tk">Delay_DSTATE_d</a> <a id="652c72" class="tk">!=</a> 0) <a id="652c78" class="tk">^</a></td></tr>
+<td><a id="l652" class='ln'>652</a></td><td>  <a id="652c3" class="tk">int64_T</a> <a id="652c11" class="tk">tmp_2</a>;</td></tr>
 <tr name="653" id="653">
-<td><a id="l653" class='ln'>653</a></td><td>    (<a id="653c6" class="tk">rtU</a>-&gt;<a id="653c11" class="tk">hall_B</a> <a id="653c18" class="tk">!=</a> 0) <a id="653c24" class="tk">^</a> (<a id="653c27" class="tk">rtDW</a>-&gt;<a id="653c33" class="tk">Delay1_DSTATE</a> <a id="653c47" class="tk">!=</a> 0) <a id="653c53" class="tk">^</a> (<a id="653c56" class="tk">rtU</a>-&gt;<a id="653c61" class="tk">hall_C</a> <a id="653c68" class="tk">!=</a> 0)) <a id="653c75" class="tk">^</a></td></tr>
+<td><a id="l653" class='ln'>653</a></td><td>  <a id="653c3" class="tk">uint64_T</a> <a id="653c12" class="tk">tmp_0</a>;</td></tr>
 <tr name="654" id="654">
-<td><a id="l654" class='ln'>654</a></td><td>    (<a id="654c6" class="tk">rtDW</a>-&gt;<a id="654c12" class="tk">Delay2_DSTATE</a> <a id="654c26" class="tk">!=</a> 0);</td></tr>
+<td><a id="l654" class='ln'>654</a></td><td>  <a id="654c3" class="tk">uint64_T</a> <a id="654c12" class="tk">tmp_1</a>;</td></tr>
 <tr name="655" id="655">
-<td><a id="l655" class='ln'>655</a></td><td></td></tr>
+<td><a id="l655" class='ln'>655</a></td><td>  <a id="655c3" class="tk">int32_T</a> <a id="655c11" class="tk">rtb_Divide_e_idx_1</a>;</td></tr>
 <tr name="656" id="656">
-<td><a id="l656" class='ln'>656</a></td><td>  <span class="ct">/* Sum: '&lt;S11&gt;/Add' incorporates:</span></td></tr>
+<td><a id="l656" class='ln'>656</a></td><td>  <a id="656c3" class="tk">int32_T</a> <a id="656c11" class="tk">rtb_Divide_e_idx_2</a>;</td></tr>
 <tr name="657" id="657">
-<td><a id="l657" class='ln'>657</a></td><td><span class="ct">   *  Gain: '&lt;S11&gt;/Gain'</span></td></tr>
+<td><a id="l657" class='ln'>657</a></td><td>  <a id="657c3" class="tk">int32_T</a> <a id="657c11" class="tk">rtb_Gain_b</a>;</td></tr>
 <tr name="658" id="658">
-<td><a id="l658" class='ln'>658</a></td><td><span class="ct">   *  Gain: '&lt;S11&gt;/Gain1'</span></td></tr>
+<td><a id="l658" class='ln'>658</a></td><td>  <a id="658c3" class="tk">int32_T</a> <a id="658c11" class="tk">rtb_Gain_h</a>;</td></tr>
 <tr name="659" id="659">
-<td><a id="l659" class='ln'>659</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_A'</span></td></tr>
+<td><a id="l659" class='ln'>659</a></td><td>  <a id="659c3" class="tk">int32_T</a> <a id="659c11" class="tk">rtb_Gain_ib</a>;</td></tr>
 <tr name="660" id="660">
-<td><a id="l660" class='ln'>660</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_B'</span></td></tr>
+<td><a id="l660" class='ln'>660</a></td><td>  <a id="660c3" class="tk">int32_T</a> <a id="660c11" class="tk">rtb_MathFunction2_n</a>;</td></tr>
 <tr name="661" id="661">
-<td><a id="l661" class='ln'>661</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_C'</span></td></tr>
+<td><a id="l661" class='ln'>661</a></td><td>  <a id="661c3" class="tk">int32_T</a> <a id="661c11" class="tk">rtb_RelationalOperator4_b</a>;</td></tr>
 <tr name="662" id="662">
-<td><a id="l662" class='ln'>662</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l662" class='ln'>662</a></td><td>  <a id="662c3" class="tk">int32_T</a> <a id="662c11" class="tk">rtb_Switch2_au</a>;</td></tr>
 <tr name="663" id="663">
-<td><a id="l663" class='ln'>663</a></td><td>  <a id="663c3" class="tk">rtb_Add_gf</a> = (<a id="663c17" class="tk">uint8_T</a>)((<a id="663c27" class="tk">uint32_T</a>)(<a id="663c37" class="tk">uint8_T</a>)((<a id="663c47" class="tk">uint32_T</a>)(<a id="663c57" class="tk">uint8_T</a>)(<a id="663c66" class="tk">rtU</a>-&gt;<a id="663c71" class="tk">hall_C</a> <a id="663c78" class="tk">&lt;&lt;</a></td></tr>
+<td><a id="l663" class='ln'>663</a></td><td>  <a id="663c3" class="tk">int32_T</a> <a id="663c11" class="tk">rtb_Switch3</a>;</td></tr>
 <tr name="664" id="664">
-<td><a id="l664" class='ln'>664</a></td><td>    2) <a id="664c8" class="tk">+</a> (<a id="664c11" class="tk">uint8_T</a>)(<a id="664c20" class="tk">rtU</a>-&gt;<a id="664c25" class="tk">hall_B</a> <a id="664c32" class="tk">&lt;&lt;</a> 1)) <a id="664c39" class="tk">+</a> <a id="664c41" class="tk">rtU</a>-&gt;<a id="664c46" class="tk">hall_A</a>);</td></tr>
+<td><a id="l664" class='ln'>664</a></td><td>  <a id="664c3" class="tk">int32_T</a> <a id="664c11" class="tk">tmp</a>;</td></tr>
 <tr name="665" id="665">
-<td><a id="l665" class='ln'>665</a></td><td></td></tr>
+<td><a id="l665" class='ln'>665</a></td><td>  <a id="665c3" class="tk">uint32_T</a> <a id="665c12" class="tk">rtb_Merge</a>;</td></tr>
 <tr name="666" id="666">
-<td><a id="l666" class='ln'>666</a></td><td>  <span class="ct">/* If: '&lt;S3&gt;/If2' incorporates:</span></td></tr>
+<td><a id="l666" class='ln'>666</a></td><td>  <a id="666c3" class="tk">uint32_T</a> <a id="666c12" class="tk">rtb_Rem1</a>;</td></tr>
 <tr name="667" id="667">
-<td><a id="l667" class='ln'>667</a></td><td><span class="ct">   *  If: '&lt;S14&gt;/If2'</span></td></tr>
+<td><a id="l667" class='ln'>667</a></td><td>  <a id="667c3" class="tk">uint32_T</a> <a id="667c12" class="tk">rtb_Switch1</a>;</td></tr>
 <tr name="668" id="668">
-<td><a id="l668" class='ln'>668</a></td><td><span class="ct">   *  Inport: '&lt;S20&gt;/z_counterRawPrev'</span></td></tr>
+<td><a id="l668" class='ln'>668</a></td><td>  <a id="668c3" class="tk">int16_T</a> <a id="668c11" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[2];</td></tr>
 <tr name="669" id="669">
-<td><a id="l669" class='ln'>669</a></td><td><span class="ct">   *  UnitDelay: '&lt;S14&gt;/UnitDelay3'</span></td></tr>
+<td><a id="l669" class='ln'>669</a></td><td>  <a id="669c3" class="tk">int16_T</a> <a id="669c11" class="tk">rtb_UnitDelay1_ko</a>[2];</td></tr>
 <tr name="670" id="670">
-<td><a id="l670" class='ln'>670</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l670" class='ln'>670</a></td><td>  <a id="670c3" class="tk">int16_T</a> <a id="670c11" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="671" id="671">
-<td><a id="l671" class='ln'>671</a></td><td>  <span class="kw">if</span> (<a id="671c7" class="tk">rtb_Equal_k</a>) <span class="br">{</span></td></tr>
+<td><a id="l671" class='ln'>671</a></td><td>  <a id="671c3" class="tk">int16_T</a> <a id="671c11" class="tk">rtb_Divide1_oy</a>;</td></tr>
 <tr name="672" id="672">
-<td><a id="l672" class='ln'>672</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S3&gt;/Direction_Detection' incorporates:</span></td></tr>
+<td><a id="l672" class='ln'>672</a></td><td>  <a id="672c3" class="tk">int16_T</a> <a id="672c11" class="tk">rtb_Divide3_k</a>;</td></tr>
 <tr name="673" id="673">
-<td><a id="l673" class='ln'>673</a></td><td><span class="ct">     *  ActionPort: '&lt;S8&gt;/Action Port'</span></td></tr>
+<td><a id="l673" class='ln'>673</a></td><td>  <a id="673c3" class="tk">int16_T</a> <a id="673c11" class="tk">rtb_Gain_a</a>;</td></tr>
 <tr name="674" id="674">
-<td><a id="l674" class='ln'>674</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l674" class='ln'>674</a></td><td>  <a id="674c3" class="tk">int16_T</a> <a id="674c11" class="tk">rtb_Sum1_ak</a>;</td></tr>
 <tr name="675" id="675">
-<td><a id="l675" class='ln'>675</a></td><td>    <span class="ct">/* UnitDelay: '&lt;S8&gt;/UnitDelay3' */</span></td></tr>
+<td><a id="l675" class='ln'>675</a></td><td>  <a id="675c3" class="tk">int16_T</a> <a id="675c11" class="tk">rtb_Sum6</a>;</td></tr>
 <tr name="676" id="676">
-<td><a id="l676" class='ln'>676</a></td><td>    <a id="676c5" class="tk">UnitDelay3</a> = <a id="676c18" class="tk">rtDW</a>-&gt;<a id="676c24" class="tk">Switch2_i</a>;</td></tr>
+<td><a id="l676" class='ln'>676</a></td><td>  <a id="676c3" class="tk">int16_T</a> <a id="676c11" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="677" id="677">
-<td><a id="l677" class='ln'>677</a></td><td></td></tr>
+<td><a id="l677" class='ln'>677</a></td><td>  <a id="677c3" class="tk">int16_T</a> <a id="677c11" class="tk">rtb_r_cos_M1</a>;</td></tr>
 <tr name="678" id="678">
-<td><a id="l678" class='ln'>678</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S3&gt;/Direction_Detection' */</span></td></tr>
+<td><a id="l678" class='ln'>678</a></td><td>  <a id="678c3" class="tk">uint16_T</a> <a id="678c12" class="tk">rtb_Divide_d</a>;</td></tr>
 <tr name="679" id="679">
-<td><a id="l679" class='ln'>679</a></td><td></td></tr>
+<td><a id="l679" class='ln'>679</a></td><td>  <a id="679c3" class="tk">uint16_T</a> <a id="679c12" class="tk">rtb_Sum1_p</a>;</td></tr>
 <tr name="680" id="680">
-<td><a id="l680" class='ln'>680</a></td><td>    <span class="ct">/* Selector: '&lt;S11&gt;/Selector' incorporates:</span></td></tr>
+<td><a id="l680" class='ln'>680</a></td><td>  <a id="680c3" class="tk">int8_T</a> <a id="680c10" class="tk">rtb_Sum2</a>;</td></tr>
 <tr name="681" id="681">
-<td><a id="l681" class='ln'>681</a></td><td><span class="ct">     *  Constant: '&lt;S11&gt;/vec_hallToPos'</span></td></tr>
+<td><a id="l681" class='ln'>681</a></td><td>  <a id="681c3" class="tk">uint8_T</a> <a id="681c11" class="tk">rtb_Add_h</a>;</td></tr>
 <tr name="682" id="682">
-<td><a id="l682" class='ln'>682</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l682" class='ln'>682</a></td><td>  <a id="682c3" class="tk">uint8_T</a> <a id="682c11" class="tk">rtb_DataTypeConversion_e</a>;</td></tr>
 <tr name="683" id="683">
-<td><a id="l683" class='ln'>683</a></td><td>    <a id="683c5" class="tk">rtb_Sum2_tmp</a> = <a id="683c20" class="tk">rtConstP</a>.<a id="683c29" class="tk">vec_hallToPos_Value</a>[<a id="683c49" class="tk">rtb_Add_gf</a>];</td></tr>
+<td><a id="l683" class='ln'>683</a></td><td>  <a id="683c3" class="tk">uint8_T</a> <a id="683c11" class="tk">rtb_Sum_d</a>;</td></tr>
 <tr name="684" id="684">
-<td><a id="l684" class='ln'>684</a></td><td></td></tr>
+<td><a id="l684" class='ln'>684</a></td><td>  <a id="684c3" class="tk">uint8_T</a> <a id="684c11" class="tk">rtb_UnitDelay_n</a>;</td></tr>
 <tr name="685" id="685">
-<td><a id="l685" class='ln'>685</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S3&gt;/Direction_Detection' incorporates:</span></td></tr>
+<td><a id="l685" class='ln'>685</a></td><td>  <a id="685c3" class="tk">uint8_T</a> <a id="685c11" class="tk">rtb_dz_cntTrnsDet</a>;</td></tr>
 <tr name="686" id="686">
-<td><a id="l686" class='ln'>686</a></td><td><span class="ct">     *  ActionPort: '&lt;S8&gt;/Action Port'</span></td></tr>
+<td><a id="l686" class='ln'>686</a></td><td>  <a id="686c3" class="tk">boolean_T</a> <a id="686c13" class="tk">rtb_Edge_Detect</a>;</td></tr>
 <tr name="687" id="687">
-<td><a id="l687" class='ln'>687</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l687" class='ln'>687</a></td><td>  <a id="687c3" class="tk">boolean_T</a> <a id="687c13" class="tk">rtb_LogicalOperator1_g</a>;</td></tr>
 <tr name="688" id="688">
-<td><a id="l688" class='ln'>688</a></td><td>    <span class="ct">/* Sum: '&lt;S8&gt;/Sum2' incorporates:</span></td></tr>
+<td><a id="l688" class='ln'>688</a></td><td>  <a id="688c3" class="tk">boolean_T</a> <a id="688c13" class="tk">rtb_LogicalOperator2_c</a>;</td></tr>
 <tr name="689" id="689">
-<td><a id="l689" class='ln'>689</a></td><td><span class="ct">     *  Constant: '&lt;S11&gt;/vec_hallToPos'</span></td></tr>
+<td><a id="l689" class='ln'>689</a></td><td>  <a id="689c3" class="tk">boolean_T</a> <a id="689c13" class="tk">rtb_LogicalOperator4_f</a>;</td></tr>
 <tr name="690" id="690">
-<td><a id="l690" class='ln'>690</a></td><td><span class="ct">     *  Selector: '&lt;S11&gt;/Selector'</span></td></tr>
+<td><a id="l690" class='ln'>690</a></td><td>  <a id="690c3" class="tk">boolean_T</a> <a id="690c13" class="tk">rtb_RelationalOperator</a>;</td></tr>
 <tr name="691" id="691">
-<td><a id="l691" class='ln'>691</a></td><td><span class="ct">     *  UnitDelay: '&lt;S8&gt;/UnitDelay2'</span></td></tr>
+<td><a id="l691" class='ln'>691</a></td><td>  <a id="691c3" class="tk">boolean_T</a> <a id="691c13" class="tk">rtb_RelationalOperator4_d</a>;</td></tr>
 <tr name="692" id="692">
-<td><a id="l692" class='ln'>692</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l692" class='ln'>692</a></td><td>  <a id="692c3" class="tk">boolean_T</a> <a id="692c13" class="tk">rtb_UnitDelay_c</a>;</td></tr>
 <tr name="693" id="693">
-<td><a id="l693" class='ln'>693</a></td><td>    <a id="693c5" class="tk">rtb_Sum2</a> = (<a id="693c17" class="tk">int8_T</a>)(<a id="693c25" class="tk">rtb_Sum2_tmp</a> <a id="693c38" class="tk">-</a> <a id="693c40" class="tk">rtDW</a>-&gt;<a id="693c46" class="tk">UnitDelay2_DSTATE_j</a>);</td></tr>
+<td><a id="l693" class='ln'>693</a></td><td></td></tr>
 <tr name="694" id="694">
-<td><a id="l694" class='ln'>694</a></td><td></td></tr>
+<td><a id="l694" class='ln'>694</a></td><td>  <span class="ct">/* Outputs for Atomic SubSystem: '&lt;Root&gt;/PMSM_Controller' */</span></td></tr>
 <tr name="695" id="695">
-<td><a id="l695" class='ln'>695</a></td><td>    <span class="ct">/* Switch: '&lt;S8&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l695" class='ln'>695</a></td><td>  <span class="ct">/* Product: '&lt;S43&gt;/Divide' incorporates:</span></td></tr>
 <tr name="696" id="696">
-<td><a id="l696" class='ln'>696</a></td><td><span class="ct">     *  Constant: '&lt;S8&gt;/Constant20'</span></td></tr>
+<td><a id="l696" class='ln'>696</a></td><td><span class="ct">   *  Constant: '&lt;S43&gt;/Constant'</span></td></tr>
 <tr name="697" id="697">
-<td><a id="l697" class='ln'>697</a></td><td><span class="ct">     *  Constant: '&lt;S8&gt;/Constant8'</span></td></tr>
+<td><a id="l697" class='ln'>697</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/adc_Phase'</span></td></tr>
 <tr name="698" id="698">
-<td><a id="l698" class='ln'>698</a></td><td><span class="ct">     *  Logic: '&lt;S8&gt;/Logical Operator3'</span></td></tr>
+<td><a id="l698" class='ln'>698</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="699" id="699">
-<td><a id="l699" class='ln'>699</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S8&gt;/Relational Operator1'</span></td></tr>
+<td><a id="l699" class='ln'>699</a></td><td>  <a id="699c3" class="tk">rtb_Divide_e_idx_1</a> = <a id="699c24" class="tk">rtU</a>-&gt;<a id="699c29" class="tk">adc_Phase</a>[1] <a id="699c42" class="tk">*</a> <a id="699c44" class="tk">rtP</a>.<a id="699c48" class="tk">f_adc_curr_ceof</a>;</td></tr>
 <tr name="700" id="700">
-<td><a id="l700" class='ln'>700</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S8&gt;/Relational Operator6'</span></td></tr>
+<td><a id="l700" class='ln'>700</a></td><td>  <a id="700c3" class="tk">rtb_Divide_e_idx_2</a> = <a id="700c24" class="tk">rtU</a>-&gt;<a id="700c29" class="tk">adc_Phase</a>[2] <a id="700c42" class="tk">*</a> <a id="700c44" class="tk">rtP</a>.<a id="700c48" class="tk">f_adc_curr_ceof</a>;</td></tr>
 <tr name="701" id="701">
-<td><a id="l701" class='ln'>701</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l701" class='ln'>701</a></td><td></td></tr>
 <tr name="702" id="702">
-<td><a id="l702" class='ln'>702</a></td><td>    <span class="kw">if</span> ((<a id="702c10" class="tk">rtb_Sum2</a> <a id="702c19" class="tk">==</a> 1) <a id="702c25" class="tk">||</a> (<a id="702c29" class="tk">rtb_Sum2</a> <a id="702c38" class="tk">==</a> <a id="702c41" class="tk">-</a>5)) <span class="br">{</span></td></tr>
+<td><a id="l702" class='ln'>702</a></td><td>  <span class="ct">/* Gain: '&lt;S46&gt;/Gain' incorporates:</span></td></tr>
 <tr name="703" id="703">
-<td><a id="l703" class='ln'>703</a></td><td>      <span class="ct">/* Switch: '&lt;S8&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l703" class='ln'>703</a></td><td><span class="ct">   *  Constant: '&lt;S43&gt;/Constant'</span></td></tr>
 <tr name="704" id="704">
-<td><a id="l704" class='ln'>704</a></td><td><span class="ct">       *  Constant: '&lt;S8&gt;/Constant24'</span></td></tr>
+<td><a id="l704" class='ln'>704</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/adc_Phase'</span></td></tr>
 <tr name="705" id="705">
-<td><a id="l705" class='ln'>705</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l705" class='ln'>705</a></td><td><span class="ct">   *  Product: '&lt;S43&gt;/Divide'</span></td></tr>
 <tr name="706" id="706">
-<td><a id="l706" class='ln'>706</a></td><td>      <a id="706c7" class="tk">rtDW</a>-&gt;<a id="706c13" class="tk">Switch2_i</a> = 1;</td></tr>
+<td><a id="l706" class='ln'>706</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="707" id="707">
-<td><a id="l707" class='ln'>707</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l707" class='ln'>707</a></td><td>  <a id="707c3" class="tk">rtb_RelationalOperator4_b</a> = (<a id="707c32" class="tk">rtU</a>-&gt;<a id="707c37" class="tk">adc_Phase</a>[0] <a id="707c50" class="tk">*</a> <a id="707c52" class="tk">rtP</a>.<a id="707c56" class="tk">f_adc_curr_ceof</a>) <a id="707c73" class="tk">&gt;&gt;</a> 8;</td></tr>
 <tr name="708" id="708">
-<td><a id="l708" class='ln'>708</a></td><td>      <span class="ct">/* Switch: '&lt;S8&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l708" class='ln'>708</a></td><td>  <span class="kw">if</span> (<a id="708c7" class="tk">rtb_RelationalOperator4_b</a> <a id="708c33" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="709" id="709">
-<td><a id="l709" class='ln'>709</a></td><td><span class="ct">       *  Constant: '&lt;S8&gt;/Constant23'</span></td></tr>
+<td><a id="l709" class='ln'>709</a></td><td>    <a id="709c5" class="tk">rtb_RelationalOperator4_b</a> = 32767;</td></tr>
 <tr name="710" id="710">
-<td><a id="l710" class='ln'>710</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l710" class='ln'>710</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="711" id="711">
-<td><a id="l711" class='ln'>711</a></td><td>      <a id="711c7" class="tk">rtDW</a>-&gt;<a id="711c13" class="tk">Switch2_i</a> = <a id="711c25" class="tk">-</a>1;</td></tr>
+<td><a id="l711" class='ln'>711</a></td><td>    <span class="kw">if</span> (<a id="711c9" class="tk">rtb_RelationalOperator4_b</a> <a id="711c35" class="tk">&lt;</a> <a id="711c37" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="712" id="712">
-<td><a id="l712" class='ln'>712</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l712" class='ln'>712</a></td><td>      <a id="712c7" class="tk">rtb_RelationalOperator4_b</a> = <a id="712c35" class="tk">-</a>32768;</td></tr>
 <tr name="713" id="713">
-<td><a id="l713" class='ln'>713</a></td><td></td></tr>
+<td><a id="l713" class='ln'>713</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="714" id="714">
-<td><a id="l714" class='ln'>714</a></td><td>    <span class="ct">/* End of Switch: '&lt;S8&gt;/Switch2' */</span></td></tr>
+<td><a id="l714" class='ln'>714</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="715" id="715">
 <td><a id="l715" class='ln'>715</a></td><td></td></tr>
 <tr name="716" id="716">
-<td><a id="l716" class='ln'>716</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S8&gt;/UnitDelay2' */</span></td></tr>
+<td><a id="l716" class='ln'>716</a></td><td>  <span class="ct">/* Sum: '&lt;S46&gt;/Add3' */</span></td></tr>
 <tr name="717" id="717">
-<td><a id="l717" class='ln'>717</a></td><td>    <a id="717c5" class="tk">rtDW</a>-&gt;<a id="717c11" class="tk">UnitDelay2_DSTATE_j</a> = <a id="717c33" class="tk">rtb_Sum2_tmp</a>;</td></tr>
+<td><a id="l717" class='ln'>717</a></td><td>  <a id="717c3" class="tk">tmp_2</a> = ((<a id="717c13" class="tk">int64_T</a>)<a id="717c21" class="tk">rtb_Divide_e_idx_1</a> <a id="717c40" class="tk">+</a> <a id="717c42" class="tk">rtb_Divide_e_idx_2</a>) <a id="717c62" class="tk">&gt;&gt;</a> 8;</td></tr>
 <tr name="718" id="718">
-<td><a id="l718" class='ln'>718</a></td><td></td></tr>
+<td><a id="l718" class='ln'>718</a></td><td>  <span class="kw">if</span> (<a id="718c7" class="tk">tmp_2</a> <a id="718c13" class="tk">&gt;</a> 32767LL) <span class="br">{</span></td></tr>
 <tr name="719" id="719">
-<td><a id="l719" class='ln'>719</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S3&gt;/Direction_Detection' */</span></td></tr>
+<td><a id="l719" class='ln'>719</a></td><td>    <a id="719c5" class="tk">tmp_2</a> = 32767LL;</td></tr>
 <tr name="720" id="720">
-<td><a id="l720" class='ln'>720</a></td><td></td></tr>
+<td><a id="l720" class='ln'>720</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="721" id="721">
-<td><a id="l721" class='ln'>721</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S14&gt;/Raw_Motor_Speed_Estimation' incorporates:</span></td></tr>
+<td><a id="l721" class='ln'>721</a></td><td>    <span class="kw">if</span> (<a id="721c9" class="tk">tmp_2</a> <a id="721c15" class="tk">&lt;</a> <a id="721c17" class="tk">-</a>32768LL) <span class="br">{</span></td></tr>
 <tr name="722" id="722">
-<td><a id="l722" class='ln'>722</a></td><td><span class="ct">     *  ActionPort: '&lt;S20&gt;/Action Port'</span></td></tr>
+<td><a id="l722" class='ln'>722</a></td><td>      <a id="722c7" class="tk">tmp_2</a> = <a id="722c15" class="tk">-</a>32768LL;</td></tr>
 <tr name="723" id="723">
-<td><a id="l723" class='ln'>723</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l723" class='ln'>723</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="724" id="724">
-<td><a id="l724" class='ln'>724</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S20&gt;/Relational Operator4' */</span></td></tr>
+<td><a id="l724" class='ln'>724</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="725" id="725">
-<td><a id="l725" class='ln'>725</a></td><td>    <a id="725c5" class="tk">rtb_RelationalOperator4_f</a> = (<a id="725c34" class="tk">rtDW</a>-&gt;<a id="725c40" class="tk">Switch2_i</a> <a id="725c50" class="tk">!=</a> <a id="725c53" class="tk">UnitDelay3</a>);</td></tr>
+<td><a id="l725" class='ln'>725</a></td><td></td></tr>
 <tr name="726" id="726">
-<td><a id="l726" class='ln'>726</a></td><td>    <a id="726c5" class="tk">rtDW</a>-&gt;<a id="726c11" class="tk">z_counterRawPrev</a> = <a id="726c30" class="tk">rtDW</a>-&gt;<a id="726c36" class="tk">UnitDelay3_DSTATE</a>;</td></tr>
+<td><a id="l726" class='ln'>726</a></td><td>  <span class="ct">/* Sum: '&lt;S46&gt;/Add' incorporates:</span></td></tr>
 <tr name="727" id="727">
-<td><a id="l727" class='ln'>727</a></td><td></td></tr>
+<td><a id="l727" class='ln'>727</a></td><td><span class="ct">   *  Gain: '&lt;S46&gt;/Gain'</span></td></tr>
 <tr name="728" id="728">
-<td><a id="l728" class='ln'>728</a></td><td>    <span class="ct">/* Switch: '&lt;S20&gt;/Switch3' incorporates:</span></td></tr>
+<td><a id="l728" class='ln'>728</a></td><td><span class="ct">   *  Sum: '&lt;S46&gt;/Add3'</span></td></tr>
 <tr name="729" id="729">
-<td><a id="l729" class='ln'>729</a></td><td><span class="ct">     *  Constant: '&lt;S20&gt;/Constant4'</span></td></tr>
+<td><a id="l729" class='ln'>729</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="730" id="730">
-<td><a id="l730" class='ln'>730</a></td><td><span class="ct">     *  Inport: '&lt;S20&gt;/z_counterRawPrev'</span></td></tr>
+<td><a id="l730" class='ln'>730</a></td><td>  <a id="730c3" class="tk">rtb_RelationalOperator4_b</a> = ((<a id="730c33" class="tk">rtb_RelationalOperator4_b</a> <a id="730c59" class="tk">&lt;&lt;</a> 1) <a id="730c65" class="tk">-</a> (<a id="730c68" class="tk">int16_T</a>)<a id="730c76" class="tk">tmp_2</a>)</td></tr>
 <tr name="731" id="731">
-<td><a id="l731" class='ln'>731</a></td><td><span class="ct">     *  Logic: '&lt;S20&gt;/Logical Operator1'</span></td></tr>
+<td><a id="l731" class='ln'>731</a></td><td>    <a id="731c5" class="tk">&gt;&gt;</a> 1;</td></tr>
 <tr name="732" id="732">
-<td><a id="l732" class='ln'>732</a></td><td><span class="ct">     *  Switch: '&lt;S20&gt;/Switch2'</span></td></tr>
+<td><a id="l732" class='ln'>732</a></td><td>  <span class="kw">if</span> (<a id="732c7" class="tk">rtb_RelationalOperator4_b</a> <a id="732c33" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="733" id="733">
-<td><a id="l733" class='ln'>733</a></td><td><span class="ct">     *  UnitDelay: '&lt;S14&gt;/UnitDelay3'</span></td></tr>
+<td><a id="l733" class='ln'>733</a></td><td>    <a id="733c5" class="tk">rtb_RelationalOperator4_b</a> = 32767;</td></tr>
 <tr name="734" id="734">
-<td><a id="l734" class='ln'>734</a></td><td><span class="ct">     *  UnitDelay: '&lt;S20&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l734" class='ln'>734</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="735" id="735">
-<td><a id="l735" class='ln'>735</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l735" class='ln'>735</a></td><td>    <span class="kw">if</span> (<a id="735c9" class="tk">rtb_RelationalOperator4_b</a> <a id="735c35" class="tk">&lt;</a> <a id="735c37" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="736" id="736">
-<td><a id="l736" class='ln'>736</a></td><td>    <span class="kw">if</span> (<a id="736c9" class="tk">rtb_RelationalOperator4_f</a> <a id="736c35" class="tk">&amp;&amp;</a> <a id="736c38" class="tk">rtDW</a>-&gt;<a id="736c44" class="tk">UnitDelay1_DSTATE_iv</a>) <span class="br">{</span></td></tr>
+<td><a id="l736" class='ln'>736</a></td><td>      <a id="736c7" class="tk">rtb_RelationalOperator4_b</a> = <a id="736c35" class="tk">-</a>32768;</td></tr>
 <tr name="737" id="737">
-<td><a id="l737" class='ln'>737</a></td><td>      <a id="737c7" class="tk">rtb_Switch3</a> = 0;</td></tr>
+<td><a id="l737" class='ln'>737</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="738" id="738">
-<td><a id="l738" class='ln'>738</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l738" class='ln'>738</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="739" id="739">
-<td><a id="l739" class='ln'>739</a></td><td>      <span class="kw">if</span> (<a id="739c11" class="tk">rtb_RelationalOperator4_f</a>) <span class="br">{</span></td></tr>
+<td><a id="l739" class='ln'>739</a></td><td></td></tr>
 <tr name="740" id="740">
-<td><a id="l740" class='ln'>740</a></td><td>        <span class="ct">/* Switch: '&lt;S20&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l740" class='ln'>740</a></td><td>  <span class="ct">/* Gain: '&lt;S46&gt;/Gain1' incorporates:</span></td></tr>
 <tr name="741" id="741">
-<td><a id="l741" class='ln'>741</a></td><td><span class="ct">         *  UnitDelay: '&lt;S14&gt;/UnitDelay4'</span></td></tr>
+<td><a id="l741" class='ln'>741</a></td><td><span class="ct">   *  Product: '&lt;S48&gt;/Divide1'</span></td></tr>
 <tr name="742" id="742">
-<td><a id="l742" class='ln'>742</a></td><td><span class="ct">         */</span></td></tr>
+<td><a id="l742" class='ln'>742</a></td><td><span class="ct">   *  Sum: '&lt;S46&gt;/Add'</span></td></tr>
 <tr name="743" id="743">
-<td><a id="l743" class='ln'>743</a></td><td>        <a id="743c9" class="tk">rtb_Switch2</a> = <a id="743c23" class="tk">rtDW</a>-&gt;<a id="743c29" class="tk">UnitDelay4_DSTATE</a>;</td></tr>
+<td><a id="l743" class='ln'>743</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="744" id="744">
-<td><a id="l744" class='ln'>744</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l744" class='ln'>744</a></td><td>  <a id="744c3" class="tk">rtb_Divide1_oy</a> = (<a id="744c21" class="tk">int16_T</a>)((21845 <a id="744c37" class="tk">*</a> <a id="744c39" class="tk">rtb_RelationalOperator4_b</a>) <a id="744c66" class="tk">&gt;&gt;</a> 16);</td></tr>
 <tr name="745" id="745">
-<td><a id="l745" class='ln'>745</a></td><td>        <span class="ct">/* Sum: '&lt;S20&gt;/Sum13' incorporates:</span></td></tr>
+<td><a id="l745" class='ln'>745</a></td><td></td></tr>
 <tr name="746" id="746">
-<td><a id="l746" class='ln'>746</a></td><td><span class="ct">         *  Switch: '&lt;S20&gt;/Switch2'</span></td></tr>
+<td><a id="l746" class='ln'>746</a></td><td>  <span class="ct">/* Logic: '&lt;S17&gt;/Edge_Detect' incorporates:</span></td></tr>
 <tr name="747" id="747">
-<td><a id="l747" class='ln'>747</a></td><td><span class="ct">         *  UnitDelay: '&lt;S20&gt;/UnitDelay2'</span></td></tr>
+<td><a id="l747" class='ln'>747</a></td><td><span class="ct">   *  Delay: '&lt;S17&gt;/Delay'</span></td></tr>
 <tr name="748" id="748">
-<td><a id="l748" class='ln'>748</a></td><td><span class="ct">         *  UnitDelay: '&lt;S20&gt;/UnitDelay3'</span></td></tr>
+<td><a id="l748" class='ln'>748</a></td><td><span class="ct">   *  Delay: '&lt;S17&gt;/Delay1'</span></td></tr>
 <tr name="749" id="749">
-<td><a id="l749" class='ln'>749</a></td><td><span class="ct">         *  UnitDelay: '&lt;S20&gt;/UnitDelay5'</span></td></tr>
+<td><a id="l749" class='ln'>749</a></td><td><span class="ct">   *  Delay: '&lt;S17&gt;/Delay2'</span></td></tr>
 <tr name="750" id="750">
-<td><a id="l750" class='ln'>750</a></td><td><span class="ct">         */</span></td></tr>
+<td><a id="l750" class='ln'>750</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_abc'</span></td></tr>
 <tr name="751" id="751">
-<td><a id="l751" class='ln'>751</a></td><td>        <a id="751c9" class="tk">tmp_3</a> = (((<a id="751c20" class="tk">uint64_T</a>)<a id="751c29" class="tk">rtDW</a>-&gt;<a id="751c35" class="tk">UnitDelay2_DSTATE</a> <a id="751c53" class="tk">+</a> <a id="751c55" class="tk">rtDW</a>-&gt;<a id="751c61" class="tk">UnitDelay3_DSTATE_l</a>)</td></tr>
+<td><a id="l751" class='ln'>751</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="752" id="752">
-<td><a id="l752" class='ln'>752</a></td><td>                 <a id="752c18" class="tk">+</a> <a id="752c20" class="tk">rtDW</a>-&gt;<a id="752c26" class="tk">UnitDelay5_DSTATE</a>) <a id="752c45" class="tk">+</a> <a id="752c47" class="tk">rtDW</a>-&gt;<a id="752c53" class="tk">z_counterRawPrev</a>;</td></tr>
+<td><a id="l752" class='ln'>752</a></td><td>  <a id="752c3" class="tk">rtb_Edge_Detect</a> = (<a id="752c22" class="tk">boolean_T</a>)((<a id="752c34" class="tk">rtU</a>-&gt;<a id="752c39" class="tk">hall_abc</a>[0] <a id="752c51" class="tk">!=</a> 0) <a id="752c57" class="tk">^</a> (<a id="752c60" class="tk">rtDW</a>-&gt;<a id="752c66" class="tk">Delay_DSTATE_p</a></td></tr>
 <tr name="753" id="753">
-<td><a id="l753" class='ln'>753</a></td><td>        <span class="kw">if</span> (<a id="753c13" class="tk">tmp_3</a> <a id="753c19" class="tk">&gt;</a> 4294967295ULL) <span class="br">{</span></td></tr>
+<td><a id="l753" class='ln'>753</a></td><td>    <a id="753c5" class="tk">!=</a> 0) <a id="753c11" class="tk">^</a> (<a id="753c14" class="tk">rtU</a>-&gt;<a id="753c19" class="tk">hall_abc</a>[1] <a id="753c31" class="tk">!=</a> 0) <a id="753c37" class="tk">^</a> (<a id="753c40" class="tk">rtDW</a>-&gt;<a id="753c46" class="tk">Delay1_DSTATE</a> <a id="753c60" class="tk">!=</a> 0) <a id="753c66" class="tk">^</a></td></tr>
 <tr name="754" id="754">
-<td><a id="l754" class='ln'>754</a></td><td>          <a id="754c11" class="tk">tmp_3</a> = 4294967295ULL;</td></tr>
+<td><a id="l754" class='ln'>754</a></td><td>    (<a id="754c6" class="tk">rtU</a>-&gt;<a id="754c11" class="tk">hall_abc</a>[2] <a id="754c23" class="tk">!=</a> 0)) <a id="754c30" class="tk">^</a> (<a id="754c33" class="tk">rtDW</a>-&gt;<a id="754c39" class="tk">Delay2_DSTATE</a> <a id="754c53" class="tk">!=</a> 0);</td></tr>
 <tr name="755" id="755">
-<td><a id="l755" class='ln'>755</a></td><td>        <span class="br">}</span></td></tr>
+<td><a id="l755" class='ln'>755</a></td><td></td></tr>
 <tr name="756" id="756">
-<td><a id="l756" class='ln'>756</a></td><td></td></tr>
+<td><a id="l756" class='ln'>756</a></td><td>  <span class="ct">/* Sum: '&lt;S19&gt;/Add' incorporates:</span></td></tr>
 <tr name="757" id="757">
-<td><a id="l757" class='ln'>757</a></td><td>        <span class="ct">/* Product: '&lt;S20&gt;/Divide13' incorporates:</span></td></tr>
+<td><a id="l757" class='ln'>757</a></td><td><span class="ct">   *  Gain: '&lt;S19&gt;/Gain'</span></td></tr>
 <tr name="758" id="758">
-<td><a id="l758" class='ln'>758</a></td><td><span class="ct">         *  Constant: '&lt;S20&gt;/cf_speedCoef'</span></td></tr>
+<td><a id="l758" class='ln'>758</a></td><td><span class="ct">   *  Gain: '&lt;S19&gt;/Gain1'</span></td></tr>
 <tr name="759" id="759">
-<td><a id="l759" class='ln'>759</a></td><td><span class="ct">         *  Constant: '&lt;S20&gt;/cf_speedCoef1'</span></td></tr>
+<td><a id="l759" class='ln'>759</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_abc'</span></td></tr>
 <tr name="760" id="760">
-<td><a id="l760" class='ln'>760</a></td><td><span class="ct">         *  Gain: '&lt;S20&gt;/g_Ha'</span></td></tr>
+<td><a id="l760" class='ln'>760</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="761" id="761">
-<td><a id="l761" class='ln'>761</a></td><td><span class="ct">         *  Product: '&lt;S20&gt;/Divide'</span></td></tr>
+<td><a id="l761" class='ln'>761</a></td><td>  <a id="761c3" class="tk">rtb_Add_h</a> = (<a id="761c16" class="tk">uint8_T</a>)((<a id="761c26" class="tk">uint32_T</a>)(<a id="761c36" class="tk">uint8_T</a>)((<a id="761c46" class="tk">uint32_T</a>)(<a id="761c56" class="tk">uint8_T</a>)(<a id="761c65" class="tk">rtU</a>-&gt;<a id="761c70" class="tk">hall_abc</a>[2]</td></tr>
 <tr name="762" id="762">
-<td><a id="l762" class='ln'>762</a></td><td><span class="ct">         *  Sum: '&lt;S20&gt;/Sum13'</span></td></tr>
+<td><a id="l762" class='ln'>762</a></td><td>    <a id="762c5" class="tk">&lt;&lt;</a> 2) <a id="762c11" class="tk">+</a> (<a id="762c14" class="tk">uint8_T</a>)(<a id="762c23" class="tk">rtU</a>-&gt;<a id="762c28" class="tk">hall_abc</a>[1] <a id="762c40" class="tk">&lt;&lt;</a> 1)) <a id="762c47" class="tk">+</a> <a id="762c49" class="tk">rtU</a>-&gt;<a id="762c54" class="tk">hall_abc</a>[0]);</td></tr>
 <tr name="763" id="763">
-<td><a id="l763" class='ln'>763</a></td><td><span class="ct">         *  Switch: '&lt;S20&gt;/Switch2'</span></td></tr>
+<td><a id="l763" class='ln'>763</a></td><td></td></tr>
 <tr name="764" id="764">
-<td><a id="l764" class='ln'>764</a></td><td><span class="ct">         */</span></td></tr>
+<td><a id="l764" class='ln'>764</a></td><td>  <span class="ct">/* If: '&lt;S3&gt;/If2' incorporates:</span></td></tr>
 <tr name="765" id="765">
-<td><a id="l765" class='ln'>765</a></td><td>        <a id="765c9" class="tk">tmp_3</a> = ((<a id="765c19" class="tk">uint64_T</a>)((10000000U <a id="765c40" class="tk">/</a> <a id="765c42" class="tk">rtP</a>.<a id="765c46" class="tk">n_polePairs</a>) <a id="765c59" class="tk">&lt;&lt;</a> 2) <a id="765c65" class="tk">&lt;&lt;</a> 4) <a id="765c71" class="tk">/</a></td></tr>
+<td><a id="l765" class='ln'>765</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/sys_ticks'</span></td></tr>
 <tr name="766" id="766">
-<td><a id="l766" class='ln'>766</a></td><td>          (<a id="766c12" class="tk">uint32_T</a>)<a id="766c21" class="tk">tmp_3</a>;</td></tr>
+<td><a id="l766" class='ln'>766</a></td><td><span class="ct">   *  Inport: '&lt;S16&gt;/i_count'</span></td></tr>
 <tr name="767" id="767">
-<td><a id="l767" class='ln'>767</a></td><td>        <span class="kw">if</span> (<a id="767c13" class="tk">tmp_3</a> <a id="767c19" class="tk">&gt;</a> 4294967295ULL) <span class="br">{</span></td></tr>
+<td><a id="l767" class='ln'>767</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="768" id="768">
-<td><a id="l768" class='ln'>768</a></td><td>          <a id="768c11" class="tk">tmp_3</a> = 4294967295ULL;</td></tr>
+<td><a id="l768" class='ln'>768</a></td><td>  <span class="kw">if</span> (<a id="768c7" class="tk">rtb_Edge_Detect</a>) <span class="br">{</span></td></tr>
 <tr name="769" id="769">
-<td><a id="l769" class='ln'>769</a></td><td>        <span class="br">}</span></td></tr>
+<td><a id="l769" class='ln'>769</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S3&gt;/Direction_Detection' incorporates:</span></td></tr>
 <tr name="770" id="770">
-<td><a id="l770" class='ln'>770</a></td><td></td></tr>
+<td><a id="l770" class='ln'>770</a></td><td><span class="ct">     *  ActionPort: '&lt;S16&gt;/Action Port'</span></td></tr>
 <tr name="771" id="771">
-<td><a id="l771" class='ln'>771</a></td><td>        <span class="ct">/* Switch: '&lt;S20&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l771" class='ln'>771</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="772" id="772">
-<td><a id="l772" class='ln'>772</a></td><td><span class="ct">         *  Product: '&lt;S20&gt;/Divide13'</span></td></tr>
+<td><a id="l772" class='ln'>772</a></td><td>    <span class="ct">/* UnitDelay: '&lt;S16&gt;/UnitDelay3' */</span></td></tr>
 <tr name="773" id="773">
-<td><a id="l773" class='ln'>773</a></td><td><span class="ct">         */</span></td></tr>
+<td><a id="l773" class='ln'>773</a></td><td>    <a id="773c5" class="tk">rtDW</a>-&gt;<a id="773c11" class="tk">UnitDelay3</a> = <a id="773c24" class="tk">rtDW</a>-&gt;<a id="773c30" class="tk">Switch2_o</a>;</td></tr>
 <tr name="774" id="774">
-<td><a id="l774" class='ln'>774</a></td><td>        <a id="774c9" class="tk">rtb_Switch2</a> = (<a id="774c24" class="tk">uint32_T</a>)<a id="774c33" class="tk">tmp_3</a>;</td></tr>
+<td><a id="l774" class='ln'>774</a></td><td></td></tr>
 <tr name="775" id="775">
-<td><a id="l775" class='ln'>775</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l775" class='ln'>775</a></td><td>    <span class="ct">/* Sum: '&lt;S16&gt;/Sum2' incorporates:</span></td></tr>
 <tr name="776" id="776">
-<td><a id="l776" class='ln'>776</a></td><td></td></tr>
+<td><a id="l776" class='ln'>776</a></td><td><span class="ct">     *  Constant: '&lt;S19&gt;/vec_hallToPos'</span></td></tr>
 <tr name="777" id="777">
-<td><a id="l777" class='ln'>777</a></td><td>      <a id="777c7" class="tk">rtb_Switch3</a> = (<a id="777c22" class="tk">int32_T</a>)<a id="777c30" class="tk">rtb_Switch2</a>;</td></tr>
+<td><a id="l777" class='ln'>777</a></td><td><span class="ct">     *  Selector: '&lt;S19&gt;/Selector'</span></td></tr>
 <tr name="778" id="778">
-<td><a id="l778" class='ln'>778</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l778" class='ln'>778</a></td><td><span class="ct">     *  UnitDelay: '&lt;S16&gt;/UnitDelay2'</span></td></tr>
 <tr name="779" id="779">
-<td><a id="l779" class='ln'>779</a></td><td></td></tr>
+<td><a id="l779" class='ln'>779</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="780" id="780">
-<td><a id="l780" class='ln'>780</a></td><td>    <span class="ct">/* End of Switch: '&lt;S20&gt;/Switch3' */</span></td></tr>
+<td><a id="l780" class='ln'>780</a></td><td>    <a id="780c5" class="tk">rtb_Sum2</a> = (<a id="780c17" class="tk">int8_T</a>)(<a id="780c25" class="tk">rtConstP</a>.<a id="780c34" class="tk">vec_hallToPos_Value</a>[<a id="780c54" class="tk">rtb_Add_h</a>] <a id="780c65" class="tk">-</a></td></tr>
 <tr name="781" id="781">
-<td><a id="l781" class='ln'>781</a></td><td></td></tr>
+<td><a id="l781" class='ln'>781</a></td><td>                        <a id="781c25" class="tk">rtDW</a>-&gt;<a id="781c31" class="tk">UnitDelay2_DSTATE_i</a>);</td></tr>
 <tr name="782" id="782">
-<td><a id="l782" class='ln'>782</a></td><td>    <span class="ct">/* Product: '&lt;S20&gt;/Divide11' incorporates:</span></td></tr>
+<td><a id="l782" class='ln'>782</a></td><td></td></tr>
 <tr name="783" id="783">
-<td><a id="l783" class='ln'>783</a></td><td><span class="ct">     *  Switch: '&lt;S20&gt;/Switch3'</span></td></tr>
+<td><a id="l783" class='ln'>783</a></td><td>    <span class="ct">/* Switch: '&lt;S16&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="784" id="784">
-<td><a id="l784" class='ln'>784</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l784" class='ln'>784</a></td><td><span class="ct">     *  Constant: '&lt;S16&gt;/Constant20'</span></td></tr>
 <tr name="785" id="785">
-<td><a id="l785" class='ln'>785</a></td><td>    <a id="785c5" class="tk">rtDW</a>-&gt;<a id="785c11" class="tk">Divide11</a> = <a id="785c22" class="tk">rtb_Switch3</a> <a id="785c34" class="tk">*</a> <a id="785c36" class="tk">rtDW</a>-&gt;<a id="785c42" class="tk">Switch2_i</a>;</td></tr>
+<td><a id="l785" class='ln'>785</a></td><td><span class="ct">     *  Constant: '&lt;S16&gt;/Constant8'</span></td></tr>
 <tr name="786" id="786">
-<td><a id="l786" class='ln'>786</a></td><td></td></tr>
+<td><a id="l786" class='ln'>786</a></td><td><span class="ct">     *  Logic: '&lt;S16&gt;/Logical Operator3'</span></td></tr>
 <tr name="787" id="787">
-<td><a id="l787" class='ln'>787</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S20&gt;/UnitDelay1' */</span></td></tr>
+<td><a id="l787" class='ln'>787</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S16&gt;/Relational Operator1'</span></td></tr>
 <tr name="788" id="788">
-<td><a id="l788" class='ln'>788</a></td><td>    <a id="788c5" class="tk">rtDW</a>-&gt;<a id="788c11" class="tk">UnitDelay1_DSTATE_iv</a> = <a id="788c34" class="tk">rtb_RelationalOperator4_f</a>;</td></tr>
+<td><a id="l788" class='ln'>788</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S16&gt;/Relational Operator6'</span></td></tr>
 <tr name="789" id="789">
-<td><a id="l789" class='ln'>789</a></td><td></td></tr>
+<td><a id="l789" class='ln'>789</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="790" id="790">
-<td><a id="l790" class='ln'>790</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S20&gt;/UnitDelay2' incorporates:</span></td></tr>
+<td><a id="l790" class='ln'>790</a></td><td>    <span class="kw">if</span> ((<a id="790c10" class="tk">rtb_Sum2</a> <a id="790c19" class="tk">==</a> 1) <a id="790c25" class="tk">||</a> (<a id="790c29" class="tk">rtb_Sum2</a> <a id="790c38" class="tk">==</a> <a id="790c41" class="tk">-</a>5)) <span class="br">{</span></td></tr>
 <tr name="791" id="791">
-<td><a id="l791" class='ln'>791</a></td><td><span class="ct">     *  UnitDelay: '&lt;S20&gt;/UnitDelay3'</span></td></tr>
+<td><a id="l791" class='ln'>791</a></td><td>      <span class="ct">/* Switch: '&lt;S16&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="792" id="792">
-<td><a id="l792" class='ln'>792</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l792" class='ln'>792</a></td><td><span class="ct">       *  Constant: '&lt;S16&gt;/Constant24'</span></td></tr>
 <tr name="793" id="793">
-<td><a id="l793" class='ln'>793</a></td><td>    <a id="793c5" class="tk">rtDW</a>-&gt;<a id="793c11" class="tk">UnitDelay2_DSTATE</a> = <a id="793c31" class="tk">rtDW</a>-&gt;<a id="793c37" class="tk">UnitDelay3_DSTATE_l</a>;</td></tr>
+<td><a id="l793" class='ln'>793</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="794" id="794">
-<td><a id="l794" class='ln'>794</a></td><td></td></tr>
+<td><a id="l794" class='ln'>794</a></td><td>      <a id="794c7" class="tk">rtDW</a>-&gt;<a id="794c13" class="tk">Switch2_o</a> = 1;</td></tr>
 <tr name="795" id="795">
-<td><a id="l795" class='ln'>795</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S20&gt;/UnitDelay3' incorporates:</span></td></tr>
+<td><a id="l795" class='ln'>795</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="796" id="796">
-<td><a id="l796" class='ln'>796</a></td><td><span class="ct">     *  UnitDelay: '&lt;S20&gt;/UnitDelay5'</span></td></tr>
+<td><a id="l796" class='ln'>796</a></td><td>      <span class="ct">/* Switch: '&lt;S16&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="797" id="797">
-<td><a id="l797" class='ln'>797</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l797" class='ln'>797</a></td><td><span class="ct">       *  Constant: '&lt;S16&gt;/Constant23'</span></td></tr>
 <tr name="798" id="798">
-<td><a id="l798" class='ln'>798</a></td><td>    <a id="798c5" class="tk">rtDW</a>-&gt;<a id="798c11" class="tk">UnitDelay3_DSTATE_l</a> = <a id="798c33" class="tk">rtDW</a>-&gt;<a id="798c39" class="tk">UnitDelay5_DSTATE</a>;</td></tr>
+<td><a id="l798" class='ln'>798</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="799" id="799">
-<td><a id="l799" class='ln'>799</a></td><td></td></tr>
+<td><a id="l799" class='ln'>799</a></td><td>      <a id="799c7" class="tk">rtDW</a>-&gt;<a id="799c13" class="tk">Switch2_o</a> = <a id="799c25" class="tk">-</a>1;</td></tr>
 <tr name="800" id="800">
-<td><a id="l800" class='ln'>800</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S20&gt;/UnitDelay5' */</span></td></tr>
+<td><a id="l800" class='ln'>800</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="801" id="801">
-<td><a id="l801" class='ln'>801</a></td><td>    <a id="801c5" class="tk">rtDW</a>-&gt;<a id="801c11" class="tk">UnitDelay5_DSTATE</a> = <a id="801c31" class="tk">rtDW</a>-&gt;<a id="801c37" class="tk">z_counterRawPrev</a>;</td></tr>
+<td><a id="l801" class='ln'>801</a></td><td></td></tr>
 <tr name="802" id="802">
-<td><a id="l802" class='ln'>802</a></td><td></td></tr>
+<td><a id="l802" class='ln'>802</a></td><td>    <span class="ct">/* End of Switch: '&lt;S16&gt;/Switch2' */</span></td></tr>
 <tr name="803" id="803">
-<td><a id="l803" class='ln'>803</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S14&gt;/Raw_Motor_Speed_Estimation' */</span></td></tr>
+<td><a id="l803" class='ln'>803</a></td><td>    <a id="803c5" class="tk">rtDW</a>-&gt;<a id="803c11" class="tk">i_count</a> = <a id="803c21" class="tk">rtU</a>-&gt;<a id="803c26" class="tk">sys_ticks</a>;</td></tr>
 <tr name="804" id="804">
-<td><a id="l804" class='ln'>804</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l804" class='ln'>804</a></td><td></td></tr>
 <tr name="805" id="805">
-<td><a id="l805" class='ln'>805</a></td><td></td></tr>
+<td><a id="l805" class='ln'>805</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S16&gt;/UnitDelay2' incorporates:</span></td></tr>
 <tr name="806" id="806">
-<td><a id="l806" class='ln'>806</a></td><td>  <span class="ct">/* End of If: '&lt;S3&gt;/If2' */</span></td></tr>
+<td><a id="l806" class='ln'>806</a></td><td><span class="ct">     *  Constant: '&lt;S19&gt;/vec_hallToPos'</span></td></tr>
 <tr name="807" id="807">
-<td><a id="l807" class='ln'>807</a></td><td></td></tr>
+<td><a id="l807" class='ln'>807</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/sys_ticks'</span></td></tr>
 <tr name="808" id="808">
-<td><a id="l808" class='ln'>808</a></td><td>  <span class="ct">/* Switch: '&lt;S14&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l808" class='ln'>808</a></td><td><span class="ct">     *  Inport: '&lt;S16&gt;/i_count'</span></td></tr>
 <tr name="809" id="809">
-<td><a id="l809" class='ln'>809</a></td><td><span class="ct">   *  Constant: '&lt;S14&gt;/Constant4'</span></td></tr>
+<td><a id="l809" class='ln'>809</a></td><td><span class="ct">     *  Selector: '&lt;S19&gt;/Selector'</span></td></tr>
 <tr name="810" id="810">
-<td><a id="l810" class='ln'>810</a></td><td><span class="ct">   *  Constant: '&lt;S14&gt;/z_maxCntRst'</span></td></tr>
+<td><a id="l810" class='ln'>810</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="811" id="811">
-<td><a id="l811" class='ln'>811</a></td><td><span class="ct">   *  Gain: '&lt;S14&gt;/Gain'</span></td></tr>
+<td><a id="l811" class='ln'>811</a></td><td>    <a id="811c5" class="tk">rtDW</a>-&gt;<a id="811c11" class="tk">UnitDelay2_DSTATE_i</a> = <a id="811c33" class="tk">rtConstP</a>.<a id="811c42" class="tk">vec_hallToPos_Value</a>[<a id="811c62" class="tk">rtb_Add_h</a>];</td></tr>
 <tr name="812" id="812">
-<td><a id="l812" class='ln'>812</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/us_Count'</span></td></tr>
+<td><a id="l812" class='ln'>812</a></td><td></td></tr>
 <tr name="813" id="813">
-<td><a id="l813" class='ln'>813</a></td><td><span class="ct">   *  Product: '&lt;S20&gt;/Divide11'</span></td></tr>
+<td><a id="l813" class='ln'>813</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S3&gt;/Direction_Detection' */</span></td></tr>
 <tr name="814" id="814">
-<td><a id="l814" class='ln'>814</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S14&gt;/Relational Operator2'</span></td></tr>
+<td><a id="l814" class='ln'>814</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="815" id="815">
-<td><a id="l815" class='ln'>815</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l815" class='ln'>815</a></td><td></td></tr>
 <tr name="816" id="816">
-<td><a id="l816" class='ln'>816</a></td><td>  <span class="kw">if</span> (<a id="816c7" class="tk">rtU</a>-&gt;<a id="816c12" class="tk">us_Count</a> <a id="816c21" class="tk">&gt;=</a> (<a id="816c25" class="tk">rtP</a>.<a id="816c29" class="tk">n_hall_count_ps</a> <a id="816c45" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
+<td><a id="l816" class='ln'>816</a></td><td>  <span class="ct">/* End of If: '&lt;S3&gt;/If2' */</span></td></tr>
 <tr name="817" id="817">
-<td><a id="l817" class='ln'>817</a></td><td>    <a id="817c5" class="tk">rtb_Switch3</a> = 0;</td></tr>
+<td><a id="l817" class='ln'>817</a></td><td></td></tr>
 <tr name="818" id="818">
-<td><a id="l818" class='ln'>818</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l818" class='ln'>818</a></td><td>  <span class="ct">/* If: '&lt;S21&gt;/If' incorporates:</span></td></tr>
 <tr name="819" id="819">
-<td><a id="l819" class='ln'>819</a></td><td>    <a id="819c5" class="tk">rtb_Switch3</a> = <a id="819c19" class="tk">rtDW</a>-&gt;<a id="819c25" class="tk">Divide11</a>;</td></tr>
+<td><a id="l819" class='ln'>819</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/sys_ticks'</span></td></tr>
 <tr name="820" id="820">
-<td><a id="l820" class='ln'>820</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l820" class='ln'>820</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="821" id="821">
-<td><a id="l821" class='ln'>821</a></td><td></td></tr>
+<td><a id="l821" class='ln'>821</a></td><td>  <span class="kw">if</span> (<a id="821c7" class="tk">rtU</a>-&gt;<a id="821c12" class="tk">sys_ticks</a> <a id="821c22" class="tk">&gt;=</a> <a id="821c25" class="tk">rtDW</a>-&gt;<a id="821c31" class="tk">i_count</a>) <span class="br">{</span></td></tr>
 <tr name="822" id="822">
-<td><a id="l822" class='ln'>822</a></td><td>  <span class="ct">/* End of Switch: '&lt;S14&gt;/Switch2' */</span></td></tr>
+<td><a id="l822" class='ln'>822</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S21&gt;/normal' incorporates:</span></td></tr>
 <tr name="823" id="823">
-<td><a id="l823" class='ln'>823</a></td><td></td></tr>
+<td><a id="l823" class='ln'>823</a></td><td><span class="ct">     *  ActionPort: '&lt;S23&gt;/Action Port'</span></td></tr>
 <tr name="824" id="824">
-<td><a id="l824" class='ln'>824</a></td><td>  <span class="ct">/* Abs: '&lt;S14&gt;/Abs5' incorporates:</span></td></tr>
+<td><a id="l824" class='ln'>824</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="825" id="825">
-<td><a id="l825" class='ln'>825</a></td><td><span class="ct">   *  Switch: '&lt;S14&gt;/Switch2'</span></td></tr>
+<td><a id="l825" class='ln'>825</a></td><td>    <span class="ct">/* Sum: '&lt;S23&gt;/Subtract' */</span></td></tr>
 <tr name="826" id="826">
-<td><a id="l826" class='ln'>826</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l826" class='ln'>826</a></td><td>    <a id="826c5" class="tk">rtb_Rem1</a> = <a id="826c16" class="tk">rtU</a>-&gt;<a id="826c21" class="tk">sys_ticks</a> <a id="826c31" class="tk">-</a> <a id="826c33" class="tk">rtDW</a>-&gt;<a id="826c39" class="tk">i_count</a>;</td></tr>
 <tr name="827" id="827">
-<td><a id="l827" class='ln'>827</a></td><td>  <span class="kw">if</span> (<a id="827c7" class="tk">rtb_Switch3</a> <a id="827c19" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l827" class='ln'>827</a></td><td></td></tr>
 <tr name="828" id="828">
-<td><a id="l828" class='ln'>828</a></td><td>    <a id="828c5" class="tk">rtb_Switch2</a> = (<a id="828c20" class="tk">uint32_T</a>)<a id="828c29" class="tk">-</a><a id="828c30" class="tk">rtb_Switch3</a>;</td></tr>
+<td><a id="l828" class='ln'>828</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S21&gt;/normal' */</span></td></tr>
 <tr name="829" id="829">
 <td><a id="l829" class='ln'>829</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="830" id="830">
-<td><a id="l830" class='ln'>830</a></td><td>    <a id="830c5" class="tk">rtb_Switch2</a> = (<a id="830c20" class="tk">uint32_T</a>)<a id="830c29" class="tk">rtb_Switch3</a>;</td></tr>
+<td><a id="l830" class='ln'>830</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S21&gt;/wrapper' incorporates:</span></td></tr>
 <tr name="831" id="831">
-<td><a id="l831" class='ln'>831</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l831" class='ln'>831</a></td><td><span class="ct">     *  ActionPort: '&lt;S24&gt;/Action Port'</span></td></tr>
 <tr name="832" id="832">
-<td><a id="l832" class='ln'>832</a></td><td></td></tr>
+<td><a id="l832" class='ln'>832</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="833" id="833">
-<td><a id="l833" class='ln'>833</a></td><td>  <span class="ct">/* End of Abs: '&lt;S14&gt;/Abs5' */</span></td></tr>
+<td><a id="l833" class='ln'>833</a></td><td>    <a id="833c5" class="tk">wrapper</a>(<a id="833c13" class="tk">rtU</a>-&gt;<a id="833c18" class="tk">sys_ticks</a>, <a id="833c29" class="tk">rtDW</a>-&gt;<a id="833c35" class="tk">i_count</a>, <a id="833c44" class="tk">&amp;</a><a id="833c45" class="tk">rtb_Rem1</a>);</td></tr>
 <tr name="834" id="834">
 <td><a id="l834" class='ln'>834</a></td><td></td></tr>
 <tr name="835" id="835">
-<td><a id="l835" class='ln'>835</a></td><td>  <span class="ct">/* If: '&lt;S14&gt;/If1' */</span></td></tr>
+<td><a id="l835" class='ln'>835</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S21&gt;/wrapper' */</span></td></tr>
 <tr name="836" id="836">
-<td><a id="l836" class='ln'>836</a></td><td>  <span class="kw">if</span> (<a id="836c7" class="tk">rtb_Equal_k</a>) <span class="br">{</span></td></tr>
+<td><a id="l836" class='ln'>836</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="837" id="837">
-<td><a id="l837" class='ln'>837</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S14&gt;/AdvCtrlDetect' incorporates:</span></td></tr>
+<td><a id="l837" class='ln'>837</a></td><td></td></tr>
 <tr name="838" id="838">
-<td><a id="l838" class='ln'>838</a></td><td><span class="ct">     *  ActionPort: '&lt;S19&gt;/Action Port'</span></td></tr>
+<td><a id="l838" class='ln'>838</a></td><td>  <span class="ct">/* End of If: '&lt;S21&gt;/If' */</span></td></tr>
 <tr name="839" id="839">
-<td><a id="l839" class='ln'>839</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l839" class='ln'>839</a></td><td></td></tr>
 <tr name="840" id="840">
-<td><a id="l840" class='ln'>840</a></td><td>    <span class="ct">/* Relay: '&lt;S19&gt;/n_commDeacv' incorporates:</span></td></tr>
+<td><a id="l840" class='ln'>840</a></td><td>  <span class="ct">/* If: '&lt;S20&gt;/If2' */</span></td></tr>
 <tr name="841" id="841">
-<td><a id="l841" class='ln'>841</a></td><td><span class="ct">     *  Abs: '&lt;S14&gt;/Abs5'</span></td></tr>
+<td><a id="l841" class='ln'>841</a></td><td>  <span class="kw">if</span> (<a id="841c7" class="tk">rtb_Edge_Detect</a>) <span class="br">{</span></td></tr>
 <tr name="842" id="842">
-<td><a id="l842" class='ln'>842</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l842" class='ln'>842</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S20&gt;/Raw_Motor_Speed_Estimation' incorporates:</span></td></tr>
 <tr name="843" id="843">
-<td><a id="l843" class='ln'>843</a></td><td>    <a id="843c5" class="tk">rtDW</a>-&gt;<a id="843c11" class="tk">n_commDeacv_Mode</a> = ((<a id="843c32" class="tk">rtb_Switch2</a> <a id="843c44" class="tk">&gt;=</a> 480U) <a id="843c53" class="tk">||</a> ((<a id="843c58" class="tk">rtb_Switch2</a> <a id="843c70" class="tk">&gt;</a> 240U) <a id="843c78" class="tk">&amp;&amp;</a></td></tr>
+<td><a id="l843" class='ln'>843</a></td><td><span class="ct">     *  ActionPort: '&lt;S29&gt;/Action Port'</span></td></tr>
 <tr name="844" id="844">
-<td><a id="l844" class='ln'>844</a></td><td>      <a id="844c7" class="tk">rtDW</a>-&gt;<a id="844c13" class="tk">n_commDeacv_Mode</a>));</td></tr>
+<td><a id="l844" class='ln'>844</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="845" id="845">
-<td><a id="l845" class='ln'>845</a></td><td></td></tr>
+<td><a id="l845" class='ln'>845</a></td><td>    <span class="ct">/* If: '&lt;S31&gt;/If' incorporates:</span></td></tr>
 <tr name="846" id="846">
-<td><a id="l846" class='ln'>846</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S21&gt;/Compare' incorporates:</span></td></tr>
+<td><a id="l846" class='ln'>846</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/Unit Delay'</span></td></tr>
 <tr name="847" id="847">
-<td><a id="l847" class='ln'>847</a></td><td><span class="ct">     *  Constant: '&lt;S21&gt;/Constant'</span></td></tr>
+<td><a id="l847" class='ln'>847</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="848" id="848">
-<td><a id="l848" class='ln'>848</a></td><td><span class="ct">     *  Relay: '&lt;S19&gt;/n_commDeacv'</span></td></tr>
+<td><a id="l848" class='ln'>848</a></td><td>    <span class="kw">if</span> (<a id="848c9" class="tk">rtDW</a>-&gt;<a id="848c15" class="tk">i_count</a> <a id="848c23" class="tk">&gt;=</a> <a id="848c26" class="tk">rtDW</a>-&gt;<a id="848c32" class="tk">UnitDelay_DSTATE</a>) <span class="br">{</span></td></tr>
 <tr name="849" id="849">
-<td><a id="l849" class='ln'>849</a></td><td><span class="ct">     *  Sum: '&lt;S19&gt;/Sum13'</span></td></tr>
+<td><a id="l849" class='ln'>849</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S31&gt;/normal' incorporates:</span></td></tr>
 <tr name="850" id="850">
-<td><a id="l850" class='ln'>850</a></td><td><span class="ct">     *  UnitDelay: '&lt;S19&gt;/UnitDelay2'</span></td></tr>
+<td><a id="l850" class='ln'>850</a></td><td><span class="ct">       *  ActionPort: '&lt;S32&gt;/Action Port'</span></td></tr>
 <tr name="851" id="851">
-<td><a id="l851" class='ln'>851</a></td><td><span class="ct">     *  UnitDelay: '&lt;S19&gt;/UnitDelay3'</span></td></tr>
+<td><a id="l851" class='ln'>851</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="852" id="852">
-<td><a id="l852" class='ln'>852</a></td><td><span class="ct">     *  UnitDelay: '&lt;S19&gt;/UnitDelay5'</span></td></tr>
+<td><a id="l852" class='ln'>852</a></td><td>      <span class="ct">/* Sum: '&lt;S32&gt;/Subtract' */</span></td></tr>
 <tr name="853" id="853">
-<td><a id="l853" class='ln'>853</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l853" class='ln'>853</a></td><td>      <a id="853c7" class="tk">rtb_Merge</a> = <a id="853c19" class="tk">rtDW</a>-&gt;<a id="853c25" class="tk">i_count</a> <a id="853c33" class="tk">-</a> <a id="853c35" class="tk">rtDW</a>-&gt;<a id="853c41" class="tk">UnitDelay_DSTATE</a>;</td></tr>
 <tr name="854" id="854">
-<td><a id="l854" class='ln'>854</a></td><td>    <a id="854c5" class="tk">rtDW</a>-&gt;<a id="854c11" class="tk">Compare</a> = ((<a id="854c23" class="tk">uint16_T</a>)((<a id="854c34" class="tk">uint32_T</a>)(<a id="854c44" class="tk">uint16_T</a>)((<a id="854c55" class="tk">uint32_T</a>)(<a id="854c65" class="tk">uint16_T</a>)</td></tr>
+<td><a id="l854" class='ln'>854</a></td><td></td></tr>
 <tr name="855" id="855">
-<td><a id="l855" class='ln'>855</a></td><td>      ((<a id="855c9" class="tk">uint32_T</a>)<a id="855c18" class="tk">rtDW</a>-&gt;<a id="855c24" class="tk">UnitDelay2_DSTATE_f</a> <a id="855c44" class="tk">+</a> <a id="855c46" class="tk">rtDW</a>-&gt;<a id="855c52" class="tk">UnitDelay3_DSTATE_lh</a>) <a id="855c74" class="tk">+</a></td></tr>
+<td><a id="l855" class='ln'>855</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S31&gt;/normal' */</span></td></tr>
 <tr name="856" id="856">
-<td><a id="l856" class='ln'>856</a></td><td>      <a id="856c7" class="tk">rtDW</a>-&gt;<a id="856c13" class="tk">UnitDelay5_DSTATE_f</a>) <a id="856c34" class="tk">+</a> <a id="856c36" class="tk">rtDW</a>-&gt;<a id="856c42" class="tk">n_commDeacv_Mode</a>) <a id="856c60" class="tk">&gt;=</a> 4);</td></tr>
+<td><a id="l856" class='ln'>856</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="857" id="857">
-<td><a id="l857" class='ln'>857</a></td><td></td></tr>
+<td><a id="l857" class='ln'>857</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S31&gt;/wrapper' incorporates:</span></td></tr>
 <tr name="858" id="858">
-<td><a id="l858" class='ln'>858</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S19&gt;/UnitDelay2' incorporates:</span></td></tr>
+<td><a id="l858" class='ln'>858</a></td><td><span class="ct">       *  ActionPort: '&lt;S33&gt;/Action Port'</span></td></tr>
 <tr name="859" id="859">
-<td><a id="l859" class='ln'>859</a></td><td><span class="ct">     *  UnitDelay: '&lt;S19&gt;/UnitDelay3'</span></td></tr>
+<td><a id="l859" class='ln'>859</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="860" id="860">
-<td><a id="l860" class='ln'>860</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l860" class='ln'>860</a></td><td>      <a id="860c7" class="tk">wrapper</a>(<a id="860c15" class="tk">rtDW</a>-&gt;<a id="860c21" class="tk">i_count</a>, <a id="860c30" class="tk">rtDW</a>-&gt;<a id="860c36" class="tk">UnitDelay_DSTATE</a>, <a id="860c54" class="tk">&amp;</a><a id="860c55" class="tk">rtb_Merge</a>);</td></tr>
 <tr name="861" id="861">
-<td><a id="l861" class='ln'>861</a></td><td>    <a id="861c5" class="tk">rtDW</a>-&gt;<a id="861c11" class="tk">UnitDelay2_DSTATE_f</a> = <a id="861c33" class="tk">rtDW</a>-&gt;<a id="861c39" class="tk">UnitDelay3_DSTATE_lh</a>;</td></tr>
+<td><a id="l861" class='ln'>861</a></td><td></td></tr>
 <tr name="862" id="862">
-<td><a id="l862" class='ln'>862</a></td><td></td></tr>
+<td><a id="l862" class='ln'>862</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S31&gt;/wrapper' */</span></td></tr>
 <tr name="863" id="863">
-<td><a id="l863" class='ln'>863</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S19&gt;/UnitDelay3' incorporates:</span></td></tr>
+<td><a id="l863" class='ln'>863</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="864" id="864">
-<td><a id="l864" class='ln'>864</a></td><td><span class="ct">     *  UnitDelay: '&lt;S19&gt;/UnitDelay5'</span></td></tr>
+<td><a id="l864" class='ln'>864</a></td><td></td></tr>
 <tr name="865" id="865">
-<td><a id="l865" class='ln'>865</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l865" class='ln'>865</a></td><td>    <span class="ct">/* End of If: '&lt;S31&gt;/If' */</span></td></tr>
 <tr name="866" id="866">
-<td><a id="l866" class='ln'>866</a></td><td>    <a id="866c5" class="tk">rtDW</a>-&gt;<a id="866c11" class="tk">UnitDelay3_DSTATE_lh</a> = <a id="866c34" class="tk">rtDW</a>-&gt;<a id="866c40" class="tk">UnitDelay5_DSTATE_f</a>;</td></tr>
+<td><a id="l866" class='ln'>866</a></td><td></td></tr>
 <tr name="867" id="867">
-<td><a id="l867" class='ln'>867</a></td><td></td></tr>
+<td><a id="l867" class='ln'>867</a></td><td>    <span class="ct">/* Sum: '&lt;S29&gt;/Sum13' incorporates:</span></td></tr>
 <tr name="868" id="868">
-<td><a id="l868" class='ln'>868</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S19&gt;/UnitDelay5' incorporates:</span></td></tr>
+<td><a id="l868" class='ln'>868</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/UnitDelay2'</span></td></tr>
 <tr name="869" id="869">
-<td><a id="l869" class='ln'>869</a></td><td><span class="ct">     *  Logic: '&lt;S19&gt;/Logical Operator3'</span></td></tr>
+<td><a id="l869" class='ln'>869</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/UnitDelay3'</span></td></tr>
 <tr name="870" id="870">
-<td><a id="l870" class='ln'>870</a></td><td><span class="ct">     *  Relay: '&lt;S19&gt;/n_commDeacv'</span></td></tr>
+<td><a id="l870" class='ln'>870</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/UnitDelay5'</span></td></tr>
 <tr name="871" id="871">
 <td><a id="l871" class='ln'>871</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="872" id="872">
-<td><a id="l872" class='ln'>872</a></td><td>    <a id="872c5" class="tk">rtDW</a>-&gt;<a id="872c11" class="tk">UnitDelay5_DSTATE_f</a> = <a id="872c33" class="tk">rtDW</a>-&gt;<a id="872c39" class="tk">n_commDeacv_Mode</a>;</td></tr>
+<td><a id="l872" class='ln'>872</a></td><td>    <a id="872c5" class="tk">tmp_1</a> = (((<a id="872c16" class="tk">uint64_T</a>)<a id="872c25" class="tk">rtDW</a>-&gt;<a id="872c31" class="tk">UnitDelay2_DSTATE</a> <a id="872c49" class="tk">+</a> <a id="872c51" class="tk">rtDW</a>-&gt;<a id="872c57" class="tk">UnitDelay3_DSTATE</a>) <a id="872c76" class="tk">+</a></td></tr>
 <tr name="873" id="873">
-<td><a id="l873" class='ln'>873</a></td><td></td></tr>
+<td><a id="l873" class='ln'>873</a></td><td>             <a id="873c14" class="tk">rtDW</a>-&gt;<a id="873c20" class="tk">UnitDelay5_DSTATE</a>) <a id="873c39" class="tk">+</a> <a id="873c41" class="tk">rtb_Merge</a>;</td></tr>
 <tr name="874" id="874">
-<td><a id="l874" class='ln'>874</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S14&gt;/AdvCtrlDetect' */</span></td></tr>
+<td><a id="l874" class='ln'>874</a></td><td>    <span class="kw">if</span> (<a id="874c9" class="tk">tmp_1</a> <a id="874c15" class="tk">&gt;</a> 4294967295ULL) <span class="br">{</span></td></tr>
 <tr name="875" id="875">
-<td><a id="l875" class='ln'>875</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l875" class='ln'>875</a></td><td>      <a id="875c7" class="tk">tmp_1</a> = 4294967295ULL;</td></tr>
 <tr name="876" id="876">
-<td><a id="l876" class='ln'>876</a></td><td></td></tr>
+<td><a id="l876" class='ln'>876</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="877" id="877">
-<td><a id="l877" class='ln'>877</a></td><td>  <span class="ct">/* End of If: '&lt;S14&gt;/If1' */</span></td></tr>
+<td><a id="l877" class='ln'>877</a></td><td></td></tr>
 <tr name="878" id="878">
-<td><a id="l878" class='ln'>878</a></td><td></td></tr>
+<td><a id="l878" class='ln'>878</a></td><td>    <span class="ct">/* Switch: '&lt;S29&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="879" id="879">
-<td><a id="l879" class='ln'>879</a></td><td>  <span class="ct">/* Switch: '&lt;S37&gt;/Switch3' incorporates:</span></td></tr>
+<td><a id="l879" class='ln'>879</a></td><td><span class="ct">     *  Constant: '&lt;S29&gt;/cf_speedCoef'</span></td></tr>
 <tr name="880" id="880">
-<td><a id="l880" class='ln'>880</a></td><td><span class="ct">   *  Abs: '&lt;S14&gt;/Abs5'</span></td></tr>
+<td><a id="l880" class='ln'>880</a></td><td><span class="ct">     *  Constant: '&lt;S29&gt;/polePairs'</span></td></tr>
 <tr name="881" id="881">
-<td><a id="l881" class='ln'>881</a></td><td><span class="ct">   *  Abs: '&lt;S37&gt;/Abs4'</span></td></tr>
+<td><a id="l881" class='ln'>881</a></td><td><span class="ct">     *  Product: '&lt;S29&gt;/Divide'</span></td></tr>
 <tr name="882" id="882">
-<td><a id="l882" class='ln'>882</a></td><td><span class="ct">   *  Constant: '&lt;S37&gt;/CTRL_COMM4'</span></td></tr>
+<td><a id="l882" class='ln'>882</a></td><td><span class="ct">     *  Product: '&lt;S29&gt;/Divide13'</span></td></tr>
 <tr name="883" id="883">
-<td><a id="l883" class='ln'>883</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/b_motEna'</span></td></tr>
+<td><a id="l883" class='ln'>883</a></td><td><span class="ct">     *  Product: '&lt;S29&gt;/Divide14'</span></td></tr>
 <tr name="884" id="884">
-<td><a id="l884" class='ln'>884</a></td><td><span class="ct">   *  Logic: '&lt;S37&gt;/Logical Operator1'</span></td></tr>
+<td><a id="l884" class='ln'>884</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/Unit Delay1'</span></td></tr>
 <tr name="885" id="885">
-<td><a id="l885" class='ln'>885</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S14&gt;/Relational Operator9'</span></td></tr>
+<td><a id="l885" class='ln'>885</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="886" id="886">
-<td><a id="l886" class='ln'>886</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S37&gt;/Relational Operator7'</span></td></tr>
+<td><a id="l886" class='ln'>886</a></td><td>    <span class="kw">if</span> (<a id="886c9" class="tk">rtDW</a>-&gt;<a id="886c15" class="tk">UnitDelay1_DSTATE_k</a> <a id="886c35" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
 <tr name="887" id="887">
-<td><a id="l887" class='ln'>887</a></td><td><span class="ct">   *  S-Function (sfix_bitop): '&lt;S37&gt;/Bitwise Operator1'</span></td></tr>
+<td><a id="l887" class='ln'>887</a></td><td>      <a id="887c7" class="tk">rtb_Switch1</a> = (<a id="887c22" class="tk">uint32_T</a>)(((<a id="887c34" class="tk">uint64_T</a>)(10000000U <a id="887c54" class="tk">/</a> <a id="887c56" class="tk">rtP</a>.<a id="887c60" class="tk">n_polePairs</a>) <a id="887c73" class="tk">&lt;&lt;</a> 4) <a id="887c79" class="tk">/</a></td></tr>
 <tr name="888" id="888">
-<td><a id="l888" class='ln'>888</a></td><td><span class="ct">   *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l888" class='ln'>888</a></td><td>        <a id="888c9" class="tk">rtb_Merge</a>);</td></tr>
 <tr name="889" id="889">
-<td><a id="l889" class='ln'>889</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l889" class='ln'>889</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="890" id="890">
-<td><a id="l890" class='ln'>890</a></td><td>  <span class="kw">if</span> ((<a id="890c8" class="tk">rtb_UnitDelay</a> <a id="890c22" class="tk">&amp;</a> 4U) <a id="890c28" class="tk">!=</a> 0U) <span class="br">{</span></td></tr>
+<td><a id="l890" class='ln'>890</a></td><td>      <span class="ct">/* Product: '&lt;S29&gt;/Divide13' incorporates:</span></td></tr>
 <tr name="891" id="891">
-<td><a id="l891" class='ln'>891</a></td><td>    <a id="891c5" class="tk">rtb_Equal_k</a> = true;</td></tr>
+<td><a id="l891" class='ln'>891</a></td><td><span class="ct">       *  Constant: '&lt;S29&gt;/cf_speedCoef'</span></td></tr>
 <tr name="892" id="892">
-<td><a id="l892" class='ln'>892</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l892" class='ln'>892</a></td><td><span class="ct">       *  Constant: '&lt;S29&gt;/polePairs'</span></td></tr>
 <tr name="893" id="893">
-<td><a id="l893" class='ln'>893</a></td><td>    <span class="kw">if</span> (<a id="893c9" class="tk">rtDW</a>-&gt;<a id="893c15" class="tk">UnitDelay1_DSTATE_f</a>[1] <a id="893c38" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l893" class='ln'>893</a></td><td><span class="ct">       *  Gain: '&lt;S29&gt;/g_Ha'</span></td></tr>
 <tr name="894" id="894">
-<td><a id="l894" class='ln'>894</a></td><td>      <span class="ct">/* Abs: '&lt;S37&gt;/Abs4' incorporates:</span></td></tr>
+<td><a id="l894" class='ln'>894</a></td><td><span class="ct">       *  Product: '&lt;S29&gt;/Divide'</span></td></tr>
 <tr name="895" id="895">
-<td><a id="l895" class='ln'>895</a></td><td><span class="ct">       *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l895" class='ln'>895</a></td><td><span class="ct">       *  Sum: '&lt;S29&gt;/Sum13'</span></td></tr>
 <tr name="896" id="896">
 <td><a id="l896" class='ln'>896</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="897" id="897">
-<td><a id="l897" class='ln'>897</a></td><td>      <a id="897c7" class="tk">rtb_Switch_f2_idx_1</a> = (<a id="897c30" class="tk">int16_T</a>)<a id="897c38" class="tk">-</a><a id="897c39" class="tk">rtDW</a>-&gt;<a id="897c45" class="tk">UnitDelay1_DSTATE_f</a>[1];</td></tr>
+<td><a id="l897" class='ln'>897</a></td><td>      <a id="897c7" class="tk">tmp_0</a> = ((<a id="897c17" class="tk">uint64_T</a>)((10000000U <a id="897c38" class="tk">/</a> <a id="897c40" class="tk">rtP</a>.<a id="897c44" class="tk">n_polePairs</a>) <a id="897c57" class="tk">&lt;&lt;</a> 2) <a id="897c63" class="tk">&lt;&lt;</a> 4) <a id="897c69" class="tk">/</a> (<a id="897c72" class="tk">uint32_T</a>)</td></tr>
 <tr name="898" id="898">
-<td><a id="l898" class='ln'>898</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l898" class='ln'>898</a></td><td>        <a id="898c9" class="tk">tmp_1</a>;</td></tr>
 <tr name="899" id="899">
-<td><a id="l899" class='ln'>899</a></td><td>      <span class="ct">/* Abs: '&lt;S37&gt;/Abs4' incorporates:</span></td></tr>
+<td><a id="l899" class='ln'>899</a></td><td>      <span class="kw">if</span> (<a id="899c11" class="tk">tmp_0</a> <a id="899c17" class="tk">&gt;</a> 4294967295ULL) <span class="br">{</span></td></tr>
 <tr name="900" id="900">
-<td><a id="l900" class='ln'>900</a></td><td><span class="ct">       *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l900" class='ln'>900</a></td><td>        <a id="900c9" class="tk">tmp_0</a> = 4294967295ULL;</td></tr>
 <tr name="901" id="901">
-<td><a id="l901" class='ln'>901</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l901" class='ln'>901</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="902" id="902">
-<td><a id="l902" class='ln'>902</a></td><td>      <a id="902c7" class="tk">rtb_Switch_f2_idx_1</a> = <a id="902c29" class="tk">rtDW</a>-&gt;<a id="902c35" class="tk">UnitDelay1_DSTATE_f</a>[1];</td></tr>
+<td><a id="l902" class='ln'>902</a></td><td></td></tr>
 <tr name="903" id="903">
-<td><a id="l903" class='ln'>903</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l903" class='ln'>903</a></td><td>      <a id="903c7" class="tk">rtb_Switch1</a> = (<a id="903c22" class="tk">uint32_T</a>)<a id="903c31" class="tk">tmp_0</a>;</td></tr>
 <tr name="904" id="904">
-<td><a id="l904" class='ln'>904</a></td><td></td></tr>
+<td><a id="l904" class='ln'>904</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="905" id="905">
-<td><a id="l905" class='ln'>905</a></td><td>    <a id="905c5" class="tk">rtb_Equal_k</a> = (<a id="905c20" class="tk">rtU</a>-&gt;<a id="905c25" class="tk">b_motEna</a> <a id="905c34" class="tk">&amp;&amp;</a> (<a id="905c38" class="tk">rtb_Switch2</a> <a id="905c50" class="tk">&lt;</a> 48U) <a id="905c57" class="tk">&amp;&amp;</a> (<a id="905c61" class="tk">rtb_Switch_f2_idx_1</a> <a id="905c81" class="tk">&gt;</a></td></tr>
+<td><a id="l905" class='ln'>905</a></td><td></td></tr>
 <tr name="906" id="906">
-<td><a id="l906" class='ln'>906</a></td><td>      9920));</td></tr>
+<td><a id="l906" class='ln'>906</a></td><td>    <span class="ct">/* End of Switch: '&lt;S29&gt;/Switch1' */</span></td></tr>
 <tr name="907" id="907">
-<td><a id="l907" class='ln'>907</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l907" class='ln'>907</a></td><td></td></tr>
 <tr name="908" id="908">
-<td><a id="l908" class='ln'>908</a></td><td></td></tr>
+<td><a id="l908" class='ln'>908</a></td><td>    <span class="ct">/* Sum: '&lt;S29&gt;/Sum7' incorporates:</span></td></tr>
 <tr name="909" id="909">
-<td><a id="l909" class='ln'>909</a></td><td>  <span class="ct">/* End of Switch: '&lt;S37&gt;/Switch3' */</span></td></tr>
+<td><a id="l909" class='ln'>909</a></td><td><span class="ct">     *  Switch: '&lt;S29&gt;/Switch1'</span></td></tr>
 <tr name="910" id="910">
-<td><a id="l910" class='ln'>910</a></td><td></td></tr>
+<td><a id="l910" class='ln'>910</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/UnitDelay4'</span></td></tr>
 <tr name="911" id="911">
-<td><a id="l911" class='ln'>911</a></td><td>  <span class="ct">/* Sum: '&lt;S37&gt;/Sum' incorporates:</span></td></tr>
+<td><a id="l911" class='ln'>911</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="912" id="912">
-<td><a id="l912" class='ln'>912</a></td><td><span class="ct">   *  Constant: '&lt;S37&gt;/CTRL_COMM'</span></td></tr>
+<td><a id="l912" class='ln'>912</a></td><td>    <a id="912c5" class="tk">rtb_Switch3</a> = ((<a id="912c21" class="tk">int32_T</a>)(<a id="912c30" class="tk">rtb_Switch1</a> <a id="912c42" class="tk">&gt;&gt;</a> 1) <a id="912c48" class="tk">-</a> (<a id="912c51" class="tk">int32_T</a>)</td></tr>
 <tr name="913" id="913">
-<td><a id="l913" class='ln'>913</a></td><td><span class="ct">   *  Constant: '&lt;S37&gt;/CTRL_COMM1'</span></td></tr>
+<td><a id="l913" class='ln'>913</a></td><td>                   (<a id="913c21" class="tk">rtDW</a>-&gt;<a id="913c27" class="tk">UnitDelay4_DSTATE_o</a> <a id="913c47" class="tk">&gt;&gt;</a> 1)) <a id="913c54" class="tk">&gt;&gt;</a> 3;</td></tr>
 <tr name="914" id="914">
-<td><a id="l914" class='ln'>914</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S37&gt;/Data Type Conversion3'</span></td></tr>
+<td><a id="l914" class='ln'>914</a></td><td></td></tr>
 <tr name="915" id="915">
-<td><a id="l915" class='ln'>915</a></td><td><span class="ct">   *  Gain: '&lt;S37&gt;/g_Hb'</span></td></tr>
+<td><a id="l915" class='ln'>915</a></td><td>    <span class="ct">/* Abs: '&lt;S29&gt;/Abs2' */</span></td></tr>
 <tr name="916" id="916">
-<td><a id="l916" class='ln'>916</a></td><td><span class="ct">   *  Gain: '&lt;S37&gt;/g_Hb1'</span></td></tr>
+<td><a id="l916" class='ln'>916</a></td><td>    <span class="kw">if</span> (<a id="916c9" class="tk">rtb_Switch3</a> <a id="916c21" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="917" id="917">
-<td><a id="l917" class='ln'>917</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S37&gt;/Relational Operator1'</span></td></tr>
+<td><a id="l917" class='ln'>917</a></td><td>      <a id="917c7" class="tk">rtb_Switch3</a> = <a id="917c21" class="tk">-</a><a id="917c22" class="tk">rtb_Switch3</a>;</td></tr>
 <tr name="918" id="918">
-<td><a id="l918" class='ln'>918</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S37&gt;/Relational Operator3'</span></td></tr>
+<td><a id="l918" class='ln'>918</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="919" id="919">
-<td><a id="l919" class='ln'>919</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l919" class='ln'>919</a></td><td></td></tr>
 <tr name="920" id="920">
-<td><a id="l920" class='ln'>920</a></td><td>  <a id="920c3" class="tk">rtb_Sum_i</a> = (<a id="920c16" class="tk">uint8_T</a>)(((<a id="920c27" class="tk">uint32_T</a>)((<a id="920c38" class="tk">rtb_Add_gf</a> <a id="920c49" class="tk">==</a> 7) <a id="920c55" class="tk">&lt;&lt;</a> 1) <a id="920c61" class="tk">+</a> (<a id="920c64" class="tk">rtb_Add_gf</a> <a id="920c75" class="tk">==</a> 0))</td></tr>
+<td><a id="l920" class='ln'>920</a></td><td>    <span class="ct">/* End of Abs: '&lt;S29&gt;/Abs2' */</span></td></tr>
 <tr name="921" id="921">
-<td><a id="l921" class='ln'>921</a></td><td>                        <a id="921c25" class="tk">+</a> (<a id="921c28" class="tk">rtb_Equal_k</a> <a id="921c40" class="tk">&lt;&lt;</a> 2));</td></tr>
+<td><a id="l921" class='ln'>921</a></td><td></td></tr>
 <tr name="922" id="922">
-<td><a id="l922" class='ln'>922</a></td><td></td></tr>
+<td><a id="l922" class='ln'>922</a></td><td>    <span class="ct">/* Relay: '&lt;S29&gt;/dz_cntTrnsDet' */</span></td></tr>
 <tr name="923" id="923">
-<td><a id="l923" class='ln'>923</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S37&gt;/Relational Operator2' incorporates:</span></td></tr>
+<td><a id="l923" class='ln'>923</a></td><td>    <a id="923c5" class="tk">rtDW</a>-&gt;<a id="923c11" class="tk">dz_cntTrnsDet_Mode</a> = ((<a id="923c34" class="tk">rtb_Switch3</a> <a id="923c46" class="tk">&gt;=</a> 140) <a id="923c54" class="tk">||</a> ((<a id="923c59" class="tk">rtb_Switch3</a> <a id="923c71" class="tk">&gt;</a> 100) <a id="923c78" class="tk">&amp;&amp;</a></td></tr>
 <tr name="924" id="924">
-<td><a id="l924" class='ln'>924</a></td><td><span class="ct">   *  Constant: '&lt;S37&gt;/CTRL_COMM2'</span></td></tr>
+<td><a id="l924" class='ln'>924</a></td><td>      <a id="924c7" class="tk">rtDW</a>-&gt;<a id="924c13" class="tk">dz_cntTrnsDet_Mode</a>));</td></tr>
 <tr name="925" id="925">
-<td><a id="l925" class='ln'>925</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l925" class='ln'>925</a></td><td></td></tr>
 <tr name="926" id="926">
-<td><a id="l926" class='ln'>926</a></td><td>  <a id="926c3" class="tk">rtb_RelationalOperator4_f</a> = (<a id="926c32" class="tk">rtb_Sum_i</a> <a id="926c42" class="tk">!=</a> 0);</td></tr>
+<td><a id="l926" class='ln'>926</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S29&gt;/Relational Operator4' */</span></td></tr>
 <tr name="927" id="927">
-<td><a id="l927" class='ln'>927</a></td><td></td></tr>
+<td><a id="l927" class='ln'>927</a></td><td>    <a id="927c5" class="tk">rtb_RelationalOperator4_d</a> = (<a id="927c34" class="tk">rtDW</a>-&gt;<a id="927c40" class="tk">Switch2_o</a> <a id="927c50" class="tk">!=</a> <a id="927c53" class="tk">rtDW</a>-&gt;<a id="927c59" class="tk">UnitDelay3</a>);</td></tr>
 <tr name="928" id="928">
-<td><a id="l928" class='ln'>928</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S42&gt;/Relational Operator' incorporates:</span></td></tr>
+<td><a id="l928" class='ln'>928</a></td><td></td></tr>
 <tr name="929" id="929">
-<td><a id="l929" class='ln'>929</a></td><td><span class="ct">   *  UnitDelay: '&lt;S42&gt;/UnitDelay'</span></td></tr>
+<td><a id="l929" class='ln'>929</a></td><td>    <span class="ct">/* Switch: '&lt;S29&gt;/Switch3' incorporates:</span></td></tr>
 <tr name="930" id="930">
-<td><a id="l930" class='ln'>930</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l930" class='ln'>930</a></td><td><span class="ct">     *  Constant: '&lt;S29&gt;/Constant4'</span></td></tr>
 <tr name="931" id="931">
-<td><a id="l931" class='ln'>931</a></td><td>  <a id="931c3" class="tk">rtb_n_commDeacv</a> = (<a id="931c22" class="tk">rtb_RelationalOperator4_f</a> <a id="931c48" class="tk">!=</a> <a id="931c51" class="tk">rtDW</a>-&gt;<a id="931c57" class="tk">UnitDelay_DSTATE_nx</a>);</td></tr>
+<td><a id="l931" class='ln'>931</a></td><td><span class="ct">     *  Logic: '&lt;S29&gt;/Logical Operator1'</span></td></tr>
 <tr name="932" id="932">
-<td><a id="l932" class='ln'>932</a></td><td></td></tr>
+<td><a id="l932" class='ln'>932</a></td><td><span class="ct">     *  Switch: '&lt;S29&gt;/Switch1'</span></td></tr>
 <tr name="933" id="933">
-<td><a id="l933" class='ln'>933</a></td><td>  <span class="ct">/* If: '&lt;S38&gt;/If2' incorporates:</span></td></tr>
+<td><a id="l933" class='ln'>933</a></td><td><span class="ct">     *  Switch: '&lt;S29&gt;/Switch2'</span></td></tr>
 <tr name="934" id="934">
-<td><a id="l934" class='ln'>934</a></td><td><span class="ct">   *  Inport: '&lt;S40&gt;/yPrev'</span></td></tr>
+<td><a id="l934" class='ln'>934</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/UnitDelay1'</span></td></tr>
 <tr name="935" id="935">
-<td><a id="l935" class='ln'>935</a></td><td><span class="ct">   *  Logic: '&lt;S38&gt;/Logical Operator1'</span></td></tr>
+<td><a id="l935" class='ln'>935</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="936" id="936">
-<td><a id="l936" class='ln'>936</a></td><td><span class="ct">   *  Logic: '&lt;S38&gt;/Logical Operator2'</span></td></tr>
+<td><a id="l936" class='ln'>936</a></td><td>    <span class="kw">if</span> (<a id="936c9" class="tk">rtb_RelationalOperator4_d</a> <a id="936c35" class="tk">&amp;&amp;</a> <a id="936c38" class="tk">rtDW</a>-&gt;<a id="936c44" class="tk">UnitDelay1_DSTATE_m</a>) <span class="br">{</span></td></tr>
 <tr name="937" id="937">
-<td><a id="l937" class='ln'>937</a></td><td><span class="ct">   *  Logic: '&lt;S38&gt;/Logical Operator3'</span></td></tr>
+<td><a id="l937" class='ln'>937</a></td><td>      <a id="937c7" class="tk">rtb_RelationalOperator4_b</a> = 0;</td></tr>
 <tr name="938" id="938">
-<td><a id="l938" class='ln'>938</a></td><td><span class="ct">   *  Logic: '&lt;S38&gt;/Logical Operator4'</span></td></tr>
+<td><a id="l938" class='ln'>938</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="938c16" class="tk">rtb_RelationalOperator4_d</a>) <span class="br">{</span></td></tr>
 <tr name="939" id="939">
-<td><a id="l939" class='ln'>939</a></td><td><span class="ct">   *  UnitDelay: '&lt;S38&gt;/UnitDelay'</span></td></tr>
+<td><a id="l939" class='ln'>939</a></td><td>      <span class="ct">/* Switch: '&lt;S29&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="940" id="940">
-<td><a id="l940" class='ln'>940</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l940" class='ln'>940</a></td><td><span class="ct">       *  UnitDelay: '&lt;S20&gt;/UnitDelay4'</span></td></tr>
 <tr name="941" id="941">
-<td><a id="l941" class='ln'>941</a></td><td>  <span class="kw">if</span> (<a id="941c7" class="tk">rtb_RelationalOperator4_f</a> <a id="941c33" class="tk">&amp;&amp;</a> (<a id="941c37" class="tk">!</a><a id="941c38" class="tk">rtDW</a>-&gt;<a id="941c44" class="tk">UnitDelay_DSTATE_k</a>)) <span class="br">{</span></td></tr>
+<td><a id="l941" class='ln'>941</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="942" id="942">
-<td><a id="l942" class='ln'>942</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S38&gt;/Qualification' incorporates:</span></td></tr>
+<td><a id="l942" class='ln'>942</a></td><td>      <a id="942c7" class="tk">rtb_RelationalOperator4_b</a> = (<a id="942c36" class="tk">int32_T</a>)<a id="942c44" class="tk">rtDW</a>-&gt;<a id="942c50" class="tk">UnitDelay4_DSTATE</a>;</td></tr>
 <tr name="943" id="943">
-<td><a id="l943" class='ln'>943</a></td><td><span class="ct">     *  ActionPort: '&lt;S43&gt;/Action Port'</span></td></tr>
+<td><a id="l943" class='ln'>943</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="944" id="944">
-<td><a id="l944" class='ln'>944</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l944" class='ln'>944</a></td><td>      <a id="944c7" class="tk">rtb_RelationalOperator4_b</a> = (<a id="944c36" class="tk">int32_T</a>)<a id="944c44" class="tk">rtb_Switch1</a>;</td></tr>
 <tr name="945" id="945">
-<td><a id="l945" class='ln'>945</a></td><td>    <span class="ct">/* Switch: '&lt;S47&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l945" class='ln'>945</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="946" id="946">
-<td><a id="l946" class='ln'>946</a></td><td><span class="ct">     *  Constant: '&lt;S47&gt;/Constant23'</span></td></tr>
+<td><a id="l946" class='ln'>946</a></td><td></td></tr>
 <tr name="947" id="947">
-<td><a id="l947" class='ln'>947</a></td><td><span class="ct">     *  UnitDelay: '&lt;S47&gt;/UnitDelay'</span></td></tr>
+<td><a id="l947" class='ln'>947</a></td><td>    <span class="ct">/* End of Switch: '&lt;S29&gt;/Switch3' */</span></td></tr>
 <tr name="948" id="948">
-<td><a id="l948" class='ln'>948</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l948" class='ln'>948</a></td><td></td></tr>
 <tr name="949" id="949">
-<td><a id="l949" class='ln'>949</a></td><td>    <span class="kw">if</span> (<a id="949c9" class="tk">rtb_n_commDeacv</a>) <span class="br">{</span></td></tr>
+<td><a id="l949" class='ln'>949</a></td><td>    <span class="ct">/* Product: '&lt;S29&gt;/Divide11' */</span></td></tr>
 <tr name="950" id="950">
-<td><a id="l950" class='ln'>950</a></td><td>      <a id="950c7" class="tk">rtb_LogicalOperator3</a> = 0U;</td></tr>
+<td><a id="l950" class='ln'>950</a></td><td>    <a id="950c5" class="tk">rtDW</a>-&gt;<a id="950c11" class="tk">Divide11</a> = <a id="950c22" class="tk">rtb_RelationalOperator4_b</a> <a id="950c48" class="tk">*</a> <a id="950c50" class="tk">rtDW</a>-&gt;<a id="950c56" class="tk">Switch2_o</a>;</td></tr>
 <tr name="951" id="951">
-<td><a id="l951" class='ln'>951</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l951" class='ln'>951</a></td><td></td></tr>
 <tr name="952" id="952">
-<td><a id="l952" class='ln'>952</a></td><td>      <a id="952c7" class="tk">rtb_LogicalOperator3</a> = <a id="952c30" class="tk">rtDW</a>-&gt;<a id="952c36" class="tk">UnitDelay_DSTATE_p</a>;</td></tr>
+<td><a id="l952" class='ln'>952</a></td><td>    <span class="ct">/* Switch: '&lt;S29&gt;/Switch4' incorporates:</span></td></tr>
 <tr name="953" id="953">
-<td><a id="l953" class='ln'>953</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l953" class='ln'>953</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/Unit Delay1'</span></td></tr>
 <tr name="954" id="954">
-<td><a id="l954" class='ln'>954</a></td><td></td></tr>
+<td><a id="l954" class='ln'>954</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="955" id="955">
-<td><a id="l955" class='ln'>955</a></td><td>    <span class="ct">/* End of Switch: '&lt;S47&gt;/Switch1' */</span></td></tr>
+<td><a id="l955" class='ln'>955</a></td><td>    <span class="kw">if</span> (<a id="955c9" class="tk">rtDW</a>-&gt;<a id="955c15" class="tk">UnitDelay1_DSTATE_k</a> <a id="955c35" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
 <tr name="956" id="956">
-<td><a id="l956" class='ln'>956</a></td><td></td></tr>
+<td><a id="l956" class='ln'>956</a></td><td>      <span class="ct">/* Switch: '&lt;S29&gt;/Switch4' incorporates:</span></td></tr>
 <tr name="957" id="957">
-<td><a id="l957" class='ln'>957</a></td><td>    <span class="ct">/* Switch: '&lt;S43&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l957" class='ln'>957</a></td><td><span class="ct">       *  Product: '&lt;S29&gt;/Divide2'</span></td></tr>
 <tr name="958" id="958">
-<td><a id="l958" class='ln'>958</a></td><td><span class="ct">     *  Constant: '&lt;S37&gt;/t_errQual'</span></td></tr>
+<td><a id="l958" class='ln'>958</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="959" id="959">
-<td><a id="l959" class='ln'>959</a></td><td><span class="ct">     *  Constant: '&lt;S43&gt;/Constant6'</span></td></tr>
+<td><a id="l959" class='ln'>959</a></td><td>      <a id="959c7" class="tk">rtDW</a>-&gt;<a id="959c13" class="tk">Switch4</a> = 62914560U <a id="959c33" class="tk">/</a> <a id="959c35" class="tk">rtb_Merge</a>;</td></tr>
 <tr name="960" id="960">
-<td><a id="l960" class='ln'>960</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S43&gt;/Relational Operator2'</span></td></tr>
+<td><a id="l960" class='ln'>960</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="961" id="961">
-<td><a id="l961" class='ln'>961</a></td><td><span class="ct">     *  Sum: '&lt;S46&gt;/Sum1'</span></td></tr>
+<td><a id="l961" class='ln'>961</a></td><td>      <span class="ct">/* Switch: '&lt;S29&gt;/Switch4' incorporates:</span></td></tr>
 <tr name="962" id="962">
-<td><a id="l962" class='ln'>962</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l962" class='ln'>962</a></td><td><span class="ct">       *  Product: '&lt;S29&gt;/Divide1'</span></td></tr>
 <tr name="963" id="963">
-<td><a id="l963" class='ln'>963</a></td><td>    <a id="963c5" class="tk">rtb_n_commDeacv</a> = (((<a id="963c26" class="tk">uint16_T</a>)(<a id="963c36" class="tk">rtb_LogicalOperator3</a> <a id="963c57" class="tk">+</a> 1U) <a id="963c63" class="tk">&gt;</a> 1600) <a id="963c71" class="tk">||</a></td></tr>
+<td><a id="l963" class='ln'>963</a></td><td><span class="ct">       *  Sum: '&lt;S29&gt;/Sum13'</span></td></tr>
 <tr name="964" id="964">
-<td><a id="l964" class='ln'>964</a></td><td>                       <a id="964c24" class="tk">rtDW</a>-&gt;<a id="964c30" class="tk">UnitDelay_DSTATE_k</a>);</td></tr>
+<td><a id="l964" class='ln'>964</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="965" id="965">
-<td><a id="l965" class='ln'>965</a></td><td></td></tr>
+<td><a id="l965" class='ln'>965</a></td><td>      <a id="965c7" class="tk">rtDW</a>-&gt;<a id="965c13" class="tk">Switch4</a> = 251658240U <a id="965c34" class="tk">/</a> (<a id="965c37" class="tk">uint32_T</a>)<a id="965c46" class="tk">tmp_1</a>;</td></tr>
 <tr name="966" id="966">
-<td><a id="l966" class='ln'>966</a></td><td>    <span class="ct">/* MinMax: '&lt;S46&gt;/MinMax' incorporates:</span></td></tr>
+<td><a id="l966" class='ln'>966</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="967" id="967">
-<td><a id="l967" class='ln'>967</a></td><td><span class="ct">     *  Constant: '&lt;S43&gt;/Constant6'</span></td></tr>
+<td><a id="l967" class='ln'>967</a></td><td></td></tr>
 <tr name="968" id="968">
-<td><a id="l968" class='ln'>968</a></td><td><span class="ct">     *  Sum: '&lt;S46&gt;/Sum1'</span></td></tr>
+<td><a id="l968" class='ln'>968</a></td><td>    <span class="ct">/* End of Switch: '&lt;S29&gt;/Switch4' */</span></td></tr>
 <tr name="969" id="969">
-<td><a id="l969" class='ln'>969</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l969" class='ln'>969</a></td><td></td></tr>
 <tr name="970" id="970">
-<td><a id="l970" class='ln'>970</a></td><td>    <span class="kw">if</span> ((<a id="970c10" class="tk">uint16_T</a>)(<a id="970c20" class="tk">rtb_LogicalOperator3</a> <a id="970c41" class="tk">+</a> 1U) <a id="970c47" class="tk">&lt;</a> 1600) <span class="br">{</span></td></tr>
+<td><a id="l970" class='ln'>970</a></td><td>    <span class="ct">/* SignalConversion generated from: '&lt;S29&gt;/delta_count' */</span></td></tr>
 <tr name="971" id="971">
-<td><a id="l971" class='ln'>971</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S47&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l971" class='ln'>971</a></td><td>    <a id="971c5" class="tk">rtDW</a>-&gt;<a id="971c11" class="tk">OutportBufferFordelta_count</a> = <a id="971c41" class="tk">rtb_Merge</a>;</td></tr>
 <tr name="972" id="972">
-<td><a id="l972" class='ln'>972</a></td><td>      <a id="972c7" class="tk">rtDW</a>-&gt;<a id="972c13" class="tk">UnitDelay_DSTATE_p</a> = (<a id="972c35" class="tk">uint16_T</a>)(<a id="972c45" class="tk">rtb_LogicalOperator3</a> <a id="972c66" class="tk">+</a> 1U);</td></tr>
+<td><a id="l972" class='ln'>972</a></td><td></td></tr>
 <tr name="973" id="973">
-<td><a id="l973" class='ln'>973</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l973" class='ln'>973</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S29&gt;/Unit Delay' */</span></td></tr>
 <tr name="974" id="974">
-<td><a id="l974" class='ln'>974</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S47&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l974" class='ln'>974</a></td><td>    <a id="974c5" class="tk">rtDW</a>-&gt;<a id="974c11" class="tk">UnitDelay_DSTATE</a> = <a id="974c30" class="tk">rtDW</a>-&gt;<a id="974c36" class="tk">i_count</a>;</td></tr>
 <tr name="975" id="975">
-<td><a id="l975" class='ln'>975</a></td><td>      <a id="975c7" class="tk">rtDW</a>-&gt;<a id="975c13" class="tk">UnitDelay_DSTATE_p</a> = 1600U;</td></tr>
+<td><a id="l975" class='ln'>975</a></td><td></td></tr>
 <tr name="976" id="976">
-<td><a id="l976" class='ln'>976</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l976" class='ln'>976</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S29&gt;/UnitDelay2' incorporates:</span></td></tr>
 <tr name="977" id="977">
-<td><a id="l977" class='ln'>977</a></td><td></td></tr>
+<td><a id="l977" class='ln'>977</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/UnitDelay3'</span></td></tr>
 <tr name="978" id="978">
-<td><a id="l978" class='ln'>978</a></td><td>    <span class="ct">/* End of MinMax: '&lt;S46&gt;/MinMax' */</span></td></tr>
+<td><a id="l978" class='ln'>978</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="979" id="979">
-<td><a id="l979" class='ln'>979</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S38&gt;/Qualification' */</span></td></tr>
+<td><a id="l979" class='ln'>979</a></td><td>    <a id="979c5" class="tk">rtDW</a>-&gt;<a id="979c11" class="tk">UnitDelay2_DSTATE</a> = <a id="979c31" class="tk">rtDW</a>-&gt;<a id="979c37" class="tk">UnitDelay3_DSTATE</a>;</td></tr>
 <tr name="980" id="980">
-<td><a id="l980" class='ln'>980</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="980c15" class="tk">!</a><a id="980c16" class="tk">rtb_RelationalOperator4_f</a>) <a id="980c43" class="tk">&amp;&amp;</a> <a id="980c46" class="tk">rtDW</a>-&gt;<a id="980c52" class="tk">UnitDelay_DSTATE_k</a>) <span class="br">{</span></td></tr>
+<td><a id="l980" class='ln'>980</a></td><td></td></tr>
 <tr name="981" id="981">
-<td><a id="l981" class='ln'>981</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S38&gt;/Dequalification' incorporates:</span></td></tr>
+<td><a id="l981" class='ln'>981</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S29&gt;/UnitDelay3' incorporates:</span></td></tr>
 <tr name="982" id="982">
-<td><a id="l982" class='ln'>982</a></td><td><span class="ct">     *  ActionPort: '&lt;S41&gt;/Action Port'</span></td></tr>
+<td><a id="l982" class='ln'>982</a></td><td><span class="ct">     *  UnitDelay: '&lt;S29&gt;/UnitDelay5'</span></td></tr>
 <tr name="983" id="983">
 <td><a id="l983" class='ln'>983</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="984" id="984">
-<td><a id="l984" class='ln'>984</a></td><td>    <span class="ct">/* Switch: '&lt;S45&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l984" class='ln'>984</a></td><td>    <a id="984c5" class="tk">rtDW</a>-&gt;<a id="984c11" class="tk">UnitDelay3_DSTATE</a> = <a id="984c31" class="tk">rtDW</a>-&gt;<a id="984c37" class="tk">UnitDelay5_DSTATE</a>;</td></tr>
 <tr name="985" id="985">
-<td><a id="l985" class='ln'>985</a></td><td><span class="ct">     *  Constant: '&lt;S45&gt;/Constant23'</span></td></tr>
+<td><a id="l985" class='ln'>985</a></td><td></td></tr>
 <tr name="986" id="986">
-<td><a id="l986" class='ln'>986</a></td><td><span class="ct">     *  UnitDelay: '&lt;S45&gt;/UnitDelay'</span></td></tr>
+<td><a id="l986" class='ln'>986</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S29&gt;/UnitDelay5' */</span></td></tr>
 <tr name="987" id="987">
-<td><a id="l987" class='ln'>987</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l987" class='ln'>987</a></td><td>    <a id="987c5" class="tk">rtDW</a>-&gt;<a id="987c11" class="tk">UnitDelay5_DSTATE</a> = <a id="987c31" class="tk">rtb_Merge</a>;</td></tr>
 <tr name="988" id="988">
-<td><a id="l988" class='ln'>988</a></td><td>    <span class="kw">if</span> (<a id="988c9" class="tk">rtb_n_commDeacv</a>) <span class="br">{</span></td></tr>
+<td><a id="l988" class='ln'>988</a></td><td></td></tr>
 <tr name="989" id="989">
-<td><a id="l989" class='ln'>989</a></td><td>      <a id="989c7" class="tk">rtb_LogicalOperator3</a> = 0U;</td></tr>
+<td><a id="l989" class='ln'>989</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S29&gt;/Unit Delay1' incorporates:</span></td></tr>
 <tr name="990" id="990">
-<td><a id="l990" class='ln'>990</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l990" class='ln'>990</a></td><td><span class="ct">     *  Relay: '&lt;S29&gt;/dz_cntTrnsDet'</span></td></tr>
 <tr name="991" id="991">
-<td><a id="l991" class='ln'>991</a></td><td>      <a id="991c7" class="tk">rtb_LogicalOperator3</a> = <a id="991c30" class="tk">rtDW</a>-&gt;<a id="991c36" class="tk">UnitDelay_DSTATE_f</a>;</td></tr>
+<td><a id="l991" class='ln'>991</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="992" id="992">
-<td><a id="l992" class='ln'>992</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l992" class='ln'>992</a></td><td>    <a id="992c5" class="tk">rtDW</a>-&gt;<a id="992c11" class="tk">UnitDelay1_DSTATE_k</a> = <a id="992c33" class="tk">rtDW</a>-&gt;<a id="992c39" class="tk">dz_cntTrnsDet_Mode</a>;</td></tr>
 <tr name="993" id="993">
 <td><a id="l993" class='ln'>993</a></td><td></td></tr>
 <tr name="994" id="994">
-<td><a id="l994" class='ln'>994</a></td><td>    <span class="ct">/* End of Switch: '&lt;S45&gt;/Switch1' */</span></td></tr>
+<td><a id="l994" class='ln'>994</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S29&gt;/UnitDelay4' incorporates:</span></td></tr>
 <tr name="995" id="995">
-<td><a id="l995" class='ln'>995</a></td><td></td></tr>
+<td><a id="l995" class='ln'>995</a></td><td><span class="ct">     *  Switch: '&lt;S29&gt;/Switch1'</span></td></tr>
 <tr name="996" id="996">
-<td><a id="l996" class='ln'>996</a></td><td>    <span class="ct">/* Switch: '&lt;S41&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l996" class='ln'>996</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="997" id="997">
-<td><a id="l997" class='ln'>997</a></td><td><span class="ct">     *  Constant: '&lt;S37&gt;/t_errDequal'</span></td></tr>
+<td><a id="l997" class='ln'>997</a></td><td>    <a id="997c5" class="tk">rtDW</a>-&gt;<a id="997c11" class="tk">UnitDelay4_DSTATE_o</a> = <a id="997c33" class="tk">rtb_Switch1</a>;</td></tr>
 <tr name="998" id="998">
-<td><a id="l998" class='ln'>998</a></td><td><span class="ct">     *  Constant: '&lt;S41&gt;/Constant6'</span></td></tr>
+<td><a id="l998" class='ln'>998</a></td><td></td></tr>
 <tr name="999" id="999">
-<td><a id="l999" class='ln'>999</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S41&gt;/Relational Operator2'</span></td></tr>
+<td><a id="l999" class='ln'>999</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S29&gt;/UnitDelay1' */</span></td></tr>
 <tr name="1000" id="1000">
-<td><a id="l1000" class='ln'>1000</a></td><td><span class="ct">     *  Sum: '&lt;S44&gt;/Sum1'</span></td></tr>
+<td><a id="l1000" class='ln'>1000</a></td><td>    <a id="1000c5" class="tk">rtDW</a>-&gt;<a id="1000c11" class="tk">UnitDelay1_DSTATE_m</a> = <a id="1000c33" class="tk">rtb_RelationalOperator4_d</a>;</td></tr>
 <tr name="1001" id="1001">
-<td><a id="l1001" class='ln'>1001</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1001" class='ln'>1001</a></td><td></td></tr>
 <tr name="1002" id="1002">
-<td><a id="l1002" class='ln'>1002</a></td><td>    <a id="1002c5" class="tk">rtb_n_commDeacv</a> = (((<a id="1002c26" class="tk">uint16_T</a>)(<a id="1002c36" class="tk">rtb_LogicalOperator3</a> <a id="1002c57" class="tk">+</a> 1U) <a id="1002c63" class="tk">&lt;=</a> 12000) <a id="1002c73" class="tk">&amp;&amp;</a></td></tr>
+<td><a id="l1002" class='ln'>1002</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S20&gt;/Raw_Motor_Speed_Estimation' */</span></td></tr>
 <tr name="1003" id="1003">
-<td><a id="l1003" class='ln'>1003</a></td><td>                       <a id="1003c24" class="tk">rtDW</a>-&gt;<a id="1003c30" class="tk">UnitDelay_DSTATE_k</a>);</td></tr>
+<td><a id="l1003" class='ln'>1003</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1004" id="1004">
 <td><a id="l1004" class='ln'>1004</a></td><td></td></tr>
 <tr name="1005" id="1005">
-<td><a id="l1005" class='ln'>1005</a></td><td>    <span class="ct">/* MinMax: '&lt;S44&gt;/MinMax' incorporates:</span></td></tr>
+<td><a id="l1005" class='ln'>1005</a></td><td>  <span class="ct">/* End of If: '&lt;S20&gt;/If2' */</span></td></tr>
 <tr name="1006" id="1006">
-<td><a id="l1006" class='ln'>1006</a></td><td><span class="ct">     *  Constant: '&lt;S41&gt;/Constant6'</span></td></tr>
+<td><a id="l1006" class='ln'>1006</a></td><td></td></tr>
 <tr name="1007" id="1007">
-<td><a id="l1007" class='ln'>1007</a></td><td><span class="ct">     *  Sum: '&lt;S44&gt;/Sum1'</span></td></tr>
+<td><a id="l1007" class='ln'>1007</a></td><td>  <span class="ct">/* Switch: '&lt;S18&gt;/Switch3' incorporates:</span></td></tr>
 <tr name="1008" id="1008">
-<td><a id="l1008" class='ln'>1008</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1008" class='ln'>1008</a></td><td><span class="ct">   *  Constant: '&lt;S18&gt;/Constant16'</span></td></tr>
 <tr name="1009" id="1009">
-<td><a id="l1009" class='ln'>1009</a></td><td>    <span class="kw">if</span> ((<a id="1009c10" class="tk">uint16_T</a>)(<a id="1009c20" class="tk">rtb_LogicalOperator3</a> <a id="1009c41" class="tk">+</a> 1U) <a id="1009c47" class="tk">&lt;</a> 12000) <span class="br">{</span></td></tr>
+<td><a id="l1009" class='ln'>1009</a></td><td><span class="ct">   *  Constant: '&lt;S18&gt;/Constant2'</span></td></tr>
 <tr name="1010" id="1010">
-<td><a id="l1010" class='ln'>1010</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S45&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l1010" class='ln'>1010</a></td><td><span class="ct">   *  Constant: '&lt;S19&gt;/vec_hallToPos'</span></td></tr>
 <tr name="1011" id="1011">
-<td><a id="l1011" class='ln'>1011</a></td><td>      <a id="1011c7" class="tk">rtDW</a>-&gt;<a id="1011c13" class="tk">UnitDelay_DSTATE_f</a> = (<a id="1011c35" class="tk">uint16_T</a>)(<a id="1011c45" class="tk">rtb_LogicalOperator3</a> <a id="1011c66" class="tk">+</a> 1U);</td></tr>
+<td><a id="l1011" class='ln'>1011</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S18&gt;/Relational Operator7'</span></td></tr>
 <tr name="1012" id="1012">
-<td><a id="l1012" class='ln'>1012</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1012" class='ln'>1012</a></td><td><span class="ct">   *  Selector: '&lt;S19&gt;/Selector'</span></td></tr>
 <tr name="1013" id="1013">
-<td><a id="l1013" class='ln'>1013</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S45&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l1013" class='ln'>1013</a></td><td><span class="ct">   *  Sum: '&lt;S18&gt;/Sum1'</span></td></tr>
 <tr name="1014" id="1014">
-<td><a id="l1014" class='ln'>1014</a></td><td>      <a id="1014c7" class="tk">rtDW</a>-&gt;<a id="1014c13" class="tk">UnitDelay_DSTATE_f</a> = 12000U;</td></tr>
+<td><a id="l1014" class='ln'>1014</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1015" id="1015">
-<td><a id="l1015" class='ln'>1015</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1015" class='ln'>1015</a></td><td>  <span class="kw">if</span> (<a id="1015c7" class="tk">rtDW</a>-&gt;<a id="1015c13" class="tk">Switch2_o</a> <a id="1015c23" class="tk">==</a> 1) <span class="br">{</span></td></tr>
 <tr name="1016" id="1016">
-<td><a id="l1016" class='ln'>1016</a></td><td></td></tr>
+<td><a id="l1016" class='ln'>1016</a></td><td>    <a id="1016c5" class="tk">rtb_Sum2</a> = <a id="1016c16" class="tk">rtConstP</a>.<a id="1016c25" class="tk">vec_hallToPos_Value</a>[<a id="1016c45" class="tk">rtb_Add_h</a>];</td></tr>
 <tr name="1017" id="1017">
-<td><a id="l1017" class='ln'>1017</a></td><td>    <span class="ct">/* End of MinMax: '&lt;S44&gt;/MinMax' */</span></td></tr>
+<td><a id="l1017" class='ln'>1017</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1018" id="1018">
-<td><a id="l1018" class='ln'>1018</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S38&gt;/Dequalification' */</span></td></tr>
+<td><a id="l1018" class='ln'>1018</a></td><td>    <a id="1018c5" class="tk">rtb_Sum2</a> = (<a id="1018c17" class="tk">int8_T</a>)(<a id="1018c25" class="tk">rtConstP</a>.<a id="1018c34" class="tk">vec_hallToPos_Value</a>[<a id="1018c54" class="tk">rtb_Add_h</a>] <a id="1018c65" class="tk">+</a> 1);</td></tr>
 <tr name="1019" id="1019">
-<td><a id="l1019" class='ln'>1019</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1019" class='ln'>1019</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1020" id="1020">
-<td><a id="l1020" class='ln'>1020</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S38&gt;/Default' incorporates:</span></td></tr>
+<td><a id="l1020" class='ln'>1020</a></td><td></td></tr>
 <tr name="1021" id="1021">
-<td><a id="l1021" class='ln'>1021</a></td><td><span class="ct">     *  ActionPort: '&lt;S40&gt;/Action Port'</span></td></tr>
+<td><a id="l1021" class='ln'>1021</a></td><td>  <span class="ct">/* End of Switch: '&lt;S18&gt;/Switch3' */</span></td></tr>
 <tr name="1022" id="1022">
-<td><a id="l1022" class='ln'>1022</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1022" class='ln'>1022</a></td><td></td></tr>
 <tr name="1023" id="1023">
-<td><a id="l1023" class='ln'>1023</a></td><td>    <a id="1023c5" class="tk">rtb_n_commDeacv</a> = <a id="1023c23" class="tk">rtDW</a>-&gt;<a id="1023c29" class="tk">UnitDelay_DSTATE_k</a>;</td></tr>
+<td><a id="l1023" class='ln'>1023</a></td><td>  <span class="ct">/* Sum: '&lt;S18&gt;/Sum3' incorporates:</span></td></tr>
 <tr name="1024" id="1024">
-<td><a id="l1024" class='ln'>1024</a></td><td></td></tr>
+<td><a id="l1024" class='ln'>1024</a></td><td><span class="ct">   *  Gain: '&lt;S18&gt;/Gain'</span></td></tr>
 <tr name="1025" id="1025">
-<td><a id="l1025" class='ln'>1025</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S38&gt;/Default' */</span></td></tr>
+<td><a id="l1025" class='ln'>1025</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="1026" id="1026">
-<td><a id="l1026" class='ln'>1026</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1026" class='ln'>1026</a></td><td><span class="ct">   *  Product: '&lt;S18&gt;/Divide1'</span></td></tr>
 <tr name="1027" id="1027">
-<td><a id="l1027" class='ln'>1027</a></td><td></td></tr>
+<td><a id="l1027" class='ln'>1027</a></td><td><span class="ct">   *  Product: '&lt;S18&gt;/Divide3'</span></td></tr>
 <tr name="1028" id="1028">
-<td><a id="l1028" class='ln'>1028</a></td><td>  <span class="ct">/* End of If: '&lt;S38&gt;/If2' */</span></td></tr>
+<td><a id="l1028" class='ln'>1028</a></td><td><span class="ct">   *  Switch: '&lt;S29&gt;/Switch4'</span></td></tr>
 <tr name="1029" id="1029">
-<td><a id="l1029" class='ln'>1029</a></td><td></td></tr>
+<td><a id="l1029" class='ln'>1029</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1030" id="1030">
-<td><a id="l1030" class='ln'>1030</a></td><td>  <span class="ct">/* Logic: '&lt;S25&gt;/Logical Operator12' incorporates:</span></td></tr>
+<td><a id="l1030" class='ln'>1030</a></td><td>  <a id="1030c3" class="tk">rtb_r_cos_M1</a> = (<a id="1030c19" class="tk">int16_T</a>)(((<a id="1030c30" class="tk">int16_T</a>)((<a id="1030c40" class="tk">int16_T</a>)(((<a id="1030c51" class="tk">int32_T</a>)((2290649225ULL <a id="1030c75" class="tk">*</a></td></tr>
 <tr name="1031" id="1031">
-<td><a id="l1031" class='ln'>1031</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/b_motEna'</span></td></tr>
+<td><a id="l1031" class='ln'>1031</a></td><td>    <a id="1031c5" class="tk">rtDW</a>-&gt;<a id="1031c11" class="tk">Switch4</a>) <a id="1031c20" class="tk">&gt;&gt;</a> 37) <a id="1031c27" class="tk">*</a> (<a id="1031c30" class="tk">int32_T</a>)<a id="1031c38" class="tk">rtb_Rem1</a>) <a id="1031c48" class="tk">&gt;&gt;</a> 6) <a id="1031c54" class="tk">*</a> <a id="1031c56" class="tk">rtDW</a>-&gt;<a id="1031c62" class="tk">Switch2_o</a>) <a id="1031c73" class="tk">+</a></td></tr>
 <tr name="1032" id="1032">
-<td><a id="l1032" class='ln'>1032</a></td><td><span class="ct">   *  Logic: '&lt;S25&gt;/Logical Operator7'</span></td></tr>
+<td><a id="l1032" class='ln'>1032</a></td><td>    (<a id="1032c6" class="tk">rtb_Sum2</a> <a id="1032c15" class="tk">&lt;&lt;</a> 14)) <a id="1032c23" class="tk">&gt;&gt;</a> 2);</td></tr>
 <tr name="1033" id="1033">
-<td><a id="l1033" class='ln'>1033</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1033" class='ln'>1033</a></td><td></td></tr>
 <tr name="1034" id="1034">
-<td><a id="l1034" class='ln'>1034</a></td><td>  <a id="1034c3" class="tk">rtb_LogicalOperator12</a> = ((<a id="1034c29" class="tk">!</a><a id="1034c30" class="tk">rtb_n_commDeacv</a>) <a id="1034c47" class="tk">&amp;&amp;</a> <a id="1034c50" class="tk">rtU</a>-&gt;<a id="1034c55" class="tk">b_motEna</a>);</td></tr>
+<td><a id="l1034" class='ln'>1034</a></td><td>  <span class="ct">/* MinMax: '&lt;S18&gt;/Max' incorporates:</span></td></tr>
 <tr name="1035" id="1035">
-<td><a id="l1035" class='ln'>1035</a></td><td></td></tr>
+<td><a id="l1035" class='ln'>1035</a></td><td><span class="ct">   *  Constant: '&lt;S18&gt;/a_elecAngle2'</span></td></tr>
 <tr name="1036" id="1036">
-<td><a id="l1036" class='ln'>1036</a></td><td>  <span class="ct">/* Logic: '&lt;S25&gt;/Logical Operator4' incorporates:</span></td></tr>
+<td><a id="l1036" class='ln'>1036</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="1037" id="1037">
-<td><a id="l1037" class='ln'>1037</a></td><td><span class="ct">   *  Constant: '&lt;S25&gt;/constant8'</span></td></tr>
+<td><a id="l1037" class='ln'>1037</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1038" id="1038">
-<td><a id="l1038" class='ln'>1038</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/n_ctrlModReq'</span></td></tr>
+<td><a id="l1038" class='ln'>1038</a></td><td>  <span class="kw">if</span> (<a id="1038c7" class="tk">rtb_r_cos_M1</a> <a id="1038c20" class="tk">&lt;=</a> 0) <span class="br">{</span></td></tr>
 <tr name="1039" id="1039">
-<td><a id="l1039" class='ln'>1039</a></td><td><span class="ct">   *  Logic: '&lt;S25&gt;/Logical Operator11'</span></td></tr>
+<td><a id="l1039" class='ln'>1039</a></td><td>    <a id="1039c5" class="tk">rtb_r_cos_M1</a> = 0;</td></tr>
 <tr name="1040" id="1040">
-<td><a id="l1040" class='ln'>1040</a></td><td><span class="ct">   *  Logic: '&lt;S25&gt;/Logical Operator8'</span></td></tr>
+<td><a id="l1040" class='ln'>1040</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1041" id="1041">
-<td><a id="l1041" class='ln'>1041</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S25&gt;/Relational Operator10'</span></td></tr>
+<td><a id="l1041" class='ln'>1041</a></td><td></td></tr>
 <tr name="1042" id="1042">
-<td><a id="l1042" class='ln'>1042</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1042" class='ln'>1042</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S18&gt;/Max' */</span></td></tr>
 <tr name="1043" id="1043">
-<td><a id="l1043" class='ln'>1043</a></td><td>  <a id="1043c3" class="tk">rtb_LogicalOperator4_e</a> = ((<a id="1043c30" class="tk">rtb_BitwiseOperator2</a> <a id="1043c51" class="tk">!=</a> 0) <a id="1043c57" class="tk">||</a> (<a id="1043c61" class="tk">!</a><a id="1043c62" class="tk">rtDW</a>-&gt;<a id="1043c68" class="tk">Compare</a>) <a id="1043c77" class="tk">||</a> (</td></tr>
+<td><a id="l1043" class='ln'>1043</a></td><td></td></tr>
 <tr name="1044" id="1044">
-<td><a id="l1044" class='ln'>1044</a></td><td>    <a id="1044c5" class="tk">!</a><a id="1044c6" class="tk">rtb_LogicalOperator12</a>) <a id="1044c29" class="tk">||</a> (<a id="1044c33" class="tk">rtU</a>-&gt;<a id="1044c38" class="tk">n_ctrlModReq</a> <a id="1044c51" class="tk">==</a> 0));</td></tr>
+<td><a id="l1044" class='ln'>1044</a></td><td>  <span class="ct">/* Sum: '&lt;S22&gt;/Add2' incorporates:</span></td></tr>
 <tr name="1045" id="1045">
-<td><a id="l1045" class='ln'>1045</a></td><td></td></tr>
+<td><a id="l1045" class='ln'>1045</a></td><td><span class="ct">   *  Constant: '&lt;S22&gt;/Constant2'</span></td></tr>
 <tr name="1046" id="1046">
-<td><a id="l1046" class='ln'>1046</a></td><td>  <span class="ct">/* Abs: '&lt;S4&gt;/Abs2' incorporates:</span></td></tr>
+<td><a id="l1046" class='ln'>1046</a></td><td><span class="ct">   *  Product: '&lt;S18&gt;/Divide2'</span></td></tr>
 <tr name="1047" id="1047">
-<td><a id="l1047" class='ln'>1047</a></td><td><span class="ct">   *  Switch: '&lt;S14&gt;/Switch2'</span></td></tr>
+<td><a id="l1047" class='ln'>1047</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1048" id="1048">
-<td><a id="l1048" class='ln'>1048</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1048" class='ln'>1048</a></td><td>  <a id="1048c3" class="tk">rtb_Add2_lk</a> = (<a id="1048c18" class="tk">int16_T</a>)((((15 <a id="1048c33" class="tk">*</a> <a id="1048c35" class="tk">rtb_r_cos_M1</a>) <a id="1048c49" class="tk">&gt;&gt;</a> 4) <a id="1048c55" class="tk">+</a> (<a id="1048c58" class="tk">rtP</a>.<a id="1048c62" class="tk">i_hall_offset</a> <a id="1048c76" class="tk">&lt;&lt;</a> 2))</td></tr>
 <tr name="1049" id="1049">
-<td><a id="l1049" class='ln'>1049</a></td><td>  <span class="kw">if</span> (<a id="1049c7" class="tk">rtb_Switch3</a> <a id="1049c19" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l1049" class='ln'>1049</a></td><td>    <a id="1049c5" class="tk">&gt;&gt;</a> 2);</td></tr>
 <tr name="1050" id="1050">
-<td><a id="l1050" class='ln'>1050</a></td><td>    <a id="1050c5" class="tk">rtb_LogicalOperator3</a> = (<a id="1050c29" class="tk">uint16_T</a>)((<a id="1050c40" class="tk">uint32_T</a>)<a id="1050c49" class="tk">-</a><a id="1050c50" class="tk">rtb_Switch3</a> <a id="1050c62" class="tk">&gt;&gt;</a> 4);</td></tr>
+<td><a id="l1050" class='ln'>1050</a></td><td></td></tr>
 <tr name="1051" id="1051">
-<td><a id="l1051" class='ln'>1051</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1051" class='ln'>1051</a></td><td>  <span class="ct">/* DataTypeConversion: '&lt;S22&gt;/Data Type Conversion' incorporates:</span></td></tr>
 <tr name="1052" id="1052">
-<td><a id="l1052" class='ln'>1052</a></td><td>    <a id="1052c5" class="tk">rtb_LogicalOperator3</a> = (<a id="1052c29" class="tk">uint16_T</a>)((<a id="1052c40" class="tk">uint32_T</a>)<a id="1052c49" class="tk">rtb_Switch3</a> <a id="1052c61" class="tk">&gt;&gt;</a> 4);</td></tr>
+<td><a id="l1052" class='ln'>1052</a></td><td><span class="ct">   *  Sum: '&lt;S22&gt;/Add2'</span></td></tr>
 <tr name="1053" id="1053">
-<td><a id="l1053" class='ln'>1053</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1053" class='ln'>1053</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1054" id="1054">
-<td><a id="l1054" class='ln'>1054</a></td><td></td></tr>
+<td><a id="l1054" class='ln'>1054</a></td><td>  <a id="1054c3" class="tk">rtb_r_cos_M1</a> = (<a id="1054c19" class="tk">int16_T</a>)(<a id="1054c28" class="tk">rtb_Add2_lk</a> <a id="1054c40" class="tk">&gt;&gt;</a> 4);</td></tr>
 <tr name="1055" id="1055">
-<td><a id="l1055" class='ln'>1055</a></td><td>  <span class="ct">/* End of Abs: '&lt;S4&gt;/Abs2' */</span></td></tr>
+<td><a id="l1055" class='ln'>1055</a></td><td></td></tr>
 <tr name="1056" id="1056">
-<td><a id="l1056" class='ln'>1056</a></td><td></td></tr>
+<td><a id="l1056" class='ln'>1056</a></td><td>  <span class="ct">/* If: '&lt;S22&gt;/If' incorporates:</span></td></tr>
 <tr name="1057" id="1057">
-<td><a id="l1057" class='ln'>1057</a></td><td>  <span class="ct">/* Relay: '&lt;S25&gt;/n_SpeedCtrl' */</span></td></tr>
+<td><a id="l1057" class='ln'>1057</a></td><td><span class="ct">   *  Constant: '&lt;S22&gt;/Constant1'</span></td></tr>
 <tr name="1058" id="1058">
-<td><a id="l1058" class='ln'>1058</a></td><td>  <a id="1058c3" class="tk">rtDW</a>-&gt;<a id="1058c9" class="tk">n_SpeedCtrl_Mode</a> = ((<a id="1058c30" class="tk">rtb_LogicalOperator3</a> <a id="1058c51" class="tk">&gt;=</a> 300) <a id="1058c59" class="tk">||</a></td></tr>
+<td><a id="l1058" class='ln'>1058</a></td><td><span class="ct">   *  Constant: '&lt;S22&gt;/Constant3'</span></td></tr>
 <tr name="1059" id="1059">
-<td><a id="l1059" class='ln'>1059</a></td><td>    ((<a id="1059c7" class="tk">rtb_LogicalOperator3</a> <a id="1059c28" class="tk">&gt;</a> 200) <a id="1059c35" class="tk">&amp;&amp;</a> <a id="1059c38" class="tk">rtDW</a>-&gt;<a id="1059c44" class="tk">n_SpeedCtrl_Mode</a>));</td></tr>
+<td><a id="l1059" class='ln'>1059</a></td><td><span class="ct">   *  Inport: '&lt;S25&gt;/In1'</span></td></tr>
 <tr name="1060" id="1060">
-<td><a id="l1060" class='ln'>1060</a></td><td></td></tr>
+<td><a id="l1060" class='ln'>1060</a></td><td><span class="ct">   *  Inport: '&lt;S26&gt;/In1'</span></td></tr>
 <tr name="1061" id="1061">
-<td><a id="l1061" class='ln'>1061</a></td><td>  <span class="ct">/* Logic: '&lt;S25&gt;/Logical Operator10' incorporates:</span></td></tr>
+<td><a id="l1061" class='ln'>1061</a></td><td><span class="ct">   *  Inport: '&lt;S27&gt;/In1'</span></td></tr>
 <tr name="1062" id="1062">
-<td><a id="l1062" class='ln'>1062</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/b_cruiseEna'</span></td></tr>
+<td><a id="l1062" class='ln'>1062</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="1063" id="1063">
-<td><a id="l1063" class='ln'>1063</a></td><td><span class="ct">   *  Relay: '&lt;S25&gt;/n_SpeedCtrl'</span></td></tr>
+<td><a id="l1063" class='ln'>1063</a></td><td><span class="ct">   *  Sum: '&lt;S22&gt;/Add'</span></td></tr>
 <tr name="1064" id="1064">
-<td><a id="l1064" class='ln'>1064</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1064" class='ln'>1064</a></td><td><span class="ct">   *  Sum: '&lt;S22&gt;/Add1'</span></td></tr>
 <tr name="1065" id="1065">
-<td><a id="l1065" class='ln'>1065</a></td><td>  <a id="1065c3" class="tk">rtb_Equal_k</a> = (<a id="1065c18" class="tk">rtDW</a>-&gt;<a id="1065c24" class="tk">n_SpeedCtrl_Mode</a> <a id="1065c41" class="tk">&amp;&amp;</a> <a id="1065c44" class="tk">rtU</a>-&gt;<a id="1065c49" class="tk">b_cruiseEna</a>);</td></tr>
+<td><a id="l1065" class='ln'>1065</a></td><td><span class="ct">   *  Sum: '&lt;S22&gt;/Add2'</span></td></tr>
 <tr name="1066" id="1066">
-<td><a id="l1066" class='ln'>1066</a></td><td></td></tr>
+<td><a id="l1066" class='ln'>1066</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1067" id="1067">
-<td><a id="l1067" class='ln'>1067</a></td><td>  <span class="ct">/* Logic: '&lt;S25&gt;/Logical Operator2' incorporates:</span></td></tr>
+<td><a id="l1067" class='ln'>1067</a></td><td>  <span class="kw">if</span> (<a id="1067c7" class="tk">rtb_r_cos_M1</a> <a id="1067c20" class="tk">&gt;=</a> 360) <span class="br">{</span></td></tr>
 <tr name="1068" id="1068">
-<td><a id="l1068" class='ln'>1068</a></td><td><span class="ct">   *  Constant: '&lt;S25&gt;/constant'</span></td></tr>
+<td><a id="l1068" class='ln'>1068</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S22&gt;/If Action Subsystem' incorporates:</span></td></tr>
 <tr name="1069" id="1069">
-<td><a id="l1069" class='ln'>1069</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/n_ctrlModReq'</span></td></tr>
+<td><a id="l1069" class='ln'>1069</a></td><td><span class="ct">     *  ActionPort: '&lt;S25&gt;/Action Port'</span></td></tr>
 <tr name="1070" id="1070">
-<td><a id="l1070" class='ln'>1070</a></td><td><span class="ct">   *  Logic: '&lt;S25&gt;/Logical Operator5'</span></td></tr>
+<td><a id="l1070" class='ln'>1070</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1071" id="1071">
-<td><a id="l1071" class='ln'>1071</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S25&gt;/Relational Operator4'</span></td></tr>
+<td><a id="l1071" class='ln'>1071</a></td><td>    <a id="1071c5" class="tk">rtb_r_cos_M1</a> = (<a id="1071c21" class="tk">int16_T</a>)(<a id="1071c30" class="tk">rtb_Add2_lk</a> <a id="1071c42" class="tk">-</a> 5760);</td></tr>
 <tr name="1072" id="1072">
-<td><a id="l1072" class='ln'>1072</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1072" class='ln'>1072</a></td><td></td></tr>
 <tr name="1073" id="1073">
-<td><a id="l1073" class='ln'>1073</a></td><td>  <a id="1073c3" class="tk">rtb_LogicalOperator2_h</a> = ((<a id="1073c30" class="tk">rtU</a>-&gt;<a id="1073c35" class="tk">n_ctrlModReq</a> <a id="1073c48" class="tk">==</a> 2) <a id="1073c54" class="tk">&amp;&amp;</a> (<a id="1073c58" class="tk">!</a><a id="1073c59" class="tk">rtb_Equal_k</a>));</td></tr>
+<td><a id="l1073" class='ln'>1073</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S22&gt;/If Action Subsystem' */</span></td></tr>
 <tr name="1074" id="1074">
-<td><a id="l1074" class='ln'>1074</a></td><td></td></tr>
+<td><a id="l1074" class='ln'>1074</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="1074c14" class="tk">rtb_r_cos_M1</a> <a id="1074c27" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="1075" id="1075">
-<td><a id="l1075" class='ln'>1075</a></td><td>  <span class="ct">/* Logic: '&lt;S25&gt;/Logical Operator1' incorporates:</span></td></tr>
+<td><a id="l1075" class='ln'>1075</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S22&gt;/If Action Subsystem2' incorporates:</span></td></tr>
 <tr name="1076" id="1076">
-<td><a id="l1076" class='ln'>1076</a></td><td><span class="ct">   *  Constant: '&lt;S25&gt;/constant1'</span></td></tr>
+<td><a id="l1076" class='ln'>1076</a></td><td><span class="ct">     *  ActionPort: '&lt;S27&gt;/Action Port'</span></td></tr>
 <tr name="1077" id="1077">
-<td><a id="l1077" class='ln'>1077</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/n_ctrlModReq'</span></td></tr>
+<td><a id="l1077" class='ln'>1077</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1078" id="1078">
-<td><a id="l1078" class='ln'>1078</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S25&gt;/Relational Operator1'</span></td></tr>
+<td><a id="l1078" class='ln'>1078</a></td><td>    <a id="1078c5" class="tk">rtb_r_cos_M1</a> = (<a id="1078c21" class="tk">int16_T</a>)(<a id="1078c30" class="tk">rtb_Add2_lk</a> <a id="1078c42" class="tk">+</a> 5760);</td></tr>
 <tr name="1079" id="1079">
-<td><a id="l1079" class='ln'>1079</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1079" class='ln'>1079</a></td><td></td></tr>
 <tr name="1080" id="1080">
-<td><a id="l1080" class='ln'>1080</a></td><td>  <a id="1080c3" class="tk">rtb_Equal_k</a> = ((<a id="1080c19" class="tk">rtU</a>-&gt;<a id="1080c24" class="tk">n_ctrlModReq</a> <a id="1080c37" class="tk">==</a> 1) <a id="1080c43" class="tk">||</a> <a id="1080c46" class="tk">rtb_Equal_k</a>);</td></tr>
+<td><a id="l1080" class='ln'>1080</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S22&gt;/If Action Subsystem2' */</span></td></tr>
 <tr name="1081" id="1081">
-<td><a id="l1081" class='ln'>1081</a></td><td></td></tr>
+<td><a id="l1081" class='ln'>1081</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1082" id="1082">
-<td><a id="l1082" class='ln'>1082</a></td><td>  <span class="ct">/* Chart: '&lt;S4&gt;/Control_Mode_Manager' incorporates:</span></td></tr>
+<td><a id="l1082" class='ln'>1082</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S22&gt;/If Action Subsystem1' incorporates:</span></td></tr>
 <tr name="1083" id="1083">
-<td><a id="l1083" class='ln'>1083</a></td><td><span class="ct">   *  Logic: '&lt;S25&gt;/Logical Operator3'</span></td></tr>
+<td><a id="l1083" class='ln'>1083</a></td><td><span class="ct">     *  ActionPort: '&lt;S26&gt;/Action Port'</span></td></tr>
 <tr name="1084" id="1084">
-<td><a id="l1084" class='ln'>1084</a></td><td><span class="ct">   *  Logic: '&lt;S25&gt;/Logical Operator6'</span></td></tr>
+<td><a id="l1084" class='ln'>1084</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1085" id="1085">
-<td><a id="l1085" class='ln'>1085</a></td><td><span class="ct">   *  Logic: '&lt;S25&gt;/Logical Operator9'</span></td></tr>
+<td><a id="l1085" class='ln'>1085</a></td><td>    <a id="1085c5" class="tk">rtb_r_cos_M1</a> = <a id="1085c20" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="1086" id="1086">
-<td><a id="l1086" class='ln'>1086</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1086" class='ln'>1086</a></td><td></td></tr>
 <tr name="1087" id="1087">
-<td><a id="l1087" class='ln'>1087</a></td><td>  <span class="kw">if</span> (<a id="1087c7" class="tk">rtDW</a>-&gt;<a id="1087c13" class="tk">is_active_c5_PMSM_Controller</a> <a id="1087c42" class="tk">==</a> 0U) <span class="br">{</span></td></tr>
+<td><a id="l1087" class='ln'>1087</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S22&gt;/If Action Subsystem1' */</span></td></tr>
 <tr name="1088" id="1088">
-<td><a id="l1088" class='ln'>1088</a></td><td>    <a id="1088c5" class="tk">rtDW</a>-&gt;<a id="1088c11" class="tk">is_active_c5_PMSM_Controller</a> = 1U;</td></tr>
+<td><a id="l1088" class='ln'>1088</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1089" id="1089">
-<td><a id="l1089" class='ln'>1089</a></td><td>    <a id="1089c5" class="tk">rtDW</a>-&gt;<a id="1089c11" class="tk">is_c5_PMSM_Controller</a> = <a id="1089c35" class="tk">IN_OPEN</a>;</td></tr>
+<td><a id="l1089" class='ln'>1089</a></td><td></td></tr>
 <tr name="1090" id="1090">
-<td><a id="l1090" class='ln'>1090</a></td><td>    <a id="1090c5" class="tk">rtb_z_ctrlMod</a> = <a id="1090c21" class="tk">OPEN_MODE</a>;</td></tr>
+<td><a id="l1090" class='ln'>1090</a></td><td>  <span class="ct">/* End of If: '&lt;S22&gt;/If' */</span></td></tr>
 <tr name="1091" id="1091">
-<td><a id="l1091" class='ln'>1091</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="1091c14" class="tk">rtDW</a>-&gt;<a id="1091c20" class="tk">is_c5_PMSM_Controller</a> <a id="1091c42" class="tk">==</a> 1) <span class="br">{</span></td></tr>
+<td><a id="l1091" class='ln'>1091</a></td><td></td></tr>
 <tr name="1092" id="1092">
-<td><a id="l1092" class='ln'>1092</a></td><td>    <span class="kw">if</span> (<a id="1092c9" class="tk">rtb_LogicalOperator4_e</a>) <span class="br">{</span></td></tr>
+<td><a id="l1092" class='ln'>1092</a></td><td>  <span class="ct">/* Switch: '&lt;S1&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1093" id="1093">
-<td><a id="l1093" class='ln'>1093</a></td><td>      <a id="1093c7" class="tk">rtDW</a>-&gt;<a id="1093c13" class="tk">is_ACTIVE</a> = <a id="1093c25" class="tk">IN_NO_ACTIVE_CHILD</a>;</td></tr>
+<td><a id="l1093" class='ln'>1093</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/set_Angle'</span></td></tr>
 <tr name="1094" id="1094">
-<td><a id="l1094" class='ln'>1094</a></td><td>      <a id="1094c7" class="tk">rtDW</a>-&gt;<a id="1094c13" class="tk">is_c5_PMSM_Controller</a> = <a id="1094c37" class="tk">IN_OPEN</a>;</td></tr>
+<td><a id="l1094" class='ln'>1094</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1095" id="1095">
-<td><a id="l1095" class='ln'>1095</a></td><td>      <a id="1095c7" class="tk">rtb_z_ctrlMod</a> = <a id="1095c23" class="tk">OPEN_MODE</a>;</td></tr>
+<td><a id="l1095" class='ln'>1095</a></td><td>  <span class="kw">if</span> (<a id="1095c7" class="tk">rtU</a>-&gt;<a id="1095c12" class="tk">set_Angle</a> <a id="1095c22" class="tk">&lt;=</a> 5760) <span class="br">{</span></td></tr>
 <tr name="1096" id="1096">
-<td><a id="l1096" class='ln'>1096</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="1096c16" class="tk">rtDW</a>-&gt;<a id="1096c22" class="tk">is_ACTIVE</a> <a id="1096c32" class="tk">==</a> 1) <span class="br">{</span></td></tr>
+<td><a id="l1096" class='ln'>1096</a></td><td>    <a id="1096c5" class="tk">rtb_r_cos_M1</a> = <a id="1096c20" class="tk">rtU</a>-&gt;<a id="1096c25" class="tk">set_Angle</a>;</td></tr>
 <tr name="1097" id="1097">
-<td><a id="l1097" class='ln'>1097</a></td><td>      <a id="1097c7" class="tk">rtb_z_ctrlMod</a> = <a id="1097c23" class="tk">SPD_MODE</a>;</td></tr>
+<td><a id="l1097" class='ln'>1097</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1098" id="1098">
-<td><a id="l1098" class='ln'>1098</a></td><td>      <span class="kw">if</span> (<a id="1098c11" class="tk">!</a><a id="1098c12" class="tk">rtb_Equal_k</a>) <span class="br">{</span></td></tr>
+<td><a id="l1098" class='ln'>1098</a></td><td></td></tr>
 <tr name="1099" id="1099">
-<td><a id="l1099" class='ln'>1099</a></td><td>        <span class="kw">if</span> (<a id="1099c13" class="tk">rtb_LogicalOperator2_h</a>) <span class="br">{</span></td></tr>
+<td><a id="l1099" class='ln'>1099</a></td><td>  <span class="ct">/* End of Switch: '&lt;S1&gt;/Switch' */</span></td></tr>
 <tr name="1100" id="1100">
-<td><a id="l1100" class='ln'>1100</a></td><td>          <a id="1100c11" class="tk">rtDW</a>-&gt;<a id="1100c17" class="tk">is_ACTIVE</a> = <a id="1100c29" class="tk">IN_TORQUE_MODE</a>;</td></tr>
+<td><a id="l1100" class='ln'>1100</a></td><td></td></tr>
 <tr name="1101" id="1101">
-<td><a id="l1101" class='ln'>1101</a></td><td>          <a id="1101c11" class="tk">rtb_z_ctrlMod</a> = <a id="1101c27" class="tk">TRQ_MODE</a>;</td></tr>
+<td><a id="l1101" class='ln'>1101</a></td><td>  <span class="ct">/* PreLookup: '&lt;S49&gt;/a_elecAngle_XA' incorporates:</span></td></tr>
 <tr name="1102" id="1102">
-<td><a id="l1102" class='ln'>1102</a></td><td>        <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1102" class='ln'>1102</a></td><td><span class="ct">   *  Switch: '&lt;S1&gt;/Switch'</span></td></tr>
 <tr name="1103" id="1103">
-<td><a id="l1103" class='ln'>1103</a></td><td>          <a id="1103c11" class="tk">rtDW</a>-&gt;<a id="1103c17" class="tk">is_ACTIVE</a> = <a id="1103c29" class="tk">IN_SPEED_MODE</a>;</td></tr>
+<td><a id="l1103" class='ln'>1103</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1104" id="1104">
-<td><a id="l1104" class='ln'>1104</a></td><td>        <span class="br">}</span></td></tr>
+<td><a id="l1104" class='ln'>1104</a></td><td>  <a id="1104c3" class="tk">rtb_Divide_d</a> = <a id="1104c18" class="tk">plook_u16s16_evencka</a>(<a id="1104c39" class="tk">rtb_r_cos_M1</a>, 0, 16U, 360U);</td></tr>
 <tr name="1105" id="1105">
-<td><a id="l1105" class='ln'>1105</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1105" class='ln'>1105</a></td><td></td></tr>
 <tr name="1106" id="1106">
-<td><a id="l1106" class='ln'>1106</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1106" class='ln'>1106</a></td><td>  <span class="ct">/* Sum: '&lt;S46&gt;/Add2' */</span></td></tr>
 <tr name="1107" id="1107">
-<td><a id="l1107" class='ln'>1107</a></td><td>      <span class="ct">/* case IN_TORQUE_MODE: */</span></td></tr>
+<td><a id="l1107" class='ln'>1107</a></td><td>  <a id="1107c3" class="tk">tmp_2</a> = ((<a id="1107c13" class="tk">int64_T</a>)<a id="1107c21" class="tk">rtb_Divide_e_idx_1</a> <a id="1107c40" class="tk">-</a> <a id="1107c42" class="tk">rtb_Divide_e_idx_2</a>) <a id="1107c62" class="tk">&gt;&gt;</a> 9;</td></tr>
 <tr name="1108" id="1108">
-<td><a id="l1108" class='ln'>1108</a></td><td>      <a id="1108c7" class="tk">rtb_z_ctrlMod</a> = <a id="1108c23" class="tk">TRQ_MODE</a>;</td></tr>
+<td><a id="l1108" class='ln'>1108</a></td><td>  <span class="kw">if</span> (<a id="1108c7" class="tk">tmp_2</a> <a id="1108c13" class="tk">&gt;</a> 32767LL) <span class="br">{</span></td></tr>
 <tr name="1109" id="1109">
-<td><a id="l1109" class='ln'>1109</a></td><td>      <span class="kw">if</span> (<a id="1109c11" class="tk">!</a><a id="1109c12" class="tk">rtb_LogicalOperator2_h</a>) <span class="br">{</span></td></tr>
+<td><a id="l1109" class='ln'>1109</a></td><td>    <a id="1109c5" class="tk">tmp_2</a> = 32767LL;</td></tr>
 <tr name="1110" id="1110">
-<td><a id="l1110" class='ln'>1110</a></td><td>        <a id="1110c9" class="tk">rtDW</a>-&gt;<a id="1110c15" class="tk">is_ACTIVE</a> = <a id="1110c27" class="tk">IN_SPEED_MODE</a>;</td></tr>
+<td><a id="l1110" class='ln'>1110</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1111" id="1111">
-<td><a id="l1111" class='ln'>1111</a></td><td>        <a id="1111c9" class="tk">rtb_z_ctrlMod</a> = <a id="1111c25" class="tk">SPD_MODE</a>;</td></tr>
+<td><a id="l1111" class='ln'>1111</a></td><td>    <span class="kw">if</span> (<a id="1111c9" class="tk">tmp_2</a> <a id="1111c15" class="tk">&lt;</a> <a id="1111c17" class="tk">-</a>32768LL) <span class="br">{</span></td></tr>
 <tr name="1112" id="1112">
-<td><a id="l1112" class='ln'>1112</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1112" class='ln'>1112</a></td><td>      <a id="1112c7" class="tk">tmp_2</a> = <a id="1112c15" class="tk">-</a>32768LL;</td></tr>
 <tr name="1113" id="1113">
 <td><a id="l1113" class='ln'>1113</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1114" id="1114">
-<td><a id="l1114" class='ln'>1114</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1114" class='ln'>1114</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1115" id="1115">
-<td><a id="l1115" class='ln'>1115</a></td><td>    <span class="ct">/* case IN_OPEN: */</span></td></tr>
+<td><a id="l1115" class='ln'>1115</a></td><td></td></tr>
 <tr name="1116" id="1116">
-<td><a id="l1116" class='ln'>1116</a></td><td>    <a id="1116c5" class="tk">rtb_z_ctrlMod</a> = <a id="1116c21" class="tk">OPEN_MODE</a>;</td></tr>
+<td><a id="l1116" class='ln'>1116</a></td><td>  <span class="ct">/* Gain: '&lt;S46&gt;/Gain2' incorporates:</span></td></tr>
 <tr name="1117" id="1117">
-<td><a id="l1117" class='ln'>1117</a></td><td>    <span class="kw">if</span> ((<a id="1117c10" class="tk">!</a><a id="1117c11" class="tk">rtb_LogicalOperator4_e</a>) <a id="1117c35" class="tk">&amp;&amp;</a> (<a id="1117c39" class="tk">rtb_LogicalOperator2_h</a> <a id="1117c62" class="tk">||</a> <a id="1117c65" class="tk">rtb_Equal_k</a>)) <span class="br">{</span></td></tr>
+<td><a id="l1117" class='ln'>1117</a></td><td><span class="ct">   *  Sum: '&lt;S46&gt;/Add2'</span></td></tr>
 <tr name="1118" id="1118">
-<td><a id="l1118" class='ln'>1118</a></td><td>      <a id="1118c7" class="tk">rtDW</a>-&gt;<a id="1118c13" class="tk">is_c5_PMSM_Controller</a> = <a id="1118c37" class="tk">IN_ACTIVE</a>;</td></tr>
+<td><a id="l1118" class='ln'>1118</a></td><td><span class="ct">   *  Sum: '&lt;S48&gt;/Sum6'</span></td></tr>
 <tr name="1119" id="1119">
-<td><a id="l1119" class='ln'>1119</a></td><td>      <span class="kw">if</span> (<a id="1119c11" class="tk">rtb_LogicalOperator2_h</a>) <span class="br">{</span></td></tr>
+<td><a id="l1119" class='ln'>1119</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1120" id="1120">
-<td><a id="l1120" class='ln'>1120</a></td><td>        <a id="1120c9" class="tk">rtDW</a>-&gt;<a id="1120c15" class="tk">is_ACTIVE</a> = <a id="1120c27" class="tk">IN_TORQUE_MODE</a>;</td></tr>
+<td><a id="l1120" class='ln'>1120</a></td><td>  <a id="1120c3" class="tk">rtb_Add2_lk</a> = (<a id="1120c18" class="tk">int16_T</a>)((18919 <a id="1120c34" class="tk">*</a> (<a id="1120c37" class="tk">int16_T</a>)<a id="1120c45" class="tk">tmp_2</a>) <a id="1120c52" class="tk">&gt;&gt;</a> 15);</td></tr>
 <tr name="1121" id="1121">
-<td><a id="l1121" class='ln'>1121</a></td><td>        <a id="1121c9" class="tk">rtb_z_ctrlMod</a> = <a id="1121c25" class="tk">TRQ_MODE</a>;</td></tr>
+<td><a id="l1121" class='ln'>1121</a></td><td></td></tr>
 <tr name="1122" id="1122">
-<td><a id="l1122" class='ln'>1122</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1122" class='ln'>1122</a></td><td>  <span class="ct">/* Sum: '&lt;S48&gt;/Sum1' incorporates:</span></td></tr>
 <tr name="1123" id="1123">
-<td><a id="l1123" class='ln'>1123</a></td><td>        <a id="1123c9" class="tk">rtDW</a>-&gt;<a id="1123c15" class="tk">is_ACTIVE</a> = <a id="1123c27" class="tk">IN_SPEED_MODE</a>;</td></tr>
+<td><a id="l1123" class='ln'>1123</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="1124" id="1124">
-<td><a id="l1124" class='ln'>1124</a></td><td>        <a id="1124c9" class="tk">rtb_z_ctrlMod</a> = <a id="1124c25" class="tk">SPD_MODE</a>;</td></tr>
+<td><a id="l1124" class='ln'>1124</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_sin_M1'</span></td></tr>
 <tr name="1125" id="1125">
-<td><a id="l1125" class='ln'>1125</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1125" class='ln'>1125</a></td><td><span class="ct">   *  Product: '&lt;S48&gt;/Divide1'</span></td></tr>
 <tr name="1126" id="1126">
-<td><a id="l1126" class='ln'>1126</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1126" class='ln'>1126</a></td><td><span class="ct">   *  Product: '&lt;S48&gt;/Divide2'</span></td></tr>
 <tr name="1127" id="1127">
-<td><a id="l1127" class='ln'>1127</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1127" class='ln'>1127</a></td><td><span class="ct">   *  Product: '&lt;S48&gt;/Divide3'</span></td></tr>
 <tr name="1128" id="1128">
-<td><a id="l1128" class='ln'>1128</a></td><td></td></tr>
+<td><a id="l1128" class='ln'>1128</a></td><td><span class="ct">   *  Sum: '&lt;S48&gt;/Sum6'</span></td></tr>
 <tr name="1129" id="1129">
-<td><a id="l1129" class='ln'>1129</a></td><td>  <span class="ct">/* End of Chart: '&lt;S4&gt;/Control_Mode_Manager' */</span></td></tr>
+<td><a id="l1129" class='ln'>1129</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1130" id="1130">
-<td><a id="l1130" class='ln'>1130</a></td><td></td></tr>
+<td><a id="l1130" class='ln'>1130</a></td><td>  <a id="1130c3" class="tk">rtb_RelationalOperator4_b</a> = ((<a id="1130c33" class="tk">rtb_Divide1_oy</a> <a id="1130c48" class="tk">*</a> <a id="1130c50" class="tk">rtConstP</a>.<a id="1130c59" class="tk">pooled13</a>[<a id="1130c68" class="tk">rtb_Divide_d</a>])</td></tr>
 <tr name="1131" id="1131">
-<td><a id="l1131" class='ln'>1131</a></td><td>  <span class="ct">/* Product: '&lt;S52&gt;/Divide' incorporates:</span></td></tr>
+<td><a id="l1131" class='ln'>1131</a></td><td>    <a id="1131c5" class="tk">&gt;&gt;</a> 14) <a id="1131c12" class="tk">+</a> (<a id="1131c15" class="tk">int16_T</a>)((<a id="1131c25" class="tk">rtb_Add2_lk</a> <a id="1131c37" class="tk">*</a> <a id="1131c39" class="tk">rtConstP</a>.<a id="1131c48" class="tk">pooled12</a>[<a id="1131c57" class="tk">rtb_Divide_d</a>]) <a id="1131c72" class="tk">&gt;&gt;</a> 14);</td></tr>
 <tr name="1132" id="1132">
-<td><a id="l1132" class='ln'>1132</a></td><td><span class="ct">   *  Constant: '&lt;S52&gt;/Constant'</span></td></tr>
+<td><a id="l1132" class='ln'>1132</a></td><td>  <span class="kw">if</span> (<a id="1132c7" class="tk">rtb_RelationalOperator4_b</a> <a id="1132c33" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="1133" id="1133">
-<td><a id="l1133" class='ln'>1133</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/adc_Pha'</span></td></tr>
+<td><a id="l1133" class='ln'>1133</a></td><td>    <a id="1133c5" class="tk">rtb_RelationalOperator4_b</a> = 32767;</td></tr>
 <tr name="1134" id="1134">
-<td><a id="l1134" class='ln'>1134</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/adc_Phb'</span></td></tr>
+<td><a id="l1134" class='ln'>1134</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1135" id="1135">
-<td><a id="l1135" class='ln'>1135</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1135" class='ln'>1135</a></td><td>    <span class="kw">if</span> (<a id="1135c9" class="tk">rtb_RelationalOperator4_b</a> <a id="1135c35" class="tk">&lt;</a> <a id="1135c37" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="1136" id="1136">
-<td><a id="l1136" class='ln'>1136</a></td><td>  <a id="1136c3" class="tk">rtb_Divide_idx_0</a> = <a id="1136c22" class="tk">rtU</a>-&gt;<a id="1136c27" class="tk">adc_Pha</a> <a id="1136c35" class="tk">*</a> <a id="1136c37" class="tk">rtP</a>.<a id="1136c41" class="tk">f_adc_curr_ceof</a>;</td></tr>
+<td><a id="l1136" class='ln'>1136</a></td><td>      <a id="1136c7" class="tk">rtb_RelationalOperator4_b</a> = <a id="1136c35" class="tk">-</a>32768;</td></tr>
 <tr name="1137" id="1137">
-<td><a id="l1137" class='ln'>1137</a></td><td>  <a id="1137c3" class="tk">rtb_Divide_idx_1</a> = <a id="1137c22" class="tk">rtU</a>-&gt;<a id="1137c27" class="tk">adc_Phb</a> <a id="1137c35" class="tk">*</a> <a id="1137c37" class="tk">rtP</a>.<a id="1137c41" class="tk">f_adc_curr_ceof</a>;</td></tr>
+<td><a id="l1137" class='ln'>1137</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1138" id="1138">
-<td><a id="l1138" class='ln'>1138</a></td><td></td></tr>
+<td><a id="l1138" class='ln'>1138</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1139" id="1139">
-<td><a id="l1139" class='ln'>1139</a></td><td>  <span class="ct">/* Sum: '&lt;S48&gt;/Add' */</span></td></tr>
+<td><a id="l1139" class='ln'>1139</a></td><td></td></tr>
 <tr name="1140" id="1140">
-<td><a id="l1140" class='ln'>1140</a></td><td>  <a id="1140c3" class="tk">tmp_2</a> = (<a id="1140c12" class="tk">int64_T</a>)<a id="1140c20" class="tk">rtb_Divide_idx_0</a> <a id="1140c37" class="tk">+</a> <a id="1140c39" class="tk">rtb_Divide_idx_1</a>;</td></tr>
+<td><a id="l1140" class='ln'>1140</a></td><td>  <span class="ct">/* SignalConversion generated from: '&lt;S39&gt;/Low_Pass_Filter' incorporates:</span></td></tr>
 <tr name="1141" id="1141">
-<td><a id="l1141" class='ln'>1141</a></td><td>  <span class="kw">if</span> (<a id="1141c7" class="tk">tmp_2</a> <a id="1141c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l1141" class='ln'>1141</a></td><td><span class="ct">   *  Sum: '&lt;S48&gt;/Sum1'</span></td></tr>
 <tr name="1142" id="1142">
-<td><a id="l1142" class='ln'>1142</a></td><td>    <a id="1142c5" class="tk">tmp_2</a> = 2147483647LL;</td></tr>
+<td><a id="l1142" class='ln'>1142</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1143" id="1143">
-<td><a id="l1143" class='ln'>1143</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1143" class='ln'>1143</a></td><td>  <a id="1143c3" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[0] = (<a id="1143c57" class="tk">int16_T</a>)</td></tr>
 <tr name="1144" id="1144">
-<td><a id="l1144" class='ln'>1144</a></td><td>    <span class="kw">if</span> (<a id="1144c9" class="tk">tmp_2</a> <a id="1144c15" class="tk">&lt;</a> <a id="1144c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l1144" class='ln'>1144</a></td><td>    <a id="1144c5" class="tk">rtb_RelationalOperator4_b</a>;</td></tr>
 <tr name="1145" id="1145">
-<td><a id="l1145" class='ln'>1145</a></td><td>      <a id="1145c7" class="tk">tmp_2</a> = <a id="1145c15" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l1145" class='ln'>1145</a></td><td></td></tr>
 <tr name="1146" id="1146">
-<td><a id="l1146" class='ln'>1146</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1146" class='ln'>1146</a></td><td>  <span class="ct">/* Sum: '&lt;S48&gt;/Sum6' incorporates:</span></td></tr>
 <tr name="1147" id="1147">
-<td><a id="l1147" class='ln'>1147</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1147" class='ln'>1147</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="1148" id="1148">
-<td><a id="l1148" class='ln'>1148</a></td><td></td></tr>
+<td><a id="l1148" class='ln'>1148</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_sin_M1'</span></td></tr>
 <tr name="1149" id="1149">
-<td><a id="l1149" class='ln'>1149</a></td><td>  <span class="ct">/* Sum: '&lt;S48&gt;/Add1' incorporates:</span></td></tr>
+<td><a id="l1149" class='ln'>1149</a></td><td><span class="ct">   *  Product: '&lt;S48&gt;/Divide1'</span></td></tr>
 <tr name="1150" id="1150">
-<td><a id="l1150" class='ln'>1150</a></td><td><span class="ct">   *  Sum: '&lt;S48&gt;/Add'</span></td></tr>
+<td><a id="l1150" class='ln'>1150</a></td><td><span class="ct">   *  Product: '&lt;S48&gt;/Divide4'</span></td></tr>
 <tr name="1151" id="1151">
 <td><a id="l1151" class='ln'>1151</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1152" id="1152">
-<td><a id="l1152" class='ln'>1152</a></td><td>  <a id="1152c3" class="tk">tmp_2</a> = <a id="1152c11" class="tk">-</a>(<a id="1152c13" class="tk">int64_T</a>)(<a id="1152c22" class="tk">int32_T</a>)<a id="1152c30" class="tk">tmp_2</a> <a id="1152c36" class="tk">&gt;&gt;</a> 9;</td></tr>
+<td><a id="l1152" class='ln'>1152</a></td><td>  <a id="1152c3" class="tk">rtb_RelationalOperator4_b</a> = (<a id="1152c32" class="tk">int16_T</a>)((<a id="1152c42" class="tk">rtb_Add2_lk</a> <a id="1152c54" class="tk">*</a></td></tr>
 <tr name="1153" id="1153">
-<td><a id="l1153" class='ln'>1153</a></td><td>  <span class="kw">if</span> (<a id="1153c7" class="tk">tmp_2</a> <a id="1153c13" class="tk">&gt;</a> 32767LL) <span class="br">{</span></td></tr>
+<td><a id="l1153" class='ln'>1153</a></td><td>    <a id="1153c5" class="tk">rtConstP</a>.<a id="1153c14" class="tk">pooled13</a>[<a id="1153c23" class="tk">rtb_Divide_d</a>]) <a id="1153c38" class="tk">&gt;&gt;</a> 14) <a id="1153c45" class="tk">-</a> ((<a id="1153c49" class="tk">rtb_Divide1_oy</a> <a id="1153c64" class="tk">*</a></td></tr>
 <tr name="1154" id="1154">
-<td><a id="l1154" class='ln'>1154</a></td><td>    <a id="1154c5" class="tk">tmp_2</a> = 32767LL;</td></tr>
+<td><a id="l1154" class='ln'>1154</a></td><td>    <a id="1154c5" class="tk">rtConstP</a>.<a id="1154c14" class="tk">pooled12</a>[<a id="1154c23" class="tk">rtb_Divide_d</a>]) <a id="1154c38" class="tk">&gt;&gt;</a> 14);</td></tr>
 <tr name="1155" id="1155">
-<td><a id="l1155" class='ln'>1155</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1155" class='ln'>1155</a></td><td>  <span class="kw">if</span> (<a id="1155c7" class="tk">rtb_RelationalOperator4_b</a> <a id="1155c33" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="1156" id="1156">
-<td><a id="l1156" class='ln'>1156</a></td><td>    <span class="kw">if</span> (<a id="1156c9" class="tk">tmp_2</a> <a id="1156c15" class="tk">&lt;</a> <a id="1156c17" class="tk">-</a>32768LL) <span class="br">{</span></td></tr>
+<td><a id="l1156" class='ln'>1156</a></td><td>    <a id="1156c5" class="tk">rtb_RelationalOperator4_b</a> = 32767;</td></tr>
 <tr name="1157" id="1157">
-<td><a id="l1157" class='ln'>1157</a></td><td>      <a id="1157c7" class="tk">tmp_2</a> = <a id="1157c15" class="tk">-</a>32768LL;</td></tr>
+<td><a id="l1157" class='ln'>1157</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1158" id="1158">
-<td><a id="l1158" class='ln'>1158</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1158" class='ln'>1158</a></td><td>    <span class="kw">if</span> (<a id="1158c9" class="tk">rtb_RelationalOperator4_b</a> <a id="1158c35" class="tk">&lt;</a> <a id="1158c37" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="1159" id="1159">
-<td><a id="l1159" class='ln'>1159</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1159" class='ln'>1159</a></td><td>      <a id="1159c7" class="tk">rtb_RelationalOperator4_b</a> = <a id="1159c35" class="tk">-</a>32768;</td></tr>
 <tr name="1160" id="1160">
-<td><a id="l1160" class='ln'>1160</a></td><td></td></tr>
+<td><a id="l1160" class='ln'>1160</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1161" id="1161">
-<td><a id="l1161" class='ln'>1161</a></td><td>  <span class="ct">/* Gain: '&lt;S55&gt;/Gain' */</span></td></tr>
+<td><a id="l1161" class='ln'>1161</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1162" id="1162">
-<td><a id="l1162" class='ln'>1162</a></td><td>  <a id="1162c3" class="tk">rtb_Divide_idx_0</a> <a id="1162c20" class="tk">&gt;&gt;=</a> 8;</td></tr>
+<td><a id="l1162" class='ln'>1162</a></td><td></td></tr>
 <tr name="1163" id="1163">
-<td><a id="l1163" class='ln'>1163</a></td><td>  <span class="kw">if</span> (<a id="1163c7" class="tk">rtb_Divide_idx_0</a> <a id="1163c24" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l1163" class='ln'>1163</a></td><td>  <span class="ct">/* SignalConversion generated from: '&lt;S39&gt;/Low_Pass_Filter' incorporates:</span></td></tr>
 <tr name="1164" id="1164">
-<td><a id="l1164" class='ln'>1164</a></td><td>    <a id="1164c5" class="tk">rtb_Divide_idx_0</a> = 32767;</td></tr>
+<td><a id="l1164" class='ln'>1164</a></td><td><span class="ct">   *  Sum: '&lt;S48&gt;/Sum6'</span></td></tr>
 <tr name="1165" id="1165">
-<td><a id="l1165" class='ln'>1165</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1165" class='ln'>1165</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1166" id="1166">
-<td><a id="l1166" class='ln'>1166</a></td><td>    <span class="kw">if</span> (<a id="1166c9" class="tk">rtb_Divide_idx_0</a> <a id="1166c26" class="tk">&lt;</a> <a id="1166c28" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l1166" class='ln'>1166</a></td><td>  <a id="1166c3" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1] = (<a id="1166c57" class="tk">int16_T</a>)</td></tr>
 <tr name="1167" id="1167">
-<td><a id="l1167" class='ln'>1167</a></td><td>      <a id="1167c7" class="tk">rtb_Divide_idx_0</a> = <a id="1167c26" class="tk">-</a>32768;</td></tr>
+<td><a id="l1167" class='ln'>1167</a></td><td>    <a id="1167c5" class="tk">rtb_RelationalOperator4_b</a>;</td></tr>
 <tr name="1168" id="1168">
-<td><a id="l1168" class='ln'>1168</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1168" class='ln'>1168</a></td><td></td></tr>
 <tr name="1169" id="1169">
-<td><a id="l1169" class='ln'>1169</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1169" class='ln'>1169</a></td><td>  <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S39&gt;/Low_Pass_Filter' */</span></td></tr>
 <tr name="1170" id="1170">
-<td><a id="l1170" class='ln'>1170</a></td><td></td></tr>
+<td><a id="l1170" class='ln'>1170</a></td><td>  <span class="ct">/* Constant: '&lt;S39&gt;/Constant' incorporates:</span></td></tr>
 <tr name="1171" id="1171">
-<td><a id="l1171" class='ln'>1171</a></td><td>  <span class="ct">/* Sum: '&lt;S55&gt;/Add3' incorporates:</span></td></tr>
+<td><a id="l1171" class='ln'>1171</a></td><td><span class="ct">   *  Outport: '&lt;Root&gt;/f_Idq'</span></td></tr>
 <tr name="1172" id="1172">
-<td><a id="l1172" class='ln'>1172</a></td><td><span class="ct">   *  Sum: '&lt;S48&gt;/Add1'</span></td></tr>
+<td><a id="l1172" class='ln'>1172</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1173" id="1173">
-<td><a id="l1173" class='ln'>1173</a></td><td><span class="ct">   *  Sum: '&lt;S55&gt;/Add2'</span></td></tr>
+<td><a id="l1173" class='ln'>1173</a></td><td>  <a id="1173c3" class="tk">Low_Pass_Filter</a>(<a id="1173c19" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>, <a id="1173c68" class="tk">rtP</a>.<a id="1173c72" class="tk">f_lpf_idq</a>,</td></tr>
 <tr name="1174" id="1174">
-<td><a id="l1174" class='ln'>1174</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1174" class='ln'>1174</a></td><td>                  <a id="1174c19" class="tk">rtY</a>-&gt;<a id="1174c24" class="tk">f_Idq</a>, <a id="1174c31" class="tk">&amp;</a><a id="1174c32" class="tk">rtDW</a>-&gt;<a id="1174c38" class="tk">Low_Pass_Filter_l</a>);</td></tr>
 <tr name="1175" id="1175">
-<td><a id="l1175" class='ln'>1175</a></td><td>  <a id="1175c3" class="tk">tmp_2</a> = (<a id="1175c12" class="tk">int64_T</a>)(<a id="1175c21" class="tk">int16_T</a>)<a id="1175c29" class="tk">tmp_2</a> <a id="1175c35" class="tk">&lt;&lt;</a> 9;</td></tr>
+<td><a id="l1175" class='ln'>1175</a></td><td></td></tr>
 <tr name="1176" id="1176">
-<td><a id="l1176" class='ln'>1176</a></td><td>  <a id="1176c3" class="tk">tmp_1</a> = (<a id="1176c12" class="tk">tmp_2</a> <a id="1176c18" class="tk">+</a> <a id="1176c20" class="tk">rtb_Divide_idx_1</a>) <a id="1176c38" class="tk">&gt;&gt;</a> 8;</td></tr>
+<td><a id="l1176" class='ln'>1176</a></td><td>  <span class="ct">/* End of Outputs for SubSystem: '&lt;S39&gt;/Low_Pass_Filter' */</span></td></tr>
 <tr name="1177" id="1177">
-<td><a id="l1177" class='ln'>1177</a></td><td>  <span class="kw">if</span> (<a id="1177c7" class="tk">tmp_1</a> <a id="1177c13" class="tk">&gt;</a> 32767LL) <span class="br">{</span></td></tr>
+<td><a id="l1177" class='ln'>1177</a></td><td></td></tr>
 <tr name="1178" id="1178">
-<td><a id="l1178" class='ln'>1178</a></td><td>    <a id="1178c5" class="tk">tmp_1</a> = 32767LL;</td></tr>
+<td><a id="l1178" class='ln'>1178</a></td><td>  <span class="ct">/* UnitDelay: '&lt;S5&gt;/UnitDelay' */</span></td></tr>
 <tr name="1179" id="1179">
-<td><a id="l1179" class='ln'>1179</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1179" class='ln'>1179</a></td><td>  <a id="1179c3" class="tk">rtb_UnitDelay_n</a> = <a id="1179c21" class="tk">rtDW</a>-&gt;<a id="1179c27" class="tk">UnitDelay_DSTATE_p</a>;</td></tr>
 <tr name="1180" id="1180">
-<td><a id="l1180" class='ln'>1180</a></td><td>    <span class="kw">if</span> (<a id="1180c9" class="tk">tmp_1</a> <a id="1180c15" class="tk">&lt;</a> <a id="1180c17" class="tk">-</a>32768LL) <span class="br">{</span></td></tr>
+<td><a id="l1180" class='ln'>1180</a></td><td></td></tr>
 <tr name="1181" id="1181">
-<td><a id="l1181" class='ln'>1181</a></td><td>      <a id="1181c7" class="tk">tmp_1</a> = <a id="1181c15" class="tk">-</a>32768LL;</td></tr>
+<td><a id="l1181" class='ln'>1181</a></td><td>  <span class="ct">/* Switch: '&lt;S20&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1182" id="1182">
-<td><a id="l1182" class='ln'>1182</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1182" class='ln'>1182</a></td><td><span class="ct">   *  Constant: '&lt;S20&gt;/Constant4'</span></td></tr>
 <tr name="1183" id="1183">
-<td><a id="l1183" class='ln'>1183</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1183" class='ln'>1183</a></td><td><span class="ct">   *  Constant: '&lt;S20&gt;/z_maxCntRst'</span></td></tr>
 <tr name="1184" id="1184">
-<td><a id="l1184" class='ln'>1184</a></td><td></td></tr>
+<td><a id="l1184" class='ln'>1184</a></td><td><span class="ct">   *  Gain: '&lt;S20&gt;/Gain'</span></td></tr>
 <tr name="1185" id="1185">
-<td><a id="l1185" class='ln'>1185</a></td><td>  <span class="ct">/* Sum: '&lt;S55&gt;/Add' incorporates:</span></td></tr>
+<td><a id="l1185" class='ln'>1185</a></td><td><span class="ct">   *  Product: '&lt;S29&gt;/Divide11'</span></td></tr>
 <tr name="1186" id="1186">
-<td><a id="l1186" class='ln'>1186</a></td><td><span class="ct">   *  Gain: '&lt;S55&gt;/Gain'</span></td></tr>
+<td><a id="l1186" class='ln'>1186</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S20&gt;/Relational Operator2'</span></td></tr>
 <tr name="1187" id="1187">
-<td><a id="l1187" class='ln'>1187</a></td><td><span class="ct">   *  Sum: '&lt;S55&gt;/Add3'</span></td></tr>
+<td><a id="l1187" class='ln'>1187</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1188" id="1188">
-<td><a id="l1188" class='ln'>1188</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1188" class='ln'>1188</a></td><td>  <span class="kw">if</span> (<a id="1188c7" class="tk">rtDW</a>-&gt;<a id="1188c13" class="tk">OutportBufferFordelta_count</a> <a id="1188c41" class="tk">&gt;=</a> 2000000U) <span class="br">{</span></td></tr>
 <tr name="1189" id="1189">
-<td><a id="l1189" class='ln'>1189</a></td><td>  <a id="1189c3" class="tk">rtb_Divide_idx_0</a> = ((<a id="1189c24" class="tk">rtb_Divide_idx_0</a> <a id="1189c41" class="tk">&lt;&lt;</a> 1) <a id="1189c47" class="tk">-</a> (<a id="1189c50" class="tk">int16_T</a>)<a id="1189c58" class="tk">tmp_1</a>) <a id="1189c65" class="tk">&gt;&gt;</a> 1;</td></tr>
+<td><a id="l1189" class='ln'>1189</a></td><td>    <a id="1189c5" class="tk">rtb_Switch3</a> = 0;</td></tr>
 <tr name="1190" id="1190">
-<td><a id="l1190" class='ln'>1190</a></td><td>  <span class="kw">if</span> (<a id="1190c7" class="tk">rtb_Divide_idx_0</a> <a id="1190c24" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l1190" class='ln'>1190</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1191" id="1191">
-<td><a id="l1191" class='ln'>1191</a></td><td>    <a id="1191c5" class="tk">rtb_Divide_idx_0</a> = 32767;</td></tr>
+<td><a id="l1191" class='ln'>1191</a></td><td>    <a id="1191c5" class="tk">rtb_Switch3</a> = <a id="1191c19" class="tk">rtDW</a>-&gt;<a id="1191c25" class="tk">Divide11</a>;</td></tr>
 <tr name="1192" id="1192">
-<td><a id="l1192" class='ln'>1192</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1192" class='ln'>1192</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1193" id="1193">
-<td><a id="l1193" class='ln'>1193</a></td><td>    <span class="kw">if</span> (<a id="1193c9" class="tk">rtb_Divide_idx_0</a> <a id="1193c26" class="tk">&lt;</a> <a id="1193c28" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l1193" class='ln'>1193</a></td><td></td></tr>
 <tr name="1194" id="1194">
-<td><a id="l1194" class='ln'>1194</a></td><td>      <a id="1194c7" class="tk">rtb_Divide_idx_0</a> = <a id="1194c26" class="tk">-</a>32768;</td></tr>
+<td><a id="l1194" class='ln'>1194</a></td><td>  <span class="ct">/* End of Switch: '&lt;S20&gt;/Switch2' */</span></td></tr>
 <tr name="1195" id="1195">
-<td><a id="l1195" class='ln'>1195</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1195" class='ln'>1195</a></td><td></td></tr>
 <tr name="1196" id="1196">
-<td><a id="l1196" class='ln'>1196</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1196" class='ln'>1196</a></td><td>  <span class="ct">/* Abs: '&lt;S20&gt;/Abs5' incorporates:</span></td></tr>
 <tr name="1197" id="1197">
-<td><a id="l1197" class='ln'>1197</a></td><td></td></tr>
+<td><a id="l1197" class='ln'>1197</a></td><td><span class="ct">   *  Switch: '&lt;S20&gt;/Switch2'</span></td></tr>
 <tr name="1198" id="1198">
-<td><a id="l1198" class='ln'>1198</a></td><td>  <span class="ct">/* Gain: '&lt;S55&gt;/Gain1' incorporates:</span></td></tr>
+<td><a id="l1198" class='ln'>1198</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1199" id="1199">
-<td><a id="l1199" class='ln'>1199</a></td><td><span class="ct">   *  Product: '&lt;S57&gt;/Divide1'</span></td></tr>
+<td><a id="l1199" class='ln'>1199</a></td><td>  <span class="kw">if</span> (<a id="1199c7" class="tk">rtb_Switch3</a> <a id="1199c19" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="1200" id="1200">
-<td><a id="l1200" class='ln'>1200</a></td><td><span class="ct">   *  Sum: '&lt;S55&gt;/Add'</span></td></tr>
+<td><a id="l1200" class='ln'>1200</a></td><td>    <a id="1200c5" class="tk">rtb_Rem1</a> = (<a id="1200c17" class="tk">uint32_T</a>)<a id="1200c26" class="tk">-</a><a id="1200c27" class="tk">rtb_Switch3</a>;</td></tr>
 <tr name="1201" id="1201">
-<td><a id="l1201" class='ln'>1201</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1201" class='ln'>1201</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1202" id="1202">
-<td><a id="l1202" class='ln'>1202</a></td><td>  <a id="1202c3" class="tk">rtb_Divide1_m</a> = (<a id="1202c20" class="tk">int16_T</a>)((21845 <a id="1202c36" class="tk">*</a> <a id="1202c38" class="tk">rtb_Divide_idx_0</a>) <a id="1202c56" class="tk">&gt;&gt;</a> 16);</td></tr>
+<td><a id="l1202" class='ln'>1202</a></td><td>    <a id="1202c5" class="tk">rtb_Rem1</a> = (<a id="1202c17" class="tk">uint32_T</a>)<a id="1202c26" class="tk">rtb_Switch3</a>;</td></tr>
 <tr name="1203" id="1203">
-<td><a id="l1203" class='ln'>1203</a></td><td></td></tr>
+<td><a id="l1203" class='ln'>1203</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1204" id="1204">
-<td><a id="l1204" class='ln'>1204</a></td><td>  <span class="ct">/* Switch: '&lt;S10&gt;/Switch3' incorporates:</span></td></tr>
+<td><a id="l1204" class='ln'>1204</a></td><td></td></tr>
 <tr name="1205" id="1205">
-<td><a id="l1205" class='ln'>1205</a></td><td><span class="ct">   *  Constant: '&lt;S10&gt;/Constant16'</span></td></tr>
+<td><a id="l1205" class='ln'>1205</a></td><td>  <span class="ct">/* End of Abs: '&lt;S20&gt;/Abs5' */</span></td></tr>
 <tr name="1206" id="1206">
-<td><a id="l1206" class='ln'>1206</a></td><td><span class="ct">   *  Constant: '&lt;S10&gt;/Constant2'</span></td></tr>
+<td><a id="l1206" class='ln'>1206</a></td><td></td></tr>
 <tr name="1207" id="1207">
-<td><a id="l1207" class='ln'>1207</a></td><td><span class="ct">   *  Constant: '&lt;S11&gt;/vec_hallToPos'</span></td></tr>
+<td><a id="l1207" class='ln'>1207</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/f_Vdq' incorporates:</span></td></tr>
 <tr name="1208" id="1208">
-<td><a id="l1208" class='ln'>1208</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S10&gt;/Relational Operator7'</span></td></tr>
+<td><a id="l1208" class='ln'>1208</a></td><td><span class="ct">   *  UnitDelay: '&lt;S1&gt;/Unit Delay'</span></td></tr>
 <tr name="1209" id="1209">
-<td><a id="l1209" class='ln'>1209</a></td><td><span class="ct">   *  Selector: '&lt;S11&gt;/Selector'</span></td></tr>
+<td><a id="l1209" class='ln'>1209</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1210" id="1210">
-<td><a id="l1210" class='ln'>1210</a></td><td><span class="ct">   *  Sum: '&lt;S10&gt;/Sum1'</span></td></tr>
+<td><a id="l1210" class='ln'>1210</a></td><td>  <a id="1210c3" class="tk">rtY</a>-&gt;<a id="1210c8" class="tk">f_Vdq</a>[0] = <a id="1210c19" class="tk">rtDW</a>-&gt;<a id="1210c25" class="tk">UnitDelay_DSTATE_k</a>[0];</td></tr>
 <tr name="1211" id="1211">
-<td><a id="l1211" class='ln'>1211</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1211" class='ln'>1211</a></td><td>  <a id="1211c3" class="tk">rtY</a>-&gt;<a id="1211c8" class="tk">f_Vdq</a>[1] = <a id="1211c19" class="tk">rtDW</a>-&gt;<a id="1211c25" class="tk">UnitDelay_DSTATE_k</a>[1];</td></tr>
 <tr name="1212" id="1212">
-<td><a id="l1212" class='ln'>1212</a></td><td>  <span class="kw">if</span> (<a id="1212c7" class="tk">rtDW</a>-&gt;<a id="1212c13" class="tk">Switch2_i</a> <a id="1212c23" class="tk">==</a> 1) <span class="br">{</span></td></tr>
+<td><a id="l1212" class='ln'>1212</a></td><td></td></tr>
 <tr name="1213" id="1213">
-<td><a id="l1213" class='ln'>1213</a></td><td>    <a id="1213c5" class="tk">rtb_Sum2</a> = <a id="1213c16" class="tk">rtConstP</a>.<a id="1213c25" class="tk">vec_hallToPos_Value</a>[<a id="1213c45" class="tk">rtb_Add_gf</a>];</td></tr>
+<td><a id="l1213" class='ln'>1213</a></td><td>  <span class="ct">/* Switch: '&lt;S5&gt;/Switch3' incorporates:</span></td></tr>
 <tr name="1214" id="1214">
-<td><a id="l1214" class='ln'>1214</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1214" class='ln'>1214</a></td><td><span class="ct">   *  Abs: '&lt;S20&gt;/Abs5'</span></td></tr>
 <tr name="1215" id="1215">
-<td><a id="l1215" class='ln'>1215</a></td><td>    <a id="1215c5" class="tk">rtb_Sum2</a> = (<a id="1215c17" class="tk">int8_T</a>)(<a id="1215c25" class="tk">rtConstP</a>.<a id="1215c34" class="tk">vec_hallToPos_Value</a>[<a id="1215c54" class="tk">rtb_Add_gf</a>] <a id="1215c66" class="tk">+</a> 1);</td></tr>
+<td><a id="l1215" class='ln'>1215</a></td><td><span class="ct">   *  Abs: '&lt;S5&gt;/Abs4'</span></td></tr>
 <tr name="1216" id="1216">
-<td><a id="l1216" class='ln'>1216</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1216" class='ln'>1216</a></td><td><span class="ct">   *  Constant: '&lt;S5&gt;/CTRL_COMM4'</span></td></tr>
 <tr name="1217" id="1217">
-<td><a id="l1217" class='ln'>1217</a></td><td></td></tr>
+<td><a id="l1217" class='ln'>1217</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/b_motEna'</span></td></tr>
 <tr name="1218" id="1218">
-<td><a id="l1218" class='ln'>1218</a></td><td>  <span class="ct">/* End of Switch: '&lt;S10&gt;/Switch3' */</span></td></tr>
+<td><a id="l1218" class='ln'>1218</a></td><td><span class="ct">   *  Logic: '&lt;S5&gt;/Logical Operator1'</span></td></tr>
 <tr name="1219" id="1219">
-<td><a id="l1219" class='ln'>1219</a></td><td></td></tr>
+<td><a id="l1219" class='ln'>1219</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S20&gt;/Relational Operator9'</span></td></tr>
 <tr name="1220" id="1220">
-<td><a id="l1220" class='ln'>1220</a></td><td>  <span class="ct">/* MinMax: '&lt;S10&gt;/MinMax' incorporates:</span></td></tr>
+<td><a id="l1220" class='ln'>1220</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S5&gt;/Relational Operator7'</span></td></tr>
 <tr name="1221" id="1221">
-<td><a id="l1221" class='ln'>1221</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/us_Count'</span></td></tr>
+<td><a id="l1221" class='ln'>1221</a></td><td><span class="ct">   *  S-Function (sfix_bitop): '&lt;S5&gt;/Bitwise Operator1'</span></td></tr>
 <tr name="1222" id="1222">
-<td><a id="l1222" class='ln'>1222</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1222" class='ln'>1222</a></td><td><span class="ct">   *  UnitDelay: '&lt;S1&gt;/Unit Delay'</span></td></tr>
 <tr name="1223" id="1223">
-<td><a id="l1223" class='ln'>1223</a></td><td>  <span class="kw">if</span> (<a id="1223c7" class="tk">rtU</a>-&gt;<a id="1223c12" class="tk">us_Count</a> <a id="1223c21" class="tk">&lt;</a> <a id="1223c23" class="tk">rtDW</a>-&gt;<a id="1223c29" class="tk">z_counterRawPrev</a>) <span class="br">{</span></td></tr>
+<td><a id="l1223" class='ln'>1223</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1224" id="1224">
-<td><a id="l1224" class='ln'>1224</a></td><td>    <a id="1224c5" class="tk">qY</a> = <a id="1224c10" class="tk">rtU</a>-&gt;<a id="1224c15" class="tk">us_Count</a>;</td></tr>
+<td><a id="l1224" class='ln'>1224</a></td><td>  <span class="kw">if</span> ((<a id="1224c8" class="tk">rtb_UnitDelay_n</a> <a id="1224c24" class="tk">&amp;</a> 4U) <a id="1224c30" class="tk">!=</a> 0U) <span class="br">{</span></td></tr>
 <tr name="1225" id="1225">
-<td><a id="l1225" class='ln'>1225</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1225" class='ln'>1225</a></td><td>    <a id="1225c5" class="tk">rtb_UnitDelay_c</a> = true;</td></tr>
 <tr name="1226" id="1226">
-<td><a id="l1226" class='ln'>1226</a></td><td>    <a id="1226c5" class="tk">qY</a> = <a id="1226c10" class="tk">rtDW</a>-&gt;<a id="1226c16" class="tk">z_counterRawPrev</a>;</td></tr>
+<td><a id="l1226" class='ln'>1226</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1227" id="1227">
-<td><a id="l1227" class='ln'>1227</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1227" class='ln'>1227</a></td><td>    <span class="kw">if</span> (<a id="1227c9" class="tk">rtDW</a>-&gt;<a id="1227c15" class="tk">UnitDelay_DSTATE_k</a>[1] <a id="1227c37" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="1228" id="1228">
-<td><a id="l1228" class='ln'>1228</a></td><td></td></tr>
+<td><a id="l1228" class='ln'>1228</a></td><td>      <span class="ct">/* Abs: '&lt;S5&gt;/Abs4' incorporates:</span></td></tr>
 <tr name="1229" id="1229">
-<td><a id="l1229" class='ln'>1229</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S10&gt;/MinMax' */</span></td></tr>
+<td><a id="l1229" class='ln'>1229</a></td><td><span class="ct">       *  UnitDelay: '&lt;S1&gt;/Unit Delay'</span></td></tr>
 <tr name="1230" id="1230">
-<td><a id="l1230" class='ln'>1230</a></td><td></td></tr>
+<td><a id="l1230" class='ln'>1230</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1231" id="1231">
-<td><a id="l1231" class='ln'>1231</a></td><td>  <span class="ct">/* Sum: '&lt;S10&gt;/Sum3' incorporates:</span></td></tr>
+<td><a id="l1231" class='ln'>1231</a></td><td>      <a id="1231c7" class="tk">rtb_Switch2_pl</a> = (<a id="1231c25" class="tk">int16_T</a>)<a id="1231c33" class="tk">-</a><a id="1231c34" class="tk">rtDW</a>-&gt;<a id="1231c40" class="tk">UnitDelay_DSTATE_k</a>[1];</td></tr>
 <tr name="1232" id="1232">
-<td><a id="l1232" class='ln'>1232</a></td><td><span class="ct">   *  Product: '&lt;S10&gt;/Divide1'</span></td></tr>
+<td><a id="l1232" class='ln'>1232</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1233" id="1233">
-<td><a id="l1233" class='ln'>1233</a></td><td><span class="ct">   *  Product: '&lt;S10&gt;/Divide3'</span></td></tr>
+<td><a id="l1233" class='ln'>1233</a></td><td>      <span class="ct">/* Abs: '&lt;S5&gt;/Abs4' incorporates:</span></td></tr>
 <tr name="1234" id="1234">
-<td><a id="l1234" class='ln'>1234</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1234" class='ln'>1234</a></td><td><span class="ct">       *  UnitDelay: '&lt;S1&gt;/Unit Delay'</span></td></tr>
 <tr name="1235" id="1235">
-<td><a id="l1235" class='ln'>1235</a></td><td>  <a id="1235c3" class="tk">rtb_Sum3_jm</a> = (<a id="1235c18" class="tk">int16_T</a>)(((<a id="1235c29" class="tk">int16_T</a>)((<a id="1235c39" class="tk">int16_T</a>)(((<a id="1235c50" class="tk">uint64_T</a>)<a id="1235c59" class="tk">qY</a> <a id="1235c62" class="tk">&lt;&lt;</a> 14) <a id="1235c69" class="tk">/</a></td></tr>
+<td><a id="l1235" class='ln'>1235</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1236" id="1236">
-<td><a id="l1236" class='ln'>1236</a></td><td>    <a id="1236c5" class="tk">rtDW</a>-&gt;<a id="1236c11" class="tk">z_counterRawPrev</a>) <a id="1236c29" class="tk">*</a> <a id="1236c31" class="tk">rtDW</a>-&gt;<a id="1236c37" class="tk">Switch2_i</a>) <a id="1236c48" class="tk">+</a> (<a id="1236c51" class="tk">rtb_Sum2</a> <a id="1236c60" class="tk">&lt;&lt;</a> 14)) <a id="1236c68" class="tk">&gt;&gt;</a> 2);</td></tr>
+<td><a id="l1236" class='ln'>1236</a></td><td>      <a id="1236c7" class="tk">rtb_Switch2_pl</a> = <a id="1236c24" class="tk">rtDW</a>-&gt;<a id="1236c30" class="tk">UnitDelay_DSTATE_k</a>[1];</td></tr>
 <tr name="1237" id="1237">
-<td><a id="l1237" class='ln'>1237</a></td><td></td></tr>
+<td><a id="l1237" class='ln'>1237</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1238" id="1238">
-<td><a id="l1238" class='ln'>1238</a></td><td>  <span class="ct">/* MinMax: '&lt;S10&gt;/MinMax1' incorporates:</span></td></tr>
+<td><a id="l1238" class='ln'>1238</a></td><td></td></tr>
 <tr name="1239" id="1239">
-<td><a id="l1239" class='ln'>1239</a></td><td><span class="ct">   *  Constant: '&lt;S10&gt;/Constant1'</span></td></tr>
+<td><a id="l1239" class='ln'>1239</a></td><td>    <a id="1239c5" class="tk">rtb_UnitDelay_c</a> = (<a id="1239c24" class="tk">rtU</a>-&gt;<a id="1239c29" class="tk">b_motEna</a> <a id="1239c38" class="tk">&amp;&amp;</a> (<a id="1239c42" class="tk">rtb_Rem1</a> <a id="1239c51" class="tk">&lt;</a> 48U) <a id="1239c58" class="tk">&amp;&amp;</a> (<a id="1239c62" class="tk">rtb_Switch2_pl</a> <a id="1239c77" class="tk">&gt;</a></td></tr>
 <tr name="1240" id="1240">
-<td><a id="l1240" class='ln'>1240</a></td><td><span class="ct">   *  Sum: '&lt;S10&gt;/Sum3'</span></td></tr>
+<td><a id="l1240" class='ln'>1240</a></td><td>      9920));</td></tr>
 <tr name="1241" id="1241">
-<td><a id="l1241" class='ln'>1241</a></td><td><span class="ct">   *  Switch: '&lt;S10&gt;/Switch2'</span></td></tr>
+<td><a id="l1241" class='ln'>1241</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1242" id="1242">
-<td><a id="l1242" class='ln'>1242</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1242" class='ln'>1242</a></td><td></td></tr>
 <tr name="1243" id="1243">
-<td><a id="l1243" class='ln'>1243</a></td><td>  <span class="kw">if</span> (<a id="1243c7" class="tk">rtb_Sum3_jm</a> <a id="1243c19" class="tk">&lt;=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l1243" class='ln'>1243</a></td><td>  <span class="ct">/* End of Switch: '&lt;S5&gt;/Switch3' */</span></td></tr>
 <tr name="1244" id="1244">
-<td><a id="l1244" class='ln'>1244</a></td><td>    <a id="1244c5" class="tk">rtb_Sum3_jm</a> = 0;</td></tr>
+<td><a id="l1244" class='ln'>1244</a></td><td></td></tr>
 <tr name="1245" id="1245">
-<td><a id="l1245" class='ln'>1245</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1245" class='ln'>1245</a></td><td>  <span class="ct">/* Sum: '&lt;S5&gt;/Sum' incorporates:</span></td></tr>
 <tr name="1246" id="1246">
-<td><a id="l1246" class='ln'>1246</a></td><td></td></tr>
+<td><a id="l1246" class='ln'>1246</a></td><td><span class="ct">   *  Constant: '&lt;S5&gt;/CTRL_COMM'</span></td></tr>
 <tr name="1247" id="1247">
-<td><a id="l1247" class='ln'>1247</a></td><td>  <span class="ct">/* End of MinMax: '&lt;S10&gt;/MinMax1' */</span></td></tr>
+<td><a id="l1247" class='ln'>1247</a></td><td><span class="ct">   *  Constant: '&lt;S5&gt;/CTRL_COMM1'</span></td></tr>
 <tr name="1248" id="1248">
-<td><a id="l1248" class='ln'>1248</a></td><td></td></tr>
+<td><a id="l1248" class='ln'>1248</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S5&gt;/Data Type Conversion3'</span></td></tr>
 <tr name="1249" id="1249">
-<td><a id="l1249" class='ln'>1249</a></td><td>  <span class="ct">/* Sum: '&lt;S15&gt;/Add2' incorporates:</span></td></tr>
+<td><a id="l1249" class='ln'>1249</a></td><td><span class="ct">   *  Gain: '&lt;S5&gt;/g_Hb'</span></td></tr>
 <tr name="1250" id="1250">
-<td><a id="l1250" class='ln'>1250</a></td><td><span class="ct">   *  Constant: '&lt;S15&gt;/Constant2'</span></td></tr>
+<td><a id="l1250" class='ln'>1250</a></td><td><span class="ct">   *  Gain: '&lt;S5&gt;/g_Hb1'</span></td></tr>
 <tr name="1251" id="1251">
-<td><a id="l1251" class='ln'>1251</a></td><td><span class="ct">   *  Product: '&lt;S10&gt;/Divide2'</span></td></tr>
+<td><a id="l1251" class='ln'>1251</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S5&gt;/Relational Operator1'</span></td></tr>
 <tr name="1252" id="1252">
-<td><a id="l1252" class='ln'>1252</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1252" class='ln'>1252</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S5&gt;/Relational Operator3'</span></td></tr>
 <tr name="1253" id="1253">
-<td><a id="l1253" class='ln'>1253</a></td><td>  <a id="1253c3" class="tk">rtb_Sum3_jm</a> = (<a id="1253c18" class="tk">int16_T</a>)((((15 <a id="1253c33" class="tk">*</a> <a id="1253c35" class="tk">rtb_Sum3_jm</a>) <a id="1253c48" class="tk">&gt;&gt;</a> 4) <a id="1253c54" class="tk">+</a> (<a id="1253c57" class="tk">rtP</a>.<a id="1253c61" class="tk">i_hall_offset</a> <a id="1253c75" class="tk">&lt;&lt;</a> 2))</td></tr>
+<td><a id="l1253" class='ln'>1253</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1254" id="1254">
-<td><a id="l1254" class='ln'>1254</a></td><td>    <a id="1254c5" class="tk">&gt;&gt;</a> 2);</td></tr>
+<td><a id="l1254" class='ln'>1254</a></td><td>  <a id="1254c3" class="tk">rtb_Sum_d</a> = (<a id="1254c16" class="tk">uint8_T</a>)(((<a id="1254c27" class="tk">uint32_T</a>)((<a id="1254c38" class="tk">rtb_Add_h</a> <a id="1254c48" class="tk">==</a> 7) <a id="1254c54" class="tk">&lt;&lt;</a> 1) <a id="1254c60" class="tk">+</a> (<a id="1254c63" class="tk">rtb_Add_h</a> <a id="1254c73" class="tk">==</a> 0)) <a id="1254c80" class="tk">+</a></td></tr>
 <tr name="1255" id="1255">
-<td><a id="l1255" class='ln'>1255</a></td><td></td></tr>
+<td><a id="l1255" class='ln'>1255</a></td><td>                        (<a id="1255c26" class="tk">rtb_UnitDelay_c</a> <a id="1255c42" class="tk">&lt;&lt;</a> 2));</td></tr>
 <tr name="1256" id="1256">
-<td><a id="l1256" class='ln'>1256</a></td><td>  <span class="ct">/* DataTypeConversion: '&lt;S15&gt;/Data Type Conversion' incorporates:</span></td></tr>
+<td><a id="l1256" class='ln'>1256</a></td><td></td></tr>
 <tr name="1257" id="1257">
-<td><a id="l1257" class='ln'>1257</a></td><td><span class="ct">   *  Sum: '&lt;S15&gt;/Add2'</span></td></tr>
+<td><a id="l1257" class='ln'>1257</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S5&gt;/Relational Operator2' incorporates:</span></td></tr>
 <tr name="1258" id="1258">
-<td><a id="l1258" class='ln'>1258</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1258" class='ln'>1258</a></td><td><span class="ct">   *  Constant: '&lt;S5&gt;/CTRL_COMM2'</span></td></tr>
 <tr name="1259" id="1259">
-<td><a id="l1259" class='ln'>1259</a></td><td>  <a id="1259c3" class="tk">rtb_r_cos_M1</a> = (<a id="1259c19" class="tk">int16_T</a>)(<a id="1259c28" class="tk">rtb_Sum3_jm</a> <a id="1259c40" class="tk">&gt;&gt;</a> 4);</td></tr>
+<td><a id="l1259" class='ln'>1259</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1260" id="1260">
-<td><a id="l1260" class='ln'>1260</a></td><td></td></tr>
+<td><a id="l1260" class='ln'>1260</a></td><td>  <a id="1260c3" class="tk">rtb_RelationalOperator4_d</a> = (<a id="1260c32" class="tk">rtb_Sum_d</a> <a id="1260c42" class="tk">!=</a> 0);</td></tr>
 <tr name="1261" id="1261">
-<td><a id="l1261" class='ln'>1261</a></td><td>  <span class="ct">/* If: '&lt;S15&gt;/If' incorporates:</span></td></tr>
+<td><a id="l1261" class='ln'>1261</a></td><td></td></tr>
 <tr name="1262" id="1262">
-<td><a id="l1262" class='ln'>1262</a></td><td><span class="ct">   *  Constant: '&lt;S15&gt;/Constant1'</span></td></tr>
+<td><a id="l1262" class='ln'>1262</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S10&gt;/Relational Operator' incorporates:</span></td></tr>
 <tr name="1263" id="1263">
-<td><a id="l1263" class='ln'>1263</a></td><td><span class="ct">   *  Constant: '&lt;S15&gt;/Constant3'</span></td></tr>
+<td><a id="l1263" class='ln'>1263</a></td><td><span class="ct">   *  UnitDelay: '&lt;S10&gt;/UnitDelay'</span></td></tr>
 <tr name="1264" id="1264">
-<td><a id="l1264" class='ln'>1264</a></td><td><span class="ct">   *  Inport: '&lt;S16&gt;/In1'</span></td></tr>
+<td><a id="l1264" class='ln'>1264</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1265" id="1265">
-<td><a id="l1265" class='ln'>1265</a></td><td><span class="ct">   *  Inport: '&lt;S18&gt;/In1'</span></td></tr>
+<td><a id="l1265" class='ln'>1265</a></td><td>  <a id="1265c3" class="tk">rtb_RelationalOperator</a> = (<a id="1265c29" class="tk">rtb_RelationalOperator4_d</a> <a id="1265c55" class="tk">!=</a></td></tr>
 <tr name="1266" id="1266">
-<td><a id="l1266" class='ln'>1266</a></td><td><span class="ct">   *  Merge: '&lt;S15&gt;/Merge'</span></td></tr>
+<td><a id="l1266" class='ln'>1266</a></td><td>    <a id="1266c5" class="tk">rtDW</a>-&gt;<a id="1266c11" class="tk">UnitDelay_DSTATE_oy</a>);</td></tr>
 <tr name="1267" id="1267">
-<td><a id="l1267" class='ln'>1267</a></td><td><span class="ct">   *  Sum: '&lt;S15&gt;/Add'</span></td></tr>
+<td><a id="l1267" class='ln'>1267</a></td><td></td></tr>
 <tr name="1268" id="1268">
-<td><a id="l1268" class='ln'>1268</a></td><td><span class="ct">   *  Sum: '&lt;S15&gt;/Add1'</span></td></tr>
+<td><a id="l1268" class='ln'>1268</a></td><td>  <span class="ct">/* If: '&lt;S6&gt;/If2' incorporates:</span></td></tr>
 <tr name="1269" id="1269">
-<td><a id="l1269" class='ln'>1269</a></td><td><span class="ct">   *  Sum: '&lt;S15&gt;/Add2'</span></td></tr>
+<td><a id="l1269" class='ln'>1269</a></td><td><span class="ct">   *  Inport: '&lt;S8&gt;/yPrev'</span></td></tr>
 <tr name="1270" id="1270">
-<td><a id="l1270" class='ln'>1270</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1270" class='ln'>1270</a></td><td><span class="ct">   *  Logic: '&lt;S6&gt;/Logical Operator1'</span></td></tr>
 <tr name="1271" id="1271">
-<td><a id="l1271" class='ln'>1271</a></td><td>  <span class="kw">if</span> (<a id="1271c7" class="tk">rtb_r_cos_M1</a> <a id="1271c20" class="tk">&gt;=</a> 360) <span class="br">{</span></td></tr>
+<td><a id="l1271" class='ln'>1271</a></td><td><span class="ct">   *  Logic: '&lt;S6&gt;/Logical Operator2'</span></td></tr>
 <tr name="1272" id="1272">
-<td><a id="l1272" class='ln'>1272</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S15&gt;/If Action Subsystem' incorporates:</span></td></tr>
+<td><a id="l1272" class='ln'>1272</a></td><td><span class="ct">   *  Logic: '&lt;S6&gt;/Logical Operator3'</span></td></tr>
 <tr name="1273" id="1273">
-<td><a id="l1273" class='ln'>1273</a></td><td><span class="ct">     *  ActionPort: '&lt;S16&gt;/Action Port'</span></td></tr>
+<td><a id="l1273" class='ln'>1273</a></td><td><span class="ct">   *  Logic: '&lt;S6&gt;/Logical Operator4'</span></td></tr>
 <tr name="1274" id="1274">
-<td><a id="l1274" class='ln'>1274</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1274" class='ln'>1274</a></td><td><span class="ct">   *  UnitDelay: '&lt;S6&gt;/UnitDelay'</span></td></tr>
 <tr name="1275" id="1275">
-<td><a id="l1275" class='ln'>1275</a></td><td>    <a id="1275c5" class="tk">rtb_Sum3_jm</a> = (<a id="1275c20" class="tk">int16_T</a>)(<a id="1275c29" class="tk">rtb_Sum3_jm</a> <a id="1275c41" class="tk">-</a> 5760);</td></tr>
+<td><a id="l1275" class='ln'>1275</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1276" id="1276">
-<td><a id="l1276" class='ln'>1276</a></td><td></td></tr>
+<td><a id="l1276" class='ln'>1276</a></td><td>  <span class="kw">if</span> (<a id="1276c7" class="tk">rtb_RelationalOperator4_d</a> <a id="1276c33" class="tk">&amp;&amp;</a> (<a id="1276c37" class="tk">!</a><a id="1276c38" class="tk">rtDW</a>-&gt;<a id="1276c44" class="tk">UnitDelay_DSTATE_gv</a>)) <span class="br">{</span></td></tr>
 <tr name="1277" id="1277">
-<td><a id="l1277" class='ln'>1277</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S15&gt;/If Action Subsystem' */</span></td></tr>
+<td><a id="l1277" class='ln'>1277</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S6&gt;/Qualification' incorporates:</span></td></tr>
 <tr name="1278" id="1278">
-<td><a id="l1278" class='ln'>1278</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1278" class='ln'>1278</a></td><td><span class="ct">     *  ActionPort: '&lt;S11&gt;/Action Port'</span></td></tr>
 <tr name="1279" id="1279">
-<td><a id="l1279" class='ln'>1279</a></td><td>    <span class="kw">if</span> (<a id="1279c9" class="tk">rtb_r_cos_M1</a> <a id="1279c22" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l1279" class='ln'>1279</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1280" id="1280">
-<td><a id="l1280" class='ln'>1280</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S15&gt;/If Action Subsystem2' incorporates:</span></td></tr>
+<td><a id="l1280" class='ln'>1280</a></td><td>    <span class="ct">/* Switch: '&lt;S15&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="1281" id="1281">
-<td><a id="l1281" class='ln'>1281</a></td><td><span class="ct">       *  ActionPort: '&lt;S18&gt;/Action Port'</span></td></tr>
+<td><a id="l1281" class='ln'>1281</a></td><td><span class="ct">     *  Constant: '&lt;S15&gt;/Constant23'</span></td></tr>
 <tr name="1282" id="1282">
-<td><a id="l1282" class='ln'>1282</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1282" class='ln'>1282</a></td><td><span class="ct">     *  UnitDelay: '&lt;S15&gt;/UnitDelay'</span></td></tr>
 <tr name="1283" id="1283">
-<td><a id="l1283" class='ln'>1283</a></td><td>      <a id="1283c7" class="tk">rtb_Sum3_jm</a> = (<a id="1283c22" class="tk">int16_T</a>)(<a id="1283c31" class="tk">rtb_Sum3_jm</a> <a id="1283c43" class="tk">+</a> 5760);</td></tr>
+<td><a id="l1283" class='ln'>1283</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1284" id="1284">
-<td><a id="l1284" class='ln'>1284</a></td><td></td></tr>
+<td><a id="l1284" class='ln'>1284</a></td><td>    <span class="kw">if</span> (<a id="1284c9" class="tk">rtb_RelationalOperator</a>) <span class="br">{</span></td></tr>
 <tr name="1285" id="1285">
-<td><a id="l1285" class='ln'>1285</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S15&gt;/If Action Subsystem2' */</span></td></tr>
+<td><a id="l1285" class='ln'>1285</a></td><td>      <a id="1285c7" class="tk">rtb_Sum1_p</a> = 0U;</td></tr>
 <tr name="1286" id="1286">
-<td><a id="l1286" class='ln'>1286</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1286" class='ln'>1286</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1287" id="1287">
-<td><a id="l1287" class='ln'>1287</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1287" class='ln'>1287</a></td><td>      <a id="1287c7" class="tk">rtb_Sum1_p</a> = <a id="1287c20" class="tk">rtDW</a>-&gt;<a id="1287c26" class="tk">UnitDelay_DSTATE_m</a>;</td></tr>
 <tr name="1288" id="1288">
-<td><a id="l1288" class='ln'>1288</a></td><td></td></tr>
+<td><a id="l1288" class='ln'>1288</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1289" id="1289">
-<td><a id="l1289" class='ln'>1289</a></td><td>  <span class="ct">/* End of If: '&lt;S15&gt;/If' */</span></td></tr>
+<td><a id="l1289" class='ln'>1289</a></td><td></td></tr>
 <tr name="1290" id="1290">
-<td><a id="l1290" class='ln'>1290</a></td><td></td></tr>
+<td><a id="l1290" class='ln'>1290</a></td><td>    <span class="ct">/* End of Switch: '&lt;S15&gt;/Switch1' */</span></td></tr>
 <tr name="1291" id="1291">
-<td><a id="l1291" class='ln'>1291</a></td><td>  <span class="ct">/* If: '&lt;S3&gt;/If' incorporates:</span></td></tr>
+<td><a id="l1291" class='ln'>1291</a></td><td></td></tr>
 <tr name="1292" id="1292">
-<td><a id="l1292" class='ln'>1292</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/FOC_Flags'</span></td></tr>
+<td><a id="l1292" class='ln'>1292</a></td><td>    <span class="ct">/* Switch: '&lt;S11&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1293" id="1293">
-<td><a id="l1293" class='ln'>1293</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1293" class='ln'>1293</a></td><td><span class="ct">     *  Constant: '&lt;S11&gt;/Constant6'</span></td></tr>
 <tr name="1294" id="1294">
-<td><a id="l1294" class='ln'>1294</a></td><td>  <span class="kw">if</span> ((<a id="1294c8" class="tk">rtU</a>-&gt;<a id="1294c13" class="tk">FOC_Flags</a> <a id="1294c23" class="tk">==</a> 0) <a id="1294c29" class="tk">||</a> (<a id="1294c33" class="tk">rtU</a>-&gt;<a id="1294c38" class="tk">FOC_Flags</a> <a id="1294c48" class="tk">==</a> 2)) <span class="br">{</span></td></tr>
+<td><a id="l1294" class='ln'>1294</a></td><td><span class="ct">     *  Constant: '&lt;S5&gt;/t_errQual'</span></td></tr>
 <tr name="1295" id="1295">
-<td><a id="l1295" class='ln'>1295</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S3&gt;/If Action Subsystem' incorporates:</span></td></tr>
+<td><a id="l1295" class='ln'>1295</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S11&gt;/Relational Operator2'</span></td></tr>
 <tr name="1296" id="1296">
-<td><a id="l1296" class='ln'>1296</a></td><td><span class="ct">     *  ActionPort: '&lt;S12&gt;/Action Port'</span></td></tr>
+<td><a id="l1296" class='ln'>1296</a></td><td><span class="ct">     *  Sum: '&lt;S14&gt;/Sum1'</span></td></tr>
 <tr name="1297" id="1297">
 <td><a id="l1297" class='ln'>1297</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1298" id="1298">
-<td><a id="l1298" class='ln'>1298</a></td><td>    <span class="ct">/* Merge: '&lt;S3&gt;/Merge' incorporates:</span></td></tr>
+<td><a id="l1298" class='ln'>1298</a></td><td>    <a id="1298c5" class="tk">rtb_RelationalOperator</a> = (((<a id="1298c33" class="tk">uint16_T</a>)(<a id="1298c43" class="tk">rtb_Sum1_p</a> <a id="1298c54" class="tk">+</a> 1U) <a id="1298c60" class="tk">&gt;</a> 1600) <a id="1298c68" class="tk">||</a></td></tr>
 <tr name="1299" id="1299">
-<td><a id="l1299" class='ln'>1299</a></td><td><span class="ct">     *  Inport: '&lt;S12&gt;/In1'</span></td></tr>
+<td><a id="l1299" class='ln'>1299</a></td><td>      <a id="1299c7" class="tk">rtDW</a>-&gt;<a id="1299c13" class="tk">UnitDelay_DSTATE_gv</a>);</td></tr>
 <tr name="1300" id="1300">
-<td><a id="l1300" class='ln'>1300</a></td><td><span class="ct">     *  Merge: '&lt;S15&gt;/Merge'</span></td></tr>
+<td><a id="l1300" class='ln'>1300</a></td><td></td></tr>
 <tr name="1301" id="1301">
-<td><a id="l1301" class='ln'>1301</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1301" class='ln'>1301</a></td><td>    <span class="ct">/* MinMax: '&lt;S14&gt;/MinMax' incorporates:</span></td></tr>
 <tr name="1302" id="1302">
-<td><a id="l1302" class='ln'>1302</a></td><td>    <a id="1302c5" class="tk">rtDW</a>-&gt;<a id="1302c11" class="tk">Merge_i</a> = <a id="1302c21" class="tk">rtb_Sum3_jm</a>;</td></tr>
+<td><a id="l1302" class='ln'>1302</a></td><td><span class="ct">     *  Constant: '&lt;S11&gt;/Constant6'</span></td></tr>
 <tr name="1303" id="1303">
-<td><a id="l1303" class='ln'>1303</a></td><td></td></tr>
+<td><a id="l1303" class='ln'>1303</a></td><td><span class="ct">     *  Sum: '&lt;S14&gt;/Sum1'</span></td></tr>
 <tr name="1304" id="1304">
-<td><a id="l1304" class='ln'>1304</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S3&gt;/If Action Subsystem' */</span></td></tr>
+<td><a id="l1304" class='ln'>1304</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1305" id="1305">
-<td><a id="l1305" class='ln'>1305</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1305" class='ln'>1305</a></td><td>    <span class="kw">if</span> ((<a id="1305c10" class="tk">uint16_T</a>)(<a id="1305c20" class="tk">rtb_Sum1_p</a> <a id="1305c31" class="tk">+</a> 1U) <a id="1305c37" class="tk">&lt;</a> 1600) <span class="br">{</span></td></tr>
 <tr name="1306" id="1306">
-<td><a id="l1306" class='ln'>1306</a></td><td>    <span class="kw">if</span> (<a id="1306c9" class="tk">rtU</a>-&gt;<a id="1306c14" class="tk">FOC_Flags</a> <a id="1306c24" class="tk">==</a> 1) <span class="br">{</span></td></tr>
+<td><a id="l1306" class='ln'>1306</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S15&gt;/UnitDelay' */</span></td></tr>
 <tr name="1307" id="1307">
-<td><a id="l1307" class='ln'>1307</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S3&gt;/If Action Subsystem1' incorporates:</span></td></tr>
+<td><a id="l1307" class='ln'>1307</a></td><td>      <a id="1307c7" class="tk">rtDW</a>-&gt;<a id="1307c13" class="tk">UnitDelay_DSTATE_m</a> = (<a id="1307c35" class="tk">uint16_T</a>)(<a id="1307c45" class="tk">rtb_Sum1_p</a> <a id="1307c56" class="tk">+</a> 1U);</td></tr>
 <tr name="1308" id="1308">
-<td><a id="l1308" class='ln'>1308</a></td><td><span class="ct">       *  ActionPort: '&lt;S13&gt;/Action Port'</span></td></tr>
+<td><a id="l1308" class='ln'>1308</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1309" id="1309">
-<td><a id="l1309" class='ln'>1309</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1309" class='ln'>1309</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S15&gt;/UnitDelay' */</span></td></tr>
 <tr name="1310" id="1310">
-<td><a id="l1310" class='ln'>1310</a></td><td>      <span class="ct">/* Merge: '&lt;S3&gt;/Merge' incorporates:</span></td></tr>
+<td><a id="l1310" class='ln'>1310</a></td><td>      <a id="1310c7" class="tk">rtDW</a>-&gt;<a id="1310c13" class="tk">UnitDelay_DSTATE_m</a> = 1600U;</td></tr>
 <tr name="1311" id="1311">
-<td><a id="l1311" class='ln'>1311</a></td><td><span class="ct">       *  Inport: '&lt;Root&gt;/theta_Open'</span></td></tr>
+<td><a id="l1311" class='ln'>1311</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1312" id="1312">
-<td><a id="l1312" class='ln'>1312</a></td><td><span class="ct">       *  Inport: '&lt;S13&gt;/In1'</span></td></tr>
+<td><a id="l1312" class='ln'>1312</a></td><td></td></tr>
 <tr name="1313" id="1313">
-<td><a id="l1313" class='ln'>1313</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1313" class='ln'>1313</a></td><td>    <span class="ct">/* End of MinMax: '&lt;S14&gt;/MinMax' */</span></td></tr>
 <tr name="1314" id="1314">
-<td><a id="l1314" class='ln'>1314</a></td><td>      <a id="1314c7" class="tk">rtDW</a>-&gt;<a id="1314c13" class="tk">Merge_i</a> = <a id="1314c23" class="tk">rtU</a>-&gt;<a id="1314c28" class="tk">theta_Open</a>;</td></tr>
+<td><a id="l1314" class='ln'>1314</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S6&gt;/Qualification' */</span></td></tr>
 <tr name="1315" id="1315">
-<td><a id="l1315" class='ln'>1315</a></td><td></td></tr>
+<td><a id="l1315" class='ln'>1315</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="1315c15" class="tk">!</a><a id="1315c16" class="tk">rtb_RelationalOperator4_d</a>) <a id="1315c43" class="tk">&amp;&amp;</a> <a id="1315c46" class="tk">rtDW</a>-&gt;<a id="1315c52" class="tk">UnitDelay_DSTATE_gv</a>) <span class="br">{</span></td></tr>
 <tr name="1316" id="1316">
-<td><a id="l1316" class='ln'>1316</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S3&gt;/If Action Subsystem1' */</span></td></tr>
+<td><a id="l1316" class='ln'>1316</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S6&gt;/Dequalification' incorporates:</span></td></tr>
 <tr name="1317" id="1317">
-<td><a id="l1317" class='ln'>1317</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1317" class='ln'>1317</a></td><td><span class="ct">     *  ActionPort: '&lt;S9&gt;/Action Port'</span></td></tr>
 <tr name="1318" id="1318">
-<td><a id="l1318" class='ln'>1318</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1318" class='ln'>1318</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1319" id="1319">
-<td><a id="l1319" class='ln'>1319</a></td><td></td></tr>
+<td><a id="l1319" class='ln'>1319</a></td><td>    <span class="ct">/* Switch: '&lt;S13&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="1320" id="1320">
-<td><a id="l1320" class='ln'>1320</a></td><td>  <span class="ct">/* End of If: '&lt;S3&gt;/If' */</span></td></tr>
+<td><a id="l1320" class='ln'>1320</a></td><td><span class="ct">     *  Constant: '&lt;S13&gt;/Constant23'</span></td></tr>
 <tr name="1321" id="1321">
-<td><a id="l1321" class='ln'>1321</a></td><td></td></tr>
+<td><a id="l1321" class='ln'>1321</a></td><td><span class="ct">     *  UnitDelay: '&lt;S13&gt;/UnitDelay'</span></td></tr>
 <tr name="1322" id="1322">
-<td><a id="l1322" class='ln'>1322</a></td><td>  <span class="ct">/* PreLookup: '&lt;S58&gt;/a_elecAngle_XA' incorporates:</span></td></tr>
+<td><a id="l1322" class='ln'>1322</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1323" id="1323">
-<td><a id="l1323" class='ln'>1323</a></td><td><span class="ct">   *  Merge: '&lt;S3&gt;/Merge'</span></td></tr>
+<td><a id="l1323" class='ln'>1323</a></td><td>    <span class="kw">if</span> (<a id="1323c9" class="tk">rtb_RelationalOperator</a>) <span class="br">{</span></td></tr>
 <tr name="1324" id="1324">
-<td><a id="l1324" class='ln'>1324</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1324" class='ln'>1324</a></td><td>      <a id="1324c7" class="tk">rtb_Sum1_p</a> = 0U;</td></tr>
 <tr name="1325" id="1325">
-<td><a id="l1325" class='ln'>1325</a></td><td>  <a id="1325c3" class="tk">rtb_LogicalOperator3</a> = <a id="1325c26" class="tk">plook_u16s16_evencka</a>(<a id="1325c47" class="tk">rtDW</a>-&gt;<a id="1325c53" class="tk">Merge_i</a>, 0, 16U, 360U);</td></tr>
+<td><a id="l1325" class='ln'>1325</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1326" id="1326">
-<td><a id="l1326" class='ln'>1326</a></td><td></td></tr>
+<td><a id="l1326" class='ln'>1326</a></td><td>      <a id="1326c7" class="tk">rtb_Sum1_p</a> = <a id="1326c20" class="tk">rtDW</a>-&gt;<a id="1326c26" class="tk">UnitDelay_DSTATE_i</a>;</td></tr>
 <tr name="1327" id="1327">
-<td><a id="l1327" class='ln'>1327</a></td><td>  <span class="ct">/* Sum: '&lt;S55&gt;/Add2' */</span></td></tr>
+<td><a id="l1327" class='ln'>1327</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1328" id="1328">
-<td><a id="l1328" class='ln'>1328</a></td><td>  <a id="1328c3" class="tk">tmp_2</a> = (<a id="1328c12" class="tk">rtb_Divide_idx_1</a> <a id="1328c29" class="tk">-</a> <a id="1328c31" class="tk">tmp_2</a>) <a id="1328c38" class="tk">&gt;&gt;</a> 9;</td></tr>
+<td><a id="l1328" class='ln'>1328</a></td><td></td></tr>
 <tr name="1329" id="1329">
-<td><a id="l1329" class='ln'>1329</a></td><td>  <span class="kw">if</span> (<a id="1329c7" class="tk">tmp_2</a> <a id="1329c13" class="tk">&gt;</a> 32767LL) <span class="br">{</span></td></tr>
+<td><a id="l1329" class='ln'>1329</a></td><td>    <span class="ct">/* End of Switch: '&lt;S13&gt;/Switch1' */</span></td></tr>
 <tr name="1330" id="1330">
-<td><a id="l1330" class='ln'>1330</a></td><td>    <a id="1330c5" class="tk">tmp_2</a> = 32767LL;</td></tr>
+<td><a id="l1330" class='ln'>1330</a></td><td></td></tr>
 <tr name="1331" id="1331">
-<td><a id="l1331" class='ln'>1331</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1331" class='ln'>1331</a></td><td>    <span class="ct">/* Switch: '&lt;S9&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1332" id="1332">
-<td><a id="l1332" class='ln'>1332</a></td><td>    <span class="kw">if</span> (<a id="1332c9" class="tk">tmp_2</a> <a id="1332c15" class="tk">&lt;</a> <a id="1332c17" class="tk">-</a>32768LL) <span class="br">{</span></td></tr>
+<td><a id="l1332" class='ln'>1332</a></td><td><span class="ct">     *  Constant: '&lt;S5&gt;/t_errDequal'</span></td></tr>
 <tr name="1333" id="1333">
-<td><a id="l1333" class='ln'>1333</a></td><td>      <a id="1333c7" class="tk">tmp_2</a> = <a id="1333c15" class="tk">-</a>32768LL;</td></tr>
+<td><a id="l1333" class='ln'>1333</a></td><td><span class="ct">     *  Constant: '&lt;S9&gt;/Constant6'</span></td></tr>
 <tr name="1334" id="1334">
-<td><a id="l1334" class='ln'>1334</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1334" class='ln'>1334</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S9&gt;/Relational Operator2'</span></td></tr>
 <tr name="1335" id="1335">
-<td><a id="l1335" class='ln'>1335</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1335" class='ln'>1335</a></td><td><span class="ct">     *  Sum: '&lt;S12&gt;/Sum1'</span></td></tr>
 <tr name="1336" id="1336">
-<td><a id="l1336" class='ln'>1336</a></td><td></td></tr>
+<td><a id="l1336" class='ln'>1336</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1337" id="1337">
-<td><a id="l1337" class='ln'>1337</a></td><td>  <span class="ct">/* Gain: '&lt;S55&gt;/Gain2' incorporates:</span></td></tr>
+<td><a id="l1337" class='ln'>1337</a></td><td>    <a id="1337c5" class="tk">rtb_RelationalOperator</a> = (((<a id="1337c33" class="tk">uint16_T</a>)(<a id="1337c43" class="tk">rtb_Sum1_p</a> <a id="1337c54" class="tk">+</a> 1U) <a id="1337c60" class="tk">&lt;=</a> 12000) <a id="1337c70" class="tk">&amp;&amp;</a></td></tr>
 <tr name="1338" id="1338">
-<td><a id="l1338" class='ln'>1338</a></td><td><span class="ct">   *  Sum: '&lt;S55&gt;/Add2'</span></td></tr>
+<td><a id="l1338" class='ln'>1338</a></td><td>      <a id="1338c7" class="tk">rtDW</a>-&gt;<a id="1338c13" class="tk">UnitDelay_DSTATE_gv</a>);</td></tr>
 <tr name="1339" id="1339">
-<td><a id="l1339" class='ln'>1339</a></td><td><span class="ct">   *  Sum: '&lt;S57&gt;/Sum6'</span></td></tr>
+<td><a id="l1339" class='ln'>1339</a></td><td></td></tr>
 <tr name="1340" id="1340">
-<td><a id="l1340" class='ln'>1340</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1340" class='ln'>1340</a></td><td>    <span class="ct">/* MinMax: '&lt;S12&gt;/MinMax' incorporates:</span></td></tr>
 <tr name="1341" id="1341">
-<td><a id="l1341" class='ln'>1341</a></td><td>  <a id="1341c3" class="tk">rtb_Sum6_p</a> = (<a id="1341c17" class="tk">int16_T</a>)((18919 <a id="1341c33" class="tk">*</a> (<a id="1341c36" class="tk">int16_T</a>)<a id="1341c44" class="tk">tmp_2</a>) <a id="1341c51" class="tk">&gt;&gt;</a> 15);</td></tr>
+<td><a id="l1341" class='ln'>1341</a></td><td><span class="ct">     *  Constant: '&lt;S9&gt;/Constant6'</span></td></tr>
 <tr name="1342" id="1342">
-<td><a id="l1342" class='ln'>1342</a></td><td></td></tr>
+<td><a id="l1342" class='ln'>1342</a></td><td><span class="ct">     *  Sum: '&lt;S12&gt;/Sum1'</span></td></tr>
 <tr name="1343" id="1343">
-<td><a id="l1343" class='ln'>1343</a></td><td>  <span class="ct">/* Sum: '&lt;S57&gt;/Sum1' incorporates:</span></td></tr>
+<td><a id="l1343" class='ln'>1343</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1344" id="1344">
-<td><a id="l1344" class='ln'>1344</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S58&gt;/r_cos_M1'</span></td></tr>
+<td><a id="l1344" class='ln'>1344</a></td><td>    <span class="kw">if</span> ((<a id="1344c10" class="tk">uint16_T</a>)(<a id="1344c20" class="tk">rtb_Sum1_p</a> <a id="1344c31" class="tk">+</a> 1U) <a id="1344c37" class="tk">&lt;</a> 12000) <span class="br">{</span></td></tr>
 <tr name="1345" id="1345">
-<td><a id="l1345" class='ln'>1345</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S58&gt;/r_sin_M1'</span></td></tr>
+<td><a id="l1345" class='ln'>1345</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S13&gt;/UnitDelay' */</span></td></tr>
 <tr name="1346" id="1346">
-<td><a id="l1346" class='ln'>1346</a></td><td><span class="ct">   *  Product: '&lt;S57&gt;/Divide1'</span></td></tr>
+<td><a id="l1346" class='ln'>1346</a></td><td>      <a id="1346c7" class="tk">rtDW</a>-&gt;<a id="1346c13" class="tk">UnitDelay_DSTATE_i</a> = (<a id="1346c35" class="tk">uint16_T</a>)(<a id="1346c45" class="tk">rtb_Sum1_p</a> <a id="1346c56" class="tk">+</a> 1U);</td></tr>
 <tr name="1347" id="1347">
-<td><a id="l1347" class='ln'>1347</a></td><td><span class="ct">   *  Product: '&lt;S57&gt;/Divide2'</span></td></tr>
+<td><a id="l1347" class='ln'>1347</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1348" id="1348">
-<td><a id="l1348" class='ln'>1348</a></td><td><span class="ct">   *  Product: '&lt;S57&gt;/Divide3'</span></td></tr>
+<td><a id="l1348" class='ln'>1348</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S13&gt;/UnitDelay' */</span></td></tr>
 <tr name="1349" id="1349">
-<td><a id="l1349" class='ln'>1349</a></td><td><span class="ct">   *  Sum: '&lt;S57&gt;/Sum6'</span></td></tr>
+<td><a id="l1349" class='ln'>1349</a></td><td>      <a id="1349c7" class="tk">rtDW</a>-&gt;<a id="1349c13" class="tk">UnitDelay_DSTATE_i</a> = 12000U;</td></tr>
 <tr name="1350" id="1350">
-<td><a id="l1350" class='ln'>1350</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1350" class='ln'>1350</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1351" id="1351">
-<td><a id="l1351" class='ln'>1351</a></td><td>  <a id="1351c3" class="tk">rtb_Divide_idx_0</a> = ((<a id="1351c24" class="tk">rtb_Divide1_m</a> <a id="1351c38" class="tk">*</a> <a id="1351c40" class="tk">rtConstP</a>.<a id="1351c49" class="tk">pooled9</a>[<a id="1351c57" class="tk">rtb_LogicalOperator3</a>]) <a id="1351c80" class="tk">&gt;&gt;</a></td></tr>
+<td><a id="l1351" class='ln'>1351</a></td><td></td></tr>
 <tr name="1352" id="1352">
-<td><a id="l1352" class='ln'>1352</a></td><td>                      14) <a id="1352c27" class="tk">+</a> (<a id="1352c30" class="tk">int16_T</a>)((<a id="1352c40" class="tk">rtb_Sum6_p</a> <a id="1352c51" class="tk">*</a></td></tr>
+<td><a id="l1352" class='ln'>1352</a></td><td>    <span class="ct">/* End of MinMax: '&lt;S12&gt;/MinMax' */</span></td></tr>
 <tr name="1353" id="1353">
-<td><a id="l1353" class='ln'>1353</a></td><td>    <a id="1353c5" class="tk">rtConstP</a>.<a id="1353c14" class="tk">pooled8</a>[<a id="1353c22" class="tk">rtb_LogicalOperator3</a>]) <a id="1353c45" class="tk">&gt;&gt;</a> 14);</td></tr>
+<td><a id="l1353" class='ln'>1353</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S6&gt;/Dequalification' */</span></td></tr>
 <tr name="1354" id="1354">
-<td><a id="l1354" class='ln'>1354</a></td><td>  <span class="kw">if</span> (<a id="1354c7" class="tk">rtb_Divide_idx_0</a> <a id="1354c24" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l1354" class='ln'>1354</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1355" id="1355">
-<td><a id="l1355" class='ln'>1355</a></td><td>    <a id="1355c5" class="tk">rtb_Divide_idx_0</a> = 32767;</td></tr>
+<td><a id="l1355" class='ln'>1355</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S6&gt;/Default' incorporates:</span></td></tr>
 <tr name="1356" id="1356">
-<td><a id="l1356" class='ln'>1356</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1356" class='ln'>1356</a></td><td><span class="ct">     *  ActionPort: '&lt;S8&gt;/Action Port'</span></td></tr>
 <tr name="1357" id="1357">
-<td><a id="l1357" class='ln'>1357</a></td><td>    <span class="kw">if</span> (<a id="1357c9" class="tk">rtb_Divide_idx_0</a> <a id="1357c26" class="tk">&lt;</a> <a id="1357c28" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l1357" class='ln'>1357</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1358" id="1358">
-<td><a id="l1358" class='ln'>1358</a></td><td>      <a id="1358c7" class="tk">rtb_Divide_idx_0</a> = <a id="1358c26" class="tk">-</a>32768;</td></tr>
+<td><a id="l1358" class='ln'>1358</a></td><td>    <a id="1358c5" class="tk">rtb_RelationalOperator</a> = <a id="1358c30" class="tk">rtDW</a>-&gt;<a id="1358c36" class="tk">UnitDelay_DSTATE_gv</a>;</td></tr>
 <tr name="1359" id="1359">
-<td><a id="l1359" class='ln'>1359</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1359" class='ln'>1359</a></td><td></td></tr>
 <tr name="1360" id="1360">
-<td><a id="l1360" class='ln'>1360</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1360" class='ln'>1360</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S6&gt;/Default' */</span></td></tr>
 <tr name="1361" id="1361">
-<td><a id="l1361" class='ln'>1361</a></td><td></td></tr>
+<td><a id="l1361" class='ln'>1361</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1362" id="1362">
-<td><a id="l1362" class='ln'>1362</a></td><td>  <span class="ct">/* SignalConversion generated from: '&lt;S48&gt;/Low_Pass_Filter' incorporates:</span></td></tr>
+<td><a id="l1362" class='ln'>1362</a></td><td></td></tr>
 <tr name="1363" id="1363">
-<td><a id="l1363" class='ln'>1363</a></td><td><span class="ct">   *  Sum: '&lt;S57&gt;/Sum1'</span></td></tr>
+<td><a id="l1363" class='ln'>1363</a></td><td>  <span class="ct">/* End of If: '&lt;S6&gt;/If2' */</span></td></tr>
 <tr name="1364" id="1364">
-<td><a id="l1364" class='ln'>1364</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1364" class='ln'>1364</a></td><td></td></tr>
 <tr name="1365" id="1365">
-<td><a id="l1365" class='ln'>1365</a></td><td>  <a id="1365c3" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[0] = (<a id="1365c41" class="tk">int16_T</a>)<a id="1365c49" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l1365" class='ln'>1365</a></td><td>  <span class="ct">/* Logic: '&lt;S1&gt;/Logical Operator1' incorporates:</span></td></tr>
 <tr name="1366" id="1366">
-<td><a id="l1366" class='ln'>1366</a></td><td></td></tr>
+<td><a id="l1366" class='ln'>1366</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/b_motEna'</span></td></tr>
 <tr name="1367" id="1367">
-<td><a id="l1367" class='ln'>1367</a></td><td>  <span class="ct">/* Sum: '&lt;S57&gt;/Sum6' incorporates:</span></td></tr>
+<td><a id="l1367" class='ln'>1367</a></td><td><span class="ct">   *  Logic: '&lt;S1&gt;/Logical Operator'</span></td></tr>
 <tr name="1368" id="1368">
-<td><a id="l1368" class='ln'>1368</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S58&gt;/r_cos_M1'</span></td></tr>
+<td><a id="l1368" class='ln'>1368</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1369" id="1369">
-<td><a id="l1369" class='ln'>1369</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S58&gt;/r_sin_M1'</span></td></tr>
+<td><a id="l1369" class='ln'>1369</a></td><td>  <a id="1369c3" class="tk">rtb_LogicalOperator1_g</a> = ((<a id="1369c30" class="tk">!</a><a id="1369c31" class="tk">rtb_RelationalOperator</a>) <a id="1369c55" class="tk">&amp;&amp;</a> <a id="1369c58" class="tk">rtU</a>-&gt;<a id="1369c63" class="tk">b_motEna</a>);</td></tr>
 <tr name="1370" id="1370">
-<td><a id="l1370" class='ln'>1370</a></td><td><span class="ct">   *  Product: '&lt;S57&gt;/Divide1'</span></td></tr>
+<td><a id="l1370" class='ln'>1370</a></td><td></td></tr>
 <tr name="1371" id="1371">
-<td><a id="l1371" class='ln'>1371</a></td><td><span class="ct">   *  Product: '&lt;S57&gt;/Divide4'</span></td></tr>
+<td><a id="l1371" class='ln'>1371</a></td><td>  <span class="ct">/* Logic: '&lt;S36&gt;/Logical Operator4' incorporates:</span></td></tr>
 <tr name="1372" id="1372">
-<td><a id="l1372" class='ln'>1372</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1372" class='ln'>1372</a></td><td><span class="ct">   *  Constant: '&lt;S36&gt;/constant8'</span></td></tr>
 <tr name="1373" id="1373">
-<td><a id="l1373" class='ln'>1373</a></td><td>  <a id="1373c3" class="tk">rtb_Divide_idx_0</a> = (<a id="1373c23" class="tk">int16_T</a>)((<a id="1373c33" class="tk">rtb_Sum6_p</a> <a id="1373c44" class="tk">*</a></td></tr>
+<td><a id="l1373" class='ln'>1373</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/n_ctrlMod'</span></td></tr>
 <tr name="1374" id="1374">
-<td><a id="l1374" class='ln'>1374</a></td><td>    <a id="1374c5" class="tk">rtConstP</a>.<a id="1374c14" class="tk">pooled9</a>[<a id="1374c22" class="tk">rtb_LogicalOperator3</a>]) <a id="1374c45" class="tk">&gt;&gt;</a> 14) <a id="1374c52" class="tk">-</a> ((<a id="1374c56" class="tk">rtb_Divide1_m</a> <a id="1374c70" class="tk">*</a></td></tr>
+<td><a id="l1374" class='ln'>1374</a></td><td><span class="ct">   *  Logic: '&lt;S36&gt;/Logical Operator11'</span></td></tr>
 <tr name="1375" id="1375">
-<td><a id="l1375" class='ln'>1375</a></td><td>    <a id="1375c5" class="tk">rtConstP</a>.<a id="1375c14" class="tk">pooled8</a>[<a id="1375c22" class="tk">rtb_LogicalOperator3</a>]) <a id="1375c45" class="tk">&gt;&gt;</a> 14);</td></tr>
+<td><a id="l1375" class='ln'>1375</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S36&gt;/Relational Operator10'</span></td></tr>
 <tr name="1376" id="1376">
-<td><a id="l1376" class='ln'>1376</a></td><td>  <span class="kw">if</span> (<a id="1376c7" class="tk">rtb_Divide_idx_0</a> <a id="1376c24" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l1376" class='ln'>1376</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1377" id="1377">
-<td><a id="l1377" class='ln'>1377</a></td><td>    <a id="1377c5" class="tk">rtb_Divide_idx_0</a> = 32767;</td></tr>
+<td><a id="l1377" class='ln'>1377</a></td><td>  <a id="1377c3" class="tk">rtb_LogicalOperator4_f</a> = ((<a id="1377c30" class="tk">!</a><a id="1377c31" class="tk">rtb_LogicalOperator1_g</a>) <a id="1377c55" class="tk">||</a> (<a id="1377c59" class="tk">rtU</a>-&gt;<a id="1377c64" class="tk">n_ctrlMod</a> <a id="1377c74" class="tk">==</a> 0));</td></tr>
 <tr name="1378" id="1378">
-<td><a id="l1378" class='ln'>1378</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1378" class='ln'>1378</a></td><td></td></tr>
 <tr name="1379" id="1379">
-<td><a id="l1379" class='ln'>1379</a></td><td>    <span class="kw">if</span> (<a id="1379c9" class="tk">rtb_Divide_idx_0</a> <a id="1379c26" class="tk">&lt;</a> <a id="1379c28" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l1379" class='ln'>1379</a></td><td>  <span class="ct">/* Abs: '&lt;S36&gt;/Abs' incorporates:</span></td></tr>
 <tr name="1380" id="1380">
-<td><a id="l1380" class='ln'>1380</a></td><td>      <a id="1380c7" class="tk">rtb_Divide_idx_0</a> = <a id="1380c26" class="tk">-</a>32768;</td></tr>
+<td><a id="l1380" class='ln'>1380</a></td><td><span class="ct">   *  Gain: '&lt;S53&gt;/Gain'</span></td></tr>
 <tr name="1381" id="1381">
-<td><a id="l1381" class='ln'>1381</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1381" class='ln'>1381</a></td><td><span class="ct">   *  Switch: '&lt;S20&gt;/Switch2'</span></td></tr>
 <tr name="1382" id="1382">
-<td><a id="l1382" class='ln'>1382</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1382" class='ln'>1382</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1383" id="1383">
-<td><a id="l1383" class='ln'>1383</a></td><td></td></tr>
+<td><a id="l1383" class='ln'>1383</a></td><td>  <span class="kw">if</span> (<a id="1383c7" class="tk">rtb_Switch3</a> <a id="1383c19" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="1384" id="1384">
-<td><a id="l1384" class='ln'>1384</a></td><td>  <span class="ct">/* SignalConversion generated from: '&lt;S48&gt;/Low_Pass_Filter' incorporates:</span></td></tr>
+<td><a id="l1384" class='ln'>1384</a></td><td>    <a id="1384c5" class="tk">rtb_Gain_b</a> = <a id="1384c18" class="tk">-</a><a id="1384c19" class="tk">rtb_Switch3</a>;</td></tr>
 <tr name="1385" id="1385">
-<td><a id="l1385" class='ln'>1385</a></td><td><span class="ct">   *  Sum: '&lt;S57&gt;/Sum6'</span></td></tr>
+<td><a id="l1385" class='ln'>1385</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1386" id="1386">
-<td><a id="l1386" class='ln'>1386</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1386" class='ln'>1386</a></td><td>    <a id="1386c5" class="tk">rtb_Gain_b</a> = <a id="1386c18" class="tk">rtb_Switch3</a>;</td></tr>
 <tr name="1387" id="1387">
-<td><a id="l1387" class='ln'>1387</a></td><td>  <a id="1387c3" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1] = (<a id="1387c41" class="tk">int16_T</a>)<a id="1387c49" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l1387" class='ln'>1387</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1388" id="1388">
 <td><a id="l1388" class='ln'>1388</a></td><td></td></tr>
 <tr name="1389" id="1389">
-<td><a id="l1389" class='ln'>1389</a></td><td>  <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S48&gt;/Low_Pass_Filter' */</span></td></tr>
+<td><a id="l1389" class='ln'>1389</a></td><td>  <span class="ct">/* End of Abs: '&lt;S36&gt;/Abs' */</span></td></tr>
 <tr name="1390" id="1390">
-<td><a id="l1390" class='ln'>1390</a></td><td>  <span class="ct">/* Constant: '&lt;S48&gt;/Constant' incorporates:</span></td></tr>
+<td><a id="l1390" class='ln'>1390</a></td><td></td></tr>
 <tr name="1391" id="1391">
-<td><a id="l1391" class='ln'>1391</a></td><td><span class="ct">   *  Outport: '&lt;Root&gt;/f_Idq'</span></td></tr>
+<td><a id="l1391" class='ln'>1391</a></td><td>  <span class="ct">/* Relay: '&lt;S36&gt;/n_SpeedCtrl' incorporates:</span></td></tr>
 <tr name="1392" id="1392">
-<td><a id="l1392" class='ln'>1392</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1392" class='ln'>1392</a></td><td><span class="ct">   *  Gain: '&lt;S53&gt;/Gain'</span></td></tr>
 <tr name="1393" id="1393">
-<td><a id="l1393" class='ln'>1393</a></td><td>  <a id="1393c3" class="tk">Low_Pass_Filter</a>(<a id="1393c19" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>, <a id="1393c52" class="tk">rtP</a>.<a id="1393c56" class="tk">f_lpf_idq</a>, <a id="1393c67" class="tk">rtY</a>-&gt;<a id="1393c72" class="tk">f_Idq</a>,</td></tr>
+<td><a id="l1393" class='ln'>1393</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1394" id="1394">
-<td><a id="l1394" class='ln'>1394</a></td><td>                  <a id="1394c19" class="tk">&amp;</a><a id="1394c20" class="tk">rtDW</a>-&gt;<a id="1394c26" class="tk">Low_Pass_Filter_d</a>);</td></tr>
+<td><a id="l1394" class='ln'>1394</a></td><td>  <a id="1394c3" class="tk">rtDW</a>-&gt;<a id="1394c9" class="tk">n_SpeedCtrl_Mode</a> = ((<a id="1394c30" class="tk">rtb_Gain_b</a> <a id="1394c41" class="tk">&gt;=</a> 4800) <a id="1394c50" class="tk">||</a> ((<a id="1394c55" class="tk">rtb_Gain_b</a> <a id="1394c66" class="tk">&gt;</a> 3200) <a id="1394c74" class="tk">&amp;&amp;</a></td></tr>
 <tr name="1395" id="1395">
-<td><a id="l1395" class='ln'>1395</a></td><td></td></tr>
+<td><a id="l1395" class='ln'>1395</a></td><td>    <a id="1395c5" class="tk">rtDW</a>-&gt;<a id="1395c11" class="tk">n_SpeedCtrl_Mode</a>));</td></tr>
 <tr name="1396" id="1396">
-<td><a id="l1396" class='ln'>1396</a></td><td>  <span class="ct">/* End of Outputs for SubSystem: '&lt;S48&gt;/Low_Pass_Filter' */</span></td></tr>
+<td><a id="l1396" class='ln'>1396</a></td><td></td></tr>
 <tr name="1397" id="1397">
-<td><a id="l1397" class='ln'>1397</a></td><td></td></tr>
+<td><a id="l1397" class='ln'>1397</a></td><td>  <span class="ct">/* Logic: '&lt;S36&gt;/Logical Operator10' incorporates:</span></td></tr>
 <tr name="1398" id="1398">
-<td><a id="l1398" class='ln'>1398</a></td><td>  <span class="ct">/* Switch: '&lt;S24&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l1398" class='ln'>1398</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/b_cruiseEna'</span></td></tr>
 <tr name="1399" id="1399">
-<td><a id="l1399" class='ln'>1399</a></td><td><span class="ct">   *  Constant: '&lt;S24&gt;/Constant3'</span></td></tr>
+<td><a id="l1399" class='ln'>1399</a></td><td><span class="ct">   *  Relay: '&lt;S36&gt;/n_SpeedCtrl'</span></td></tr>
 <tr name="1400" id="1400">
-<td><a id="l1400" class='ln'>1400</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/spd_Target'</span></td></tr>
+<td><a id="l1400" class='ln'>1400</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1401" id="1401">
-<td><a id="l1401" class='ln'>1401</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1401" class='ln'>1401</a></td><td>  <a id="1401c3" class="tk">rtb_UnitDelay_c</a> = (<a id="1401c22" class="tk">rtDW</a>-&gt;<a id="1401c28" class="tk">n_SpeedCtrl_Mode</a> <a id="1401c45" class="tk">&amp;&amp;</a> <a id="1401c48" class="tk">rtU</a>-&gt;<a id="1401c53" class="tk">b_cruiseEna</a>);</td></tr>
 <tr name="1402" id="1402">
-<td><a id="l1402" class='ln'>1402</a></td><td>  <span class="kw">if</span> (<a id="1402c7" class="tk">rtU</a>-&gt;<a id="1402c12" class="tk">spd_Target</a> <a id="1402c23" class="tk">&gt;</a> 240) <span class="br">{</span></td></tr>
+<td><a id="l1402" class='ln'>1402</a></td><td></td></tr>
 <tr name="1403" id="1403">
-<td><a id="l1403" class='ln'>1403</a></td><td>    <span class="ct">/* Switch: '&lt;S24&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l1403" class='ln'>1403</a></td><td>  <span class="ct">/* Logic: '&lt;S36&gt;/Logical Operator2' incorporates:</span></td></tr>
 <tr name="1404" id="1404">
-<td><a id="l1404" class='ln'>1404</a></td><td><span class="ct">     *  Constant: '&lt;S24&gt;/Constant1'</span></td></tr>
+<td><a id="l1404" class='ln'>1404</a></td><td><span class="ct">   *  Constant: '&lt;S36&gt;/constant'</span></td></tr>
 <tr name="1405" id="1405">
-<td><a id="l1405" class='ln'>1405</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S24&gt;/Data Type Conversion'</span></td></tr>
+<td><a id="l1405" class='ln'>1405</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/n_ctrlMod'</span></td></tr>
 <tr name="1406" id="1406">
-<td><a id="l1406" class='ln'>1406</a></td><td><span class="ct">     *  Switch: '&lt;S24&gt;/Switch'</span></td></tr>
+<td><a id="l1406" class='ln'>1406</a></td><td><span class="ct">   *  Logic: '&lt;S36&gt;/Logical Operator5'</span></td></tr>
 <tr name="1407" id="1407">
-<td><a id="l1407" class='ln'>1407</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1407" class='ln'>1407</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S36&gt;/Relational Operator4'</span></td></tr>
 <tr name="1408" id="1408">
-<td><a id="l1408" class='ln'>1408</a></td><td>    <span class="kw">if</span> (<a id="1408c9" class="tk">rtb_LogicalOperator12</a>) <span class="br">{</span></td></tr>
+<td><a id="l1408" class='ln'>1408</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1409" id="1409">
-<td><a id="l1409" class='ln'>1409</a></td><td>      <a id="1409c7" class="tk">rtb_Switch_np</a> = <a id="1409c23" class="tk">rtU</a>-&gt;<a id="1409c28" class="tk">spd_Target</a>;</td></tr>
+<td><a id="l1409" class='ln'>1409</a></td><td>  <a id="1409c3" class="tk">rtb_LogicalOperator2_c</a> = ((<a id="1409c30" class="tk">rtU</a>-&gt;<a id="1409c35" class="tk">n_ctrlMod</a> <a id="1409c45" class="tk">==</a> 2) <a id="1409c51" class="tk">&amp;&amp;</a> (<a id="1409c55" class="tk">!</a><a id="1409c56" class="tk">rtb_UnitDelay_c</a>));</td></tr>
 <tr name="1410" id="1410">
-<td><a id="l1410" class='ln'>1410</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1410" class='ln'>1410</a></td><td></td></tr>
 <tr name="1411" id="1411">
-<td><a id="l1411" class='ln'>1411</a></td><td>      <a id="1411c7" class="tk">rtb_Switch_np</a> = 0;</td></tr>
+<td><a id="l1411" class='ln'>1411</a></td><td>  <span class="ct">/* Logic: '&lt;S36&gt;/Logical Operator1' incorporates:</span></td></tr>
 <tr name="1412" id="1412">
-<td><a id="l1412" class='ln'>1412</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1412" class='ln'>1412</a></td><td><span class="ct">   *  Constant: '&lt;S36&gt;/constant1'</span></td></tr>
 <tr name="1413" id="1413">
-<td><a id="l1413" class='ln'>1413</a></td><td></td></tr>
+<td><a id="l1413" class='ln'>1413</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/n_ctrlMod'</span></td></tr>
 <tr name="1414" id="1414">
-<td><a id="l1414" class='ln'>1414</a></td><td>    <span class="ct">/* End of Switch: '&lt;S24&gt;/Switch1' */</span></td></tr>
+<td><a id="l1414" class='ln'>1414</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S36&gt;/Relational Operator1'</span></td></tr>
 <tr name="1415" id="1415">
-<td><a id="l1415" class='ln'>1415</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1415" class='ln'>1415</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1416" id="1416">
-<td><a id="l1416" class='ln'>1416</a></td><td>    <a id="1416c5" class="tk">rtb_Switch_np</a> = 0;</td></tr>
+<td><a id="l1416" class='ln'>1416</a></td><td>  <a id="1416c3" class="tk">rtb_UnitDelay_c</a> = ((<a id="1416c23" class="tk">rtU</a>-&gt;<a id="1416c28" class="tk">n_ctrlMod</a> <a id="1416c38" class="tk">==</a> 1) <a id="1416c44" class="tk">||</a> <a id="1416c47" class="tk">rtb_UnitDelay_c</a>);</td></tr>
 <tr name="1417" id="1417">
-<td><a id="l1417" class='ln'>1417</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1417" class='ln'>1417</a></td><td></td></tr>
 <tr name="1418" id="1418">
-<td><a id="l1418" class='ln'>1418</a></td><td></td></tr>
+<td><a id="l1418" class='ln'>1418</a></td><td>  <span class="ct">/* Chart: '&lt;S36&gt;/Control_Mode_Manager' incorporates:</span></td></tr>
 <tr name="1419" id="1419">
-<td><a id="l1419" class='ln'>1419</a></td><td>  <span class="ct">/* End of Switch: '&lt;S24&gt;/Switch' */</span></td></tr>
+<td><a id="l1419" class='ln'>1419</a></td><td><span class="ct">   *  Logic: '&lt;S36&gt;/Logical Operator3'</span></td></tr>
 <tr name="1420" id="1420">
-<td><a id="l1420" class='ln'>1420</a></td><td></td></tr>
+<td><a id="l1420" class='ln'>1420</a></td><td><span class="ct">   *  Logic: '&lt;S36&gt;/Logical Operator6'</span></td></tr>
 <tr name="1421" id="1421">
-<td><a id="l1421" class='ln'>1421</a></td><td>  <span class="ct">/* Switch: '&lt;S24&gt;/Switch3' incorporates:</span></td></tr>
+<td><a id="l1421" class='ln'>1421</a></td><td><span class="ct">   *  Logic: '&lt;S36&gt;/Logical Operator9'</span></td></tr>
 <tr name="1422" id="1422">
-<td><a id="l1422" class='ln'>1422</a></td><td><span class="ct">   *  Constant: '&lt;S24&gt;/Constant4'</span></td></tr>
+<td><a id="l1422" class='ln'>1422</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1423" id="1423">
-<td><a id="l1423" class='ln'>1423</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S24&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l1423" class='ln'>1423</a></td><td>  <span class="kw">if</span> (<a id="1423c7" class="tk">rtDW</a>-&gt;<a id="1423c13" class="tk">is_active_c11_PMSM_Controller</a> <a id="1423c43" class="tk">==</a> 0U) <span class="br">{</span></td></tr>
 <tr name="1424" id="1424">
-<td><a id="l1424" class='ln'>1424</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/vdq_Open'</span></td></tr>
+<td><a id="l1424" class='ln'>1424</a></td><td>    <a id="1424c5" class="tk">rtDW</a>-&gt;<a id="1424c11" class="tk">is_active_c11_PMSM_Controller</a> = 1U;</td></tr>
 <tr name="1425" id="1425">
-<td><a id="l1425" class='ln'>1425</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1425" class='ln'>1425</a></td><td>    <a id="1425c5" class="tk">rtDW</a>-&gt;<a id="1425c11" class="tk">is_c11_PMSM_Controller</a> = <a id="1425c36" class="tk">IN_OPEN</a>;</td></tr>
 <tr name="1426" id="1426">
-<td><a id="l1426" class='ln'>1426</a></td><td>  <span class="kw">if</span> (<a id="1426c7" class="tk">rtb_LogicalOperator12</a>) <span class="br">{</span></td></tr>
+<td><a id="l1426" class='ln'>1426</a></td><td>    <a id="1426c5" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1426c25" class="tk">OPEN_MODE</a>;</td></tr>
 <tr name="1427" id="1427">
-<td><a id="l1427" class='ln'>1427</a></td><td>    <a id="1427c5" class="tk">rtb_Sum6_p</a> = <a id="1427c18" class="tk">rtU</a>-&gt;<a id="1427c23" class="tk">vdq_Open</a>[1];</td></tr>
+<td><a id="l1427" class='ln'>1427</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="1427c14" class="tk">rtDW</a>-&gt;<a id="1427c20" class="tk">is_c11_PMSM_Controller</a> <a id="1427c43" class="tk">==</a> 1) <span class="br">{</span></td></tr>
 <tr name="1428" id="1428">
-<td><a id="l1428" class='ln'>1428</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1428" class='ln'>1428</a></td><td>    <span class="kw">if</span> (<a id="1428c9" class="tk">rtb_LogicalOperator4_f</a>) <span class="br">{</span></td></tr>
 <tr name="1429" id="1429">
-<td><a id="l1429" class='ln'>1429</a></td><td>    <a id="1429c5" class="tk">rtb_Sum6_p</a> = 0;</td></tr>
+<td><a id="l1429" class='ln'>1429</a></td><td>      <a id="1429c7" class="tk">rtDW</a>-&gt;<a id="1429c13" class="tk">is_ACTIVE</a> = <a id="1429c25" class="tk">IN_NO_ACTIVE_CHILD</a>;</td></tr>
 <tr name="1430" id="1430">
-<td><a id="l1430" class='ln'>1430</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1430" class='ln'>1430</a></td><td>      <a id="1430c7" class="tk">rtDW</a>-&gt;<a id="1430c13" class="tk">is_c11_PMSM_Controller</a> = <a id="1430c38" class="tk">IN_OPEN</a>;</td></tr>
 <tr name="1431" id="1431">
-<td><a id="l1431" class='ln'>1431</a></td><td></td></tr>
+<td><a id="l1431" class='ln'>1431</a></td><td>      <a id="1431c7" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1431c27" class="tk">OPEN_MODE</a>;</td></tr>
 <tr name="1432" id="1432">
-<td><a id="l1432" class='ln'>1432</a></td><td>  <span class="ct">/* End of Switch: '&lt;S24&gt;/Switch3' */</span></td></tr>
+<td><a id="l1432" class='ln'>1432</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="1432c16" class="tk">rtDW</a>-&gt;<a id="1432c22" class="tk">is_ACTIVE</a> <a id="1432c32" class="tk">==</a> 1) <span class="br">{</span></td></tr>
 <tr name="1433" id="1433">
-<td><a id="l1433" class='ln'>1433</a></td><td></td></tr>
+<td><a id="l1433" class='ln'>1433</a></td><td>      <a id="1433c7" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1433c27" class="tk">SPD_MODE</a>;</td></tr>
 <tr name="1434" id="1434">
-<td><a id="l1434" class='ln'>1434</a></td><td>  <span class="ct">/* Sum: '&lt;S7&gt;/Sum3' incorporates:</span></td></tr>
+<td><a id="l1434" class='ln'>1434</a></td><td>      <span class="kw">if</span> (<a id="1434c11" class="tk">!</a><a id="1434c12" class="tk">rtb_UnitDelay_c</a>) <span class="br">{</span></td></tr>
 <tr name="1435" id="1435">
-<td><a id="l1435" class='ln'>1435</a></td><td><span class="ct">   *  UnitDelay: '&lt;S7&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l1435" class='ln'>1435</a></td><td>        <span class="kw">if</span> (<a id="1435c13" class="tk">rtb_LogicalOperator2_c</a>) <span class="br">{</span></td></tr>
 <tr name="1436" id="1436">
-<td><a id="l1436" class='ln'>1436</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1436" class='ln'>1436</a></td><td>          <a id="1436c11" class="tk">rtDW</a>-&gt;<a id="1436c17" class="tk">is_ACTIVE</a> = <a id="1436c29" class="tk">IN_TORQUE_MODE</a>;</td></tr>
 <tr name="1437" id="1437">
-<td><a id="l1437" class='ln'>1437</a></td><td>  <a id="1437c3" class="tk">qY</a> = <a id="1437c8" class="tk">rtDW</a>-&gt;<a id="1437c14" class="tk">UnitDelay1_DSTATE</a> <a id="1437c32" class="tk">+</a> <span class="ct">/*MW:OvSatOk*/</span> 1U;</td></tr>
+<td><a id="l1437" class='ln'>1437</a></td><td>          <a id="1437c11" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1437c31" class="tk">TRQ_MODE</a>;</td></tr>
 <tr name="1438" id="1438">
-<td><a id="l1438" class='ln'>1438</a></td><td>  <span class="kw">if</span> (<a id="1438c7" class="tk">rtDW</a>-&gt;<a id="1438c13" class="tk">UnitDelay1_DSTATE</a> <a id="1438c31" class="tk">+</a> 1U <a id="1438c36" class="tk">&lt;</a> 1U) <span class="br">{</span></td></tr>
+<td><a id="l1438" class='ln'>1438</a></td><td>        <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1439" id="1439">
-<td><a id="l1439" class='ln'>1439</a></td><td>    <a id="1439c5" class="tk">qY</a> = <a id="1439c10" class="tk">MAX_uint32_T</a>;</td></tr>
+<td><a id="l1439" class='ln'>1439</a></td><td>          <a id="1439c11" class="tk">rtDW</a>-&gt;<a id="1439c17" class="tk">is_ACTIVE</a> = <a id="1439c29" class="tk">IN_SPEED_MODE</a>;</td></tr>
 <tr name="1440" id="1440">
-<td><a id="l1440" class='ln'>1440</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1440" class='ln'>1440</a></td><td>        <span class="br">}</span></td></tr>
 <tr name="1441" id="1441">
-<td><a id="l1441" class='ln'>1441</a></td><td></td></tr>
+<td><a id="l1441" class='ln'>1441</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1442" id="1442">
-<td><a id="l1442" class='ln'>1442</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S2&gt;/Equal' incorporates:</span></td></tr>
+<td><a id="l1442" class='ln'>1442</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1443" id="1443">
-<td><a id="l1443" class='ln'>1443</a></td><td><span class="ct">   *  Constant: '&lt;S2&gt;/Constant1'</span></td></tr>
+<td><a id="l1443" class='ln'>1443</a></td><td>      <span class="ct">/* case IN_TORQUE_MODE: */</span></td></tr>
 <tr name="1444" id="1444">
-<td><a id="l1444" class='ln'>1444</a></td><td><span class="ct">   *  Math: '&lt;S2&gt;/Rem'</span></td></tr>
+<td><a id="l1444" class='ln'>1444</a></td><td>      <a id="1444c7" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1444c27" class="tk">TRQ_MODE</a>;</td></tr>
 <tr name="1445" id="1445">
-<td><a id="l1445" class='ln'>1445</a></td><td><span class="ct">   *  Sum: '&lt;S7&gt;/Sum3'</span></td></tr>
+<td><a id="l1445" class='ln'>1445</a></td><td>      <span class="kw">if</span> (<a id="1445c11" class="tk">!</a><a id="1445c12" class="tk">rtb_LogicalOperator2_c</a>) <span class="br">{</span></td></tr>
 <tr name="1446" id="1446">
-<td><a id="l1446" class='ln'>1446</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1446" class='ln'>1446</a></td><td>        <a id="1446c9" class="tk">rtDW</a>-&gt;<a id="1446c15" class="tk">is_ACTIVE</a> = <a id="1446c27" class="tk">IN_SPEED_MODE</a>;</td></tr>
 <tr name="1447" id="1447">
-<td><a id="l1447" class='ln'>1447</a></td><td>  <a id="1447c3" class="tk">rtb_Equal_k</a> = (<a id="1447c18" class="tk">qY</a> <a id="1447c21" class="tk">%</a> 40U <a id="1447c27" class="tk">==</a> 0U);</td></tr>
+<td><a id="l1447" class='ln'>1447</a></td><td>        <a id="1447c9" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1447c29" class="tk">SPD_MODE</a>;</td></tr>
 <tr name="1448" id="1448">
-<td><a id="l1448" class='ln'>1448</a></td><td></td></tr>
+<td><a id="l1448" class='ln'>1448</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1449" id="1449">
-<td><a id="l1449" class='ln'>1449</a></td><td>  <span class="ct">/* If: '&lt;S26&gt;/If' incorporates:</span></td></tr>
+<td><a id="l1449" class='ln'>1449</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1450" id="1450">
-<td><a id="l1450" class='ln'>1450</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S26&gt;/Data Type Conversion1'</span></td></tr>
+<td><a id="l1450" class='ln'>1450</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1451" id="1451">
-<td><a id="l1451" class='ln'>1451</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S26&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l1451" class='ln'>1451</a></td><td>    <span class="ct">/* case IN_OPEN: */</span></td></tr>
 <tr name="1452" id="1452">
-<td><a id="l1452" class='ln'>1452</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/idq_Target'</span></td></tr>
+<td><a id="l1452" class='ln'>1452</a></td><td>    <a id="1452c5" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1452c25" class="tk">OPEN_MODE</a>;</td></tr>
 <tr name="1453" id="1453">
-<td><a id="l1453" class='ln'>1453</a></td><td><span class="ct">   *  Inport: '&lt;S27&gt;/vq_in'</span></td></tr>
+<td><a id="l1453" class='ln'>1453</a></td><td>    <span class="kw">if</span> ((<a id="1453c10" class="tk">!</a><a id="1453c11" class="tk">rtb_LogicalOperator4_f</a>) <a id="1453c35" class="tk">&amp;&amp;</a> (<a id="1453c39" class="tk">rtb_LogicalOperator2_c</a> <a id="1453c62" class="tk">||</a> <a id="1453c65" class="tk">rtb_UnitDelay_c</a>))</td></tr>
 <tr name="1454" id="1454">
-<td><a id="l1454" class='ln'>1454</a></td><td><span class="ct">   *  Inport: '&lt;S30&gt;/r_currTgt'</span></td></tr>
+<td><a id="l1454" class='ln'>1454</a></td><td>    <span class="br">{</span></td></tr>
 <tr name="1455" id="1455">
-<td><a id="l1455" class='ln'>1455</a></td><td><span class="ct">   *  Switch: '&lt;S24&gt;/Switch3'</span></td></tr>
+<td><a id="l1455" class='ln'>1455</a></td><td>      <a id="1455c7" class="tk">rtDW</a>-&gt;<a id="1455c13" class="tk">is_c11_PMSM_Controller</a> = <a id="1455c38" class="tk">IN_ACTIVE</a>;</td></tr>
 <tr name="1456" id="1456">
-<td><a id="l1456" class='ln'>1456</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1456" class='ln'>1456</a></td><td>      <span class="kw">if</span> (<a id="1456c11" class="tk">rtb_LogicalOperator2_c</a>) <span class="br">{</span></td></tr>
 <tr name="1457" id="1457">
-<td><a id="l1457" class='ln'>1457</a></td><td>  <span class="kw">if</span> (<a id="1457c7" class="tk">rtb_BitwiseOperator2</a> <a id="1457c28" class="tk">==</a> 1) <span class="br">{</span></td></tr>
+<td><a id="l1457" class='ln'>1457</a></td><td>        <a id="1457c9" class="tk">rtDW</a>-&gt;<a id="1457c15" class="tk">is_ACTIVE</a> = <a id="1457c27" class="tk">IN_TORQUE_MODE</a>;</td></tr>
 <tr name="1458" id="1458">
-<td><a id="l1458" class='ln'>1458</a></td><td>    <span class="ct">/* Switch: '&lt;S24&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l1458" class='ln'>1458</a></td><td>        <a id="1458c9" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1458c29" class="tk">TRQ_MODE</a>;</td></tr>
 <tr name="1459" id="1459">
-<td><a id="l1459" class='ln'>1459</a></td><td><span class="ct">     *  Constant: '&lt;S24&gt;/Constant2'</span></td></tr>
+<td><a id="l1459" class='ln'>1459</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1460" id="1460">
-<td><a id="l1460" class='ln'>1460</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S24&gt;/Data Type Conversion1'</span></td></tr>
+<td><a id="l1460" class='ln'>1460</a></td><td>        <a id="1460c9" class="tk">rtDW</a>-&gt;<a id="1460c15" class="tk">is_ACTIVE</a> = <a id="1460c27" class="tk">IN_SPEED_MODE</a>;</td></tr>
 <tr name="1461" id="1461">
-<td><a id="l1461" class='ln'>1461</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Open'</span></td></tr>
+<td><a id="l1461" class='ln'>1461</a></td><td>        <a id="1461c9" class="tk">rtb_dz_cntTrnsDet</a> = <a id="1461c29" class="tk">SPD_MODE</a>;</td></tr>
 <tr name="1462" id="1462">
-<td><a id="l1462" class='ln'>1462</a></td><td><span class="ct">     *  Inport: '&lt;S27&gt;/vd_in'</span></td></tr>
+<td><a id="l1462" class='ln'>1462</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1463" id="1463">
-<td><a id="l1463" class='ln'>1463</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1463" class='ln'>1463</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1464" id="1464">
-<td><a id="l1464" class='ln'>1464</a></td><td>    <span class="kw">if</span> (<a id="1464c9" class="tk">rtb_LogicalOperator12</a>) <span class="br">{</span></td></tr>
+<td><a id="l1464" class='ln'>1464</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1465" id="1465">
-<td><a id="l1465" class='ln'>1465</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S26&gt;/If Action Subsystem' incorporates:</span></td></tr>
+<td><a id="l1465" class='ln'>1465</a></td><td></td></tr>
 <tr name="1466" id="1466">
-<td><a id="l1466" class='ln'>1466</a></td><td><span class="ct">       *  ActionPort: '&lt;S27&gt;/Action Port'</span></td></tr>
+<td><a id="l1466" class='ln'>1466</a></td><td>  <span class="ct">/* End of Chart: '&lt;S36&gt;/Control_Mode_Manager' */</span></td></tr>
 <tr name="1467" id="1467">
-<td><a id="l1467" class='ln'>1467</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1467" class='ln'>1467</a></td><td></td></tr>
 <tr name="1468" id="1468">
-<td><a id="l1468" class='ln'>1468</a></td><td>      <a id="1468c7" class="tk">rtDW</a>-&gt;<a id="1468c13" class="tk">Merge</a>[0] = <a id="1468c24" class="tk">rtU</a>-&gt;<a id="1468c29" class="tk">vdq_Open</a>[0];</td></tr>
+<td><a id="l1468" class='ln'>1468</a></td><td>  <span class="ct">/* UnitDelay: '&lt;S35&gt;/UnitDelay1' */</span></td></tr>
 <tr name="1469" id="1469">
-<td><a id="l1469" class='ln'>1469</a></td><td></td></tr>
+<td><a id="l1469" class='ln'>1469</a></td><td>  <a id="1469c3" class="tk">rtb_UnitDelay1_ko</a>[0] = <a id="1469c26" class="tk">rtDW</a>-&gt;<a id="1469c32" class="tk">UnitDelay1_DSTATE_o</a>[0];</td></tr>
 <tr name="1470" id="1470">
-<td><a id="l1470" class='ln'>1470</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S26&gt;/If Action Subsystem' */</span></td></tr>
+<td><a id="l1470" class='ln'>1470</a></td><td>  <a id="1470c3" class="tk">rtb_UnitDelay1_ko</a>[1] = <a id="1470c26" class="tk">rtDW</a>-&gt;<a id="1470c32" class="tk">UnitDelay1_DSTATE_o</a>[1];</td></tr>
 <tr name="1471" id="1471">
-<td><a id="l1471" class='ln'>1471</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1471" class='ln'>1471</a></td><td></td></tr>
 <tr name="1472" id="1472">
-<td><a id="l1472" class='ln'>1472</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S26&gt;/If Action Subsystem' incorporates:</span></td></tr>
+<td><a id="l1472" class='ln'>1472</a></td><td>  <span class="ct">/* Switch: '&lt;S50&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1473" id="1473">
-<td><a id="l1473" class='ln'>1473</a></td><td><span class="ct">       *  ActionPort: '&lt;S27&gt;/Action Port'</span></td></tr>
+<td><a id="l1473" class='ln'>1473</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/spd_Limit'</span></td></tr>
 <tr name="1474" id="1474">
-<td><a id="l1474" class='ln'>1474</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1474" class='ln'>1474</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/spd_Target'</span></td></tr>
 <tr name="1475" id="1475">
-<td><a id="l1475" class='ln'>1475</a></td><td>      <a id="1475c7" class="tk">rtDW</a>-&gt;<a id="1475c13" class="tk">Merge</a>[0] = 0;</td></tr>
+<td><a id="l1475" class='ln'>1475</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S50&gt;/LowerRelop1'</span></td></tr>
 <tr name="1476" id="1476">
-<td><a id="l1476" class='ln'>1476</a></td><td></td></tr>
+<td><a id="l1476" class='ln'>1476</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S50&gt;/UpperRelop'</span></td></tr>
 <tr name="1477" id="1477">
-<td><a id="l1477" class='ln'>1477</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S26&gt;/If Action Subsystem' */</span></td></tr>
+<td><a id="l1477" class='ln'>1477</a></td><td><span class="ct">   *  Switch: '&lt;S50&gt;/Switch'</span></td></tr>
 <tr name="1478" id="1478">
-<td><a id="l1478" class='ln'>1478</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1478" class='ln'>1478</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1479" id="1479">
-<td><a id="l1479" class='ln'>1479</a></td><td></td></tr>
+<td><a id="l1479" class='ln'>1479</a></td><td>  <span class="kw">if</span> (<a id="1479c7" class="tk">rtU</a>-&gt;<a id="1479c12" class="tk">spd_Target</a> <a id="1479c23" class="tk">&gt;</a> <a id="1479c25" class="tk">rtU</a>-&gt;<a id="1479c30" class="tk">spd_Limit</a>) <span class="br">{</span></td></tr>
 <tr name="1480" id="1480">
-<td><a id="l1480" class='ln'>1480</a></td><td>    <span class="ct">/* End of Switch: '&lt;S24&gt;/Switch2' */</span></td></tr>
+<td><a id="l1480" class='ln'>1480</a></td><td>    <a id="1480c5" class="tk">rtb_Switch2_au</a> = <a id="1480c22" class="tk">rtU</a>-&gt;<a id="1480c27" class="tk">spd_Limit</a>;</td></tr>
 <tr name="1481" id="1481">
-<td><a id="l1481" class='ln'>1481</a></td><td></td></tr>
+<td><a id="l1481" class='ln'>1481</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="1481c14" class="tk">rtU</a>-&gt;<a id="1481c19" class="tk">spd_Target</a> <a id="1481c30" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="1482" id="1482">
-<td><a id="l1482" class='ln'>1482</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S26&gt;/If Action Subsystem' incorporates:</span></td></tr>
+<td><a id="l1482" class='ln'>1482</a></td><td>    <span class="ct">/* Switch: '&lt;S50&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1483" id="1483">
-<td><a id="l1483" class='ln'>1483</a></td><td><span class="ct">     *  ActionPort: '&lt;S27&gt;/Action Port'</span></td></tr>
+<td><a id="l1483" class='ln'>1483</a></td><td><span class="ct">     *  Constant: '&lt;S40&gt;/Constant'</span></td></tr>
 <tr name="1484" id="1484">
-<td><a id="l1484" class='ln'>1484</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1484" class='ln'>1484</a></td><td><span class="ct">     *  Switch: '&lt;S50&gt;/Switch2'</span></td></tr>
 <tr name="1485" id="1485">
-<td><a id="l1485" class='ln'>1485</a></td><td>    <a id="1485c5" class="tk">rtDW</a>-&gt;<a id="1485c11" class="tk">Merge</a>[1] = <a id="1485c22" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l1485" class='ln'>1485</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1486" id="1486">
-<td><a id="l1486" class='ln'>1486</a></td><td></td></tr>
+<td><a id="l1486" class='ln'>1486</a></td><td>    <a id="1486c5" class="tk">rtb_Switch2_au</a> = 0;</td></tr>
 <tr name="1487" id="1487">
-<td><a id="l1487" class='ln'>1487</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S26&gt;/If Action Subsystem' */</span></td></tr>
+<td><a id="l1487" class='ln'>1487</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1488" id="1488">
-<td><a id="l1488" class='ln'>1488</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="1488c15" class="tk">rtb_z_ctrlMod</a> <a id="1488c29" class="tk">==</a> 0) <a id="1488c35" class="tk">&amp;&amp;</a> <a id="1488c38" class="tk">rtb_Equal_k</a>) <span class="br">{</span></td></tr>
+<td><a id="l1488" class='ln'>1488</a></td><td>    <a id="1488c5" class="tk">rtb_Switch2_au</a> = <a id="1488c22" class="tk">rtU</a>-&gt;<a id="1488c27" class="tk">spd_Target</a>;</td></tr>
 <tr name="1489" id="1489">
-<td><a id="l1489" class='ln'>1489</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S26&gt;/open_mode' incorporates:</span></td></tr>
+<td><a id="l1489" class='ln'>1489</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1490" id="1490">
-<td><a id="l1490" class='ln'>1490</a></td><td><span class="ct">     *  ActionPort: '&lt;S29&gt;/Action Port'</span></td></tr>
+<td><a id="l1490" class='ln'>1490</a></td><td></td></tr>
 <tr name="1491" id="1491">
-<td><a id="l1491" class='ln'>1491</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1491" class='ln'>1491</a></td><td>  <span class="ct">/* End of Switch: '&lt;S50&gt;/Switch2' */</span></td></tr>
 <tr name="1492" id="1492">
-<td><a id="l1492" class='ln'>1492</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S31&gt;/Relational Operator' incorporates:</span></td></tr>
+<td><a id="l1492" class='ln'>1492</a></td><td></td></tr>
 <tr name="1493" id="1493">
-<td><a id="l1493" class='ln'>1493</a></td><td><span class="ct">     *  Switch: '&lt;S24&gt;/Switch3'</span></td></tr>
+<td><a id="l1493" class='ln'>1493</a></td><td>  <span class="ct">/* Switch: '&lt;S51&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1494" id="1494">
-<td><a id="l1494" class='ln'>1494</a></td><td><span class="ct">     *  UnitDelay: '&lt;S31&gt;/UnitDelay'</span></td></tr>
+<td><a id="l1494" class='ln'>1494</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/idq_Limit'</span></td></tr>
 <tr name="1495" id="1495">
-<td><a id="l1495" class='ln'>1495</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1495" class='ln'>1495</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/idq_Target'</span></td></tr>
 <tr name="1496" id="1496">
-<td><a id="l1496" class='ln'>1496</a></td><td>    <a id="1496c5" class="tk">rtb_LogicalOperator12</a> = (<a id="1496c30" class="tk">rtb_Sum6_p</a> <a id="1496c41" class="tk">!=</a> <a id="1496c44" class="tk">rtDW</a>-&gt;<a id="1496c50" class="tk">UnitDelay_DSTATE_e</a>);</td></tr>
+<td><a id="l1496" class='ln'>1496</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S51&gt;/LowerRelop1'</span></td></tr>
 <tr name="1497" id="1497">
-<td><a id="l1497" class='ln'>1497</a></td><td></td></tr>
+<td><a id="l1497" class='ln'>1497</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1498" id="1498">
-<td><a id="l1498" class='ln'>1498</a></td><td>    <span class="ct">/* If: '&lt;S32&gt;/If' */</span></td></tr>
+<td><a id="l1498" class='ln'>1498</a></td><td>  <span class="kw">if</span> (<a id="1498c7" class="tk">rtU</a>-&gt;<a id="1498c12" class="tk">idq_Target</a> <a id="1498c23" class="tk">&gt;</a> <a id="1498c25" class="tk">rtU</a>-&gt;<a id="1498c30" class="tk">idq_Limit</a>) <span class="br">{</span></td></tr>
 <tr name="1499" id="1499">
-<td><a id="l1499" class='ln'>1499</a></td><td>    <span class="kw">if</span> (<a id="1499c9" class="tk">rtb_LogicalOperator12</a>) <span class="br">{</span></td></tr>
+<td><a id="l1499" class='ln'>1499</a></td><td>    <a id="1499c5" class="tk">rtb_Divide1_oy</a> = <a id="1499c22" class="tk">rtU</a>-&gt;<a id="1499c27" class="tk">idq_Limit</a>;</td></tr>
 <tr name="1500" id="1500">
-<td><a id="l1500" class='ln'>1500</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S32&gt;/RateInit' incorporates:</span></td></tr>
+<td><a id="l1500" class='ln'>1500</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1501" id="1501">
-<td><a id="l1501" class='ln'>1501</a></td><td><span class="ct">       *  ActionPort: '&lt;S33&gt;/Action Port'</span></td></tr>
+<td><a id="l1501" class='ln'>1501</a></td><td>    <span class="ct">/* Gain: '&lt;S40&gt;/Gain' */</span></td></tr>
 <tr name="1502" id="1502">
-<td><a id="l1502" class='ln'>1502</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1502" class='ln'>1502</a></td><td>    <a id="1502c5" class="tk">rtb_Gain_ib</a> = <a id="1502c19" class="tk">-</a>32768 <a id="1502c26" class="tk">*</a> <a id="1502c28" class="tk">rtU</a>-&gt;<a id="1502c33" class="tk">idq_Limit</a>;</td></tr>
 <tr name="1503" id="1503">
-<td><a id="l1503" class='ln'>1503</a></td><td>      <span class="ct">/* Sum: '&lt;S33&gt;/Add' incorporates:</span></td></tr>
+<td><a id="l1503" class='ln'>1503</a></td><td></td></tr>
 <tr name="1504" id="1504">
-<td><a id="l1504" class='ln'>1504</a></td><td><span class="ct">       *  Switch: '&lt;S24&gt;/Switch3'</span></td></tr>
+<td><a id="l1504" class='ln'>1504</a></td><td>    <span class="ct">/* Switch: '&lt;S51&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1505" id="1505">
-<td><a id="l1505" class='ln'>1505</a></td><td><span class="ct">       *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l1505" class='ln'>1505</a></td><td><span class="ct">     *  Gain: '&lt;S40&gt;/Gain'</span></td></tr>
 <tr name="1506" id="1506">
-<td><a id="l1506" class='ln'>1506</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1506" class='ln'>1506</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S51&gt;/UpperRelop'</span></td></tr>
 <tr name="1507" id="1507">
-<td><a id="l1507" class='ln'>1507</a></td><td>      <a id="1507c7" class="tk">rtb_Divide1_m</a> = (<a id="1507c24" class="tk">int16_T</a>)((<a id="1507c34" class="tk">rtb_Sum6_p</a> <a id="1507c45" class="tk">-</a> <a id="1507c47" class="tk">rtDW</a>-&gt;<a id="1507c53" class="tk">UnitDelay1_DSTATE_f</a>[1]) <a id="1507c77" class="tk">&gt;&gt;</a> 1);</td></tr>
+<td><a id="l1507" class='ln'>1507</a></td><td><span class="ct">     *  Switch: '&lt;S51&gt;/Switch2'</span></td></tr>
 <tr name="1508" id="1508">
-<td><a id="l1508" class='ln'>1508</a></td><td></td></tr>
+<td><a id="l1508" class='ln'>1508</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1509" id="1509">
-<td><a id="l1509" class='ln'>1509</a></td><td>      <span class="ct">/* Signum: '&lt;S33&gt;/Sign' incorporates:</span></td></tr>
+<td><a id="l1509" class='ln'>1509</a></td><td>    <span class="kw">if</span> ((<a id="1509c10" class="tk">rtU</a>-&gt;<a id="1509c15" class="tk">idq_Target</a> <a id="1509c26" class="tk">&lt;&lt;</a> 15) <a id="1509c33" class="tk">&lt;</a> <a id="1509c35" class="tk">rtb_Gain_ib</a>) <span class="br">{</span></td></tr>
 <tr name="1510" id="1510">
-<td><a id="l1510" class='ln'>1510</a></td><td><span class="ct">       *  Sum: '&lt;S33&gt;/Add'</span></td></tr>
+<td><a id="l1510" class='ln'>1510</a></td><td>      <a id="1510c7" class="tk">rtb_Divide1_oy</a> = (<a id="1510c25" class="tk">int16_T</a>)(<a id="1510c34" class="tk">rtb_Gain_ib</a> <a id="1510c46" class="tk">&gt;&gt;</a> 15);</td></tr>
 <tr name="1511" id="1511">
-<td><a id="l1511" class='ln'>1511</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1511" class='ln'>1511</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1512" id="1512">
-<td><a id="l1512" class='ln'>1512</a></td><td>      <span class="kw">if</span> (<a id="1512c11" class="tk">rtb_Divide1_m</a> <a id="1512c25" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l1512" class='ln'>1512</a></td><td>      <a id="1512c7" class="tk">rtb_Divide1_oy</a> = <a id="1512c24" class="tk">rtU</a>-&gt;<a id="1512c29" class="tk">idq_Target</a>;</td></tr>
 <tr name="1513" id="1513">
-<td><a id="l1513" class='ln'>1513</a></td><td>        <a id="1513c9" class="tk">rtb_Divide1_m</a> = <a id="1513c25" class="tk">-</a>1;</td></tr>
+<td><a id="l1513" class='ln'>1513</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1514" id="1514">
-<td><a id="l1514" class='ln'>1514</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1514" class='ln'>1514</a></td><td></td></tr>
 <tr name="1515" id="1515">
-<td><a id="l1515" class='ln'>1515</a></td><td>        <a id="1515c9" class="tk">rtb_Divide1_m</a> = (<a id="1515c26" class="tk">int16_T</a>)(<a id="1515c35" class="tk">rtb_Divide1_m</a> <a id="1515c49" class="tk">&gt;</a> 0);</td></tr>
+<td><a id="l1515" class='ln'>1515</a></td><td>    <span class="ct">/* End of Switch: '&lt;S51&gt;/Switch' */</span></td></tr>
 <tr name="1516" id="1516">
-<td><a id="l1516" class='ln'>1516</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1516" class='ln'>1516</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1517" id="1517">
 <td><a id="l1517" class='ln'>1517</a></td><td></td></tr>
 <tr name="1518" id="1518">
-<td><a id="l1518" class='ln'>1518</a></td><td>      <span class="ct">/* End of Signum: '&lt;S33&gt;/Sign' */</span></td></tr>
+<td><a id="l1518" class='ln'>1518</a></td><td>  <span class="ct">/* End of Switch: '&lt;S51&gt;/Switch2' */</span></td></tr>
 <tr name="1519" id="1519">
 <td><a id="l1519" class='ln'>1519</a></td><td></td></tr>
 <tr name="1520" id="1520">
-<td><a id="l1520" class='ln'>1520</a></td><td>      <span class="ct">/* Product: '&lt;S33&gt;/Divide' incorporates:</span></td></tr>
+<td><a id="l1520" class='ln'>1520</a></td><td>  <span class="ct">/* Sum: '&lt;S38&gt;/Sum3' incorporates:</span></td></tr>
 <tr name="1521" id="1521">
-<td><a id="l1521" class='ln'>1521</a></td><td><span class="ct">       *  Constant: '&lt;S29&gt;/Constant5'</span></td></tr>
+<td><a id="l1521" class='ln'>1521</a></td><td><span class="ct">   *  UnitDelay: '&lt;S38&gt;/UnitDelay1'</span></td></tr>
 <tr name="1522" id="1522">
-<td><a id="l1522" class='ln'>1522</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1522" class='ln'>1522</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1523" id="1523">
-<td><a id="l1523" class='ln'>1523</a></td><td>      <a id="1523c7" class="tk">rtDW</a>-&gt;<a id="1523c13" class="tk">Divide</a> = (<a id="1523c23" class="tk">int16_T</a>)(<a id="1523c32" class="tk">rtP</a>.<a id="1523c36" class="tk">dz_OpenStepVol</a> <a id="1523c51" class="tk">*</a> <a id="1523c53" class="tk">rtb_Divide1_m</a>);</td></tr>
+<td><a id="l1523" class='ln'>1523</a></td><td>  <a id="1523c3" class="tk">rtb_Merge</a> = <a id="1523c15" class="tk">rtDW</a>-&gt;<a id="1523c21" class="tk">UnitDelay1_DSTATE</a> <a id="1523c39" class="tk">+</a> <span class="ct">/*MW:OvSatOk*/</span> 1U;</td></tr>
 <tr name="1524" id="1524">
-<td><a id="l1524" class='ln'>1524</a></td><td></td></tr>
+<td><a id="l1524" class='ln'>1524</a></td><td>  <span class="kw">if</span> (<a id="1524c7" class="tk">rtDW</a>-&gt;<a id="1524c13" class="tk">UnitDelay1_DSTATE</a> <a id="1524c31" class="tk">+</a> 1U <a id="1524c36" class="tk">&lt;</a> 1U) <span class="br">{</span></td></tr>
 <tr name="1525" id="1525">
-<td><a id="l1525" class='ln'>1525</a></td><td>      <span class="ct">/* MinMax: '&lt;S33&gt;/Max' incorporates:</span></td></tr>
+<td><a id="l1525" class='ln'>1525</a></td><td>    <a id="1525c5" class="tk">rtb_Merge</a> = <a id="1525c17" class="tk">MAX_uint32_T</a>;</td></tr>
 <tr name="1526" id="1526">
-<td><a id="l1526" class='ln'>1526</a></td><td><span class="ct">       *  Switch: '&lt;S24&gt;/Switch3'</span></td></tr>
+<td><a id="l1526" class='ln'>1526</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1527" id="1527">
-<td><a id="l1527" class='ln'>1527</a></td><td><span class="ct">       *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l1527" class='ln'>1527</a></td><td></td></tr>
 <tr name="1528" id="1528">
-<td><a id="l1528" class='ln'>1528</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1528" class='ln'>1528</a></td><td>  <span class="ct">/* If: '&lt;S37&gt;/If' incorporates:</span></td></tr>
 <tr name="1529" id="1529">
-<td><a id="l1529" class='ln'>1529</a></td><td>      <span class="kw">if</span> (<a id="1529c11" class="tk">rtb_Sum6_p</a> <a id="1529c22" class="tk">&gt;</a> <a id="1529c24" class="tk">rtDW</a>-&gt;<a id="1529c30" class="tk">UnitDelay1_DSTATE_f</a>[1]) <span class="br">{</span></td></tr>
+<td><a id="l1529" class='ln'>1529</a></td><td><span class="ct">   *  Constant: '&lt;S34&gt;/Constant2'</span></td></tr>
 <tr name="1530" id="1530">
-<td><a id="l1530" class='ln'>1530</a></td><td>        <span class="ct">/* MinMax: '&lt;S33&gt;/Max' */</span></td></tr>
+<td><a id="l1530" class='ln'>1530</a></td><td><span class="ct">   *  Logic: '&lt;S37&gt;/Logical Operator'</span></td></tr>
 <tr name="1531" id="1531">
-<td><a id="l1531" class='ln'>1531</a></td><td>        <a id="1531c9" class="tk">rtDW</a>-&gt;<a id="1531c15" class="tk">Max_p</a> = <a id="1531c23" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l1531" class='ln'>1531</a></td><td><span class="ct">   *  Math: '&lt;S34&gt;/Rem1'</span></td></tr>
 <tr name="1532" id="1532">
-<td><a id="l1532" class='ln'>1532</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1532" class='ln'>1532</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S34&gt;/Equal1'</span></td></tr>
 <tr name="1533" id="1533">
-<td><a id="l1533" class='ln'>1533</a></td><td>        <span class="ct">/* MinMax: '&lt;S33&gt;/Max' */</span></td></tr>
+<td><a id="l1533" class='ln'>1533</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S37&gt;/Equal'</span></td></tr>
 <tr name="1534" id="1534">
-<td><a id="l1534" class='ln'>1534</a></td><td>        <a id="1534c9" class="tk">rtDW</a>-&gt;<a id="1534c15" class="tk">Max_p</a> = <a id="1534c23" class="tk">rtDW</a>-&gt;<a id="1534c29" class="tk">UnitDelay1_DSTATE_f</a>[1];</td></tr>
+<td><a id="l1534" class='ln'>1534</a></td><td><span class="ct">   *  Sum: '&lt;S38&gt;/Sum3'</span></td></tr>
 <tr name="1535" id="1535">
-<td><a id="l1535" class='ln'>1535</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1535" class='ln'>1535</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1536" id="1536">
-<td><a id="l1536" class='ln'>1536</a></td><td></td></tr>
+<td><a id="l1536" class='ln'>1536</a></td><td>  <span class="kw">if</span> ((<a id="1536c8" class="tk">rtb_dz_cntTrnsDet</a> <a id="1536c26" class="tk">==</a> 0) <a id="1536c32" class="tk">&amp;&amp;</a> (<a id="1536c36" class="tk">rtb_Merge</a> <a id="1536c46" class="tk">%</a> 200U <a id="1536c53" class="tk">==</a> 0U)) <span class="br">{</span></td></tr>
 <tr name="1537" id="1537">
-<td><a id="l1537" class='ln'>1537</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S33&gt;/Max' */</span></td></tr>
+<td><a id="l1537" class='ln'>1537</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S37&gt;/open_mode' incorporates:</span></td></tr>
 <tr name="1538" id="1538">
-<td><a id="l1538" class='ln'>1538</a></td><td></td></tr>
+<td><a id="l1538" class='ln'>1538</a></td><td><span class="ct">     *  ActionPort: '&lt;S111&gt;/Action Port'</span></td></tr>
 <tr name="1539" id="1539">
-<td><a id="l1539" class='ln'>1539</a></td><td>      <span class="ct">/* MinMax: '&lt;S33&gt;/Max1' incorporates:</span></td></tr>
+<td><a id="l1539" class='ln'>1539</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1540" id="1540">
-<td><a id="l1540" class='ln'>1540</a></td><td><span class="ct">       *  Switch: '&lt;S24&gt;/Switch3'</span></td></tr>
+<td><a id="l1540" class='ln'>1540</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S112&gt;/Relational Operator' incorporates:</span></td></tr>
 <tr name="1541" id="1541">
-<td><a id="l1541" class='ln'>1541</a></td><td><span class="ct">       *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l1541" class='ln'>1541</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1542" id="1542">
-<td><a id="l1542" class='ln'>1542</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1542" class='ln'>1542</a></td><td><span class="ct">     *  UnitDelay: '&lt;S112&gt;/UnitDelay'</span></td></tr>
 <tr name="1543" id="1543">
-<td><a id="l1543" class='ln'>1543</a></td><td>      <span class="kw">if</span> (<a id="1543c11" class="tk">rtDW</a>-&gt;<a id="1543c17" class="tk">UnitDelay1_DSTATE_f</a>[1] <a id="1543c40" class="tk">&lt;</a> <a id="1543c42" class="tk">rtb_Sum6_p</a>) <span class="br">{</span></td></tr>
+<td><a id="l1543" class='ln'>1543</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1544" id="1544">
-<td><a id="l1544" class='ln'>1544</a></td><td>        <span class="ct">/* MinMax: '&lt;S33&gt;/Max1' */</span></td></tr>
+<td><a id="l1544" class='ln'>1544</a></td><td>    <a id="1544c5" class="tk">rtb_UnitDelay_c</a> = (<a id="1544c24" class="tk">rtU</a>-&gt;<a id="1544c29" class="tk">vdq_Target</a>[0] <a id="1544c43" class="tk">!=</a> <a id="1544c46" class="tk">rtDW</a>-&gt;<a id="1544c52" class="tk">UnitDelay_DSTATE_lz</a>);</td></tr>
 <tr name="1545" id="1545">
-<td><a id="l1545" class='ln'>1545</a></td><td>        <a id="1545c9" class="tk">rtDW</a>-&gt;<a id="1545c15" class="tk">Max1_g</a> = <a id="1545c24" class="tk">rtDW</a>-&gt;<a id="1545c30" class="tk">UnitDelay1_DSTATE_f</a>[1];</td></tr>
+<td><a id="l1545" class='ln'>1545</a></td><td></td></tr>
 <tr name="1546" id="1546">
-<td><a id="l1546" class='ln'>1546</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1546" class='ln'>1546</a></td><td>    <span class="ct">/* If: '&lt;S113&gt;/If' incorporates:</span></td></tr>
 <tr name="1547" id="1547">
-<td><a id="l1547" class='ln'>1547</a></td><td>        <span class="ct">/* MinMax: '&lt;S33&gt;/Max1' */</span></td></tr>
+<td><a id="l1547" class='ln'>1547</a></td><td><span class="ct">     *  Constant: '&lt;S111&gt;/Constant1'</span></td></tr>
 <tr name="1548" id="1548">
-<td><a id="l1548" class='ln'>1548</a></td><td>        <a id="1548c9" class="tk">rtDW</a>-&gt;<a id="1548c15" class="tk">Max1_g</a> = <a id="1548c24" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l1548" class='ln'>1548</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1549" id="1549">
-<td><a id="l1549" class='ln'>1549</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1549" class='ln'>1549</a></td><td><span class="ct">     *  UnitDelay: '&lt;S4&gt;/Unit Delay'</span></td></tr>
 <tr name="1550" id="1550">
-<td><a id="l1550" class='ln'>1550</a></td><td></td></tr>
+<td><a id="l1550" class='ln'>1550</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1551" id="1551">
-<td><a id="l1551" class='ln'>1551</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S33&gt;/Max1' */</span></td></tr>
+<td><a id="l1551" class='ln'>1551</a></td><td>    <span class="kw">if</span> (<a id="1551c9" class="tk">rtb_UnitDelay_c</a>) <span class="br">{</span></td></tr>
 <tr name="1552" id="1552">
-<td><a id="l1552" class='ln'>1552</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S32&gt;/RateInit' */</span></td></tr>
+<td><a id="l1552" class='ln'>1552</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S113&gt;/RateInit' incorporates:</span></td></tr>
 <tr name="1553" id="1553">
-<td><a id="l1553" class='ln'>1553</a></td><td></td></tr>
+<td><a id="l1553" class='ln'>1553</a></td><td><span class="ct">       *  ActionPort: '&lt;S116&gt;/Action Port'</span></td></tr>
 <tr name="1554" id="1554">
-<td><a id="l1554" class='ln'>1554</a></td><td>      <span class="ct">/* Switch: '&lt;S36&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l1554" class='ln'>1554</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1555" id="1555">
-<td><a id="l1555" class='ln'>1555</a></td><td><span class="ct">       *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l1555" class='ln'>1555</a></td><td>      <a id="1555c7" class="tk">RateInit_a</a>(<a id="1555c18" class="tk">rtDW</a>-&gt;<a id="1555c24" class="tk">UnitDelay_DSTATE_e</a>[0], <a id="1555c47" class="tk">rtU</a>-&gt;<a id="1555c52" class="tk">vdq_Target</a>[0],</td></tr>
 <tr name="1556" id="1556">
-<td><a id="l1556" class='ln'>1556</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1556" class='ln'>1556</a></td><td>                 <a id="1556c18" class="tk">rtP</a>.<a id="1556c22" class="tk">dz_OpenStepVol</a>, <a id="1556c38" class="tk">&amp;</a><a id="1556c39" class="tk">rtDW</a>-&gt;<a id="1556c45" class="tk">Divide_o</a>, <a id="1556c55" class="tk">&amp;</a><a id="1556c56" class="tk">rtDW</a>-&gt;<a id="1556c62" class="tk">Max_l</a>,</td></tr>
 <tr name="1557" id="1557">
-<td><a id="l1557" class='ln'>1557</a></td><td>      <a id="1557c7" class="tk">rtb_r_cos_M1</a> = <a id="1557c22" class="tk">rtDW</a>-&gt;<a id="1557c28" class="tk">UnitDelay1_DSTATE_f</a>[1];</td></tr>
+<td><a id="l1557" class='ln'>1557</a></td><td>                 <a id="1557c18" class="tk">&amp;</a><a id="1557c19" class="tk">rtDW</a>-&gt;<a id="1557c25" class="tk">Max1_j</a>);</td></tr>
 <tr name="1558" id="1558">
-<td><a id="l1558" class='ln'>1558</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1558" class='ln'>1558</a></td><td></td></tr>
 <tr name="1559" id="1559">
-<td><a id="l1559" class='ln'>1559</a></td><td>      <span class="ct">/* Switch: '&lt;S36&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l1559" class='ln'>1559</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S113&gt;/RateInit' */</span></td></tr>
 <tr name="1560" id="1560">
-<td><a id="l1560" class='ln'>1560</a></td><td><span class="ct">       *  UnitDelay: '&lt;S36&gt;/UnitDelay'</span></td></tr>
+<td><a id="l1560" class='ln'>1560</a></td><td></td></tr>
 <tr name="1561" id="1561">
-<td><a id="l1561" class='ln'>1561</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1561" class='ln'>1561</a></td><td>      <span class="ct">/* Switch: '&lt;S119&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="1562" id="1562">
-<td><a id="l1562" class='ln'>1562</a></td><td>      <a id="1562c7" class="tk">rtb_r_cos_M1</a> = <a id="1562c22" class="tk">rtDW</a>-&gt;<a id="1562c28" class="tk">UnitDelay_DSTATE_fv</a>;</td></tr>
+<td><a id="l1562" class='ln'>1562</a></td><td><span class="ct">       *  Constant: '&lt;S111&gt;/Constant1'</span></td></tr>
 <tr name="1563" id="1563">
-<td><a id="l1563" class='ln'>1563</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1563" class='ln'>1563</a></td><td><span class="ct">       *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1564" id="1564">
-<td><a id="l1564" class='ln'>1564</a></td><td></td></tr>
+<td><a id="l1564" class='ln'>1564</a></td><td><span class="ct">       *  UnitDelay: '&lt;S4&gt;/Unit Delay'</span></td></tr>
 <tr name="1565" id="1565">
-<td><a id="l1565" class='ln'>1565</a></td><td>    <span class="ct">/* End of If: '&lt;S32&gt;/If' */</span></td></tr>
+<td><a id="l1565" class='ln'>1565</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1566" id="1566">
-<td><a id="l1566" class='ln'>1566</a></td><td></td></tr>
+<td><a id="l1566" class='ln'>1566</a></td><td>      <a id="1566c7" class="tk">rtb_Sum6</a> = <a id="1566c18" class="tk">rtDW</a>-&gt;<a id="1566c24" class="tk">UnitDelay_DSTATE_e</a>[0];</td></tr>
 <tr name="1567" id="1567">
-<td><a id="l1567" class='ln'>1567</a></td><td>    <span class="ct">/* Switch: '&lt;S32&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l1567" class='ln'>1567</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1568" id="1568">
-<td><a id="l1568" class='ln'>1568</a></td><td><span class="ct">     *  Constant: '&lt;S32&gt;/Constant'</span></td></tr>
+<td><a id="l1568" class='ln'>1568</a></td><td>      <span class="ct">/* Switch: '&lt;S119&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="1569" id="1569">
-<td><a id="l1569" class='ln'>1569</a></td><td><span class="ct">     *  Product: '&lt;S33&gt;/Divide'</span></td></tr>
+<td><a id="l1569" class='ln'>1569</a></td><td><span class="ct">       *  UnitDelay: '&lt;S119&gt;/UnitDelay'</span></td></tr>
 <tr name="1570" id="1570">
-<td><a id="l1570" class='ln'>1570</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S32&gt;/Equal'</span></td></tr>
+<td><a id="l1570" class='ln'>1570</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1571" id="1571">
-<td><a id="l1571" class='ln'>1571</a></td><td><span class="ct">     *  Switch: '&lt;S24&gt;/Switch3'</span></td></tr>
+<td><a id="l1571" class='ln'>1571</a></td><td>      <a id="1571c7" class="tk">rtb_Sum6</a> = <a id="1571c18" class="tk">rtDW</a>-&gt;<a id="1571c24" class="tk">UnitDelay_DSTATE_j</a>;</td></tr>
 <tr name="1572" id="1572">
-<td><a id="l1572" class='ln'>1572</a></td><td><span class="ct">     *  UnitDelay: '&lt;S32&gt;/Unit Delay'</span></td></tr>
+<td><a id="l1572" class='ln'>1572</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1573" id="1573">
-<td><a id="l1573" class='ln'>1573</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1573" class='ln'>1573</a></td><td></td></tr>
 <tr name="1574" id="1574">
-<td><a id="l1574" class='ln'>1574</a></td><td>    <span class="kw">if</span> (<a id="1574c9" class="tk">rtb_Sum6_p</a> <a id="1574c20" class="tk">!=</a> <a id="1574c23" class="tk">rtDW</a>-&gt;<a id="1574c29" class="tk">UnitDelay_DSTATE_i</a>) <span class="br">{</span></td></tr>
+<td><a id="l1574" class='ln'>1574</a></td><td>    <span class="ct">/* End of If: '&lt;S113&gt;/If' */</span></td></tr>
 <tr name="1575" id="1575">
-<td><a id="l1575" class='ln'>1575</a></td><td>      <a id="1575c7" class="tk">rtb_Divide1_m</a> = <a id="1575c23" class="tk">rtDW</a>-&gt;<a id="1575c29" class="tk">Divide</a>;</td></tr>
+<td><a id="l1575" class='ln'>1575</a></td><td></td></tr>
 <tr name="1576" id="1576">
-<td><a id="l1576" class='ln'>1576</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1576" class='ln'>1576</a></td><td>    <span class="ct">/* Switch: '&lt;S113&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1577" id="1577">
-<td><a id="l1577" class='ln'>1577</a></td><td>      <a id="1577c7" class="tk">rtb_Divide1_m</a> = 0;</td></tr>
+<td><a id="l1577" class='ln'>1577</a></td><td><span class="ct">     *  Constant: '&lt;S113&gt;/Constant'</span></td></tr>
 <tr name="1578" id="1578">
-<td><a id="l1578" class='ln'>1578</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1578" class='ln'>1578</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1579" id="1579">
-<td><a id="l1579" class='ln'>1579</a></td><td></td></tr>
+<td><a id="l1579" class='ln'>1579</a></td><td><span class="ct">     *  Product: '&lt;S116&gt;/Divide'</span></td></tr>
 <tr name="1580" id="1580">
-<td><a id="l1580" class='ln'>1580</a></td><td>    <span class="ct">/* End of Switch: '&lt;S32&gt;/Switch' */</span></td></tr>
+<td><a id="l1580" class='ln'>1580</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S113&gt;/Equal'</span></td></tr>
 <tr name="1581" id="1581">
-<td><a id="l1581" class='ln'>1581</a></td><td></td></tr>
+<td><a id="l1581" class='ln'>1581</a></td><td><span class="ct">     *  UnitDelay: '&lt;S113&gt;/Unit Delay'</span></td></tr>
 <tr name="1582" id="1582">
-<td><a id="l1582" class='ln'>1582</a></td><td>    <span class="ct">/* Sum: '&lt;S35&gt;/Add2' */</span></td></tr>
+<td><a id="l1582" class='ln'>1582</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1583" id="1583">
-<td><a id="l1583" class='ln'>1583</a></td><td>    <a id="1583c5" class="tk">rtb_Divide_idx_0</a> = ((<a id="1583c26" class="tk">rtb_r_cos_M1</a> <a id="1583c39" class="tk">&lt;&lt;</a> 2) <a id="1583c45" class="tk">+</a> <a id="1583c47" class="tk">rtb_Divide1_m</a>) <a id="1583c62" class="tk">&gt;&gt;</a> 2;</td></tr>
+<td><a id="l1583" class='ln'>1583</a></td><td>    <span class="kw">if</span> (<a id="1583c9" class="tk">rtU</a>-&gt;<a id="1583c14" class="tk">vdq_Target</a>[0] <a id="1583c28" class="tk">!=</a> <a id="1583c31" class="tk">rtDW</a>-&gt;<a id="1583c37" class="tk">UnitDelay_DSTATE_h</a>) <span class="br">{</span></td></tr>
 <tr name="1584" id="1584">
-<td><a id="l1584" class='ln'>1584</a></td><td>    <span class="kw">if</span> (<a id="1584c9" class="tk">rtb_Divide_idx_0</a> <a id="1584c26" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l1584" class='ln'>1584</a></td><td>      <a id="1584c7" class="tk">rtb_Switch2_pl</a> = <a id="1584c24" class="tk">rtDW</a>-&gt;<a id="1584c30" class="tk">Divide_o</a>;</td></tr>
 <tr name="1585" id="1585">
-<td><a id="l1585" class='ln'>1585</a></td><td>      <a id="1585c7" class="tk">rtb_Divide_idx_0</a> = 32767;</td></tr>
+<td><a id="l1585" class='ln'>1585</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1586" id="1586">
-<td><a id="l1586" class='ln'>1586</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1586" class='ln'>1586</a></td><td>      <a id="1586c7" class="tk">rtb_Switch2_pl</a> = 0;</td></tr>
 <tr name="1587" id="1587">
-<td><a id="l1587" class='ln'>1587</a></td><td>      <span class="kw">if</span> (<a id="1587c11" class="tk">rtb_Divide_idx_0</a> <a id="1587c28" class="tk">&lt;</a> <a id="1587c30" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l1587" class='ln'>1587</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1588" id="1588">
-<td><a id="l1588" class='ln'>1588</a></td><td>        <a id="1588c9" class="tk">rtb_Divide_idx_0</a> = <a id="1588c28" class="tk">-</a>32768;</td></tr>
+<td><a id="l1588" class='ln'>1588</a></td><td></td></tr>
 <tr name="1589" id="1589">
-<td><a id="l1589" class='ln'>1589</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1589" class='ln'>1589</a></td><td>    <span class="ct">/* End of Switch: '&lt;S113&gt;/Switch' */</span></td></tr>
 <tr name="1590" id="1590">
-<td><a id="l1590" class='ln'>1590</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1590" class='ln'>1590</a></td><td></td></tr>
 <tr name="1591" id="1591">
-<td><a id="l1591" class='ln'>1591</a></td><td></td></tr>
+<td><a id="l1591" class='ln'>1591</a></td><td>    <span class="ct">/* Sum: '&lt;S118&gt;/Add2' */</span></td></tr>
 <tr name="1592" id="1592">
-<td><a id="l1592" class='ln'>1592</a></td><td>    <span class="ct">/* Switch: '&lt;S34&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l1592" class='ln'>1592</a></td><td>    <a id="1592c5" class="tk">rtb_RelationalOperator4_b</a> = ((<a id="1592c35" class="tk">rtb_Sum6</a> <a id="1592c44" class="tk">&lt;&lt;</a> 2) <a id="1592c50" class="tk">+</a> <a id="1592c52" class="tk">rtb_Switch2_pl</a>) <a id="1592c68" class="tk">&gt;&gt;</a> 2;</td></tr>
 <tr name="1593" id="1593">
-<td><a id="l1593" class='ln'>1593</a></td><td><span class="ct">     *  MinMax: '&lt;S33&gt;/Max'</span></td></tr>
+<td><a id="l1593" class='ln'>1593</a></td><td>    <span class="kw">if</span> (<a id="1593c9" class="tk">rtb_RelationalOperator4_b</a> <a id="1593c35" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="1594" id="1594">
-<td><a id="l1594" class='ln'>1594</a></td><td><span class="ct">     *  MinMax: '&lt;S33&gt;/Max1'</span></td></tr>
+<td><a id="l1594" class='ln'>1594</a></td><td>      <a id="1594c7" class="tk">rtb_RelationalOperator4_b</a> = 32767;</td></tr>
 <tr name="1595" id="1595">
-<td><a id="l1595" class='ln'>1595</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S34&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l1595" class='ln'>1595</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1596" id="1596">
-<td><a id="l1596" class='ln'>1596</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S34&gt;/UpperRelop'</span></td></tr>
+<td><a id="l1596" class='ln'>1596</a></td><td>      <span class="kw">if</span> (<a id="1596c11" class="tk">rtb_RelationalOperator4_b</a> <a id="1596c37" class="tk">&lt;</a> <a id="1596c39" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="1597" id="1597">
-<td><a id="l1597" class='ln'>1597</a></td><td><span class="ct">     *  Sum: '&lt;S35&gt;/Add2'</span></td></tr>
+<td><a id="l1597" class='ln'>1597</a></td><td>        <a id="1597c9" class="tk">rtb_RelationalOperator4_b</a> = <a id="1597c37" class="tk">-</a>32768;</td></tr>
 <tr name="1598" id="1598">
-<td><a id="l1598" class='ln'>1598</a></td><td><span class="ct">     *  Switch: '&lt;S34&gt;/Switch'</span></td></tr>
+<td><a id="l1598" class='ln'>1598</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1599" id="1599">
-<td><a id="l1599" class='ln'>1599</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1599" class='ln'>1599</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1600" id="1600">
-<td><a id="l1600" class='ln'>1600</a></td><td>    <span class="kw">if</span> ((<a id="1600c10" class="tk">int16_T</a>)<a id="1600c18" class="tk">rtb_Divide_idx_0</a> <a id="1600c35" class="tk">&gt;</a> <a id="1600c37" class="tk">rtDW</a>-&gt;<a id="1600c43" class="tk">Max_p</a>) <span class="br">{</span></td></tr>
+<td><a id="l1600" class='ln'>1600</a></td><td></td></tr>
 <tr name="1601" id="1601">
-<td><a id="l1601" class='ln'>1601</a></td><td>      <a id="1601c7" class="tk">rtb_r_cos_M1</a> = <a id="1601c22" class="tk">rtDW</a>-&gt;<a id="1601c28" class="tk">Max_p</a>;</td></tr>
+<td><a id="l1601" class='ln'>1601</a></td><td>    <span class="ct">/* Switch: '&lt;S117&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1602" id="1602">
-<td><a id="l1602" class='ln'>1602</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="1602c17" class="tk">int16_T</a>)<a id="1602c25" class="tk">rtb_Divide_idx_0</a> <a id="1602c42" class="tk">&lt;</a> <a id="1602c44" class="tk">rtDW</a>-&gt;<a id="1602c50" class="tk">Max1_g</a>) <span class="br">{</span></td></tr>
+<td><a id="l1602" class='ln'>1602</a></td><td><span class="ct">     *  MinMax: '&lt;S116&gt;/Max'</span></td></tr>
 <tr name="1603" id="1603">
-<td><a id="l1603" class='ln'>1603</a></td><td>      <span class="ct">/* Switch: '&lt;S34&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l1603" class='ln'>1603</a></td><td><span class="ct">     *  MinMax: '&lt;S116&gt;/Max1'</span></td></tr>
 <tr name="1604" id="1604">
-<td><a id="l1604" class='ln'>1604</a></td><td><span class="ct">       *  MinMax: '&lt;S33&gt;/Max1'</span></td></tr>
+<td><a id="l1604" class='ln'>1604</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S117&gt;/LowerRelop1'</span></td></tr>
 <tr name="1605" id="1605">
-<td><a id="l1605" class='ln'>1605</a></td><td><span class="ct">       *  Switch: '&lt;S34&gt;/Switch2'</span></td></tr>
+<td><a id="l1605" class='ln'>1605</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S117&gt;/UpperRelop'</span></td></tr>
 <tr name="1606" id="1606">
-<td><a id="l1606" class='ln'>1606</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1606" class='ln'>1606</a></td><td><span class="ct">     *  Sum: '&lt;S118&gt;/Add2'</span></td></tr>
 <tr name="1607" id="1607">
-<td><a id="l1607" class='ln'>1607</a></td><td>      <a id="1607c7" class="tk">rtb_r_cos_M1</a> = <a id="1607c22" class="tk">rtDW</a>-&gt;<a id="1607c28" class="tk">Max1_g</a>;</td></tr>
+<td><a id="l1607" class='ln'>1607</a></td><td><span class="ct">     *  Switch: '&lt;S117&gt;/Switch'</span></td></tr>
 <tr name="1608" id="1608">
-<td><a id="l1608" class='ln'>1608</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1608" class='ln'>1608</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1609" id="1609">
-<td><a id="l1609" class='ln'>1609</a></td><td>      <a id="1609c7" class="tk">rtb_r_cos_M1</a> = (<a id="1609c23" class="tk">int16_T</a>)<a id="1609c31" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l1609" class='ln'>1609</a></td><td>    <span class="kw">if</span> ((<a id="1609c10" class="tk">int16_T</a>)<a id="1609c18" class="tk">rtb_RelationalOperator4_b</a> <a id="1609c44" class="tk">&gt;</a> <a id="1609c46" class="tk">rtDW</a>-&gt;<a id="1609c52" class="tk">Max_l</a>) <span class="br">{</span></td></tr>
 <tr name="1610" id="1610">
-<td><a id="l1610" class='ln'>1610</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1610" class='ln'>1610</a></td><td>      <a id="1610c7" class="tk">rtb_Add2_lk</a> = <a id="1610c21" class="tk">rtDW</a>-&gt;<a id="1610c27" class="tk">Max_l</a>;</td></tr>
 <tr name="1611" id="1611">
-<td><a id="l1611" class='ln'>1611</a></td><td></td></tr>
+<td><a id="l1611" class='ln'>1611</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="1611c17" class="tk">int16_T</a>)<a id="1611c25" class="tk">rtb_RelationalOperator4_b</a> <a id="1611c51" class="tk">&lt;</a> <a id="1611c53" class="tk">rtDW</a>-&gt;<a id="1611c59" class="tk">Max1_j</a>) <span class="br">{</span></td></tr>
 <tr name="1612" id="1612">
-<td><a id="l1612" class='ln'>1612</a></td><td>    <span class="ct">/* End of Switch: '&lt;S34&gt;/Switch2' */</span></td></tr>
+<td><a id="l1612" class='ln'>1612</a></td><td>      <span class="ct">/* Switch: '&lt;S117&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1613" id="1613">
-<td><a id="l1613" class='ln'>1613</a></td><td></td></tr>
+<td><a id="l1613" class='ln'>1613</a></td><td><span class="ct">       *  MinMax: '&lt;S116&gt;/Max1'</span></td></tr>
 <tr name="1614" id="1614">
-<td><a id="l1614" class='ln'>1614</a></td><td>    <span class="ct">/* Merge: '&lt;S26&gt;/Merge' incorporates:</span></td></tr>
+<td><a id="l1614" class='ln'>1614</a></td><td><span class="ct">       *  Switch: '&lt;S117&gt;/Switch2'</span></td></tr>
 <tr name="1615" id="1615">
-<td><a id="l1615" class='ln'>1615</a></td><td><span class="ct">     *  Constant: '&lt;S29&gt;/Constant3'</span></td></tr>
+<td><a id="l1615" class='ln'>1615</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1616" id="1616">
-<td><a id="l1616" class='ln'>1616</a></td><td><span class="ct">     *  SignalConversion generated from: '&lt;S29&gt;/open_voltage'</span></td></tr>
+<td><a id="l1616" class='ln'>1616</a></td><td>      <a id="1616c7" class="tk">rtb_Add2_lk</a> = <a id="1616c21" class="tk">rtDW</a>-&gt;<a id="1616c27" class="tk">Max1_j</a>;</td></tr>
 <tr name="1617" id="1617">
-<td><a id="l1617" class='ln'>1617</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1617" class='ln'>1617</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1618" id="1618">
-<td><a id="l1618" class='ln'>1618</a></td><td>    <a id="1618c5" class="tk">rtDW</a>-&gt;<a id="1618c11" class="tk">Merge</a>[0] = 0;</td></tr>
+<td><a id="l1618" class='ln'>1618</a></td><td>      <a id="1618c7" class="tk">rtb_Add2_lk</a> = (<a id="1618c22" class="tk">int16_T</a>)<a id="1618c30" class="tk">rtb_RelationalOperator4_b</a>;</td></tr>
 <tr name="1619" id="1619">
-<td><a id="l1619" class='ln'>1619</a></td><td></td></tr>
+<td><a id="l1619" class='ln'>1619</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1620" id="1620">
-<td><a id="l1620" class='ln'>1620</a></td><td>    <span class="ct">/* Switch: '&lt;S29&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l1620" class='ln'>1620</a></td><td></td></tr>
 <tr name="1621" id="1621">
-<td><a id="l1621" class='ln'>1621</a></td><td><span class="ct">     *  Switch: '&lt;S24&gt;/Switch'</span></td></tr>
+<td><a id="l1621" class='ln'>1621</a></td><td>    <span class="ct">/* End of Switch: '&lt;S117&gt;/Switch2' */</span></td></tr>
 <tr name="1622" id="1622">
-<td><a id="l1622" class='ln'>1622</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1622" class='ln'>1622</a></td><td></td></tr>
 <tr name="1623" id="1623">
-<td><a id="l1623" class='ln'>1623</a></td><td>    <span class="kw">if</span> (<a id="1623c9" class="tk">rtb_Switch_np</a> <a id="1623c23" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l1623" class='ln'>1623</a></td><td>    <span class="ct">/* RelationalOperator: '&lt;S114&gt;/Relational Operator' incorporates:</span></td></tr>
 <tr name="1624" id="1624">
-<td><a id="l1624" class='ln'>1624</a></td><td>      <span class="ct">/* Merge: '&lt;S26&gt;/Merge' incorporates:</span></td></tr>
+<td><a id="l1624" class='ln'>1624</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1625" id="1625">
-<td><a id="l1625" class='ln'>1625</a></td><td><span class="ct">       *  SignalConversion generated from: '&lt;S29&gt;/open_voltage'</span></td></tr>
+<td><a id="l1625" class='ln'>1625</a></td><td><span class="ct">     *  UnitDelay: '&lt;S114&gt;/UnitDelay'</span></td></tr>
 <tr name="1626" id="1626">
-<td><a id="l1626" class='ln'>1626</a></td><td><span class="ct">       *  Switch: '&lt;S34&gt;/Switch2'</span></td></tr>
+<td><a id="l1626" class='ln'>1626</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1627" id="1627">
-<td><a id="l1627" class='ln'>1627</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1627" class='ln'>1627</a></td><td>    <a id="1627c5" class="tk">rtb_LogicalOperator4_f</a> = (<a id="1627c31" class="tk">rtU</a>-&gt;<a id="1627c36" class="tk">vdq_Target</a>[1] <a id="1627c50" class="tk">!=</a> <a id="1627c53" class="tk">rtDW</a>-&gt;<a id="1627c59" class="tk">UnitDelay_DSTATE_n</a>);</td></tr>
 <tr name="1628" id="1628">
-<td><a id="l1628" class='ln'>1628</a></td><td>      <a id="1628c7" class="tk">rtDW</a>-&gt;<a id="1628c13" class="tk">Merge</a>[1] = <a id="1628c24" class="tk">rtb_r_cos_M1</a>;</td></tr>
+<td><a id="l1628" class='ln'>1628</a></td><td></td></tr>
 <tr name="1629" id="1629">
-<td><a id="l1629" class='ln'>1629</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1629" class='ln'>1629</a></td><td>    <span class="ct">/* If: '&lt;S115&gt;/If' incorporates:</span></td></tr>
 <tr name="1630" id="1630">
-<td><a id="l1630" class='ln'>1630</a></td><td>      <span class="ct">/* Merge: '&lt;S26&gt;/Merge' incorporates:</span></td></tr>
+<td><a id="l1630" class='ln'>1630</a></td><td><span class="ct">     *  Constant: '&lt;S111&gt;/Constant5'</span></td></tr>
 <tr name="1631" id="1631">
-<td><a id="l1631" class='ln'>1631</a></td><td><span class="ct">       *  Constant: '&lt;S29&gt;/Constant1'</span></td></tr>
+<td><a id="l1631" class='ln'>1631</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1632" id="1632">
-<td><a id="l1632" class='ln'>1632</a></td><td><span class="ct">       *  SignalConversion generated from: '&lt;S29&gt;/open_voltage'</span></td></tr>
+<td><a id="l1632" class='ln'>1632</a></td><td><span class="ct">     *  UnitDelay: '&lt;S4&gt;/Unit Delay'</span></td></tr>
 <tr name="1633" id="1633">
-<td><a id="l1633" class='ln'>1633</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1633" class='ln'>1633</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1634" id="1634">
-<td><a id="l1634" class='ln'>1634</a></td><td>      <a id="1634c7" class="tk">rtDW</a>-&gt;<a id="1634c13" class="tk">Merge</a>[1] = 0;</td></tr>
+<td><a id="l1634" class='ln'>1634</a></td><td>    <span class="kw">if</span> (<a id="1634c9" class="tk">rtb_LogicalOperator4_f</a>) <span class="br">{</span></td></tr>
 <tr name="1635" id="1635">
-<td><a id="l1635" class='ln'>1635</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1635" class='ln'>1635</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S115&gt;/RateInit' incorporates:</span></td></tr>
 <tr name="1636" id="1636">
-<td><a id="l1636" class='ln'>1636</a></td><td></td></tr>
+<td><a id="l1636" class='ln'>1636</a></td><td><span class="ct">       *  ActionPort: '&lt;S120&gt;/Action Port'</span></td></tr>
 <tr name="1637" id="1637">
-<td><a id="l1637" class='ln'>1637</a></td><td>    <span class="ct">/* End of Switch: '&lt;S29&gt;/Switch' */</span></td></tr>
+<td><a id="l1637" class='ln'>1637</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1638" id="1638">
-<td><a id="l1638" class='ln'>1638</a></td><td></td></tr>
+<td><a id="l1638" class='ln'>1638</a></td><td>      <a id="1638c7" class="tk">RateInit_a</a>(<a id="1638c18" class="tk">rtDW</a>-&gt;<a id="1638c24" class="tk">UnitDelay_DSTATE_e</a>[1], <a id="1638c47" class="tk">rtU</a>-&gt;<a id="1638c52" class="tk">vdq_Target</a>[1],</td></tr>
 <tr name="1639" id="1639">
-<td><a id="l1639" class='ln'>1639</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S31&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l1639" class='ln'>1639</a></td><td>                 <a id="1639c18" class="tk">rtP</a>.<a id="1639c22" class="tk">dz_OpenStepVol</a>, <a id="1639c38" class="tk">&amp;</a><a id="1639c39" class="tk">rtDW</a>-&gt;<a id="1639c45" class="tk">Divide</a>, <a id="1639c53" class="tk">&amp;</a><a id="1639c54" class="tk">rtDW</a>-&gt;<a id="1639c60" class="tk">Max</a>, <a id="1639c65" class="tk">&amp;</a><a id="1639c66" class="tk">rtDW</a>-&gt;<a id="1639c72" class="tk">Max1</a>);</td></tr>
 <tr name="1640" id="1640">
-<td><a id="l1640" class='ln'>1640</a></td><td><span class="ct">     *  Switch: '&lt;S24&gt;/Switch3'</span></td></tr>
+<td><a id="l1640" class='ln'>1640</a></td><td></td></tr>
 <tr name="1641" id="1641">
-<td><a id="l1641" class='ln'>1641</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1641" class='ln'>1641</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S115&gt;/RateInit' */</span></td></tr>
 <tr name="1642" id="1642">
-<td><a id="l1642" class='ln'>1642</a></td><td>    <a id="1642c5" class="tk">rtDW</a>-&gt;<a id="1642c11" class="tk">UnitDelay_DSTATE_e</a> = <a id="1642c32" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l1642" class='ln'>1642</a></td><td></td></tr>
 <tr name="1643" id="1643">
-<td><a id="l1643" class='ln'>1643</a></td><td></td></tr>
+<td><a id="l1643" class='ln'>1643</a></td><td>      <span class="ct">/* Switch: '&lt;S123&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="1644" id="1644">
-<td><a id="l1644" class='ln'>1644</a></td><td>    <span class="ct">/* Switch: '&lt;S36&gt;/Switch2' */</span></td></tr>
+<td><a id="l1644" class='ln'>1644</a></td><td><span class="ct">       *  Constant: '&lt;S111&gt;/Constant5'</span></td></tr>
 <tr name="1645" id="1645">
-<td><a id="l1645" class='ln'>1645</a></td><td>    <span class="kw">if</span> (<a id="1645c9" class="tk">rtb_LogicalOperator12</a>) <span class="br">{</span></td></tr>
+<td><a id="l1645" class='ln'>1645</a></td><td><span class="ct">       *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1646" id="1646">
-<td><a id="l1646" class='ln'>1646</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S36&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l1646" class='ln'>1646</a></td><td><span class="ct">       *  UnitDelay: '&lt;S4&gt;/Unit Delay'</span></td></tr>
 <tr name="1647" id="1647">
-<td><a id="l1647" class='ln'>1647</a></td><td><span class="ct">       *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l1647" class='ln'>1647</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1648" id="1648">
-<td><a id="l1648" class='ln'>1648</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1648" class='ln'>1648</a></td><td>      <a id="1648c7" class="tk">rtb_Sum6</a> = <a id="1648c18" class="tk">rtDW</a>-&gt;<a id="1648c24" class="tk">UnitDelay_DSTATE_e</a>[1];</td></tr>
 <tr name="1649" id="1649">
-<td><a id="l1649" class='ln'>1649</a></td><td>      <a id="1649c7" class="tk">rtDW</a>-&gt;<a id="1649c13" class="tk">UnitDelay_DSTATE_fv</a> = <a id="1649c35" class="tk">rtDW</a>-&gt;<a id="1649c41" class="tk">UnitDelay1_DSTATE_f</a>[1];</td></tr>
+<td><a id="l1649" class='ln'>1649</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1650" id="1650">
-<td><a id="l1650" class='ln'>1650</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1650" class='ln'>1650</a></td><td>      <span class="ct">/* Switch: '&lt;S123&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="1651" id="1651">
-<td><a id="l1651" class='ln'>1651</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S36&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l1651" class='ln'>1651</a></td><td><span class="ct">       *  UnitDelay: '&lt;S123&gt;/UnitDelay'</span></td></tr>
 <tr name="1652" id="1652">
-<td><a id="l1652" class='ln'>1652</a></td><td><span class="ct">       *  Sum: '&lt;S35&gt;/Add2'</span></td></tr>
+<td><a id="l1652" class='ln'>1652</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1653" id="1653">
-<td><a id="l1653" class='ln'>1653</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1653" class='ln'>1653</a></td><td>      <a id="1653c7" class="tk">rtb_Sum6</a> = <a id="1653c18" class="tk">rtDW</a>-&gt;<a id="1653c24" class="tk">UnitDelay_DSTATE_ox</a>;</td></tr>
 <tr name="1654" id="1654">
-<td><a id="l1654" class='ln'>1654</a></td><td>      <a id="1654c7" class="tk">rtDW</a>-&gt;<a id="1654c13" class="tk">UnitDelay_DSTATE_fv</a> = (<a id="1654c36" class="tk">int16_T</a>)<a id="1654c44" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l1654" class='ln'>1654</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1655" id="1655">
-<td><a id="l1655" class='ln'>1655</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1655" class='ln'>1655</a></td><td></td></tr>
 <tr name="1656" id="1656">
-<td><a id="l1656" class='ln'>1656</a></td><td></td></tr>
+<td><a id="l1656" class='ln'>1656</a></td><td>    <span class="ct">/* End of If: '&lt;S115&gt;/If' */</span></td></tr>
 <tr name="1657" id="1657">
-<td><a id="l1657" class='ln'>1657</a></td><td>    <span class="ct">/* End of Switch: '&lt;S36&gt;/Switch2' */</span></td></tr>
+<td><a id="l1657" class='ln'>1657</a></td><td></td></tr>
 <tr name="1658" id="1658">
-<td><a id="l1658" class='ln'>1658</a></td><td></td></tr>
+<td><a id="l1658" class='ln'>1658</a></td><td>    <span class="ct">/* Switch: '&lt;S115&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1659" id="1659">
-<td><a id="l1659" class='ln'>1659</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S32&gt;/Unit Delay' incorporates:</span></td></tr>
+<td><a id="l1659" class='ln'>1659</a></td><td><span class="ct">     *  Constant: '&lt;S115&gt;/Constant'</span></td></tr>
 <tr name="1660" id="1660">
-<td><a id="l1660" class='ln'>1660</a></td><td><span class="ct">     *  Switch: '&lt;S34&gt;/Switch2'</span></td></tr>
+<td><a id="l1660" class='ln'>1660</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1661" id="1661">
-<td><a id="l1661" class='ln'>1661</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1661" class='ln'>1661</a></td><td><span class="ct">     *  Product: '&lt;S120&gt;/Divide'</span></td></tr>
 <tr name="1662" id="1662">
-<td><a id="l1662" class='ln'>1662</a></td><td>    <a id="1662c5" class="tk">rtDW</a>-&gt;<a id="1662c11" class="tk">UnitDelay_DSTATE_i</a> = <a id="1662c32" class="tk">rtb_r_cos_M1</a>;</td></tr>
+<td><a id="l1662" class='ln'>1662</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S115&gt;/Equal'</span></td></tr>
 <tr name="1663" id="1663">
-<td><a id="l1663" class='ln'>1663</a></td><td></td></tr>
+<td><a id="l1663" class='ln'>1663</a></td><td><span class="ct">     *  UnitDelay: '&lt;S115&gt;/Unit Delay'</span></td></tr>
 <tr name="1664" id="1664">
-<td><a id="l1664" class='ln'>1664</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S26&gt;/open_mode' */</span></td></tr>
+<td><a id="l1664" class='ln'>1664</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1665" id="1665">
-<td><a id="l1665" class='ln'>1665</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="1665c14" class="tk">rtb_z_ctrlMod</a> <a id="1665c28" class="tk">==</a> 2) <span class="br">{</span></td></tr>
+<td><a id="l1665" class='ln'>1665</a></td><td>    <span class="kw">if</span> (<a id="1665c9" class="tk">rtU</a>-&gt;<a id="1665c14" class="tk">vdq_Target</a>[1] <a id="1665c28" class="tk">!=</a> <a id="1665c31" class="tk">rtDW</a>-&gt;<a id="1665c37" class="tk">UnitDelay_DSTATE_gt</a>) <span class="br">{</span></td></tr>
 <tr name="1666" id="1666">
-<td><a id="l1666" class='ln'>1666</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S26&gt;/torque_mode' incorporates:</span></td></tr>
+<td><a id="l1666" class='ln'>1666</a></td><td>      <a id="1666c7" class="tk">rtb_Switch2_pl</a> = <a id="1666c24" class="tk">rtDW</a>-&gt;<a id="1666c30" class="tk">Divide</a>;</td></tr>
 <tr name="1667" id="1667">
-<td><a id="l1667" class='ln'>1667</a></td><td><span class="ct">     *  ActionPort: '&lt;S30&gt;/Action Port'</span></td></tr>
+<td><a id="l1667" class='ln'>1667</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1668" id="1668">
-<td><a id="l1668" class='ln'>1668</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1668" class='ln'>1668</a></td><td>      <a id="1668c7" class="tk">rtb_Switch2_pl</a> = 0;</td></tr>
 <tr name="1669" id="1669">
-<td><a id="l1669" class='ln'>1669</a></td><td>    <a id="1669c5" class="tk">rtDW</a>-&gt;<a id="1669c11" class="tk">r_currTgt</a> = <a id="1669c23" class="tk">rtU</a>-&gt;<a id="1669c28" class="tk">idq_Target</a>;</td></tr>
+<td><a id="l1669" class='ln'>1669</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1670" id="1670">
 <td><a id="l1670" class='ln'>1670</a></td><td></td></tr>
 <tr name="1671" id="1671">
-<td><a id="l1671" class='ln'>1671</a></td><td>    <span class="ct">/* Merge: '&lt;S26&gt;/Merge1' incorporates:</span></td></tr>
+<td><a id="l1671" class='ln'>1671</a></td><td>    <span class="ct">/* End of Switch: '&lt;S115&gt;/Switch' */</span></td></tr>
 <tr name="1672" id="1672">
-<td><a id="l1672" class='ln'>1672</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/idq_Target'</span></td></tr>
+<td><a id="l1672" class='ln'>1672</a></td><td></td></tr>
 <tr name="1673" id="1673">
-<td><a id="l1673" class='ln'>1673</a></td><td><span class="ct">     *  Inport: '&lt;S30&gt;/r_currTgt'</span></td></tr>
+<td><a id="l1673" class='ln'>1673</a></td><td>    <span class="ct">/* Sum: '&lt;S122&gt;/Add2' */</span></td></tr>
 <tr name="1674" id="1674">
-<td><a id="l1674" class='ln'>1674</a></td><td><span class="ct">     *  Inport: '&lt;S30&gt;/r_spdTgt'</span></td></tr>
+<td><a id="l1674" class='ln'>1674</a></td><td>    <a id="1674c5" class="tk">rtb_Divide_e_idx_1</a> = ((<a id="1674c28" class="tk">rtb_Sum6</a> <a id="1674c37" class="tk">&lt;&lt;</a> 2) <a id="1674c43" class="tk">+</a> <a id="1674c45" class="tk">rtb_Switch2_pl</a>) <a id="1674c61" class="tk">&gt;&gt;</a> 2;</td></tr>
 <tr name="1675" id="1675">
-<td><a id="l1675" class='ln'>1675</a></td><td><span class="ct">     *  Switch: '&lt;S24&gt;/Switch'</span></td></tr>
+<td><a id="l1675" class='ln'>1675</a></td><td>    <span class="kw">if</span> (<a id="1675c9" class="tk">rtb_Divide_e_idx_1</a> <a id="1675c28" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="1676" id="1676">
-<td><a id="l1676" class='ln'>1676</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1676" class='ln'>1676</a></td><td>      <a id="1676c7" class="tk">rtb_Divide_e_idx_1</a> = 32767;</td></tr>
 <tr name="1677" id="1677">
-<td><a id="l1677" class='ln'>1677</a></td><td>    <a id="1677c5" class="tk">rtDW</a>-&gt;<a id="1677c11" class="tk">Merge1</a> = <a id="1677c20" class="tk">rtb_Switch_np</a>;</td></tr>
+<td><a id="l1677" class='ln'>1677</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1678" id="1678">
-<td><a id="l1678" class='ln'>1678</a></td><td></td></tr>
+<td><a id="l1678" class='ln'>1678</a></td><td>      <span class="kw">if</span> (<a id="1678c11" class="tk">rtb_Divide_e_idx_1</a> <a id="1678c30" class="tk">&lt;</a> <a id="1678c32" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="1679" id="1679">
-<td><a id="l1679" class='ln'>1679</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S26&gt;/torque_mode' */</span></td></tr>
+<td><a id="l1679" class='ln'>1679</a></td><td>        <a id="1679c9" class="tk">rtb_Divide_e_idx_1</a> = <a id="1679c30" class="tk">-</a>32768;</td></tr>
 <tr name="1680" id="1680">
-<td><a id="l1680" class='ln'>1680</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1680" class='ln'>1680</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1681" id="1681">
-<td><a id="l1681" class='ln'>1681</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S26&gt;/If Action Subsystem1' incorporates:</span></td></tr>
+<td><a id="l1681" class='ln'>1681</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1682" id="1682">
-<td><a id="l1682" class='ln'>1682</a></td><td><span class="ct">     *  ActionPort: '&lt;S28&gt;/Action Port'</span></td></tr>
+<td><a id="l1682" class='ln'>1682</a></td><td></td></tr>
 <tr name="1683" id="1683">
-<td><a id="l1683" class='ln'>1683</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1683" class='ln'>1683</a></td><td>    <span class="ct">/* Switch: '&lt;S121&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1684" id="1684">
-<td><a id="l1684" class='ln'>1684</a></td><td>    <span class="ct">/* Merge: '&lt;S26&gt;/Merge1' incorporates:</span></td></tr>
+<td><a id="l1684" class='ln'>1684</a></td><td><span class="ct">     *  MinMax: '&lt;S120&gt;/Max'</span></td></tr>
 <tr name="1685" id="1685">
-<td><a id="l1685" class='ln'>1685</a></td><td><span class="ct">     *  Inport: '&lt;S28&gt;/In1'</span></td></tr>
+<td><a id="l1685" class='ln'>1685</a></td><td><span class="ct">     *  MinMax: '&lt;S120&gt;/Max1'</span></td></tr>
 <tr name="1686" id="1686">
-<td><a id="l1686" class='ln'>1686</a></td><td><span class="ct">     *  Switch: '&lt;S24&gt;/Switch'</span></td></tr>
+<td><a id="l1686" class='ln'>1686</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S121&gt;/LowerRelop1'</span></td></tr>
 <tr name="1687" id="1687">
-<td><a id="l1687" class='ln'>1687</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1687" class='ln'>1687</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S121&gt;/UpperRelop'</span></td></tr>
 <tr name="1688" id="1688">
-<td><a id="l1688" class='ln'>1688</a></td><td>    <a id="1688c5" class="tk">rtDW</a>-&gt;<a id="1688c11" class="tk">Merge1</a> = <a id="1688c20" class="tk">rtb_Switch_np</a>;</td></tr>
+<td><a id="l1688" class='ln'>1688</a></td><td><span class="ct">     *  Sum: '&lt;S122&gt;/Add2'</span></td></tr>
 <tr name="1689" id="1689">
-<td><a id="l1689" class='ln'>1689</a></td><td></td></tr>
+<td><a id="l1689" class='ln'>1689</a></td><td><span class="ct">     *  Switch: '&lt;S121&gt;/Switch'</span></td></tr>
 <tr name="1690" id="1690">
-<td><a id="l1690" class='ln'>1690</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S26&gt;/If Action Subsystem1' */</span></td></tr>
+<td><a id="l1690" class='ln'>1690</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1691" id="1691">
-<td><a id="l1691" class='ln'>1691</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1691" class='ln'>1691</a></td><td>    <span class="kw">if</span> ((<a id="1691c10" class="tk">int16_T</a>)<a id="1691c18" class="tk">rtb_Divide_e_idx_1</a> <a id="1691c37" class="tk">&gt;</a> <a id="1691c39" class="tk">rtDW</a>-&gt;<a id="1691c45" class="tk">Max</a>) <span class="br">{</span></td></tr>
 <tr name="1692" id="1692">
-<td><a id="l1692" class='ln'>1692</a></td><td></td></tr>
+<td><a id="l1692" class='ln'>1692</a></td><td>      <a id="1692c7" class="tk">rtb_Switch2_pl</a> = <a id="1692c24" class="tk">rtDW</a>-&gt;<a id="1692c30" class="tk">Max</a>;</td></tr>
 <tr name="1693" id="1693">
-<td><a id="l1693" class='ln'>1693</a></td><td>  <span class="ct">/* End of If: '&lt;S26&gt;/If' */</span></td></tr>
+<td><a id="l1693" class='ln'>1693</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="1693c17" class="tk">int16_T</a>)<a id="1693c25" class="tk">rtb_Divide_e_idx_1</a> <a id="1693c44" class="tk">&lt;</a> <a id="1693c46" class="tk">rtDW</a>-&gt;<a id="1693c52" class="tk">Max1</a>) <span class="br">{</span></td></tr>
 <tr name="1694" id="1694">
-<td><a id="l1694" class='ln'>1694</a></td><td></td></tr>
+<td><a id="l1694" class='ln'>1694</a></td><td>      <span class="ct">/* Switch: '&lt;S121&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1695" id="1695">
-<td><a id="l1695" class='ln'>1695</a></td><td>  <span class="ct">/* Switch: '&lt;S59&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l1695" class='ln'>1695</a></td><td><span class="ct">       *  MinMax: '&lt;S120&gt;/Max1'</span></td></tr>
 <tr name="1696" id="1696">
-<td><a id="l1696" class='ln'>1696</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/spd_Limit'</span></td></tr>
+<td><a id="l1696" class='ln'>1696</a></td><td><span class="ct">       *  Switch: '&lt;S121&gt;/Switch2'</span></td></tr>
 <tr name="1697" id="1697">
-<td><a id="l1697" class='ln'>1697</a></td><td><span class="ct">   *  Merge: '&lt;S26&gt;/Merge1'</span></td></tr>
+<td><a id="l1697" class='ln'>1697</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1698" id="1698">
-<td><a id="l1698" class='ln'>1698</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S59&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l1698" class='ln'>1698</a></td><td>      <a id="1698c7" class="tk">rtb_Switch2_pl</a> = <a id="1698c24" class="tk">rtDW</a>-&gt;<a id="1698c30" class="tk">Max1</a>;</td></tr>
 <tr name="1699" id="1699">
-<td><a id="l1699" class='ln'>1699</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S59&gt;/UpperRelop'</span></td></tr>
+<td><a id="l1699" class='ln'>1699</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1700" id="1700">
-<td><a id="l1700" class='ln'>1700</a></td><td><span class="ct">   *  Switch: '&lt;S59&gt;/Switch'</span></td></tr>
+<td><a id="l1700" class='ln'>1700</a></td><td>      <a id="1700c7" class="tk">rtb_Switch2_pl</a> = (<a id="1700c25" class="tk">int16_T</a>)<a id="1700c33" class="tk">rtb_Divide_e_idx_1</a>;</td></tr>
 <tr name="1701" id="1701">
-<td><a id="l1701" class='ln'>1701</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1701" class='ln'>1701</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1702" id="1702">
-<td><a id="l1702" class='ln'>1702</a></td><td>  <span class="kw">if</span> (<a id="1702c7" class="tk">rtDW</a>-&gt;<a id="1702c13" class="tk">Merge1</a> <a id="1702c20" class="tk">&gt;</a> <a id="1702c22" class="tk">rtU</a>-&gt;<a id="1702c27" class="tk">spd_Limit</a>) <span class="br">{</span></td></tr>
+<td><a id="l1702" class='ln'>1702</a></td><td></td></tr>
 <tr name="1703" id="1703">
-<td><a id="l1703" class='ln'>1703</a></td><td>    <a id="1703c5" class="tk">rtb_Switch_np</a> = <a id="1703c21" class="tk">rtU</a>-&gt;<a id="1703c26" class="tk">spd_Limit</a>;</td></tr>
+<td><a id="l1703" class='ln'>1703</a></td><td>    <span class="ct">/* End of Switch: '&lt;S121&gt;/Switch2' */</span></td></tr>
 <tr name="1704" id="1704">
-<td><a id="l1704" class='ln'>1704</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="1704c14" class="tk">rtDW</a>-&gt;<a id="1704c20" class="tk">Merge1</a> <a id="1704c27" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l1704" class='ln'>1704</a></td><td></td></tr>
 <tr name="1705" id="1705">
-<td><a id="l1705" class='ln'>1705</a></td><td>    <span class="ct">/* Switch: '&lt;S59&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l1705" class='ln'>1705</a></td><td>    <span class="ct">/* Switch: '&lt;S111&gt;/Switch' */</span></td></tr>
 <tr name="1706" id="1706">
-<td><a id="l1706" class='ln'>1706</a></td><td><span class="ct">     *  Constant: '&lt;S49&gt;/Constant'</span></td></tr>
+<td><a id="l1706" class='ln'>1706</a></td><td>    <span class="kw">if</span> (<a id="1706c9" class="tk">rtb_LogicalOperator1_g</a>) <span class="br">{</span></td></tr>
 <tr name="1707" id="1707">
-<td><a id="l1707" class='ln'>1707</a></td><td><span class="ct">     *  Switch: '&lt;S59&gt;/Switch2'</span></td></tr>
+<td><a id="l1707" class='ln'>1707</a></td><td>      <span class="ct">/* Switch: '&lt;S111&gt;/Switch' */</span></td></tr>
 <tr name="1708" id="1708">
-<td><a id="l1708" class='ln'>1708</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1708" class='ln'>1708</a></td><td>      <a id="1708c7" class="tk">rtDW</a>-&gt;<a id="1708c13" class="tk">Switch</a>[0] = <a id="1708c25" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="1709" id="1709">
-<td><a id="l1709" class='ln'>1709</a></td><td>    <a id="1709c5" class="tk">rtb_Switch_np</a> = 0;</td></tr>
+<td><a id="l1709" class='ln'>1709</a></td><td>      <a id="1709c7" class="tk">rtDW</a>-&gt;<a id="1709c13" class="tk">Switch</a>[1] = <a id="1709c25" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="1710" id="1710">
-<td><a id="l1710" class='ln'>1710</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1710" class='ln'>1710</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1711" id="1711">
-<td><a id="l1711" class='ln'>1711</a></td><td>    <a id="1711c5" class="tk">rtb_Switch_np</a> = <a id="1711c21" class="tk">rtDW</a>-&gt;<a id="1711c27" class="tk">Merge1</a>;</td></tr>
+<td><a id="l1711" class='ln'>1711</a></td><td>      <span class="ct">/* Switch: '&lt;S111&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1712" id="1712">
-<td><a id="l1712" class='ln'>1712</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l1712" class='ln'>1712</a></td><td><span class="ct">       *  Constant: '&lt;S111&gt;/Constant2'</span></td></tr>
 <tr name="1713" id="1713">
-<td><a id="l1713" class='ln'>1713</a></td><td></td></tr>
+<td><a id="l1713" class='ln'>1713</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1714" id="1714">
-<td><a id="l1714" class='ln'>1714</a></td><td>  <span class="ct">/* End of Switch: '&lt;S59&gt;/Switch2' */</span></td></tr>
+<td><a id="l1714" class='ln'>1714</a></td><td>      <a id="1714c7" class="tk">rtDW</a>-&gt;<a id="1714c13" class="tk">Switch</a>[0] = 0;</td></tr>
 <tr name="1715" id="1715">
-<td><a id="l1715" class='ln'>1715</a></td><td></td></tr>
+<td><a id="l1715" class='ln'>1715</a></td><td>      <a id="1715c7" class="tk">rtDW</a>-&gt;<a id="1715c13" class="tk">Switch</a>[1] = 0;</td></tr>
 <tr name="1716" id="1716">
-<td><a id="l1716" class='ln'>1716</a></td><td>  <span class="ct">/* If: '&lt;S53&gt;/If' incorporates:</span></td></tr>
+<td><a id="l1716" class='ln'>1716</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1717" id="1717">
-<td><a id="l1717" class='ln'>1717</a></td><td><span class="ct">   *  Constant: '&lt;S76&gt;/Constant'</span></td></tr>
+<td><a id="l1717" class='ln'>1717</a></td><td></td></tr>
 <tr name="1718" id="1718">
-<td><a id="l1718" class='ln'>1718</a></td><td><span class="ct">   *  Logic: '&lt;S71&gt;/Logical Operator'</span></td></tr>
+<td><a id="l1718" class='ln'>1718</a></td><td>    <span class="ct">/* End of Switch: '&lt;S111&gt;/Switch' */</span></td></tr>
 <tr name="1719" id="1719">
-<td><a id="l1719" class='ln'>1719</a></td><td><span class="ct">   *  Switch: '&lt;S71&gt;/Switch2'</span></td></tr>
+<td><a id="l1719" class='ln'>1719</a></td><td></td></tr>
 <tr name="1720" id="1720">
-<td><a id="l1720" class='ln'>1720</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l1720" class='ln'>1720</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S112&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="1721" id="1721">
-<td><a id="l1721" class='ln'>1721</a></td><td>  <a id="1721c3" class="tk">rtb_Sum2</a> = <a id="1721c14" class="tk">-</a>1;</td></tr>
+<td><a id="l1721" class='ln'>1721</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1722" id="1722">
-<td><a id="l1722" class='ln'>1722</a></td><td>  <span class="kw">if</span> ((<a id="1722c8" class="tk">rtb_z_ctrlMod</a> <a id="1722c22" class="tk">!=</a> 0) <a id="1722c28" class="tk">&amp;&amp;</a> <a id="1722c31" class="tk">rtb_Equal_k</a>) <span class="br">{</span></td></tr>
+<td><a id="l1722" class='ln'>1722</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1723" id="1723">
-<td><a id="l1723" class='ln'>1723</a></td><td>    <a id="1723c5" class="tk">rtb_Sum2</a> = 0;</td></tr>
+<td><a id="l1723" class='ln'>1723</a></td><td>    <a id="1723c5" class="tk">rtDW</a>-&gt;<a id="1723c11" class="tk">UnitDelay_DSTATE_lz</a> = <a id="1723c33" class="tk">rtU</a>-&gt;<a id="1723c38" class="tk">vdq_Target</a>[0];</td></tr>
 <tr name="1724" id="1724">
 <td><a id="l1724" class='ln'>1724</a></td><td></td></tr>
 <tr name="1725" id="1725">
-<td><a id="l1725" class='ln'>1725</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S53&gt;/Do_Calc' incorporates:</span></td></tr>
+<td><a id="l1725" class='ln'>1725</a></td><td>    <span class="ct">/* Switch: '&lt;S119&gt;/Switch2' */</span></td></tr>
 <tr name="1726" id="1726">
-<td><a id="l1726" class='ln'>1726</a></td><td><span class="ct">     *  ActionPort: '&lt;S70&gt;/Action Port'</span></td></tr>
+<td><a id="l1726" class='ln'>1726</a></td><td>    <span class="kw">if</span> (<a id="1726c9" class="tk">rtb_UnitDelay_c</a>) <span class="br">{</span></td></tr>
 <tr name="1727" id="1727">
-<td><a id="l1727" class='ln'>1727</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1727" class='ln'>1727</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S119&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="1728" id="1728">
-<td><a id="l1728" class='ln'>1728</a></td><td>    <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S76&gt;/Low_Pass_Filter' */</span></td></tr>
+<td><a id="l1728" class='ln'>1728</a></td><td><span class="ct">       *  UnitDelay: '&lt;S4&gt;/Unit Delay'</span></td></tr>
 <tr name="1729" id="1729">
-<td><a id="l1729" class='ln'>1729</a></td><td>    <a id="1729c5" class="tk">Low_Pass_Filter</a>(<a id="1729c21" class="tk">rtb_UnitDelay1_m</a>, <a id="1729c39" class="tk">rtP</a>.<a id="1729c43" class="tk">f_lpf_vdq</a>,</td></tr>
+<td><a id="l1729" class='ln'>1729</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1730" id="1730">
-<td><a id="l1730" class='ln'>1730</a></td><td>                    <a id="1730c21" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>, <a id="1730c54" class="tk">&amp;</a><a id="1730c55" class="tk">rtDW</a>-&gt;<a id="1730c61" class="tk">Low_Pass_Filter_h</a>);</td></tr>
+<td><a id="l1730" class='ln'>1730</a></td><td>      <a id="1730c7" class="tk">rtDW</a>-&gt;<a id="1730c13" class="tk">UnitDelay_DSTATE_j</a> = <a id="1730c34" class="tk">rtDW</a>-&gt;<a id="1730c40" class="tk">UnitDelay_DSTATE_e</a>[0];</td></tr>
 <tr name="1731" id="1731">
-<td><a id="l1731" class='ln'>1731</a></td><td></td></tr>
+<td><a id="l1731" class='ln'>1731</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1732" id="1732">
-<td><a id="l1732" class='ln'>1732</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S76&gt;/Low_Pass_Filter' */</span></td></tr>
+<td><a id="l1732" class='ln'>1732</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S119&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="1733" id="1733">
-<td><a id="l1733" class='ln'>1733</a></td><td></td></tr>
+<td><a id="l1733" class='ln'>1733</a></td><td><span class="ct">       *  Sum: '&lt;S118&gt;/Add2'</span></td></tr>
 <tr name="1734" id="1734">
-<td><a id="l1734" class='ln'>1734</a></td><td>    <span class="ct">/* DataTypeConversion: '&lt;S70&gt;/Data Type Conversion' incorporates:</span></td></tr>
+<td><a id="l1734" class='ln'>1734</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1735" id="1735">
-<td><a id="l1735" class='ln'>1735</a></td><td><span class="ct">     *  Constant: '&lt;S76&gt;/Constant'</span></td></tr>
+<td><a id="l1735" class='ln'>1735</a></td><td>      <a id="1735c7" class="tk">rtDW</a>-&gt;<a id="1735c13" class="tk">UnitDelay_DSTATE_j</a> = (<a id="1735c35" class="tk">int16_T</a>)<a id="1735c43" class="tk">rtb_RelationalOperator4_b</a>;</td></tr>
 <tr name="1736" id="1736">
-<td><a id="l1736" class='ln'>1736</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S70&gt;/Equal'</span></td></tr>
+<td><a id="l1736" class='ln'>1736</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1737" id="1737">
-<td><a id="l1737" class='ln'>1737</a></td><td><span class="ct">     *  UnitDelay: '&lt;S70&gt;/Unit Delay'</span></td></tr>
+<td><a id="l1737" class='ln'>1737</a></td><td></td></tr>
 <tr name="1738" id="1738">
-<td><a id="l1738" class='ln'>1738</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1738" class='ln'>1738</a></td><td>    <span class="ct">/* End of Switch: '&lt;S119&gt;/Switch2' */</span></td></tr>
 <tr name="1739" id="1739">
-<td><a id="l1739" class='ln'>1739</a></td><td>    <a id="1739c5" class="tk">rtb_DataTypeConversion_j</a> = (<a id="1739c33" class="tk">uint8_T</a>)(<a id="1739c42" class="tk">rtDW</a>-&gt;<a id="1739c48" class="tk">UnitDelay_DSTATE_p2</a> <a id="1739c68" class="tk">!=</a></td></tr>
+<td><a id="l1739" class='ln'>1739</a></td><td></td></tr>
 <tr name="1740" id="1740">
-<td><a id="l1740" class='ln'>1740</a></td><td>      <a id="1740c7" class="tk">rtb_z_ctrlMod</a>);</td></tr>
+<td><a id="l1740" class='ln'>1740</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S113&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="1741" id="1741">
-<td><a id="l1741" class='ln'>1741</a></td><td></td></tr>
+<td><a id="l1741" class='ln'>1741</a></td><td><span class="ct">     *  Switch: '&lt;S117&gt;/Switch2'</span></td></tr>
 <tr name="1742" id="1742">
-<td><a id="l1742" class='ln'>1742</a></td><td>    <span class="ct">/* If: '&lt;S73&gt;/If' incorporates:</span></td></tr>
+<td><a id="l1742" class='ln'>1742</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1743" id="1743">
-<td><a id="l1743" class='ln'>1743</a></td><td><span class="ct">     *  Constant: '&lt;S87&gt;/Constant1'</span></td></tr>
+<td><a id="l1743" class='ln'>1743</a></td><td>    <a id="1743c5" class="tk">rtDW</a>-&gt;<a id="1743c11" class="tk">UnitDelay_DSTATE_h</a> = <a id="1743c32" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="1744" id="1744">
-<td><a id="l1744" class='ln'>1744</a></td><td><span class="ct">     *  Constant: '&lt;S87&gt;/Constant11'</span></td></tr>
+<td><a id="l1744" class='ln'>1744</a></td><td></td></tr>
 <tr name="1745" id="1745">
-<td><a id="l1745" class='ln'>1745</a></td><td><span class="ct">     *  Constant: '&lt;S87&gt;/Constant4'</span></td></tr>
+<td><a id="l1745" class='ln'>1745</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S114&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="1746" id="1746">
-<td><a id="l1746" class='ln'>1746</a></td><td><span class="ct">     *  Gain: '&lt;S70&gt;/Gain'</span></td></tr>
+<td><a id="l1746" class='ln'>1746</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vdq_Target'</span></td></tr>
 <tr name="1747" id="1747">
-<td><a id="l1747" class='ln'>1747</a></td><td><span class="ct">     *  Sum: '&lt;S87&gt;/Sum1'</span></td></tr>
+<td><a id="l1747" class='ln'>1747</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1748" id="1748">
-<td><a id="l1748" class='ln'>1748</a></td><td><span class="ct">     *  Switch: '&lt;S14&gt;/Switch2'</span></td></tr>
+<td><a id="l1748" class='ln'>1748</a></td><td>    <a id="1748c5" class="tk">rtDW</a>-&gt;<a id="1748c11" class="tk">UnitDelay_DSTATE_n</a> = <a id="1748c32" class="tk">rtU</a>-&gt;<a id="1748c37" class="tk">vdq_Target</a>[1];</td></tr>
 <tr name="1749" id="1749">
-<td><a id="l1749" class='ln'>1749</a></td><td><span class="ct">     *  Switch: '&lt;S59&gt;/Switch2'</span></td></tr>
+<td><a id="l1749" class='ln'>1749</a></td><td></td></tr>
 <tr name="1750" id="1750">
-<td><a id="l1750" class='ln'>1750</a></td><td><span class="ct">     *  UnitDelay: '&lt;S70&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l1750" class='ln'>1750</a></td><td>    <span class="ct">/* Switch: '&lt;S123&gt;/Switch2' */</span></td></tr>
 <tr name="1751" id="1751">
-<td><a id="l1751" class='ln'>1751</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1751" class='ln'>1751</a></td><td>    <span class="kw">if</span> (<a id="1751c9" class="tk">rtb_LogicalOperator4_f</a>) <span class="br">{</span></td></tr>
 <tr name="1752" id="1752">
-<td><a id="l1752" class='ln'>1752</a></td><td>    <span class="kw">if</span> (<a id="1752c9" class="tk">rtb_z_ctrlMod</a> <a id="1752c23" class="tk">==</a> 1) <span class="br">{</span></td></tr>
+<td><a id="l1752" class='ln'>1752</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S123&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="1753" id="1753">
-<td><a id="l1753" class='ln'>1753</a></td><td>      <a id="1753c7" class="tk">rtDW</a>-&gt;<a id="1753c13" class="tk">If_ActiveSubsystem_h</a> = 0;</td></tr>
+<td><a id="l1753" class='ln'>1753</a></td><td><span class="ct">       *  UnitDelay: '&lt;S4&gt;/Unit Delay'</span></td></tr>
 <tr name="1754" id="1754">
-<td><a id="l1754" class='ln'>1754</a></td><td></td></tr>
+<td><a id="l1754" class='ln'>1754</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1755" id="1755">
-<td><a id="l1755" class='ln'>1755</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S73&gt;/speed_mode' incorporates:</span></td></tr>
+<td><a id="l1755" class='ln'>1755</a></td><td>      <a id="1755c7" class="tk">rtDW</a>-&gt;<a id="1755c13" class="tk">UnitDelay_DSTATE_ox</a> = <a id="1755c35" class="tk">rtDW</a>-&gt;<a id="1755c41" class="tk">UnitDelay_DSTATE_e</a>[1];</td></tr>
 <tr name="1756" id="1756">
-<td><a id="l1756" class='ln'>1756</a></td><td><span class="ct">       *  ActionPort: '&lt;S87&gt;/Action Port'</span></td></tr>
+<td><a id="l1756" class='ln'>1756</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1757" id="1757">
-<td><a id="l1757" class='ln'>1757</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1757" class='ln'>1757</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S123&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="1758" id="1758">
-<td><a id="l1758" class='ln'>1758</a></td><td>      <span class="ct">/* MinMax: '&lt;S87&gt;/Min' incorporates:</span></td></tr>
+<td><a id="l1758" class='ln'>1758</a></td><td><span class="ct">       *  Sum: '&lt;S122&gt;/Add2'</span></td></tr>
 <tr name="1759" id="1759">
-<td><a id="l1759" class='ln'>1759</a></td><td><span class="ct">       *  Constant: '&lt;S87&gt;/Constant6'</span></td></tr>
+<td><a id="l1759" class='ln'>1759</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1760" id="1760">
-<td><a id="l1760" class='ln'>1760</a></td><td><span class="ct">       *  UnitDelay: '&lt;S87&gt;/Unit Delay'</span></td></tr>
+<td><a id="l1760" class='ln'>1760</a></td><td>      <a id="1760c7" class="tk">rtDW</a>-&gt;<a id="1760c13" class="tk">UnitDelay_DSTATE_ox</a> = (<a id="1760c36" class="tk">int16_T</a>)<a id="1760c44" class="tk">rtb_Divide_e_idx_1</a>;</td></tr>
 <tr name="1761" id="1761">
-<td><a id="l1761" class='ln'>1761</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1761" class='ln'>1761</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1762" id="1762">
-<td><a id="l1762" class='ln'>1762</a></td><td>      <span class="kw">if</span> (<a id="1762c11" class="tk">rtP</a>.<a id="1762c15" class="tk">i_dqMax</a> <a id="1762c23" class="tk">&lt;</a> <a id="1762c25" class="tk">rtDW</a>-&gt;<a id="1762c31" class="tk">UnitDelay_DSTATE_l</a>) <span class="br">{</span></td></tr>
+<td><a id="l1762" class='ln'>1762</a></td><td></td></tr>
 <tr name="1763" id="1763">
-<td><a id="l1763" class='ln'>1763</a></td><td>        <a id="1763c9" class="tk">rtb_Switch_f2_idx_1</a> = <a id="1763c31" class="tk">rtP</a>.<a id="1763c35" class="tk">i_dqMax</a>;</td></tr>
+<td><a id="l1763" class='ln'>1763</a></td><td>    <span class="ct">/* End of Switch: '&lt;S123&gt;/Switch2' */</span></td></tr>
 <tr name="1764" id="1764">
-<td><a id="l1764" class='ln'>1764</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1764" class='ln'>1764</a></td><td></td></tr>
 <tr name="1765" id="1765">
-<td><a id="l1765" class='ln'>1765</a></td><td>        <a id="1765c9" class="tk">rtb_Switch_f2_idx_1</a> = <a id="1765c31" class="tk">rtDW</a>-&gt;<a id="1765c37" class="tk">UnitDelay_DSTATE_l</a>;</td></tr>
+<td><a id="l1765" class='ln'>1765</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S115&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="1766" id="1766">
-<td><a id="l1766" class='ln'>1766</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1766" class='ln'>1766</a></td><td><span class="ct">     *  Switch: '&lt;S121&gt;/Switch2'</span></td></tr>
 <tr name="1767" id="1767">
-<td><a id="l1767" class='ln'>1767</a></td><td></td></tr>
+<td><a id="l1767" class='ln'>1767</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1768" id="1768">
-<td><a id="l1768" class='ln'>1768</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S87&gt;/Min' */</span></td></tr>
+<td><a id="l1768" class='ln'>1768</a></td><td>    <a id="1768c5" class="tk">rtDW</a>-&gt;<a id="1768c11" class="tk">UnitDelay_DSTATE_gt</a> = <a id="1768c33" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="1769" id="1769">
 <td><a id="l1769" class='ln'>1769</a></td><td></td></tr>
 <tr name="1770" id="1770">
-<td><a id="l1770" class='ln'>1770</a></td><td>      <span class="ct">/* MinMax: '&lt;S87&gt;/Min1' incorporates:</span></td></tr>
+<td><a id="l1770" class='ln'>1770</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S37&gt;/open_mode' */</span></td></tr>
 <tr name="1771" id="1771">
-<td><a id="l1771" class='ln'>1771</a></td><td><span class="ct">       *  Constant: '&lt;S87&gt;/Constant6'</span></td></tr>
+<td><a id="l1771" class='ln'>1771</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="1772" id="1772">
-<td><a id="l1772" class='ln'>1772</a></td><td><span class="ct">       *  Gain: '&lt;S87&gt;/Gain'</span></td></tr>
+<td><a id="l1772" class='ln'>1772</a></td><td></td></tr>
 <tr name="1773" id="1773">
-<td><a id="l1773" class='ln'>1773</a></td><td><span class="ct">       *  Gain: '&lt;S87&gt;/Gain1'</span></td></tr>
+<td><a id="l1773" class='ln'>1773</a></td><td>  <span class="ct">/* End of If: '&lt;S37&gt;/If' */</span></td></tr>
 <tr name="1774" id="1774">
-<td><a id="l1774" class='ln'>1774</a></td><td><span class="ct">       *  UnitDelay: '&lt;S87&gt;/Unit Delay'</span></td></tr>
+<td><a id="l1774" class='ln'>1774</a></td><td></td></tr>
 <tr name="1775" id="1775">
-<td><a id="l1775" class='ln'>1775</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1775" class='ln'>1775</a></td><td>  <span class="ct">/* If: '&lt;S44&gt;/If' incorporates:</span></td></tr>
 <tr name="1776" id="1776">
-<td><a id="l1776" class='ln'>1776</a></td><td>      <span class="kw">if</span> ((<a id="1776c12" class="tk">int16_T</a>)<a id="1776c20" class="tk">-</a><a id="1776c21" class="tk">rtDW</a>-&gt;<a id="1776c27" class="tk">UnitDelay_DSTATE_l</a> <a id="1776c46" class="tk">&gt;</a> (<a id="1776c49" class="tk">int16_T</a>)<a id="1776c57" class="tk">-</a><a id="1776c58" class="tk">rtP</a>.<a id="1776c62" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
+<td><a id="l1776" class='ln'>1776</a></td><td><span class="ct">   *  Constant: '&lt;S34&gt;/Constant1'</span></td></tr>
 <tr name="1777" id="1777">
-<td><a id="l1777" class='ln'>1777</a></td><td>        <a id="1777c9" class="tk">rtb_Min</a> = (<a id="1777c20" class="tk">int16_T</a>)<a id="1777c28" class="tk">-</a><a id="1777c29" class="tk">rtDW</a>-&gt;<a id="1777c35" class="tk">UnitDelay_DSTATE_l</a>;</td></tr>
+<td><a id="l1777" class='ln'>1777</a></td><td><span class="ct">   *  Constant: '&lt;S68&gt;/Constant'</span></td></tr>
 <tr name="1778" id="1778">
-<td><a id="l1778" class='ln'>1778</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1778" class='ln'>1778</a></td><td><span class="ct">   *  Logic: '&lt;S63&gt;/Logical Operator'</span></td></tr>
 <tr name="1779" id="1779">
-<td><a id="l1779" class='ln'>1779</a></td><td>        <a id="1779c9" class="tk">rtb_Min</a> = (<a id="1779c20" class="tk">int16_T</a>)<a id="1779c28" class="tk">-</a><a id="1779c29" class="tk">rtP</a>.<a id="1779c33" class="tk">i_dqMax</a>;</td></tr>
+<td><a id="l1779" class='ln'>1779</a></td><td><span class="ct">   *  Math: '&lt;S34&gt;/Rem'</span></td></tr>
 <tr name="1780" id="1780">
-<td><a id="l1780" class='ln'>1780</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1780" class='ln'>1780</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S34&gt;/Equal'</span></td></tr>
 <tr name="1781" id="1781">
-<td><a id="l1781" class='ln'>1781</a></td><td></td></tr>
+<td><a id="l1781" class='ln'>1781</a></td><td><span class="ct">   *  Sum: '&lt;S38&gt;/Sum3'</span></td></tr>
 <tr name="1782" id="1782">
-<td><a id="l1782" class='ln'>1782</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S87&gt;/Min1' */</span></td></tr>
+<td><a id="l1782" class='ln'>1782</a></td><td><span class="ct">   *  Switch: '&lt;S63&gt;/Switch2'</span></td></tr>
 <tr name="1783" id="1783">
-<td><a id="l1783" class='ln'>1783</a></td><td></td></tr>
+<td><a id="l1783" class='ln'>1783</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="1784" id="1784">
-<td><a id="l1784" class='ln'>1784</a></td><td>      <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l1784" class='ln'>1784</a></td><td>  <a id="1784c3" class="tk">rtb_Sum2</a> = <a id="1784c14" class="tk">-</a>1;</td></tr>
 <tr name="1785" id="1785">
-<td><a id="l1785" class='ln'>1785</a></td><td>      <a id="1785c7" class="tk">rtb_Sum1_f</a> = <a id="1785c20" class="tk">PI_backCalc_fixdt</a>(<a id="1785c38" class="tk">rtb_Switch_np</a> <a id="1785c52" class="tk">-</a> <a id="1785c54" class="tk">rtb_Switch3</a>, <a id="1785c67" class="tk">rtP</a>.<a id="1785c71" class="tk">cf_nKp</a>,</td></tr>
+<td><a id="l1785" class='ln'>1785</a></td><td>  <span class="kw">if</span> ((<a id="1785c8" class="tk">rtb_dz_cntTrnsDet</a> <a id="1785c26" class="tk">!=</a> 0) <a id="1785c32" class="tk">&amp;&amp;</a> (<a id="1785c36" class="tk">rtb_Merge</a> <a id="1785c46" class="tk">%</a> 40U <a id="1785c52" class="tk">==</a> 0U)) <span class="br">{</span></td></tr>
 <tr name="1786" id="1786">
-<td><a id="l1786" class='ln'>1786</a></td><td>        <a id="1786c9" class="tk">rtP</a>.<a id="1786c13" class="tk">cf_nKi</a>, <a id="1786c21" class="tk">rtP</a>.<a id="1786c25" class="tk">cf_nKb</a>, <a id="1786c33" class="tk">rtb_Switch_f2_idx_1</a>, <a id="1786c54" class="tk">rtb_Min</a>, (<a id="1786c64" class="tk">int16_T</a>)</td></tr>
+<td><a id="l1786" class='ln'>1786</a></td><td>    <a id="1786c5" class="tk">rtb_Sum2</a> = 0;</td></tr>
 <tr name="1787" id="1787">
-<td><a id="l1787" class='ln'>1787</a></td><td>        ((<a id="1787c11" class="tk">rtP</a>.<a id="1787c15" class="tk">cf_lastIqGain</a> <a id="1787c29" class="tk">*</a> <a id="1787c31" class="tk">rtDW</a>-&gt;<a id="1787c37" class="tk">UnitDelay1_DSTATE_g</a>) <a id="1787c58" class="tk">&gt;&gt;</a> 15),</td></tr>
+<td><a id="l1787" class='ln'>1787</a></td><td></td></tr>
 <tr name="1788" id="1788">
-<td><a id="l1788" class='ln'>1788</a></td><td>        <a id="1788c9" class="tk">rtb_DataTypeConversion_j</a>, <a id="1788c35" class="tk">&amp;</a><a id="1788c36" class="tk">rtDW</a>-&gt;<a id="1788c42" class="tk">PI_Speed</a>, <a id="1788c52" class="tk">&amp;</a><a id="1788c53" class="tk">rtPrevZCX</a>-&gt;<a id="1788c64" class="tk">PI_Speed</a>);</td></tr>
+<td><a id="l1788" class='ln'>1788</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S44&gt;/Do_Calc' incorporates:</span></td></tr>
 <tr name="1789" id="1789">
-<td><a id="l1789" class='ln'>1789</a></td><td></td></tr>
+<td><a id="l1789" class='ln'>1789</a></td><td><span class="ct">     *  ActionPort: '&lt;S62&gt;/Action Port'</span></td></tr>
 <tr name="1790" id="1790">
-<td><a id="l1790" class='ln'>1790</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l1790" class='ln'>1790</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1791" id="1791">
-<td><a id="l1791" class='ln'>1791</a></td><td></td></tr>
+<td><a id="l1791" class='ln'>1791</a></td><td>    <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S68&gt;/Low_Pass_Filter' */</span></td></tr>
 <tr name="1792" id="1792">
-<td><a id="l1792" class='ln'>1792</a></td><td>      <span class="ct">/* Merge: '&lt;S73&gt;/Merge' incorporates:</span></td></tr>
+<td><a id="l1792" class='ln'>1792</a></td><td>    <a id="1792c5" class="tk">Low_Pass_Filter</a>(<a id="1792c21" class="tk">rtb_UnitDelay1_ko</a>, <a id="1792c40" class="tk">rtP</a>.<a id="1792c44" class="tk">f_lpf_vdq</a>,</td></tr>
 <tr name="1793" id="1793">
-<td><a id="l1793" class='ln'>1793</a></td><td><span class="ct">       *  Constant: '&lt;S87&gt;/Constant1'</span></td></tr>
+<td><a id="l1793" class='ln'>1793</a></td><td>                    <a id="1793c21" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>,</td></tr>
 <tr name="1794" id="1794">
-<td><a id="l1794" class='ln'>1794</a></td><td><span class="ct">       *  Constant: '&lt;S87&gt;/Constant11'</span></td></tr>
+<td><a id="l1794" class='ln'>1794</a></td><td>                    <a id="1794c21" class="tk">&amp;</a><a id="1794c22" class="tk">rtDW</a>-&gt;<a id="1794c28" class="tk">Low_Pass_Filter_e</a>);</td></tr>
 <tr name="1795" id="1795">
-<td><a id="l1795" class='ln'>1795</a></td><td><span class="ct">       *  Constant: '&lt;S87&gt;/Constant4'</span></td></tr>
+<td><a id="l1795" class='ln'>1795</a></td><td></td></tr>
 <tr name="1796" id="1796">
-<td><a id="l1796" class='ln'>1796</a></td><td><span class="ct">       *  DataTypeConversion: '&lt;S87&gt;/Data Type Conversion'</span></td></tr>
+<td><a id="l1796" class='ln'>1796</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S68&gt;/Low_Pass_Filter' */</span></td></tr>
 <tr name="1797" id="1797">
-<td><a id="l1797" class='ln'>1797</a></td><td><span class="ct">       *  Gain: '&lt;S70&gt;/Gain'</span></td></tr>
+<td><a id="l1797" class='ln'>1797</a></td><td></td></tr>
 <tr name="1798" id="1798">
-<td><a id="l1798" class='ln'>1798</a></td><td><span class="ct">       *  Sum: '&lt;S87&gt;/Sum1'</span></td></tr>
+<td><a id="l1798" class='ln'>1798</a></td><td>    <span class="ct">/* DataTypeConversion: '&lt;S62&gt;/Data Type Conversion' incorporates:</span></td></tr>
 <tr name="1799" id="1799">
-<td><a id="l1799" class='ln'>1799</a></td><td><span class="ct">       *  Switch: '&lt;S14&gt;/Switch2'</span></td></tr>
+<td><a id="l1799" class='ln'>1799</a></td><td><span class="ct">     *  Constant: '&lt;S68&gt;/Constant'</span></td></tr>
 <tr name="1800" id="1800">
-<td><a id="l1800" class='ln'>1800</a></td><td><span class="ct">       *  Switch: '&lt;S59&gt;/Switch2'</span></td></tr>
+<td><a id="l1800" class='ln'>1800</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S62&gt;/Equal'</span></td></tr>
 <tr name="1801" id="1801">
-<td><a id="l1801" class='ln'>1801</a></td><td><span class="ct">       *  Switch: '&lt;S91&gt;/Switch2'</span></td></tr>
+<td><a id="l1801" class='ln'>1801</a></td><td><span class="ct">     *  UnitDelay: '&lt;S62&gt;/Unit Delay'</span></td></tr>
 <tr name="1802" id="1802">
-<td><a id="l1802" class='ln'>1802</a></td><td><span class="ct">       *  UnitDelay: '&lt;S70&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l1802" class='ln'>1802</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1803" id="1803">
-<td><a id="l1803" class='ln'>1803</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1803" class='ln'>1803</a></td><td>    <a id="1803c5" class="tk">rtb_DataTypeConversion_e</a> = (<a id="1803c33" class="tk">uint8_T</a>)(<a id="1803c42" class="tk">rtDW</a>-&gt;<a id="1803c48" class="tk">UnitDelay_DSTATE_lv</a> <a id="1803c68" class="tk">!=</a></td></tr>
 <tr name="1804" id="1804">
-<td><a id="l1804" class='ln'>1804</a></td><td>      <a id="1804c7" class="tk">rtDW</a>-&gt;<a id="1804c13" class="tk">Merge_f</a> = (<a id="1804c24" class="tk">int16_T</a>)(<a id="1804c33" class="tk">rtb_Sum1_f</a> <a id="1804c44" class="tk">&gt;&gt;</a> 9);</td></tr>
+<td><a id="l1804" class='ln'>1804</a></td><td>      <a id="1804c7" class="tk">rtb_dz_cntTrnsDet</a>);</td></tr>
 <tr name="1805" id="1805">
 <td><a id="l1805" class='ln'>1805</a></td><td></td></tr>
 <tr name="1806" id="1806">
-<td><a id="l1806" class='ln'>1806</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S73&gt;/speed_mode' */</span></td></tr>
+<td><a id="l1806" class='ln'>1806</a></td><td>    <span class="ct">/* If: '&lt;S65&gt;/If' incorporates:</span></td></tr>
 <tr name="1807" id="1807">
-<td><a id="l1807" class='ln'>1807</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1807" class='ln'>1807</a></td><td><span class="ct">     *  Constant: '&lt;S79&gt;/Constant1'</span></td></tr>
 <tr name="1808" id="1808">
-<td><a id="l1808" class='ln'>1808</a></td><td>      <a id="1808c7" class="tk">rtDW</a>-&gt;<a id="1808c13" class="tk">If_ActiveSubsystem_h</a> = 1;</td></tr>
+<td><a id="l1808" class='ln'>1808</a></td><td><span class="ct">     *  Constant: '&lt;S79&gt;/Constant11'</span></td></tr>
 <tr name="1809" id="1809">
-<td><a id="l1809" class='ln'>1809</a></td><td></td></tr>
+<td><a id="l1809" class='ln'>1809</a></td><td><span class="ct">     *  Constant: '&lt;S79&gt;/Constant4'</span></td></tr>
 <tr name="1810" id="1810">
-<td><a id="l1810" class='ln'>1810</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S73&gt;/torque_mode' incorporates:</span></td></tr>
+<td><a id="l1810" class='ln'>1810</a></td><td><span class="ct">     *  Gain: '&lt;S62&gt;/Gain'</span></td></tr>
 <tr name="1811" id="1811">
-<td><a id="l1811" class='ln'>1811</a></td><td><span class="ct">       *  ActionPort: '&lt;S88&gt;/Action Port'</span></td></tr>
+<td><a id="l1811" class='ln'>1811</a></td><td><span class="ct">     *  Sum: '&lt;S79&gt;/Sum1'</span></td></tr>
 <tr name="1812" id="1812">
-<td><a id="l1812" class='ln'>1812</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1812" class='ln'>1812</a></td><td><span class="ct">     *  Switch: '&lt;S20&gt;/Switch2'</span></td></tr>
 <tr name="1813" id="1813">
-<td><a id="l1813" class='ln'>1813</a></td><td>      <span class="ct">/* Sum: '&lt;S88&gt;/Sum1' incorporates:</span></td></tr>
+<td><a id="l1813" class='ln'>1813</a></td><td><span class="ct">     *  Switch: '&lt;S50&gt;/Switch2'</span></td></tr>
 <tr name="1814" id="1814">
-<td><a id="l1814" class='ln'>1814</a></td><td><span class="ct">       *  Switch: '&lt;S14&gt;/Switch2'</span></td></tr>
+<td><a id="l1814" class='ln'>1814</a></td><td><span class="ct">     *  UnitDelay: '&lt;S62&gt;/Unit Delay1'</span></td></tr>
 <tr name="1815" id="1815">
-<td><a id="l1815" class='ln'>1815</a></td><td><span class="ct">       *  Switch: '&lt;S59&gt;/Switch2'</span></td></tr>
+<td><a id="l1815" class='ln'>1815</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1816" id="1816">
-<td><a id="l1816" class='ln'>1816</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1816" class='ln'>1816</a></td><td>    <span class="kw">if</span> (<a id="1816c9" class="tk">rtb_dz_cntTrnsDet</a> <a id="1816c27" class="tk">==</a> 1) <span class="br">{</span></td></tr>
 <tr name="1817" id="1817">
-<td><a id="l1817" class='ln'>1817</a></td><td>      <a id="1817c7" class="tk">rtb_Switch_np</a> <a id="1817c21" class="tk">-=</a> <a id="1817c24" class="tk">rtb_Switch3</a>;</td></tr>
+<td><a id="l1817" class='ln'>1817</a></td><td>      <a id="1817c7" class="tk">rtDW</a>-&gt;<a id="1817c13" class="tk">If_ActiveSubsystem_k</a> = 0;</td></tr>
 <tr name="1818" id="1818">
 <td><a id="l1818" class='ln'>1818</a></td><td></td></tr>
 <tr name="1819" id="1819">
-<td><a id="l1819" class='ln'>1819</a></td><td>      <span class="ct">/* Delay: '&lt;S88&gt;/Delay' incorporates:</span></td></tr>
+<td><a id="l1819" class='ln'>1819</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S65&gt;/speed_mode' incorporates:</span></td></tr>
 <tr name="1820" id="1820">
-<td><a id="l1820" class='ln'>1820</a></td><td><span class="ct">       *  Inport: '&lt;S30&gt;/r_currTgt'</span></td></tr>
+<td><a id="l1820" class='ln'>1820</a></td><td><span class="ct">       *  ActionPort: '&lt;S79&gt;/Action Port'</span></td></tr>
 <tr name="1821" id="1821">
 <td><a id="l1821" class='ln'>1821</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1822" id="1822">
-<td><a id="l1822" class='ln'>1822</a></td><td>      <span class="kw">if</span> (<a id="1822c11" class="tk">rtDW</a>-&gt;<a id="1822c17" class="tk">icLoad_p</a> <a id="1822c26" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l1822" class='ln'>1822</a></td><td>      <span class="ct">/* MinMax: '&lt;S79&gt;/Min' incorporates:</span></td></tr>
 <tr name="1823" id="1823">
-<td><a id="l1823" class='ln'>1823</a></td><td>        <a id="1823c9" class="tk">rtDW</a>-&gt;<a id="1823c15" class="tk">Delay_DSTATE</a> = <a id="1823c30" class="tk">rtDW</a>-&gt;<a id="1823c36" class="tk">r_currTgt</a>;</td></tr>
+<td><a id="l1823" class='ln'>1823</a></td><td><span class="ct">       *  Constant: '&lt;S79&gt;/Constant6'</span></td></tr>
 <tr name="1824" id="1824">
-<td><a id="l1824" class='ln'>1824</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1824" class='ln'>1824</a></td><td><span class="ct">       *  UnitDelay: '&lt;S79&gt;/Unit Delay'</span></td></tr>
 <tr name="1825" id="1825">
-<td><a id="l1825" class='ln'>1825</a></td><td></td></tr>
+<td><a id="l1825" class='ln'>1825</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1826" id="1826">
-<td><a id="l1826" class='ln'>1826</a></td><td>      <span class="ct">/* MinMax: '&lt;S88&gt;/Min' incorporates:</span></td></tr>
+<td><a id="l1826" class='ln'>1826</a></td><td>      <span class="kw">if</span> (<a id="1826c11" class="tk">rtP</a>.<a id="1826c15" class="tk">i_dqMax</a> <a id="1826c23" class="tk">&lt;</a> <a id="1826c25" class="tk">rtDW</a>-&gt;<a id="1826c31" class="tk">UnitDelay_DSTATE_di</a>) <span class="br">{</span></td></tr>
 <tr name="1827" id="1827">
-<td><a id="l1827" class='ln'>1827</a></td><td><span class="ct">       *  Delay: '&lt;S88&gt;/Delay'</span></td></tr>
+<td><a id="l1827" class='ln'>1827</a></td><td>        <a id="1827c9" class="tk">rtb_Switch2_pl</a> = <a id="1827c26" class="tk">rtP</a>.<a id="1827c30" class="tk">i_dqMax</a>;</td></tr>
 <tr name="1828" id="1828">
-<td><a id="l1828" class='ln'>1828</a></td><td><span class="ct">       *  Inport: '&lt;S30&gt;/r_currTgt'</span></td></tr>
+<td><a id="l1828" class='ln'>1828</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1829" id="1829">
-<td><a id="l1829" class='ln'>1829</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1829" class='ln'>1829</a></td><td>        <a id="1829c9" class="tk">rtb_Switch2_pl</a> = <a id="1829c26" class="tk">rtDW</a>-&gt;<a id="1829c32" class="tk">UnitDelay_DSTATE_di</a>;</td></tr>
 <tr name="1830" id="1830">
-<td><a id="l1830" class='ln'>1830</a></td><td>      <span class="kw">if</span> (<a id="1830c11" class="tk">rtDW</a>-&gt;<a id="1830c17" class="tk">r_currTgt</a> <a id="1830c27" class="tk">&lt;</a> <a id="1830c29" class="tk">rtDW</a>-&gt;<a id="1830c35" class="tk">Delay_DSTATE</a>) <span class="br">{</span></td></tr>
+<td><a id="l1830" class='ln'>1830</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1831" id="1831">
-<td><a id="l1831" class='ln'>1831</a></td><td>        <a id="1831c9" class="tk">rtb_Min</a> = <a id="1831c19" class="tk">rtDW</a>-&gt;<a id="1831c25" class="tk">r_currTgt</a>;</td></tr>
+<td><a id="l1831" class='ln'>1831</a></td><td></td></tr>
 <tr name="1832" id="1832">
-<td><a id="l1832" class='ln'>1832</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1832" class='ln'>1832</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S79&gt;/Min' */</span></td></tr>
 <tr name="1833" id="1833">
-<td><a id="l1833" class='ln'>1833</a></td><td>        <a id="1833c9" class="tk">rtb_Min</a> = <a id="1833c19" class="tk">rtDW</a>-&gt;<a id="1833c25" class="tk">Delay_DSTATE</a>;</td></tr>
+<td><a id="l1833" class='ln'>1833</a></td><td></td></tr>
 <tr name="1834" id="1834">
-<td><a id="l1834" class='ln'>1834</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1834" class='ln'>1834</a></td><td>      <span class="ct">/* MinMax: '&lt;S79&gt;/Min1' incorporates:</span></td></tr>
 <tr name="1835" id="1835">
-<td><a id="l1835" class='ln'>1835</a></td><td></td></tr>
+<td><a id="l1835" class='ln'>1835</a></td><td><span class="ct">       *  Constant: '&lt;S79&gt;/Constant6'</span></td></tr>
 <tr name="1836" id="1836">
-<td><a id="l1836" class='ln'>1836</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S88&gt;/Min' */</span></td></tr>
+<td><a id="l1836" class='ln'>1836</a></td><td><span class="ct">       *  Gain: '&lt;S79&gt;/Gain'</span></td></tr>
 <tr name="1837" id="1837">
-<td><a id="l1837" class='ln'>1837</a></td><td></td></tr>
+<td><a id="l1837" class='ln'>1837</a></td><td><span class="ct">       *  Gain: '&lt;S79&gt;/Gain1'</span></td></tr>
 <tr name="1838" id="1838">
-<td><a id="l1838" class='ln'>1838</a></td><td>      <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S88&gt;/PI_TrqSpdLim' */</span></td></tr>
+<td><a id="l1838" class='ln'>1838</a></td><td><span class="ct">       *  UnitDelay: '&lt;S79&gt;/Unit Delay'</span></td></tr>
 <tr name="1839" id="1839">
-<td><a id="l1839" class='ln'>1839</a></td><td>      <span class="ct">/* Delay: '&lt;S93&gt;/Resettable Delay' incorporates:</span></td></tr>
+<td><a id="l1839" class='ln'>1839</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1840" id="1840">
-<td><a id="l1840" class='ln'>1840</a></td><td><span class="ct">       *  DataTypeConversion: '&lt;S93&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l1840" class='ln'>1840</a></td><td>      <span class="kw">if</span> ((<a id="1840c12" class="tk">int16_T</a>)<a id="1840c20" class="tk">-</a><a id="1840c21" class="tk">rtDW</a>-&gt;<a id="1840c27" class="tk">UnitDelay_DSTATE_di</a> <a id="1840c47" class="tk">&gt;</a> (<a id="1840c50" class="tk">int16_T</a>)<a id="1840c58" class="tk">-</a><a id="1840c59" class="tk">rtP</a>.<a id="1840c63" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
 <tr name="1841" id="1841">
-<td><a id="l1841" class='ln'>1841</a></td><td><span class="ct">       *  Inport: '&lt;S30&gt;/r_currTgt'</span></td></tr>
+<td><a id="l1841" class='ln'>1841</a></td><td>        <a id="1841c9" class="tk">rtb_Gain_a</a> = (<a id="1841c23" class="tk">int16_T</a>)<a id="1841c31" class="tk">-</a><a id="1841c32" class="tk">rtDW</a>-&gt;<a id="1841c38" class="tk">UnitDelay_DSTATE_di</a>;</td></tr>
 <tr name="1842" id="1842">
-<td><a id="l1842" class='ln'>1842</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1842" class='ln'>1842</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1843" id="1843">
-<td><a id="l1843" class='ln'>1843</a></td><td>      <span class="kw">if</span> ((<a id="1843c12" class="tk">rtb_DataTypeConversion_j</a> <a id="1843c37" class="tk">&gt;</a> 0) <a id="1843c42" class="tk">&amp;&amp;</a></td></tr>
+<td><a id="l1843" class='ln'>1843</a></td><td>        <a id="1843c9" class="tk">rtb_Gain_a</a> = (<a id="1843c23" class="tk">int16_T</a>)<a id="1843c31" class="tk">-</a><a id="1843c32" class="tk">rtP</a>.<a id="1843c36" class="tk">i_dqMax</a>;</td></tr>
 <tr name="1844" id="1844">
-<td><a id="l1844" class='ln'>1844</a></td><td>          (<a id="1844c12" class="tk">rtPrevZCX</a>-&gt;<a id="1844c23" class="tk">ResettableDelay_Reset_ZCE_a</a> <a id="1844c51" class="tk">!=</a> 1)) <span class="br">{</span></td></tr>
+<td><a id="l1844" class='ln'>1844</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1845" id="1845">
-<td><a id="l1845" class='ln'>1845</a></td><td>        <a id="1845c9" class="tk">rtDW</a>-&gt;<a id="1845c15" class="tk">icLoad_k</a> = 1U;</td></tr>
+<td><a id="l1845" class='ln'>1845</a></td><td></td></tr>
 <tr name="1846" id="1846">
-<td><a id="l1846" class='ln'>1846</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1846" class='ln'>1846</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S79&gt;/Min1' */</span></td></tr>
 <tr name="1847" id="1847">
 <td><a id="l1847" class='ln'>1847</a></td><td></td></tr>
 <tr name="1848" id="1848">
-<td><a id="l1848" class='ln'>1848</a></td><td>      <a id="1848c7" class="tk">rtPrevZCX</a>-&gt;<a id="1848c18" class="tk">ResettableDelay_Reset_ZCE_a</a> = (<a id="1848c49" class="tk">ZCSigState</a>)</td></tr>
+<td><a id="l1848" class='ln'>1848</a></td><td>      <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="1849" id="1849">
-<td><a id="l1849" class='ln'>1849</a></td><td>        (<a id="1849c10" class="tk">rtb_DataTypeConversion_j</a> <a id="1849c35" class="tk">&gt;</a> 0);</td></tr>
+<td><a id="l1849" class='ln'>1849</a></td><td>      <a id="1849c7" class="tk">rtb_Gain_h</a> = <a id="1849c20" class="tk">PI_backCalc_fixdt</a>(<a id="1849c38" class="tk">rtb_Switch2_au</a> <a id="1849c53" class="tk">-</a> <a id="1849c55" class="tk">rtb_Switch3</a>, <a id="1849c68" class="tk">rtP</a>.<a id="1849c72" class="tk">cf_nKp</a>,</td></tr>
 <tr name="1850" id="1850">
-<td><a id="l1850" class='ln'>1850</a></td><td>      <span class="kw">if</span> (<a id="1850c11" class="tk">rtDW</a>-&gt;<a id="1850c17" class="tk">icLoad_k</a> <a id="1850c26" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l1850" class='ln'>1850</a></td><td>        <a id="1850c9" class="tk">rtP</a>.<a id="1850c13" class="tk">cf_nKi</a>, <a id="1850c21" class="tk">rtP</a>.<a id="1850c25" class="tk">cf_nKb</a>, <a id="1850c33" class="tk">rtb_Switch2_pl</a>, <a id="1850c49" class="tk">rtb_Gain_a</a>, (<a id="1850c62" class="tk">int16_T</a>)</td></tr>
 <tr name="1851" id="1851">
-<td><a id="l1851" class='ln'>1851</a></td><td>        <a id="1851c9" class="tk">rtDW</a>-&gt;<a id="1851c15" class="tk">ResettableDelay_DSTATE_c</a> = <a id="1851c42" class="tk">rtDW</a>-&gt;<a id="1851c48" class="tk">r_currTgt</a> <a id="1851c58" class="tk">&lt;&lt;</a> 7;</td></tr>
+<td><a id="l1851" class='ln'>1851</a></td><td>        ((<a id="1851c11" class="tk">rtP</a>.<a id="1851c15" class="tk">cf_lastIqGain</a> <a id="1851c29" class="tk">*</a> <a id="1851c31" class="tk">rtDW</a>-&gt;<a id="1851c37" class="tk">UnitDelay1_DSTATE_jp</a>) <a id="1851c59" class="tk">&gt;&gt;</a> 15),</td></tr>
 <tr name="1852" id="1852">
-<td><a id="l1852" class='ln'>1852</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1852" class='ln'>1852</a></td><td>        <a id="1852c9" class="tk">rtb_DataTypeConversion_e</a>, <a id="1852c35" class="tk">&amp;</a><a id="1852c36" class="tk">rtDW</a>-&gt;<a id="1852c42" class="tk">PI_Speed</a>, <a id="1852c52" class="tk">&amp;</a><a id="1852c53" class="tk">rtPrevZCX</a>-&gt;<a id="1852c64" class="tk">PI_Speed</a>);</td></tr>
 <tr name="1853" id="1853">
 <td><a id="l1853" class='ln'>1853</a></td><td></td></tr>
 <tr name="1854" id="1854">
-<td><a id="l1854" class='ln'>1854</a></td><td>      <span class="ct">/* Product: '&lt;S92&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l1854" class='ln'>1854</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="1855" id="1855">
-<td><a id="l1855" class='ln'>1855</a></td><td><span class="ct">       *  Constant: '&lt;S88&gt;/Constant1'</span></td></tr>
+<td><a id="l1855" class='ln'>1855</a></td><td></td></tr>
 <tr name="1856" id="1856">
-<td><a id="l1856" class='ln'>1856</a></td><td><span class="ct">       *  Sum: '&lt;S88&gt;/Sum1'</span></td></tr>
+<td><a id="l1856" class='ln'>1856</a></td><td>      <span class="ct">/* Merge: '&lt;S65&gt;/Merge' incorporates:</span></td></tr>
 <tr name="1857" id="1857">
-<td><a id="l1857" class='ln'>1857</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1857" class='ln'>1857</a></td><td><span class="ct">       *  Constant: '&lt;S79&gt;/Constant1'</span></td></tr>
 <tr name="1858" id="1858">
-<td><a id="l1858" class='ln'>1858</a></td><td>      <a id="1858c7" class="tk">tmp_2</a> = (<a id="1858c16" class="tk">int64_T</a>)<a id="1858c24" class="tk">rtb_Switch_np</a> <a id="1858c38" class="tk">*</a> <a id="1858c40" class="tk">rtP</a>.<a id="1858c44" class="tk">cf_TrqLimKi</a>;</td></tr>
+<td><a id="l1858" class='ln'>1858</a></td><td><span class="ct">       *  Constant: '&lt;S79&gt;/Constant11'</span></td></tr>
 <tr name="1859" id="1859">
-<td><a id="l1859" class='ln'>1859</a></td><td>      <span class="kw">if</span> (<a id="1859c11" class="tk">tmp_2</a> <a id="1859c17" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l1859" class='ln'>1859</a></td><td><span class="ct">       *  Constant: '&lt;S79&gt;/Constant4'</span></td></tr>
 <tr name="1860" id="1860">
-<td><a id="l1860" class='ln'>1860</a></td><td>        <a id="1860c9" class="tk">tmp_2</a> = 2147483647LL;</td></tr>
+<td><a id="l1860" class='ln'>1860</a></td><td><span class="ct">       *  DataTypeConversion: '&lt;S79&gt;/Data Type Conversion'</span></td></tr>
 <tr name="1861" id="1861">
-<td><a id="l1861" class='ln'>1861</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1861" class='ln'>1861</a></td><td><span class="ct">       *  Gain: '&lt;S62&gt;/Gain'</span></td></tr>
 <tr name="1862" id="1862">
-<td><a id="l1862" class='ln'>1862</a></td><td>        <span class="kw">if</span> (<a id="1862c13" class="tk">tmp_2</a> <a id="1862c19" class="tk">&lt;</a> <a id="1862c21" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l1862" class='ln'>1862</a></td><td><span class="ct">       *  Sum: '&lt;S79&gt;/Sum1'</span></td></tr>
 <tr name="1863" id="1863">
-<td><a id="l1863" class='ln'>1863</a></td><td>          <a id="1863c11" class="tk">tmp_2</a> = <a id="1863c19" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l1863" class='ln'>1863</a></td><td><span class="ct">       *  Switch: '&lt;S20&gt;/Switch2'</span></td></tr>
 <tr name="1864" id="1864">
-<td><a id="l1864" class='ln'>1864</a></td><td>        <span class="br">}</span></td></tr>
+<td><a id="l1864" class='ln'>1864</a></td><td><span class="ct">       *  Switch: '&lt;S50&gt;/Switch2'</span></td></tr>
 <tr name="1865" id="1865">
-<td><a id="l1865" class='ln'>1865</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1865" class='ln'>1865</a></td><td><span class="ct">       *  Switch: '&lt;S83&gt;/Switch2'</span></td></tr>
 <tr name="1866" id="1866">
-<td><a id="l1866" class='ln'>1866</a></td><td></td></tr>
+<td><a id="l1866" class='ln'>1866</a></td><td><span class="ct">       *  UnitDelay: '&lt;S62&gt;/Unit Delay1'</span></td></tr>
 <tr name="1867" id="1867">
-<td><a id="l1867" class='ln'>1867</a></td><td>      <span class="ct">/* Sum: '&lt;S92&gt;/Sum2' incorporates:</span></td></tr>
+<td><a id="l1867" class='ln'>1867</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1868" id="1868">
-<td><a id="l1868" class='ln'>1868</a></td><td><span class="ct">       *  Product: '&lt;S92&gt;/Divide1'</span></td></tr>
+<td><a id="l1868" class='ln'>1868</a></td><td>      <a id="1868c7" class="tk">rtDW</a>-&gt;<a id="1868c13" class="tk">Merge</a> = (<a id="1868c22" class="tk">int16_T</a>)(<a id="1868c31" class="tk">rtb_Gain_h</a> <a id="1868c42" class="tk">&gt;&gt;</a> 9);</td></tr>
 <tr name="1869" id="1869">
-<td><a id="l1869" class='ln'>1869</a></td><td><span class="ct">       *  UnitDelay: '&lt;S92&gt;/Unit Delay'</span></td></tr>
+<td><a id="l1869" class='ln'>1869</a></td><td></td></tr>
 <tr name="1870" id="1870">
-<td><a id="l1870" class='ln'>1870</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1870" class='ln'>1870</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S65&gt;/speed_mode' */</span></td></tr>
 <tr name="1871" id="1871">
-<td><a id="l1871" class='ln'>1871</a></td><td>      <span class="kw">if</span> (((<a id="1871c13" class="tk">int32_T</a>)<a id="1871c21" class="tk">tmp_2</a> <a id="1871c27" class="tk">&lt;</a> 0) <a id="1871c32" class="tk">&amp;&amp;</a> (<a id="1871c36" class="tk">rtDW</a>-&gt;<a id="1871c42" class="tk">UnitDelay_DSTATE_n</a> <a id="1871c61" class="tk">&lt;</a> <a id="1871c63" class="tk">MIN_int32_T</a></td></tr>
+<td><a id="l1871" class='ln'>1871</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1872" id="1872">
-<td><a id="l1872" class='ln'>1872</a></td><td>           <a id="1872c12" class="tk">-</a> (<a id="1872c15" class="tk">int32_T</a>)<a id="1872c23" class="tk">tmp_2</a>)) <span class="br">{</span></td></tr>
+<td><a id="l1872" class='ln'>1872</a></td><td>      <a id="1872c7" class="tk">rtDW</a>-&gt;<a id="1872c13" class="tk">If_ActiveSubsystem_k</a> = 1;</td></tr>
 <tr name="1873" id="1873">
-<td><a id="l1873" class='ln'>1873</a></td><td>        <a id="1873c9" class="tk">rtb_Divide_idx_0</a> = <a id="1873c28" class="tk">MIN_int32_T</a>;</td></tr>
+<td><a id="l1873" class='ln'>1873</a></td><td></td></tr>
 <tr name="1874" id="1874">
-<td><a id="l1874" class='ln'>1874</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (((<a id="1874c20" class="tk">int32_T</a>)<a id="1874c28" class="tk">tmp_2</a> <a id="1874c34" class="tk">&gt;</a> 0) <a id="1874c39" class="tk">&amp;&amp;</a> (<a id="1874c43" class="tk">rtDW</a>-&gt;<a id="1874c49" class="tk">UnitDelay_DSTATE_n</a> <a id="1874c68" class="tk">&gt;</a> <a id="1874c70" class="tk">MAX_int32_T</a></td></tr>
+<td><a id="l1874" class='ln'>1874</a></td><td>      <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S65&gt;/torque_mode' incorporates:</span></td></tr>
 <tr name="1875" id="1875">
-<td><a id="l1875" class='ln'>1875</a></td><td>                  <a id="1875c19" class="tk">-</a> (<a id="1875c22" class="tk">int32_T</a>)<a id="1875c30" class="tk">tmp_2</a>)) <span class="br">{</span></td></tr>
+<td><a id="l1875" class='ln'>1875</a></td><td><span class="ct">       *  ActionPort: '&lt;S80&gt;/Action Port'</span></td></tr>
 <tr name="1876" id="1876">
-<td><a id="l1876" class='ln'>1876</a></td><td>        <a id="1876c9" class="tk">rtb_Divide_idx_0</a> = <a id="1876c28" class="tk">MAX_int32_T</a>;</td></tr>
+<td><a id="l1876" class='ln'>1876</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1877" id="1877">
-<td><a id="l1877" class='ln'>1877</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1877" class='ln'>1877</a></td><td>      <span class="ct">/* Delay: '&lt;S80&gt;/Delay' incorporates:</span></td></tr>
 <tr name="1878" id="1878">
-<td><a id="l1878" class='ln'>1878</a></td><td>        <a id="1878c9" class="tk">rtb_Divide_idx_0</a> = (<a id="1878c29" class="tk">int32_T</a>)<a id="1878c37" class="tk">tmp_2</a> <a id="1878c43" class="tk">+</a> <a id="1878c45" class="tk">rtDW</a>-&gt;<a id="1878c51" class="tk">UnitDelay_DSTATE_n</a>;</td></tr>
+<td><a id="l1878" class='ln'>1878</a></td><td><span class="ct">       *  Switch: '&lt;S51&gt;/Switch2'</span></td></tr>
 <tr name="1879" id="1879">
-<td><a id="l1879" class='ln'>1879</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1879" class='ln'>1879</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1880" id="1880">
-<td><a id="l1880" class='ln'>1880</a></td><td></td></tr>
+<td><a id="l1880" class='ln'>1880</a></td><td>      <span class="kw">if</span> (<a id="1880c11" class="tk">rtDW</a>-&gt;<a id="1880c17" class="tk">icLoad_i</a> <a id="1880c26" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
 <tr name="1881" id="1881">
-<td><a id="l1881" class='ln'>1881</a></td><td>      <span class="ct">/* End of Sum: '&lt;S92&gt;/Sum2' */</span></td></tr>
+<td><a id="l1881" class='ln'>1881</a></td><td>        <a id="1881c9" class="tk">rtDW</a>-&gt;<a id="1881c15" class="tk">Delay_DSTATE</a> = <a id="1881c30" class="tk">rtb_Divide1_oy</a>;</td></tr>
 <tr name="1882" id="1882">
-<td><a id="l1882" class='ln'>1882</a></td><td></td></tr>
+<td><a id="l1882" class='ln'>1882</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1883" id="1883">
-<td><a id="l1883" class='ln'>1883</a></td><td>      <span class="ct">/* Sum: '&lt;S93&gt;/Sum1' incorporates:</span></td></tr>
+<td><a id="l1883" class='ln'>1883</a></td><td></td></tr>
 <tr name="1884" id="1884">
-<td><a id="l1884" class='ln'>1884</a></td><td><span class="ct">       *  Delay: '&lt;S93&gt;/Resettable Delay'</span></td></tr>
+<td><a id="l1884" class='ln'>1884</a></td><td>      <span class="ct">/* Switch: '&lt;S84&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1885" id="1885">
-<td><a id="l1885" class='ln'>1885</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1885" class='ln'>1885</a></td><td><span class="ct">       *  Delay: '&lt;S80&gt;/Delay'</span></td></tr>
 <tr name="1886" id="1886">
-<td><a id="l1886" class='ln'>1886</a></td><td>      <a id="1886c7" class="tk">tmp_2</a> = (((<a id="1886c18" class="tk">int64_T</a>)<a id="1886c26" class="tk">rtDW</a>-&gt;<a id="1886c32" class="tk">ResettableDelay_DSTATE_c</a> <a id="1886c57" class="tk">&lt;&lt;</a> 2) <a id="1886c63" class="tk">+</a> <a id="1886c65" class="tk">rtb_Divide_idx_0</a>)</td></tr>
+<td><a id="l1886" class='ln'>1886</a></td><td><span class="ct">       *  RelationalOperator: '&lt;S84&gt;/LowerRelop1'</span></td></tr>
 <tr name="1887" id="1887">
-<td><a id="l1887" class='ln'>1887</a></td><td>        <a id="1887c9" class="tk">&gt;&gt;</a> 2;</td></tr>
+<td><a id="l1887" class='ln'>1887</a></td><td><span class="ct">       *  Switch: '&lt;S51&gt;/Switch2'</span></td></tr>
 <tr name="1888" id="1888">
-<td><a id="l1888" class='ln'>1888</a></td><td>      <span class="kw">if</span> (<a id="1888c11" class="tk">tmp_2</a> <a id="1888c17" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l1888" class='ln'>1888</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1889" id="1889">
-<td><a id="l1889" class='ln'>1889</a></td><td>        <a id="1889c9" class="tk">tmp_2</a> = 2147483647LL;</td></tr>
+<td><a id="l1889" class='ln'>1889</a></td><td>      <span class="kw">if</span> (<a id="1889c11" class="tk">rtb_Divide1_oy</a> <a id="1889c26" class="tk">&gt;</a> <a id="1889c28" class="tk">rtDW</a>-&gt;<a id="1889c34" class="tk">Delay_DSTATE</a>) <span class="br">{</span></td></tr>
 <tr name="1890" id="1890">
-<td><a id="l1890" class='ln'>1890</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1890" class='ln'>1890</a></td><td>        <span class="ct">/* Merge: '&lt;S65&gt;/Merge' */</span></td></tr>
 <tr name="1891" id="1891">
-<td><a id="l1891" class='ln'>1891</a></td><td>        <span class="kw">if</span> (<a id="1891c13" class="tk">tmp_2</a> <a id="1891c19" class="tk">&lt;</a> <a id="1891c21" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l1891" class='ln'>1891</a></td><td>        <a id="1891c9" class="tk">rtDW</a>-&gt;<a id="1891c15" class="tk">Merge</a> = <a id="1891c23" class="tk">rtDW</a>-&gt;<a id="1891c29" class="tk">Delay_DSTATE</a>;</td></tr>
 <tr name="1892" id="1892">
-<td><a id="l1892" class='ln'>1892</a></td><td>          <a id="1892c11" class="tk">tmp_2</a> = <a id="1892c19" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l1892" class='ln'>1892</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1893" id="1893">
-<td><a id="l1893" class='ln'>1893</a></td><td>        <span class="br">}</span></td></tr>
+<td><a id="l1893" class='ln'>1893</a></td><td>        <span class="ct">/* Gain: '&lt;S80&gt;/Gain' */</span></td></tr>
 <tr name="1894" id="1894">
-<td><a id="l1894" class='ln'>1894</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1894" class='ln'>1894</a></td><td>        <a id="1894c9" class="tk">rtb_Gain_h</a> = <a id="1894c22" class="tk">-</a>32768 <a id="1894c29" class="tk">*</a> <a id="1894c31" class="tk">rtDW</a>-&gt;<a id="1894c37" class="tk">Delay_DSTATE</a>;</td></tr>
 <tr name="1895" id="1895">
 <td><a id="l1895" class='ln'>1895</a></td><td></td></tr>
 <tr name="1896" id="1896">
-<td><a id="l1896" class='ln'>1896</a></td><td>      <a id="1896c7" class="tk">rtb_Sum1_f</a> = (<a id="1896c21" class="tk">int32_T</a>)<a id="1896c29" class="tk">tmp_2</a>;</td></tr>
+<td><a id="l1896" class='ln'>1896</a></td><td>        <span class="ct">/* Switch: '&lt;S84&gt;/Switch' incorporates:</span></td></tr>
 <tr name="1897" id="1897">
-<td><a id="l1897" class='ln'>1897</a></td><td></td></tr>
+<td><a id="l1897" class='ln'>1897</a></td><td><span class="ct">         *  Gain: '&lt;S80&gt;/Gain'</span></td></tr>
 <tr name="1898" id="1898">
-<td><a id="l1898" class='ln'>1898</a></td><td>      <span class="ct">/* End of Sum: '&lt;S93&gt;/Sum1' */</span></td></tr>
+<td><a id="l1898" class='ln'>1898</a></td><td><span class="ct">         *  RelationalOperator: '&lt;S84&gt;/UpperRelop'</span></td></tr>
 <tr name="1899" id="1899">
-<td><a id="l1899" class='ln'>1899</a></td><td></td></tr>
+<td><a id="l1899" class='ln'>1899</a></td><td><span class="ct">         */</span></td></tr>
 <tr name="1900" id="1900">
-<td><a id="l1900" class='ln'>1900</a></td><td>      <span class="ct">/* Product: '&lt;S92&gt;/Divide4' incorporates:</span></td></tr>
+<td><a id="l1900" class='ln'>1900</a></td><td>        <span class="kw">if</span> ((<a id="1900c14" class="tk">rtb_Divide1_oy</a> <a id="1900c29" class="tk">&lt;&lt;</a> 15) <a id="1900c36" class="tk">&lt;</a> <a id="1900c38" class="tk">rtb_Gain_h</a>) <span class="br">{</span></td></tr>
 <tr name="1901" id="1901">
-<td><a id="l1901" class='ln'>1901</a></td><td><span class="ct">       *  Constant: '&lt;S88&gt;/Constant4'</span></td></tr>
+<td><a id="l1901" class='ln'>1901</a></td><td>          <span class="ct">/* Merge: '&lt;S65&gt;/Merge' */</span></td></tr>
 <tr name="1902" id="1902">
-<td><a id="l1902" class='ln'>1902</a></td><td><span class="ct">       *  Sum: '&lt;S88&gt;/Sum1'</span></td></tr>
+<td><a id="l1902" class='ln'>1902</a></td><td>          <a id="1902c11" class="tk">rtDW</a>-&gt;<a id="1902c17" class="tk">Merge</a> = (<a id="1902c26" class="tk">int16_T</a>)(<a id="1902c35" class="tk">rtb_Gain_h</a> <a id="1902c46" class="tk">&gt;&gt;</a> 15);</td></tr>
 <tr name="1903" id="1903">
-<td><a id="l1903" class='ln'>1903</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1903" class='ln'>1903</a></td><td>        <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1904" id="1904">
-<td><a id="l1904" class='ln'>1904</a></td><td>      <a id="1904c7" class="tk">tmp_2</a> = (<a id="1904c16" class="tk">int64_T</a>)<a id="1904c24" class="tk">rtb_Switch_np</a> <a id="1904c38" class="tk">*</a> <a id="1904c40" class="tk">rtP</a>.<a id="1904c44" class="tk">cf_TrqLimKp</a>;</td></tr>
+<td><a id="l1904" class='ln'>1904</a></td><td>          <span class="ct">/* Merge: '&lt;S65&gt;/Merge' */</span></td></tr>
 <tr name="1905" id="1905">
-<td><a id="l1905" class='ln'>1905</a></td><td>      <span class="kw">if</span> (<a id="1905c11" class="tk">tmp_2</a> <a id="1905c17" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l1905" class='ln'>1905</a></td><td>          <a id="1905c11" class="tk">rtDW</a>-&gt;<a id="1905c17" class="tk">Merge</a> = <a id="1905c25" class="tk">rtb_Divide1_oy</a>;</td></tr>
 <tr name="1906" id="1906">
-<td><a id="l1906" class='ln'>1906</a></td><td>        <a id="1906c9" class="tk">tmp_2</a> = 2147483647LL;</td></tr>
+<td><a id="l1906" class='ln'>1906</a></td><td>        <span class="br">}</span></td></tr>
 <tr name="1907" id="1907">
-<td><a id="l1907" class='ln'>1907</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1907" class='ln'>1907</a></td><td></td></tr>
 <tr name="1908" id="1908">
-<td><a id="l1908" class='ln'>1908</a></td><td>        <span class="kw">if</span> (<a id="1908c13" class="tk">tmp_2</a> <a id="1908c19" class="tk">&lt;</a> <a id="1908c21" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l1908" class='ln'>1908</a></td><td>        <span class="ct">/* End of Switch: '&lt;S84&gt;/Switch' */</span></td></tr>
 <tr name="1909" id="1909">
-<td><a id="l1909" class='ln'>1909</a></td><td>          <a id="1909c11" class="tk">tmp_2</a> = <a id="1909c19" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l1909" class='ln'>1909</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1910" id="1910">
-<td><a id="l1910" class='ln'>1910</a></td><td>        <span class="br">}</span></td></tr>
+<td><a id="l1910" class='ln'>1910</a></td><td></td></tr>
 <tr name="1911" id="1911">
-<td><a id="l1911" class='ln'>1911</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1911" class='ln'>1911</a></td><td>      <span class="ct">/* End of Switch: '&lt;S84&gt;/Switch2' */</span></td></tr>
 <tr name="1912" id="1912">
-<td><a id="l1912" class='ln'>1912</a></td><td></td></tr>
+<td><a id="l1912" class='ln'>1912</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S65&gt;/torque_mode' */</span></td></tr>
 <tr name="1913" id="1913">
-<td><a id="l1913" class='ln'>1913</a></td><td>      <span class="ct">/* Sum: '&lt;S92&gt;/Sum6' incorporates:</span></td></tr>
+<td><a id="l1913" class='ln'>1913</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1914" id="1914">
-<td><a id="l1914" class='ln'>1914</a></td><td><span class="ct">       *  DataTypeConversion: '&lt;S93&gt;/Data Type Conversion1'</span></td></tr>
+<td><a id="l1914" class='ln'>1914</a></td><td></td></tr>
 <tr name="1915" id="1915">
-<td><a id="l1915" class='ln'>1915</a></td><td><span class="ct">       *  Product: '&lt;S92&gt;/Divide4'</span></td></tr>
+<td><a id="l1915" class='ln'>1915</a></td><td>    <span class="ct">/* End of If: '&lt;S65&gt;/If' */</span></td></tr>
 <tr name="1916" id="1916">
-<td><a id="l1916" class='ln'>1916</a></td><td><span class="ct">       *  Sum: '&lt;S93&gt;/Sum1'</span></td></tr>
+<td><a id="l1916" class='ln'>1916</a></td><td></td></tr>
 <tr name="1917" id="1917">
-<td><a id="l1917" class='ln'>1917</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1917" class='ln'>1917</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S67&gt;/MTPA_Calc' incorporates:</span></td></tr>
 <tr name="1918" id="1918">
-<td><a id="l1918" class='ln'>1918</a></td><td>      <a id="1918c7" class="tk">tmp_2</a> = (<a id="1918c16" class="tk">int64_T</a>)(<a id="1918c25" class="tk">rtb_Sum1_f</a> <a id="1918c36" class="tk">&lt;&lt;</a> 2) <a id="1918c42" class="tk">+</a> (<a id="1918c45" class="tk">int32_T</a>)<a id="1918c53" class="tk">tmp_2</a>;</td></tr>
+<td><a id="l1918" class='ln'>1918</a></td><td><span class="ct">     *  ActionPort: '&lt;S72&gt;/Action Port'</span></td></tr>
 <tr name="1919" id="1919">
-<td><a id="l1919" class='ln'>1919</a></td><td>      <span class="kw">if</span> (<a id="1919c11" class="tk">tmp_2</a> <a id="1919c17" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l1919" class='ln'>1919</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1920" id="1920">
-<td><a id="l1920" class='ln'>1920</a></td><td>        <a id="1920c9" class="tk">tmp_2</a> = 2147483647LL;</td></tr>
+<td><a id="l1920" class='ln'>1920</a></td><td>    <span class="ct">/* If: '&lt;S67&gt;/If' incorporates:</span></td></tr>
 <tr name="1921" id="1921">
-<td><a id="l1921" class='ln'>1921</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1921" class='ln'>1921</a></td><td><span class="ct">     *  Constant: '&lt;S72&gt;/Constant3'</span></td></tr>
 <tr name="1922" id="1922">
-<td><a id="l1922" class='ln'>1922</a></td><td>        <span class="kw">if</span> (<a id="1922c13" class="tk">tmp_2</a> <a id="1922c19" class="tk">&lt;</a> <a id="1922c21" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l1922" class='ln'>1922</a></td><td><span class="ct">     *  Merge: '&lt;S67&gt;/Merge'</span></td></tr>
 <tr name="1923" id="1923">
-<td><a id="l1923" class='ln'>1923</a></td><td>          <a id="1923c11" class="tk">tmp_2</a> = <a id="1923c19" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l1923" class='ln'>1923</a></td><td><span class="ct">     *  Switch: '&lt;S72&gt;/Switch'</span></td></tr>
 <tr name="1924" id="1924">
-<td><a id="l1924" class='ln'>1924</a></td><td>        <span class="br">}</span></td></tr>
+<td><a id="l1924" class='ln'>1924</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1925" id="1925">
-<td><a id="l1925" class='ln'>1925</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1925" class='ln'>1925</a></td><td>    <a id="1925c5" class="tk">rtDW</a>-&gt;<a id="1925c11" class="tk">Merge_i</a>[0] = 0;</td></tr>
 <tr name="1926" id="1926">
-<td><a id="l1926" class='ln'>1926</a></td><td></td></tr>
+<td><a id="l1926" class='ln'>1926</a></td><td>    <a id="1926c5" class="tk">rtDW</a>-&gt;<a id="1926c11" class="tk">Merge_i</a>[1] = <a id="1926c24" class="tk">rtDW</a>-&gt;<a id="1926c30" class="tk">Merge</a>;</td></tr>
 <tr name="1927" id="1927">
-<td><a id="l1927" class='ln'>1927</a></td><td>      <a id="1927c7" class="tk">rtb_Switch_np</a> = (<a id="1927c24" class="tk">int32_T</a>)<a id="1927c32" class="tk">tmp_2</a>;</td></tr>
+<td><a id="l1927" class='ln'>1927</a></td><td></td></tr>
 <tr name="1928" id="1928">
-<td><a id="l1928" class='ln'>1928</a></td><td></td></tr>
+<td><a id="l1928" class='ln'>1928</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S67&gt;/MTPA_Calc' */</span></td></tr>
 <tr name="1929" id="1929">
-<td><a id="l1929" class='ln'>1929</a></td><td>      <span class="ct">/* End of Sum: '&lt;S92&gt;/Sum6' */</span></td></tr>
+<td><a id="l1929" class='ln'>1929</a></td><td></td></tr>
 <tr name="1930" id="1930">
-<td><a id="l1930" class='ln'>1930</a></td><td></td></tr>
+<td><a id="l1930" class='ln'>1930</a></td><td>    <span class="ct">/* Sum: '&lt;S66&gt;/Sum' incorporates:</span></td></tr>
 <tr name="1931" id="1931">
-<td><a id="l1931" class='ln'>1931</a></td><td>      <span class="ct">/* RelationalOperator: '&lt;S94&gt;/LowerRelop1' incorporates:</span></td></tr>
+<td><a id="l1931" class='ln'>1931</a></td><td><span class="ct">     *  Constant: '&lt;S66&gt;/Constant3'</span></td></tr>
 <tr name="1932" id="1932">
-<td><a id="l1932" class='ln'>1932</a></td><td><span class="ct">       *  MinMax: '&lt;S88&gt;/Min'</span></td></tr>
+<td><a id="l1932" class='ln'>1932</a></td><td><span class="ct">     *  UnitDelay: '&lt;S66&gt;/Unit Delay1'</span></td></tr>
 <tr name="1933" id="1933">
-<td><a id="l1933" class='ln'>1933</a></td><td><span class="ct">       *  Switch: '&lt;S94&gt;/Switch2'</span></td></tr>
+<td><a id="l1933" class='ln'>1933</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1934" id="1934">
-<td><a id="l1934" class='ln'>1934</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1934" class='ln'>1934</a></td><td>    <a id="1934c5" class="tk">rtb_RelationalOperator4_b</a> = (<a id="1934c34" class="tk">rtP</a>.<a id="1934c38" class="tk">V_modulation</a> <a id="1934c51" class="tk">-</a> <a id="1934c53" class="tk">rtDW</a>-&gt;<a id="1934c59" class="tk">UnitDelay1_DSTATE_pl</a>) <a id="1934c81" class="tk">&gt;&gt;</a></td></tr>
 <tr name="1935" id="1935">
-<td><a id="l1935" class='ln'>1935</a></td><td>      <a id="1935c7" class="tk">rtb_Divide_idx_0</a> = <a id="1935c26" class="tk">rtb_Min</a> <a id="1935c34" class="tk">&lt;&lt;</a> 9;</td></tr>
+<td><a id="l1935" class='ln'>1935</a></td><td>      1;</td></tr>
 <tr name="1936" id="1936">
-<td><a id="l1936" class='ln'>1936</a></td><td></td></tr>
+<td><a id="l1936" class='ln'>1936</a></td><td>    <span class="kw">if</span> (<a id="1936c9" class="tk">rtb_RelationalOperator4_b</a> <a id="1936c35" class="tk">&lt;</a> <a id="1936c37" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="1937" id="1937">
-<td><a id="l1937" class='ln'>1937</a></td><td>      <span class="ct">/* Switch: '&lt;S94&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l1937" class='ln'>1937</a></td><td>      <a id="1937c7" class="tk">rtb_RelationalOperator4_b</a> = <a id="1937c35" class="tk">-</a>32768;</td></tr>
 <tr name="1938" id="1938">
-<td><a id="l1938" class='ln'>1938</a></td><td><span class="ct">       *  RelationalOperator: '&lt;S94&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l1938" class='ln'>1938</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1939" id="1939">
-<td><a id="l1939" class='ln'>1939</a></td><td><span class="ct">       *  Sum: '&lt;S92&gt;/Sum6'</span></td></tr>
+<td><a id="l1939" class='ln'>1939</a></td><td></td></tr>
 <tr name="1940" id="1940">
-<td><a id="l1940" class='ln'>1940</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1940" class='ln'>1940</a></td><td>    <span class="ct">/* Delay: '&lt;S70&gt;/Resettable Delay' incorporates:</span></td></tr>
 <tr name="1941" id="1941">
-<td><a id="l1941" class='ln'>1941</a></td><td>      <span class="kw">if</span> (<a id="1941c11" class="tk">rtb_Switch_np</a> <a id="1941c25" class="tk">&gt;</a> <a id="1941c27" class="tk">rtb_Divide_idx_0</a>) <span class="br">{</span></td></tr>
+<td><a id="l1941" class='ln'>1941</a></td><td><span class="ct">     *  Constant: '&lt;S66&gt;/Constant4'</span></td></tr>
 <tr name="1942" id="1942">
-<td><a id="l1942" class='ln'>1942</a></td><td>        <a id="1942c9" class="tk">rtb_Gain_b0</a> = <a id="1942c23" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l1942" class='ln'>1942</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S70&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="1943" id="1943">
-<td><a id="l1943" class='ln'>1943</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1943" class='ln'>1943</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1944" id="1944">
-<td><a id="l1944" class='ln'>1944</a></td><td>        <span class="ct">/* Gain: '&lt;S92&gt;/Gain' incorporates:</span></td></tr>
+<td><a id="l1944" class='ln'>1944</a></td><td>    <span class="kw">if</span> ((<a id="1944c10" class="tk">rtb_DataTypeConversion_e</a> <a id="1944c35" class="tk">&gt;</a> 0) <a id="1944c40" class="tk">&amp;&amp;</a></td></tr>
 <tr name="1945" id="1945">
-<td><a id="l1945" class='ln'>1945</a></td><td><span class="ct">         *  MinMax: '&lt;S88&gt;/Min'</span></td></tr>
+<td><a id="l1945" class='ln'>1945</a></td><td>        (<a id="1945c10" class="tk">rtPrevZCX</a>-&gt;<a id="1945c21" class="tk">ResettableDelay_Reset_ZCE_f</a> <a id="1945c49" class="tk">!=</a> 1)) <span class="br">{</span></td></tr>
 <tr name="1946" id="1946">
-<td><a id="l1946" class='ln'>1946</a></td><td><span class="ct">         */</span></td></tr>
+<td><a id="l1946" class='ln'>1946</a></td><td>      <a id="1946c7" class="tk">rtDW</a>-&gt;<a id="1946c13" class="tk">icLoad</a> = 1U;</td></tr>
 <tr name="1947" id="1947">
-<td><a id="l1947" class='ln'>1947</a></td><td>        <a id="1947c9" class="tk">rtb_Gain_b0</a> = <a id="1947c23" class="tk">-</a>32768 <a id="1947c30" class="tk">*</a> <a id="1947c32" class="tk">rtb_Min</a>;</td></tr>
+<td><a id="l1947" class='ln'>1947</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1948" id="1948">
 <td><a id="l1948" class='ln'>1948</a></td><td></td></tr>
 <tr name="1949" id="1949">
-<td><a id="l1949" class='ln'>1949</a></td><td>        <span class="ct">/* Switch: '&lt;S94&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l1949" class='ln'>1949</a></td><td>    <a id="1949c5" class="tk">rtPrevZCX</a>-&gt;<a id="1949c16" class="tk">ResettableDelay_Reset_ZCE_f</a> = (<a id="1949c47" class="tk">ZCSigState</a>)</td></tr>
 <tr name="1950" id="1950">
-<td><a id="l1950" class='ln'>1950</a></td><td><span class="ct">         *  Gain: '&lt;S92&gt;/Gain'</span></td></tr>
+<td><a id="l1950" class='ln'>1950</a></td><td>      (<a id="1950c8" class="tk">rtb_DataTypeConversion_e</a> <a id="1950c33" class="tk">&gt;</a> 0);</td></tr>
 <tr name="1951" id="1951">
-<td><a id="l1951" class='ln'>1951</a></td><td><span class="ct">         *  RelationalOperator: '&lt;S94&gt;/UpperRelop'</span></td></tr>
+<td><a id="l1951" class='ln'>1951</a></td><td>    <span class="kw">if</span> (<a id="1951c9" class="tk">rtDW</a>-&gt;<a id="1951c15" class="tk">icLoad</a> <a id="1951c22" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
 <tr name="1952" id="1952">
-<td><a id="l1952" class='ln'>1952</a></td><td><span class="ct">         *  Switch: '&lt;S94&gt;/Switch2'</span></td></tr>
+<td><a id="l1952" class='ln'>1952</a></td><td>      <a id="1952c7" class="tk">rtDW</a>-&gt;<a id="1952c13" class="tk">ResettableDelay_DSTATE</a> = 0;</td></tr>
 <tr name="1953" id="1953">
-<td><a id="l1953" class='ln'>1953</a></td><td><span class="ct">         */</span></td></tr>
+<td><a id="l1953" class='ln'>1953</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1954" id="1954">
-<td><a id="l1954" class='ln'>1954</a></td><td>        <span class="kw">if</span> (((<a id="1954c15" class="tk">int64_T</a>)<a id="1954c23" class="tk">rtb_Switch_np</a> <a id="1954c37" class="tk">&lt;&lt;</a> 6) <a id="1954c43" class="tk">&lt;</a> <a id="1954c45" class="tk">rtb_Gain_b0</a>) <span class="br">{</span></td></tr>
+<td><a id="l1954" class='ln'>1954</a></td><td></td></tr>
 <tr name="1955" id="1955">
-<td><a id="l1955" class='ln'>1955</a></td><td>          <a id="1955c11" class="tk">rtb_Gain_b0</a> <a id="1955c23" class="tk">&gt;&gt;=</a> 6;</td></tr>
+<td><a id="l1955" class='ln'>1955</a></td><td>    <span class="ct">/* Signum: '&lt;S66&gt;/Sign' incorporates:</span></td></tr>
 <tr name="1956" id="1956">
-<td><a id="l1956" class='ln'>1956</a></td><td>        <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l1956" class='ln'>1956</a></td><td><span class="ct">     *  Sum: '&lt;S66&gt;/Sum'</span></td></tr>
 <tr name="1957" id="1957">
-<td><a id="l1957" class='ln'>1957</a></td><td>          <a id="1957c11" class="tk">rtb_Gain_b0</a> = <a id="1957c25" class="tk">rtb_Switch_np</a>;</td></tr>
+<td><a id="l1957" class='ln'>1957</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1958" id="1958">
-<td><a id="l1958" class='ln'>1958</a></td><td>        <span class="br">}</span></td></tr>
+<td><a id="l1958" class='ln'>1958</a></td><td>    <span class="kw">if</span> ((<a id="1958c10" class="tk">int16_T</a>)<a id="1958c18" class="tk">rtb_RelationalOperator4_b</a> <a id="1958c44" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="1959" id="1959">
-<td><a id="l1959" class='ln'>1959</a></td><td></td></tr>
+<td><a id="l1959" class='ln'>1959</a></td><td>      <a id="1959c7" class="tk">rtb_Switch2_pl</a> = <a id="1959c24" class="tk">-</a>1;</td></tr>
 <tr name="1960" id="1960">
-<td><a id="l1960" class='ln'>1960</a></td><td>        <span class="ct">/* End of Switch: '&lt;S94&gt;/Switch' */</span></td></tr>
+<td><a id="l1960" class='ln'>1960</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1961" id="1961">
-<td><a id="l1961" class='ln'>1961</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l1961" class='ln'>1961</a></td><td>      <a id="1961c7" class="tk">rtb_Switch2_pl</a> = (<a id="1961c25" class="tk">int16_T</a>)((<a id="1961c35" class="tk">int16_T</a>)<a id="1961c43" class="tk">rtb_RelationalOperator4_b</a> <a id="1961c69" class="tk">&gt;</a> 0);</td></tr>
 <tr name="1962" id="1962">
-<td><a id="l1962" class='ln'>1962</a></td><td></td></tr>
+<td><a id="l1962" class='ln'>1962</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="1963" id="1963">
-<td><a id="l1963" class='ln'>1963</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S92&gt;/Unit Delay' incorporates:</span></td></tr>
+<td><a id="l1963" class='ln'>1963</a></td><td></td></tr>
 <tr name="1964" id="1964">
-<td><a id="l1964" class='ln'>1964</a></td><td><span class="ct">       *  Constant: '&lt;S88&gt;/Constant2'</span></td></tr>
+<td><a id="l1964" class='ln'>1964</a></td><td>    <span class="ct">/* End of Signum: '&lt;S66&gt;/Sign' */</span></td></tr>
 <tr name="1965" id="1965">
-<td><a id="l1965" class='ln'>1965</a></td><td><span class="ct">       *  Product: '&lt;S92&gt;/Divide2'</span></td></tr>
+<td><a id="l1965" class='ln'>1965</a></td><td></td></tr>
 <tr name="1966" id="1966">
-<td><a id="l1966" class='ln'>1966</a></td><td><span class="ct">       *  Sum: '&lt;S92&gt;/Sum3'</span></td></tr>
+<td><a id="l1966" class='ln'>1966</a></td><td>    <span class="ct">/* Sum: '&lt;S70&gt;/Sum1' incorporates:</span></td></tr>
 <tr name="1967" id="1967">
-<td><a id="l1967" class='ln'>1967</a></td><td><span class="ct">       *  Sum: '&lt;S92&gt;/Sum6'</span></td></tr>
+<td><a id="l1967" class='ln'>1967</a></td><td><span class="ct">     *  Constant: '&lt;S66&gt;/Constant2'</span></td></tr>
 <tr name="1968" id="1968">
-<td><a id="l1968" class='ln'>1968</a></td><td><span class="ct">       *  Switch: '&lt;S94&gt;/Switch2'</span></td></tr>
+<td><a id="l1968" class='ln'>1968</a></td><td><span class="ct">     *  Constant: '&lt;S66&gt;/Constant5'</span></td></tr>
 <tr name="1969" id="1969">
-<td><a id="l1969" class='ln'>1969</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1969" class='ln'>1969</a></td><td><span class="ct">     *  Delay: '&lt;S70&gt;/Resettable Delay'</span></td></tr>
 <tr name="1970" id="1970">
-<td><a id="l1970" class='ln'>1970</a></td><td>      <a id="1970c7" class="tk">rtDW</a>-&gt;<a id="1970c13" class="tk">UnitDelay_DSTATE_n</a> = (<a id="1970c35" class="tk">int32_T</a>)(((<a id="1970c46" class="tk">int64_T</a>)(<a id="1970c55" class="tk">rtb_Gain_b0</a> <a id="1970c67" class="tk">-</a></td></tr>
+<td><a id="l1970" class='ln'>1970</a></td><td><span class="ct">     *  Product: '&lt;S69&gt;/Divide'</span></td></tr>
 <tr name="1971" id="1971">
-<td><a id="l1971" class='ln'>1971</a></td><td>        <a id="1971c9" class="tk">rtb_Switch_np</a>) <a id="1971c24" class="tk">*</a> <a id="1971c26" class="tk">rtP</a>.<a id="1971c30" class="tk">cf_TrqLimKb</a>) <a id="1971c43" class="tk">&gt;&gt;</a> 10);</td></tr>
+<td><a id="l1971" class='ln'>1971</a></td><td><span class="ct">     *  Product: '&lt;S69&gt;/Divide1'</span></td></tr>
 <tr name="1972" id="1972">
-<td><a id="l1972" class='ln'>1972</a></td><td></td></tr>
+<td><a id="l1972" class='ln'>1972</a></td><td><span class="ct">     *  Sum: '&lt;S69&gt;/Add'</span></td></tr>
 <tr name="1973" id="1973">
-<td><a id="l1973" class='ln'>1973</a></td><td>      <span class="ct">/* Update for Delay: '&lt;S93&gt;/Resettable Delay' incorporates:</span></td></tr>
+<td><a id="l1973" class='ln'>1973</a></td><td><span class="ct">     *  UnitDelay: '&lt;S69&gt;/Unit Delay'</span></td></tr>
 <tr name="1974" id="1974">
-<td><a id="l1974" class='ln'>1974</a></td><td><span class="ct">       *  Sum: '&lt;S93&gt;/Sum1'</span></td></tr>
+<td><a id="l1974" class='ln'>1974</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1975" id="1975">
-<td><a id="l1975" class='ln'>1975</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1975" class='ln'>1975</a></td><td>    <a id="1975c5" class="tk">rtb_Gain_h</a> = (((((<a id="1975c23" class="tk">rtP</a>.<a id="1975c27" class="tk">cf_Fw_Kb</a> <a id="1975c36" class="tk">*</a> <a id="1975c38" class="tk">rtDW</a>-&gt;<a id="1975c44" class="tk">UnitDelay_DSTATE_l</a>) <a id="1975c64" class="tk">&lt;&lt;</a> 6) <a id="1975c70" class="tk">&gt;&gt;</a> 12) <a id="1975c77" class="tk">+</a></td></tr>
 <tr name="1976" id="1976">
-<td><a id="l1976" class='ln'>1976</a></td><td>      <a id="1976c7" class="tk">rtDW</a>-&gt;<a id="1976c13" class="tk">icLoad_k</a> = 0U;</td></tr>
+<td><a id="l1976" class='ln'>1976</a></td><td>                   <a id="1976c20" class="tk">rtb_Switch2_pl</a> <a id="1976c35" class="tk">*</a> <a id="1976c37" class="tk">rtP</a>.<a id="1976c41" class="tk">cf_Fw_Ki</a>) <a id="1976c51" class="tk">&gt;&gt;</a> 4) <a id="1976c57" class="tk">+</a></td></tr>
 <tr name="1977" id="1977">
-<td><a id="l1977" class='ln'>1977</a></td><td>      <a id="1977c7" class="tk">rtDW</a>-&gt;<a id="1977c13" class="tk">ResettableDelay_DSTATE_c</a> = <a id="1977c40" class="tk">rtb_Sum1_f</a>;</td></tr>
+<td><a id="l1977" class='ln'>1977</a></td><td>      <a id="1977c7" class="tk">rtDW</a>-&gt;<a id="1977c13" class="tk">ResettableDelay_DSTATE</a>;</td></tr>
 <tr name="1978" id="1978">
 <td><a id="l1978" class='ln'>1978</a></td><td></td></tr>
 <tr name="1979" id="1979">
-<td><a id="l1979" class='ln'>1979</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S88&gt;/PI_TrqSpdLim' */</span></td></tr>
+<td><a id="l1979" class='ln'>1979</a></td><td>    <span class="ct">/* Switch: '&lt;S71&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="1980" id="1980">
-<td><a id="l1980" class='ln'>1980</a></td><td></td></tr>
+<td><a id="l1980" class='ln'>1980</a></td><td><span class="ct">     *  Constant: '&lt;S69&gt;/Constant6'</span></td></tr>
 <tr name="1981" id="1981">
-<td><a id="l1981" class='ln'>1981</a></td><td>      <span class="ct">/* Merge: '&lt;S73&gt;/Merge' incorporates:</span></td></tr>
+<td><a id="l1981" class='ln'>1981</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S71&gt;/LowerRelop1'</span></td></tr>
 <tr name="1982" id="1982">
-<td><a id="l1982" class='ln'>1982</a></td><td><span class="ct">       *  DataTypeConversion: '&lt;S88&gt;/Data Type Conversion'</span></td></tr>
+<td><a id="l1982" class='ln'>1982</a></td><td><span class="ct">     *  Sum: '&lt;S70&gt;/Sum1'</span></td></tr>
 <tr name="1983" id="1983">
-<td><a id="l1983" class='ln'>1983</a></td><td><span class="ct">       *  ManualSwitch: '&lt;S88&gt;/Manual Switch'</span></td></tr>
+<td><a id="l1983" class='ln'>1983</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="1984" id="1984">
-<td><a id="l1984" class='ln'>1984</a></td><td><span class="ct">       *  Switch: '&lt;S94&gt;/Switch2'</span></td></tr>
+<td><a id="l1984" class='ln'>1984</a></td><td>    <span class="kw">if</span> (<a id="1984c9" class="tk">rtb_Gain_h</a> <a id="1984c20" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="1985" id="1985">
-<td><a id="l1985" class='ln'>1985</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l1985" class='ln'>1985</a></td><td>      <a id="1985c7" class="tk">rtb_Divide_e_idx_2</a> = 0;</td></tr>
 <tr name="1986" id="1986">
-<td><a id="l1986" class='ln'>1986</a></td><td>      <a id="1986c7" class="tk">rtDW</a>-&gt;<a id="1986c13" class="tk">Merge_f</a> = (<a id="1986c24" class="tk">int16_T</a>)(<a id="1986c33" class="tk">rtb_Gain_b0</a> <a id="1986c45" class="tk">&gt;&gt;</a> 9);</td></tr>
+<td><a id="l1986" class='ln'>1986</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="1987" id="1987">
-<td><a id="l1987" class='ln'>1987</a></td><td></td></tr>
+<td><a id="l1987" class='ln'>1987</a></td><td>      <span class="ct">/* Gain: '&lt;S66&gt;/Gain1' */</span></td></tr>
 <tr name="1988" id="1988">
-<td><a id="l1988" class='ln'>1988</a></td><td>      <span class="ct">/* End of Outputs for SubSystem: '&lt;S73&gt;/torque_mode' */</span></td></tr>
+<td><a id="l1988" class='ln'>1988</a></td><td>      <a id="1988c7" class="tk">rtb_Switch2_au</a> = <a id="1988c24" class="tk">-</a>32768 <a id="1988c31" class="tk">*</a> <a id="1988c33" class="tk">rtDW</a>-&gt;<a id="1988c39" class="tk">Merge_i</a>[1];</td></tr>
 <tr name="1989" id="1989">
-<td><a id="l1989" class='ln'>1989</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l1989" class='ln'>1989</a></td><td></td></tr>
 <tr name="1990" id="1990">
-<td><a id="l1990" class='ln'>1990</a></td><td></td></tr>
+<td><a id="l1990" class='ln'>1990</a></td><td>      <span class="ct">/* MinMax: '&lt;S66&gt;/Max' incorporates:</span></td></tr>
 <tr name="1991" id="1991">
-<td><a id="l1991" class='ln'>1991</a></td><td>    <span class="ct">/* End of If: '&lt;S73&gt;/If' */</span></td></tr>
+<td><a id="l1991" class='ln'>1991</a></td><td><span class="ct">       *  Constant: '&lt;S66&gt;/Constant6'</span></td></tr>
 <tr name="1992" id="1992">
-<td><a id="l1992" class='ln'>1992</a></td><td></td></tr>
+<td><a id="l1992" class='ln'>1992</a></td><td><span class="ct">       *  Gain: '&lt;S66&gt;/Gain1'</span></td></tr>
 <tr name="1993" id="1993">
-<td><a id="l1993" class='ln'>1993</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S75&gt;/MTPA_Calc' incorporates:</span></td></tr>
+<td><a id="l1993" class='ln'>1993</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="1994" id="1994">
-<td><a id="l1994" class='ln'>1994</a></td><td><span class="ct">     *  ActionPort: '&lt;S80&gt;/Action Port'</span></td></tr>
+<td><a id="l1994" class='ln'>1994</a></td><td>      <a id="1994c7" class="tk">rtb_RelationalOperator4_b</a> = <a id="1994c35" class="tk">rtP</a>.<a id="1994c39" class="tk">id_fieldWeakMax</a> <a id="1994c55" class="tk">&lt;&lt;</a> 15;</td></tr>
 <tr name="1995" id="1995">
-<td><a id="l1995" class='ln'>1995</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l1995" class='ln'>1995</a></td><td>      <span class="kw">if</span> (<a id="1995c11" class="tk">rtb_Switch2_au</a> <a id="1995c26" class="tk">&lt;=</a> <a id="1995c29" class="tk">rtb_RelationalOperator4_b</a>) <span class="br">{</span></td></tr>
 <tr name="1996" id="1996">
-<td><a id="l1996" class='ln'>1996</a></td><td>    <span class="ct">/* If: '&lt;S75&gt;/If' incorporates:</span></td></tr>
+<td><a id="l1996" class='ln'>1996</a></td><td>        <a id="1996c9" class="tk">rtb_Switch2_au</a> = <a id="1996c26" class="tk">rtb_RelationalOperator4_b</a>;</td></tr>
 <tr name="1997" id="1997">
-<td><a id="l1997" class='ln'>1997</a></td><td><span class="ct">     *  Constant: '&lt;S80&gt;/Constant3'</span></td></tr>
+<td><a id="l1997" class='ln'>1997</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="1998" id="1998">
-<td><a id="l1998" class='ln'>1998</a></td><td><span class="ct">     *  Merge: '&lt;S75&gt;/Merge'</span></td></tr>
+<td><a id="l1998" class='ln'>1998</a></td><td></td></tr>
 <tr name="1999" id="1999">
-<td><a id="l1999" class='ln'>1999</a></td><td><span class="ct">     *  Switch: '&lt;S80&gt;/Switch'</span></td></tr>
+<td><a id="l1999" class='ln'>1999</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S66&gt;/Max' */</span></td></tr>
 <tr name="2000" id="2000">
-<td><a id="l2000" class='ln'>2000</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2000" class='ln'>2000</a></td><td></td></tr>
 <tr name="2001" id="2001">
-<td><a id="l2001" class='ln'>2001</a></td><td>    <a id="2001c5" class="tk">rtDW</a>-&gt;<a id="2001c11" class="tk">Merge_c</a>[0] = 0;</td></tr>
+<td><a id="l2001" class='ln'>2001</a></td><td>      <span class="ct">/* Switch: '&lt;S71&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2002" id="2002">
-<td><a id="l2002" class='ln'>2002</a></td><td>    <a id="2002c5" class="tk">rtDW</a>-&gt;<a id="2002c11" class="tk">Merge_c</a>[1] = <a id="2002c24" class="tk">rtDW</a>-&gt;<a id="2002c30" class="tk">Merge_f</a>;</td></tr>
+<td><a id="l2002" class='ln'>2002</a></td><td><span class="ct">       *  MinMax: '&lt;S66&gt;/Max'</span></td></tr>
 <tr name="2003" id="2003">
-<td><a id="l2003" class='ln'>2003</a></td><td></td></tr>
+<td><a id="l2003" class='ln'>2003</a></td><td><span class="ct">       *  RelationalOperator: '&lt;S71&gt;/UpperRelop'</span></td></tr>
 <tr name="2004" id="2004">
-<td><a id="l2004" class='ln'>2004</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S75&gt;/MTPA_Calc' */</span></td></tr>
+<td><a id="l2004" class='ln'>2004</a></td><td><span class="ct">       *  Switch: '&lt;S71&gt;/Switch2'</span></td></tr>
 <tr name="2005" id="2005">
-<td><a id="l2005" class='ln'>2005</a></td><td></td></tr>
+<td><a id="l2005" class='ln'>2005</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="2006" id="2006">
-<td><a id="l2006" class='ln'>2006</a></td><td>    <span class="ct">/* Sum: '&lt;S74&gt;/Sum' incorporates:</span></td></tr>
+<td><a id="l2006" class='ln'>2006</a></td><td>      <span class="kw">if</span> (((<a id="2006c13" class="tk">int64_T</a>)<a id="2006c21" class="tk">rtb_Gain_h</a> <a id="2006c32" class="tk">&lt;&lt;</a> 14) <a id="2006c39" class="tk">&lt;</a> <a id="2006c41" class="tk">rtb_Switch2_au</a>) <span class="br">{</span></td></tr>
 <tr name="2007" id="2007">
-<td><a id="l2007" class='ln'>2007</a></td><td><span class="ct">     *  Constant: '&lt;S74&gt;/Constant3'</span></td></tr>
+<td><a id="l2007" class='ln'>2007</a></td><td>        <a id="2007c9" class="tk">rtb_Divide_e_idx_2</a> = <a id="2007c30" class="tk">rtb_Switch2_au</a> <a id="2007c45" class="tk">&gt;&gt;</a> 14;</td></tr>
 <tr name="2008" id="2008">
-<td><a id="l2008" class='ln'>2008</a></td><td><span class="ct">     *  UnitDelay: '&lt;S74&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l2008" class='ln'>2008</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2009" id="2009">
-<td><a id="l2009" class='ln'>2009</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2009" class='ln'>2009</a></td><td>        <a id="2009c9" class="tk">rtb_Divide_e_idx_2</a> = <a id="2009c30" class="tk">rtb_Gain_h</a>;</td></tr>
 <tr name="2010" id="2010">
-<td><a id="l2010" class='ln'>2010</a></td><td>    <a id="2010c5" class="tk">rtb_Divide_idx_0</a> = (<a id="2010c25" class="tk">rtP</a>.<a id="2010c29" class="tk">V_modulation</a> <a id="2010c42" class="tk">-</a> <a id="2010c44" class="tk">rtDW</a>-&gt;<a id="2010c50" class="tk">UnitDelay1_DSTATE_c</a>) <a id="2010c71" class="tk">&gt;&gt;</a> 1;</td></tr>
+<td><a id="l2010" class='ln'>2010</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="2011" id="2011">
-<td><a id="l2011" class='ln'>2011</a></td><td>    <span class="kw">if</span> (<a id="2011c9" class="tk">rtb_Divide_idx_0</a> <a id="2011c26" class="tk">&lt;</a> <a id="2011c28" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l2011" class='ln'>2011</a></td><td></td></tr>
 <tr name="2012" id="2012">
-<td><a id="l2012" class='ln'>2012</a></td><td>      <a id="2012c7" class="tk">rtb_Divide_idx_0</a> = <a id="2012c26" class="tk">-</a>32768;</td></tr>
+<td><a id="l2012" class='ln'>2012</a></td><td>      <span class="ct">/* End of Switch: '&lt;S71&gt;/Switch' */</span></td></tr>
 <tr name="2013" id="2013">
 <td><a id="l2013" class='ln'>2013</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2014" id="2014">
 <td><a id="l2014" class='ln'>2014</a></td><td></td></tr>
 <tr name="2015" id="2015">
-<td><a id="l2015" class='ln'>2015</a></td><td>    <span class="ct">/* Delay: '&lt;S78&gt;/Resettable Delay' incorporates:</span></td></tr>
+<td><a id="l2015" class='ln'>2015</a></td><td>    <span class="ct">/* End of Switch: '&lt;S71&gt;/Switch2' */</span></td></tr>
 <tr name="2016" id="2016">
-<td><a id="l2016" class='ln'>2016</a></td><td><span class="ct">     *  Constant: '&lt;S74&gt;/Constant4'</span></td></tr>
+<td><a id="l2016" class='ln'>2016</a></td><td></td></tr>
 <tr name="2017" id="2017">
-<td><a id="l2017" class='ln'>2017</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S78&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2017" class='ln'>2017</a></td><td>    <span class="ct">/* Sum: '&lt;S66&gt;/Sum1' incorporates:</span></td></tr>
 <tr name="2018" id="2018">
-<td><a id="l2018" class='ln'>2018</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2018" class='ln'>2018</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide1'</span></td></tr>
 <tr name="2019" id="2019">
-<td><a id="l2019" class='ln'>2019</a></td><td>    <span class="kw">if</span> ((<a id="2019c10" class="tk">rtb_DataTypeConversion_j</a> <a id="2019c35" class="tk">&gt;</a> 0) <a id="2019c40" class="tk">&amp;&amp;</a></td></tr>
+<td><a id="l2019" class='ln'>2019</a></td><td><span class="ct">     *  Switch: '&lt;S71&gt;/Switch2'</span></td></tr>
 <tr name="2020" id="2020">
-<td><a id="l2020" class='ln'>2020</a></td><td>        (<a id="2020c10" class="tk">rtPrevZCX</a>-&gt;<a id="2020c21" class="tk">ResettableDelay_Reset_ZCE_o</a> <a id="2020c49" class="tk">!=</a> 1)) <span class="br">{</span></td></tr>
+<td><a id="l2020" class='ln'>2020</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2021" id="2021">
-<td><a id="l2021" class='ln'>2021</a></td><td>      <a id="2021c7" class="tk">rtDW</a>-&gt;<a id="2021c13" class="tk">icLoad</a> = 1U;</td></tr>
+<td><a id="l2021" class='ln'>2021</a></td><td>    <a id="2021c5" class="tk">rtb_Gain_a</a> = (<a id="2021c19" class="tk">int16_T</a>)((<a id="2021c29" class="tk">rtb_Divide_e_idx_2</a> <a id="2021c48" class="tk">&gt;&gt;</a> 1) <a id="2021c54" class="tk">+</a> <a id="2021c56" class="tk">rtDW</a>-&gt;<a id="2021c62" class="tk">Merge_i</a>[0]);</td></tr>
 <tr name="2022" id="2022">
-<td><a id="l2022" class='ln'>2022</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2022" class='ln'>2022</a></td><td></td></tr>
 <tr name="2023" id="2023">
-<td><a id="l2023" class='ln'>2023</a></td><td></td></tr>
+<td><a id="l2023" class='ln'>2023</a></td><td>    <span class="ct">/* Sum: '&lt;S66&gt;/Sum of Elements' */</span></td></tr>
 <tr name="2024" id="2024">
-<td><a id="l2024" class='ln'>2024</a></td><td>    <a id="2024c5" class="tk">rtPrevZCX</a>-&gt;<a id="2024c16" class="tk">ResettableDelay_Reset_ZCE_o</a> = (<a id="2024c47" class="tk">ZCSigState</a>)</td></tr>
+<td><a id="l2024" class='ln'>2024</a></td><td>    <a id="2024c5" class="tk">rtb_Switch2_au</a> = 1;</td></tr>
 <tr name="2025" id="2025">
-<td><a id="l2025" class='ln'>2025</a></td><td>      (<a id="2025c8" class="tk">rtb_DataTypeConversion_j</a> <a id="2025c33" class="tk">&gt;</a> 0);</td></tr>
+<td><a id="l2025" class='ln'>2025</a></td><td>    <a id="2025c5" class="tk">rtb_Gain_ib</a> = 0;</td></tr>
 <tr name="2026" id="2026">
-<td><a id="l2026" class='ln'>2026</a></td><td>    <span class="kw">if</span> (<a id="2026c9" class="tk">rtDW</a>-&gt;<a id="2026c15" class="tk">icLoad</a> <a id="2026c22" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2026" class='ln'>2026</a></td><td></td></tr>
 <tr name="2027" id="2027">
-<td><a id="l2027" class='ln'>2027</a></td><td>      <a id="2027c7" class="tk">rtDW</a>-&gt;<a id="2027c13" class="tk">ResettableDelay_DSTATE</a> = 0;</td></tr>
+<td><a id="l2027" class='ln'>2027</a></td><td>    <span class="ct">/* Math: '&lt;S66&gt;/Math Function2' incorporates:</span></td></tr>
 <tr name="2028" id="2028">
-<td><a id="l2028" class='ln'>2028</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2028" class='ln'>2028</a></td><td><span class="ct">     *  Math: '&lt;S78&gt;/Math Function2'</span></td></tr>
 <tr name="2029" id="2029">
-<td><a id="l2029" class='ln'>2029</a></td><td></td></tr>
+<td><a id="l2029" class='ln'>2029</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide1'</span></td></tr>
 <tr name="2030" id="2030">
-<td><a id="l2030" class='ln'>2030</a></td><td>    <span class="ct">/* Signum: '&lt;S74&gt;/Sign' incorporates:</span></td></tr>
+<td><a id="l2030" class='ln'>2030</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2031" id="2031">
-<td><a id="l2031" class='ln'>2031</a></td><td><span class="ct">     *  Sum: '&lt;S74&gt;/Sum'</span></td></tr>
+<td><a id="l2031" class='ln'>2031</a></td><td>    <a id="2031c5" class="tk">rtb_RelationalOperator4_b</a> = <a id="2031c33" class="tk">rtb_Gain_a</a> <a id="2031c44" class="tk">*</a> <a id="2031c46" class="tk">rtb_Gain_a</a>;</td></tr>
 <tr name="2032" id="2032">
-<td><a id="l2032" class='ln'>2032</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2032" class='ln'>2032</a></td><td></td></tr>
 <tr name="2033" id="2033">
-<td><a id="l2033" class='ln'>2033</a></td><td>    <span class="kw">if</span> ((<a id="2033c10" class="tk">int16_T</a>)<a id="2033c18" class="tk">rtb_Divide_idx_0</a> <a id="2033c35" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2033" class='ln'>2033</a></td><td>    <span class="ct">/* Sqrt: '&lt;S66&gt;/Sqrt' incorporates:</span></td></tr>
 <tr name="2034" id="2034">
-<td><a id="l2034" class='ln'>2034</a></td><td>      <a id="2034c7" class="tk">rtb_Switch_f2_idx_1</a> = <a id="2034c29" class="tk">-</a>1;</td></tr>
+<td><a id="l2034" class='ln'>2034</a></td><td><span class="ct">     *  Math: '&lt;S66&gt;/Math Function1'</span></td></tr>
 <tr name="2035" id="2035">
-<td><a id="l2035" class='ln'>2035</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2035" class='ln'>2035</a></td><td><span class="ct">     *  Math: '&lt;S66&gt;/Math Function2'</span></td></tr>
 <tr name="2036" id="2036">
-<td><a id="l2036" class='ln'>2036</a></td><td>      <a id="2036c7" class="tk">rtb_Switch_f2_idx_1</a> = (<a id="2036c30" class="tk">int16_T</a>)((<a id="2036c40" class="tk">int16_T</a>)<a id="2036c48" class="tk">rtb_Divide_idx_0</a> <a id="2036c65" class="tk">&gt;</a> 0);</td></tr>
+<td><a id="l2036" class='ln'>2036</a></td><td><span class="ct">     *  Merge: '&lt;S67&gt;/Merge'</span></td></tr>
 <tr name="2037" id="2037">
-<td><a id="l2037" class='ln'>2037</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2037" class='ln'>2037</a></td><td><span class="ct">     *  Sum: '&lt;S66&gt;/Sum of Elements'</span></td></tr>
 <tr name="2038" id="2038">
-<td><a id="l2038" class='ln'>2038</a></td><td></td></tr>
+<td><a id="l2038" class='ln'>2038</a></td><td><span class="ct">     *  Sum: '&lt;S66&gt;/Sum2'</span></td></tr>
 <tr name="2039" id="2039">
-<td><a id="l2039" class='ln'>2039</a></td><td>    <span class="ct">/* End of Signum: '&lt;S74&gt;/Sign' */</span></td></tr>
+<td><a id="l2039" class='ln'>2039</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2040" id="2040">
-<td><a id="l2040" class='ln'>2040</a></td><td></td></tr>
+<td><a id="l2040" class='ln'>2040</a></td><td>    <a id="2040c5" class="tk">rtb_Switch2_pl</a> = <a id="2040c22" class="tk">rt_sqrt_Us32En6_Ys16En5_Is64En10_f_s</a>((((<a id="2040c62" class="tk">rtDW</a>-&gt;<a id="2040c68" class="tk">Merge_i</a>[0] <a id="2040c79" class="tk">*</a></td></tr>
 <tr name="2041" id="2041">
-<td><a id="l2041" class='ln'>2041</a></td><td>    <span class="ct">/* Sum: '&lt;S78&gt;/Sum1' incorporates:</span></td></tr>
+<td><a id="l2041" class='ln'>2041</a></td><td>      <a id="2041c7" class="tk">rtDW</a>-&gt;<a id="2041c13" class="tk">Merge_i</a>[0] <a id="2041c24" class="tk">+</a> <a id="2041c26" class="tk">rtDW</a>-&gt;<a id="2041c32" class="tk">Merge_i</a>[1] <a id="2041c43" class="tk">*</a> <a id="2041c45" class="tk">rtDW</a>-&gt;<a id="2041c51" class="tk">Merge_i</a>[1]) <a id="2041c63" class="tk">&gt;&gt;</a> 1) <a id="2041c69" class="tk">-</a></td></tr>
 <tr name="2042" id="2042">
-<td><a id="l2042" class='ln'>2042</a></td><td><span class="ct">     *  Constant: '&lt;S74&gt;/Constant2'</span></td></tr>
+<td><a id="l2042" class='ln'>2042</a></td><td>      (<a id="2042c8" class="tk">rtb_RelationalOperator4_b</a> <a id="2042c34" class="tk">&gt;&gt;</a> 1)) <a id="2042c41" class="tk">&gt;&gt;</a> 3);</td></tr>
 <tr name="2043" id="2043">
-<td><a id="l2043" class='ln'>2043</a></td><td><span class="ct">     *  Constant: '&lt;S74&gt;/Constant5'</span></td></tr>
+<td><a id="l2043" class='ln'>2043</a></td><td></td></tr>
 <tr name="2044" id="2044">
-<td><a id="l2044" class='ln'>2044</a></td><td><span class="ct">     *  Delay: '&lt;S78&gt;/Resettable Delay'</span></td></tr>
+<td><a id="l2044" class='ln'>2044</a></td><td>    <span class="ct">/* Sum: '&lt;S68&gt;/Add' incorporates:</span></td></tr>
 <tr name="2045" id="2045">
-<td><a id="l2045" class='ln'>2045</a></td><td><span class="ct">     *  Product: '&lt;S77&gt;/Divide'</span></td></tr>
+<td><a id="l2045" class='ln'>2045</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/iDC_Limit'</span></td></tr>
 <tr name="2046" id="2046">
-<td><a id="l2046" class='ln'>2046</a></td><td><span class="ct">     *  Product: '&lt;S77&gt;/Divide1'</span></td></tr>
+<td><a id="l2046" class='ln'>2046</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vDC'</span></td></tr>
 <tr name="2047" id="2047">
-<td><a id="l2047" class='ln'>2047</a></td><td><span class="ct">     *  Sum: '&lt;S77&gt;/Add'</span></td></tr>
+<td><a id="l2047" class='ln'>2047</a></td><td><span class="ct">     *  Math: '&lt;S78&gt;/Math Function2'</span></td></tr>
 <tr name="2048" id="2048">
-<td><a id="l2048" class='ln'>2048</a></td><td><span class="ct">     *  UnitDelay: '&lt;S77&gt;/Unit Delay'</span></td></tr>
+<td><a id="l2048" class='ln'>2048</a></td><td><span class="ct">     *  Product: '&lt;S40&gt;/Divide'</span></td></tr>
 <tr name="2049" id="2049">
-<td><a id="l2049" class='ln'>2049</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2049" class='ln'>2049</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide'</span></td></tr>
 <tr name="2050" id="2050">
-<td><a id="l2050" class='ln'>2050</a></td><td>    <a id="2050c5" class="tk">rtb_Sum1_f</a> = (((((<a id="2050c23" class="tk">rtP</a>.<a id="2050c27" class="tk">cf_Fw_Kb</a> <a id="2050c36" class="tk">*</a> <a id="2050c38" class="tk">rtDW</a>-&gt;<a id="2050c44" class="tk">UnitDelay_DSTATE</a>) <a id="2050c62" class="tk">&lt;&lt;</a> 6) <a id="2050c68" class="tk">&gt;&gt;</a> 12) <a id="2050c75" class="tk">+</a></td></tr>
+<td><a id="l2050" class='ln'>2050</a></td><td><span class="ct">     *  Switch: '&lt;S66&gt;/Switch'</span></td></tr>
 <tr name="2051" id="2051">
-<td><a id="l2051" class='ln'>2051</a></td><td>                   <a id="2051c20" class="tk">rtb_Switch_f2_idx_1</a> <a id="2051c40" class="tk">*</a> <a id="2051c42" class="tk">rtP</a>.<a id="2051c46" class="tk">cf_Fw_Ki</a>) <a id="2051c56" class="tk">&gt;&gt;</a> 4) <a id="2051c62" class="tk">+</a></td></tr>
+<td><a id="l2051" class='ln'>2051</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2052" id="2052">
-<td><a id="l2052" class='ln'>2052</a></td><td>      <a id="2052c7" class="tk">rtDW</a>-&gt;<a id="2052c13" class="tk">ResettableDelay_DSTATE</a>;</td></tr>
+<td><a id="l2052" class='ln'>2052</a></td><td>    <a id="2052c5" class="tk">rtb_MathFunction2_n</a> = <a id="2052c27" class="tk">rtU</a>-&gt;<a id="2052c32" class="tk">iDC_Limit</a> <a id="2052c42" class="tk">*</a> <a id="2052c44" class="tk">rtU</a>-&gt;<a id="2052c49" class="tk">vDC</a> <a id="2052c53" class="tk">-</a> <a id="2052c55" class="tk">rtb_Gain_a</a> <a id="2052c66" class="tk">*</a></td></tr>
 <tr name="2053" id="2053">
-<td><a id="l2053" class='ln'>2053</a></td><td></td></tr>
+<td><a id="l2053" class='ln'>2053</a></td><td>      <a id="2053c7" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[0];</td></tr>
 <tr name="2054" id="2054">
-<td><a id="l2054" class='ln'>2054</a></td><td>    <span class="ct">/* Switch: '&lt;S79&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l2054" class='ln'>2054</a></td><td></td></tr>
 <tr name="2055" id="2055">
-<td><a id="l2055" class='ln'>2055</a></td><td><span class="ct">     *  Constant: '&lt;S77&gt;/Constant6'</span></td></tr>
+<td><a id="l2055" class='ln'>2055</a></td><td>    <span class="ct">/* Product: '&lt;S68&gt;/Divide3' incorporates:</span></td></tr>
 <tr name="2056" id="2056">
-<td><a id="l2056" class='ln'>2056</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S79&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l2056" class='ln'>2056</a></td><td><span class="ct">     *  Constant: '&lt;S68&gt;/Constant5'</span></td></tr>
 <tr name="2057" id="2057">
-<td><a id="l2057" class='ln'>2057</a></td><td><span class="ct">     *  Sum: '&lt;S78&gt;/Sum1'</span></td></tr>
+<td><a id="l2057" class='ln'>2057</a></td><td><span class="ct">     *  Gain: '&lt;S68&gt;/Gain'</span></td></tr>
 <tr name="2058" id="2058">
-<td><a id="l2058" class='ln'>2058</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2058" class='ln'>2058</a></td><td><span class="ct">     *  Math: '&lt;S78&gt;/Math Function2'</span></td></tr>
 <tr name="2059" id="2059">
-<td><a id="l2059" class='ln'>2059</a></td><td>    <span class="kw">if</span> (<a id="2059c9" class="tk">rtb_Sum1_f</a> <a id="2059c20" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2059" class='ln'>2059</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2060" id="2060">
-<td><a id="l2060" class='ln'>2060</a></td><td>      <a id="2060c7" class="tk">rtb_Divide_idx_1</a> = 0;</td></tr>
+<td><a id="l2060" class='ln'>2060</a></td><td>    <a id="2060c5" class="tk">rtb_Divide_e_idx_1</a> = <a id="2060c26" class="tk">rtb_MathFunction2_n</a> <a id="2060c46" class="tk">/</a> (<a id="2060c49" class="tk">rtP</a>.<a id="2060c53" class="tk">i_dqMax</a> <a id="2060c61" class="tk">&lt;&lt;</a> 1);</td></tr>
 <tr name="2061" id="2061">
-<td><a id="l2061" class='ln'>2061</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2061" class='ln'>2061</a></td><td>    <span class="kw">if</span> (<a id="2061c9" class="tk">rtb_Divide_e_idx_1</a> <a id="2061c28" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="2062" id="2062">
-<td><a id="l2062" class='ln'>2062</a></td><td>      <span class="ct">/* Gain: '&lt;S74&gt;/Gain1' */</span></td></tr>
+<td><a id="l2062" class='ln'>2062</a></td><td>      <a id="2062c7" class="tk">rtb_Divide_e_idx_1</a> = 32767;</td></tr>
 <tr name="2063" id="2063">
-<td><a id="l2063" class='ln'>2063</a></td><td>      <a id="2063c7" class="tk">rtb_Switch_np</a> = <a id="2063c23" class="tk">-</a>32768 <a id="2063c30" class="tk">*</a> <a id="2063c32" class="tk">rtDW</a>-&gt;<a id="2063c38" class="tk">Merge_c</a>[1];</td></tr>
+<td><a id="l2063" class='ln'>2063</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2064" id="2064">
-<td><a id="l2064" class='ln'>2064</a></td><td></td></tr>
+<td><a id="l2064" class='ln'>2064</a></td><td>      <span class="kw">if</span> (<a id="2064c11" class="tk">rtb_Divide_e_idx_1</a> <a id="2064c30" class="tk">&lt;</a> <a id="2064c32" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="2065" id="2065">
-<td><a id="l2065" class='ln'>2065</a></td><td>      <span class="ct">/* MinMax: '&lt;S74&gt;/Max' incorporates:</span></td></tr>
+<td><a id="l2065" class='ln'>2065</a></td><td>        <a id="2065c9" class="tk">rtb_Divide_e_idx_1</a> = <a id="2065c30" class="tk">-</a>32768;</td></tr>
 <tr name="2066" id="2066">
-<td><a id="l2066" class='ln'>2066</a></td><td><span class="ct">       *  Constant: '&lt;S74&gt;/Constant6'</span></td></tr>
+<td><a id="l2066" class='ln'>2066</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="2067" id="2067">
-<td><a id="l2067" class='ln'>2067</a></td><td><span class="ct">       *  Gain: '&lt;S74&gt;/Gain1'</span></td></tr>
+<td><a id="l2067" class='ln'>2067</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2068" id="2068">
-<td><a id="l2068" class='ln'>2068</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l2068" class='ln'>2068</a></td><td></td></tr>
 <tr name="2069" id="2069">
-<td><a id="l2069" class='ln'>2069</a></td><td>      <a id="2069c7" class="tk">rtb_Divide_idx_0</a> = <a id="2069c26" class="tk">rtP</a>.<a id="2069c30" class="tk">id_fieldWeakMax</a> <a id="2069c46" class="tk">&lt;&lt;</a> 15;</td></tr>
+<td><a id="l2069" class='ln'>2069</a></td><td>    <span class="ct">/* MinMax: '&lt;S68&gt;/Min2' incorporates:</span></td></tr>
 <tr name="2070" id="2070">
-<td><a id="l2070" class='ln'>2070</a></td><td>      <span class="kw">if</span> (<a id="2070c11" class="tk">rtb_Switch_np</a> <a id="2070c25" class="tk">&lt;=</a> <a id="2070c28" class="tk">rtb_Divide_idx_0</a>) <span class="br">{</span></td></tr>
+<td><a id="l2070" class='ln'>2070</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide3'</span></td></tr>
 <tr name="2071" id="2071">
-<td><a id="l2071" class='ln'>2071</a></td><td>        <a id="2071c9" class="tk">rtb_Switch_np</a> = <a id="2071c25" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l2071" class='ln'>2071</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2072" id="2072">
-<td><a id="l2072" class='ln'>2072</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2072" class='ln'>2072</a></td><td>    <span class="kw">if</span> (<a id="2072c9" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1] <a id="2072c60" class="tk">&gt;</a> (<a id="2072c63" class="tk">int16_T</a>)</td></tr>
 <tr name="2073" id="2073">
-<td><a id="l2073" class='ln'>2073</a></td><td></td></tr>
+<td><a id="l2073" class='ln'>2073</a></td><td>        <a id="2073c9" class="tk">rtb_Divide_e_idx_1</a>) <span class="br">{</span></td></tr>
 <tr name="2074" id="2074">
-<td><a id="l2074" class='ln'>2074</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S74&gt;/Max' */</span></td></tr>
+<td><a id="l2074" class='ln'>2074</a></td><td>      <a id="2074c7" class="tk">rtb_Add2_lk</a> = <a id="2074c21" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1];</td></tr>
 <tr name="2075" id="2075">
-<td><a id="l2075" class='ln'>2075</a></td><td></td></tr>
+<td><a id="l2075" class='ln'>2075</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2076" id="2076">
-<td><a id="l2076" class='ln'>2076</a></td><td>      <span class="ct">/* Switch: '&lt;S79&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2076" class='ln'>2076</a></td><td>      <a id="2076c7" class="tk">rtb_Add2_lk</a> = (<a id="2076c22" class="tk">int16_T</a>)<a id="2076c30" class="tk">rtb_Divide_e_idx_1</a>;</td></tr>
 <tr name="2077" id="2077">
-<td><a id="l2077" class='ln'>2077</a></td><td><span class="ct">       *  MinMax: '&lt;S74&gt;/Max'</span></td></tr>
+<td><a id="l2077" class='ln'>2077</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2078" id="2078">
-<td><a id="l2078" class='ln'>2078</a></td><td><span class="ct">       *  RelationalOperator: '&lt;S79&gt;/UpperRelop'</span></td></tr>
+<td><a id="l2078" class='ln'>2078</a></td><td></td></tr>
 <tr name="2079" id="2079">
-<td><a id="l2079" class='ln'>2079</a></td><td><span class="ct">       *  Switch: '&lt;S79&gt;/Switch2'</span></td></tr>
+<td><a id="l2079" class='ln'>2079</a></td><td>    <span class="ct">/* End of MinMax: '&lt;S68&gt;/Min2' */</span></td></tr>
 <tr name="2080" id="2080">
-<td><a id="l2080" class='ln'>2080</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l2080" class='ln'>2080</a></td><td></td></tr>
 <tr name="2081" id="2081">
-<td><a id="l2081" class='ln'>2081</a></td><td>      <span class="kw">if</span> (((<a id="2081c13" class="tk">int64_T</a>)<a id="2081c21" class="tk">rtb_Sum1_f</a> <a id="2081c32" class="tk">&lt;&lt;</a> 14) <a id="2081c39" class="tk">&lt;</a> <a id="2081c41" class="tk">rtb_Switch_np</a>) <span class="br">{</span></td></tr>
+<td><a id="l2081" class='ln'>2081</a></td><td>    <span class="ct">/* Product: '&lt;S68&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="2082" id="2082">
-<td><a id="l2082" class='ln'>2082</a></td><td>        <a id="2082c9" class="tk">rtb_Divide_idx_1</a> = <a id="2082c28" class="tk">rtb_Switch_np</a> <a id="2082c42" class="tk">&gt;&gt;</a> 14;</td></tr>
+<td><a id="l2082" class='ln'>2082</a></td><td><span class="ct">     *  Math: '&lt;S78&gt;/Math Function2'</span></td></tr>
 <tr name="2083" id="2083">
-<td><a id="l2083" class='ln'>2083</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2083" class='ln'>2083</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2084" id="2084">
-<td><a id="l2084" class='ln'>2084</a></td><td>        <a id="2084c9" class="tk">rtb_Divide_idx_1</a> = <a id="2084c28" class="tk">rtb_Sum1_f</a>;</td></tr>
+<td><a id="l2084" class='ln'>2084</a></td><td>    <a id="2084c5" class="tk">rtb_Divide_e_idx_1</a> = <a id="2084c26" class="tk">rtb_MathFunction2_n</a> <a id="2084c46" class="tk">/</a> <a id="2084c48" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="2085" id="2085">
-<td><a id="l2085" class='ln'>2085</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2085" class='ln'>2085</a></td><td>    <span class="kw">if</span> (<a id="2085c9" class="tk">rtb_Divide_e_idx_1</a> <a id="2085c28" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="2086" id="2086">
-<td><a id="l2086" class='ln'>2086</a></td><td></td></tr>
+<td><a id="l2086" class='ln'>2086</a></td><td>      <a id="2086c7" class="tk">rtb_Divide_e_idx_1</a> = 32767;</td></tr>
 <tr name="2087" id="2087">
-<td><a id="l2087" class='ln'>2087</a></td><td>      <span class="ct">/* End of Switch: '&lt;S79&gt;/Switch' */</span></td></tr>
+<td><a id="l2087" class='ln'>2087</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2088" id="2088">
-<td><a id="l2088" class='ln'>2088</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2088" class='ln'>2088</a></td><td>      <span class="kw">if</span> (<a id="2088c11" class="tk">rtb_Divide_e_idx_1</a> <a id="2088c30" class="tk">&lt;</a> <a id="2088c32" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="2089" id="2089">
-<td><a id="l2089" class='ln'>2089</a></td><td></td></tr>
+<td><a id="l2089" class='ln'>2089</a></td><td>        <a id="2089c9" class="tk">rtb_Divide_e_idx_1</a> = <a id="2089c30" class="tk">-</a>32768;</td></tr>
 <tr name="2090" id="2090">
-<td><a id="l2090" class='ln'>2090</a></td><td>    <span class="ct">/* End of Switch: '&lt;S79&gt;/Switch2' */</span></td></tr>
+<td><a id="l2090" class='ln'>2090</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="2091" id="2091">
-<td><a id="l2091" class='ln'>2091</a></td><td></td></tr>
+<td><a id="l2091" class='ln'>2091</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2092" id="2092">
-<td><a id="l2092" class='ln'>2092</a></td><td>    <span class="ct">/* Sum: '&lt;S74&gt;/Sum1' incorporates:</span></td></tr>
+<td><a id="l2092" class='ln'>2092</a></td><td></td></tr>
 <tr name="2093" id="2093">
-<td><a id="l2093" class='ln'>2093</a></td><td><span class="ct">     *  Product: '&lt;S76&gt;/Divide1'</span></td></tr>
+<td><a id="l2093" class='ln'>2093</a></td><td>    <span class="ct">/* Signum: '&lt;S68&gt;/Sign' incorporates:</span></td></tr>
 <tr name="2094" id="2094">
-<td><a id="l2094" class='ln'>2094</a></td><td><span class="ct">     *  Switch: '&lt;S79&gt;/Switch2'</span></td></tr>
+<td><a id="l2094" class='ln'>2094</a></td><td><span class="ct">     *  Sqrt: '&lt;S66&gt;/Sqrt'</span></td></tr>
 <tr name="2095" id="2095">
 <td><a id="l2095" class='ln'>2095</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2096" id="2096">
-<td><a id="l2096" class='ln'>2096</a></td><td>    <a id="2096c5" class="tk">rtb_Min</a> = (<a id="2096c16" class="tk">int16_T</a>)((<a id="2096c26" class="tk">rtb_Divide_idx_1</a> <a id="2096c43" class="tk">&gt;&gt;</a> 1) <a id="2096c49" class="tk">+</a> <a id="2096c51" class="tk">rtDW</a>-&gt;<a id="2096c57" class="tk">Merge_c</a>[0]);</td></tr>
+<td><a id="l2096" class='ln'>2096</a></td><td>    <span class="kw">if</span> (<a id="2096c9" class="tk">rtb_Switch2_pl</a> <a id="2096c24" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="2097" id="2097">
-<td><a id="l2097" class='ln'>2097</a></td><td></td></tr>
+<td><a id="l2097" class='ln'>2097</a></td><td>      <a id="2097c7" class="tk">rtb_Divide1_oy</a> = <a id="2097c24" class="tk">-</a>1;</td></tr>
 <tr name="2098" id="2098">
-<td><a id="l2098" class='ln'>2098</a></td><td>    <span class="ct">/* Sum: '&lt;S74&gt;/Sum of Elements' */</span></td></tr>
+<td><a id="l2098" class='ln'>2098</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2099" id="2099">
-<td><a id="l2099" class='ln'>2099</a></td><td>    <a id="2099c5" class="tk">rtb_Switch_np</a> = 1;</td></tr>
+<td><a id="l2099" class='ln'>2099</a></td><td>      <a id="2099c7" class="tk">rtb_Divide1_oy</a> = (<a id="2099c25" class="tk">int16_T</a>)(<a id="2099c34" class="tk">rtb_Switch2_pl</a> <a id="2099c49" class="tk">&gt;</a> 0);</td></tr>
 <tr name="2100" id="2100">
-<td><a id="l2100" class='ln'>2100</a></td><td>    <a id="2100c5" class="tk">rtb_Gain_b0</a> = 0;</td></tr>
+<td><a id="l2100" class='ln'>2100</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2101" id="2101">
 <td><a id="l2101" class='ln'>2101</a></td><td></td></tr>
 <tr name="2102" id="2102">
-<td><a id="l2102" class='ln'>2102</a></td><td>    <span class="ct">/* Sqrt: '&lt;S74&gt;/Sqrt' incorporates:</span></td></tr>
+<td><a id="l2102" class='ln'>2102</a></td><td>    <span class="ct">/* End of Signum: '&lt;S68&gt;/Sign' */</span></td></tr>
 <tr name="2103" id="2103">
-<td><a id="l2103" class='ln'>2103</a></td><td><span class="ct">     *  Math: '&lt;S74&gt;/Math Function1'</span></td></tr>
+<td><a id="l2103" class='ln'>2103</a></td><td></td></tr>
 <tr name="2104" id="2104">
-<td><a id="l2104" class='ln'>2104</a></td><td><span class="ct">     *  Math: '&lt;S74&gt;/Math Function2'</span></td></tr>
+<td><a id="l2104" class='ln'>2104</a></td><td>    <span class="ct">/* Product: '&lt;S68&gt;/Divide2' incorporates:</span></td></tr>
 <tr name="2105" id="2105">
-<td><a id="l2105" class='ln'>2105</a></td><td><span class="ct">     *  Merge: '&lt;S75&gt;/Merge'</span></td></tr>
+<td><a id="l2105" class='ln'>2105</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide1'</span></td></tr>
 <tr name="2106" id="2106">
-<td><a id="l2106" class='ln'>2106</a></td><td><span class="ct">     *  Product: '&lt;S76&gt;/Divide1'</span></td></tr>
+<td><a id="l2106" class='ln'>2106</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2107" id="2107">
-<td><a id="l2107" class='ln'>2107</a></td><td><span class="ct">     *  Sum: '&lt;S74&gt;/Sum of Elements'</span></td></tr>
+<td><a id="l2107" class='ln'>2107</a></td><td>    <a id="2107c5" class="tk">rtb_Add2_lk</a> = (<a id="2107c20" class="tk">int16_T</a>)((<a id="2107c30" class="tk">int16_T</a>)<a id="2107c38" class="tk">rtb_Divide_e_idx_1</a> <a id="2107c57" class="tk">*</a> <a id="2107c59" class="tk">rtb_Divide1_oy</a>);</td></tr>
 <tr name="2108" id="2108">
-<td><a id="l2108" class='ln'>2108</a></td><td><span class="ct">     *  Sum: '&lt;S74&gt;/Sum2'</span></td></tr>
+<td><a id="l2108" class='ln'>2108</a></td><td></td></tr>
 <tr name="2109" id="2109">
-<td><a id="l2109" class='ln'>2109</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2109" class='ln'>2109</a></td><td>    <span class="ct">/* Switch: '&lt;S77&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="2110" id="2110">
-<td><a id="l2110" class='ln'>2110</a></td><td>    <a id="2110c5" class="tk">rtb_Switch_f2_idx_1</a> = <a id="2110c27" class="tk">rt_sqrt_Us32En6_Ys16En_1bhh77n4</a>((((<a id="2110c62" class="tk">rtDW</a>-&gt;<a id="2110c68" class="tk">Merge_c</a>[0] <a id="2110c79" class="tk">*</a></td></tr>
+<td><a id="l2110" class='ln'>2110</a></td><td><span class="ct">     *  Constant: '&lt;S68&gt;/Constant2'</span></td></tr>
 <tr name="2111" id="2111">
-<td><a id="l2111" class='ln'>2111</a></td><td>      <a id="2111c7" class="tk">rtDW</a>-&gt;<a id="2111c13" class="tk">Merge_c</a>[0] <a id="2111c24" class="tk">+</a> <a id="2111c26" class="tk">rtDW</a>-&gt;<a id="2111c32" class="tk">Merge_c</a>[1] <a id="2111c43" class="tk">*</a> <a id="2111c45" class="tk">rtDW</a>-&gt;<a id="2111c51" class="tk">Merge_c</a>[1]) <a id="2111c63" class="tk">&gt;&gt;</a> 1) <a id="2111c69" class="tk">-</a> ((<a id="2111c73" class="tk">rtb_Min</a> <a id="2111c81" class="tk">*</a></td></tr>
+<td><a id="l2111" class='ln'>2111</a></td><td><span class="ct">     *  Constant: '&lt;S68&gt;/Constant3'</span></td></tr>
 <tr name="2112" id="2112">
-<td><a id="l2112" class='ln'>2112</a></td><td>      <a id="2112c7" class="tk">rtb_Min</a>) <a id="2112c16" class="tk">&gt;&gt;</a> 1)) <a id="2112c23" class="tk">&gt;&gt;</a> 3);</td></tr>
+<td><a id="l2112" class='ln'>2112</a></td><td><span class="ct">     *  Gain: '&lt;S68&gt;/Gain1'</span></td></tr>
 <tr name="2113" id="2113">
-<td><a id="l2113" class='ln'>2113</a></td><td></td></tr>
+<td><a id="l2113" class='ln'>2113</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide2'</span></td></tr>
 <tr name="2114" id="2114">
-<td><a id="l2114" class='ln'>2114</a></td><td>    <span class="ct">/* Sum: '&lt;S76&gt;/Add' incorporates:</span></td></tr>
+<td><a id="l2114" class='ln'>2114</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S77&gt;/LowerRelop1'</span></td></tr>
 <tr name="2115" id="2115">
-<td><a id="l2115" class='ln'>2115</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/iDC_Limit'</span></td></tr>
+<td><a id="l2115" class='ln'>2115</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S77&gt;/UpperRelop'</span></td></tr>
 <tr name="2116" id="2116">
-<td><a id="l2116" class='ln'>2116</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vDC'</span></td></tr>
+<td><a id="l2116" class='ln'>2116</a></td><td><span class="ct">     *  Switch: '&lt;S77&gt;/Switch'</span></td></tr>
 <tr name="2117" id="2117">
-<td><a id="l2117" class='ln'>2117</a></td><td><span class="ct">     *  Math: '&lt;S86&gt;/Math Function2'</span></td></tr>
+<td><a id="l2117" class='ln'>2117</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2118" id="2118">
-<td><a id="l2118" class='ln'>2118</a></td><td><span class="ct">     *  Product: '&lt;S49&gt;/Divide'</span></td></tr>
+<td><a id="l2118" class='ln'>2118</a></td><td>    <span class="kw">if</span> (<a id="2118c9" class="tk">rtb_Add2_lk</a> <a id="2118c21" class="tk">&gt;</a> <a id="2118c23" class="tk">rtP</a>.<a id="2118c27" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
 <tr name="2119" id="2119">
-<td><a id="l2119" class='ln'>2119</a></td><td><span class="ct">     *  Product: '&lt;S76&gt;/Divide'</span></td></tr>
+<td><a id="l2119" class='ln'>2119</a></td><td>      <a id="2119c7" class="tk">rtb_Add2_lk</a> = <a id="2119c21" class="tk">rtP</a>.<a id="2119c25" class="tk">i_dqMax</a>;</td></tr>
 <tr name="2120" id="2120">
-<td><a id="l2120" class='ln'>2120</a></td><td><span class="ct">     *  Switch: '&lt;S74&gt;/Switch'</span></td></tr>
+<td><a id="l2120" class='ln'>2120</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2121" id="2121">
-<td><a id="l2121" class='ln'>2121</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2121" class='ln'>2121</a></td><td>      <span class="kw">if</span> (<a id="2121c11" class="tk">rtb_Add2_lk</a> <a id="2121c23" class="tk">&lt;</a> (<a id="2121c26" class="tk">int16_T</a>)<a id="2121c34" class="tk">-</a><a id="2121c35" class="tk">rtP</a>.<a id="2121c39" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
 <tr name="2122" id="2122">
-<td><a id="l2122" class='ln'>2122</a></td><td>    <a id="2122c5" class="tk">rtb_MathFunction2_p</a> = <a id="2122c27" class="tk">rtU</a>-&gt;<a id="2122c32" class="tk">iDC_Limit</a> <a id="2122c42" class="tk">*</a> <a id="2122c44" class="tk">rtU</a>-&gt;<a id="2122c49" class="tk">vDC</a> <a id="2122c53" class="tk">-</a> <a id="2122c55" class="tk">rtb_Min</a> <a id="2122c63" class="tk">*</a></td></tr>
+<td><a id="l2122" class='ln'>2122</a></td><td>        <span class="ct">/* Switch: '&lt;S77&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2123" id="2123">
-<td><a id="l2123" class='ln'>2123</a></td><td>      <a id="2123c7" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[0];</td></tr>
+<td><a id="l2123" class='ln'>2123</a></td><td><span class="ct">         *  Constant: '&lt;S68&gt;/Constant2'</span></td></tr>
 <tr name="2124" id="2124">
-<td><a id="l2124" class='ln'>2124</a></td><td></td></tr>
+<td><a id="l2124" class='ln'>2124</a></td><td><span class="ct">         *  Gain: '&lt;S68&gt;/Gain1'</span></td></tr>
 <tr name="2125" id="2125">
-<td><a id="l2125" class='ln'>2125</a></td><td>    <span class="ct">/* Product: '&lt;S76&gt;/Divide3' incorporates:</span></td></tr>
+<td><a id="l2125" class='ln'>2125</a></td><td><span class="ct">         *  Switch: '&lt;S77&gt;/Switch2'</span></td></tr>
 <tr name="2126" id="2126">
-<td><a id="l2126" class='ln'>2126</a></td><td><span class="ct">     *  Constant: '&lt;S76&gt;/Constant5'</span></td></tr>
+<td><a id="l2126" class='ln'>2126</a></td><td><span class="ct">         */</span></td></tr>
 <tr name="2127" id="2127">
-<td><a id="l2127" class='ln'>2127</a></td><td><span class="ct">     *  Gain: '&lt;S76&gt;/Gain'</span></td></tr>
+<td><a id="l2127" class='ln'>2127</a></td><td>        <a id="2127c9" class="tk">rtb_Add2_lk</a> = (<a id="2127c24" class="tk">int16_T</a>)<a id="2127c32" class="tk">-</a><a id="2127c33" class="tk">rtP</a>.<a id="2127c37" class="tk">i_dqMax</a>;</td></tr>
 <tr name="2128" id="2128">
-<td><a id="l2128" class='ln'>2128</a></td><td><span class="ct">     *  Math: '&lt;S86&gt;/Math Function2'</span></td></tr>
+<td><a id="l2128" class='ln'>2128</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="2129" id="2129">
-<td><a id="l2129" class='ln'>2129</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2129" class='ln'>2129</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2130" id="2130">
-<td><a id="l2130" class='ln'>2130</a></td><td>    <a id="2130c5" class="tk">rtb_Divide_idx_0</a> = <a id="2130c24" class="tk">rtb_MathFunction2_p</a> <a id="2130c44" class="tk">/</a> (<a id="2130c47" class="tk">rtP</a>.<a id="2130c51" class="tk">i_dqMax</a> <a id="2130c59" class="tk">&lt;&lt;</a> 1);</td></tr>
+<td><a id="l2130" class='ln'>2130</a></td><td></td></tr>
 <tr name="2131" id="2131">
-<td><a id="l2131" class='ln'>2131</a></td><td>    <span class="kw">if</span> (<a id="2131c9" class="tk">rtb_Divide_idx_0</a> <a id="2131c26" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l2131" class='ln'>2131</a></td><td>    <span class="ct">/* End of Switch: '&lt;S77&gt;/Switch2' */</span></td></tr>
 <tr name="2132" id="2132">
-<td><a id="l2132" class='ln'>2132</a></td><td>      <a id="2132c7" class="tk">rtb_Divide_idx_0</a> = 32767;</td></tr>
+<td><a id="l2132" class='ln'>2132</a></td><td></td></tr>
 <tr name="2133" id="2133">
-<td><a id="l2133" class='ln'>2133</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2133" class='ln'>2133</a></td><td>    <span class="ct">/* Switch: '&lt;S68&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2134" id="2134">
-<td><a id="l2134" class='ln'>2134</a></td><td>      <span class="kw">if</span> (<a id="2134c11" class="tk">rtb_Divide_idx_0</a> <a id="2134c28" class="tk">&lt;</a> <a id="2134c30" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l2134" class='ln'>2134</a></td><td><span class="ct">     *  MinMax: '&lt;S68&gt;/Min1'</span></td></tr>
 <tr name="2135" id="2135">
-<td><a id="l2135" class='ln'>2135</a></td><td>        <a id="2135c9" class="tk">rtb_Divide_idx_0</a> = <a id="2135c28" class="tk">-</a>32768;</td></tr>
+<td><a id="l2135" class='ln'>2135</a></td><td><span class="ct">     *  Sqrt: '&lt;S66&gt;/Sqrt'</span></td></tr>
 <tr name="2136" id="2136">
-<td><a id="l2136" class='ln'>2136</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2136" class='ln'>2136</a></td><td><span class="ct">     *  Switch: '&lt;S77&gt;/Switch2'</span></td></tr>
 <tr name="2137" id="2137">
-<td><a id="l2137" class='ln'>2137</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2137" class='ln'>2137</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2138" id="2138">
-<td><a id="l2138" class='ln'>2138</a></td><td></td></tr>
+<td><a id="l2138" class='ln'>2138</a></td><td>    <span class="kw">if</span> (<a id="2138c9" class="tk">rtb_Divide1_oy</a> <a id="2138c24" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="2139" id="2139">
-<td><a id="l2139" class='ln'>2139</a></td><td>    <span class="ct">/* MinMax: '&lt;S76&gt;/Min2' incorporates:</span></td></tr>
+<td><a id="l2139" class='ln'>2139</a></td><td>      <span class="ct">/* MinMax: '&lt;S68&gt;/Min' incorporates:</span></td></tr>
 <tr name="2140" id="2140">
-<td><a id="l2140" class='ln'>2140</a></td><td><span class="ct">     *  Product: '&lt;S76&gt;/Divide3'</span></td></tr>
+<td><a id="l2140" class='ln'>2140</a></td><td><span class="ct">       *  Sqrt: '&lt;S66&gt;/Sqrt'</span></td></tr>
 <tr name="2141" id="2141">
-<td><a id="l2141" class='ln'>2141</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2141" class='ln'>2141</a></td><td><span class="ct">       *  Switch: '&lt;S77&gt;/Switch2'</span></td></tr>
 <tr name="2142" id="2142">
-<td><a id="l2142" class='ln'>2142</a></td><td>    <span class="kw">if</span> (<a id="2142c9" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1] <a id="2142c44" class="tk">&gt;</a> (<a id="2142c47" class="tk">int16_T</a>)<a id="2142c55" class="tk">rtb_Divide_idx_0</a>) <span class="br">{</span></td></tr>
+<td><a id="l2142" class='ln'>2142</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="2143" id="2143">
-<td><a id="l2143" class='ln'>2143</a></td><td>      <a id="2143c7" class="tk">rtb_Divide1_m</a> = <a id="2143c23" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1];</td></tr>
+<td><a id="l2143" class='ln'>2143</a></td><td>      <span class="kw">if</span> (<a id="2143c11" class="tk">rtb_Add2_lk</a> <a id="2143c23" class="tk">&lt;</a> <a id="2143c25" class="tk">rtb_Switch2_pl</a>) <span class="br">{</span></td></tr>
 <tr name="2144" id="2144">
-<td><a id="l2144" class='ln'>2144</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2144" class='ln'>2144</a></td><td>        <span class="ct">/* Switch: '&lt;S68&gt;/Switch' */</span></td></tr>
 <tr name="2145" id="2145">
-<td><a id="l2145" class='ln'>2145</a></td><td>      <a id="2145c7" class="tk">rtb_Divide1_m</a> = (<a id="2145c24" class="tk">int16_T</a>)<a id="2145c32" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l2145" class='ln'>2145</a></td><td>        <a id="2145c9" class="tk">rtDW</a>-&gt;<a id="2145c15" class="tk">Switch_p</a> = <a id="2145c26" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="2146" id="2146">
-<td><a id="l2146" class='ln'>2146</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2146" class='ln'>2146</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2147" id="2147">
-<td><a id="l2147" class='ln'>2147</a></td><td></td></tr>
+<td><a id="l2147" class='ln'>2147</a></td><td>        <span class="ct">/* Switch: '&lt;S68&gt;/Switch' */</span></td></tr>
 <tr name="2148" id="2148">
-<td><a id="l2148" class='ln'>2148</a></td><td>    <span class="ct">/* End of MinMax: '&lt;S76&gt;/Min2' */</span></td></tr>
+<td><a id="l2148" class='ln'>2148</a></td><td>        <a id="2148c9" class="tk">rtDW</a>-&gt;<a id="2148c15" class="tk">Switch_p</a> = <a id="2148c26" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2149" id="2149">
-<td><a id="l2149" class='ln'>2149</a></td><td></td></tr>
+<td><a id="l2149" class='ln'>2149</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="2150" id="2150">
-<td><a id="l2150" class='ln'>2150</a></td><td>    <span class="ct">/* Product: '&lt;S76&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l2150" class='ln'>2150</a></td><td></td></tr>
 <tr name="2151" id="2151">
-<td><a id="l2151" class='ln'>2151</a></td><td><span class="ct">     *  Math: '&lt;S86&gt;/Math Function2'</span></td></tr>
+<td><a id="l2151" class='ln'>2151</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S68&gt;/Min' */</span></td></tr>
 <tr name="2152" id="2152">
-<td><a id="l2152" class='ln'>2152</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2152" class='ln'>2152</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="2152c16" class="tk">rtb_Add2_lk</a> <a id="2152c28" class="tk">&gt;</a> <a id="2152c30" class="tk">rtb_Switch2_pl</a>) <span class="br">{</span></td></tr>
 <tr name="2153" id="2153">
-<td><a id="l2153" class='ln'>2153</a></td><td>    <a id="2153c5" class="tk">rtb_Divide_idx_0</a> = <a id="2153c24" class="tk">rtb_MathFunction2_p</a> <a id="2153c44" class="tk">/</a> <a id="2153c46" class="tk">rtb_Divide1_m</a>;</td></tr>
+<td><a id="l2153" class='ln'>2153</a></td><td>      <span class="ct">/* MinMax: '&lt;S68&gt;/Min1' incorporates:</span></td></tr>
 <tr name="2154" id="2154">
-<td><a id="l2154" class='ln'>2154</a></td><td>    <span class="kw">if</span> (<a id="2154c9" class="tk">rtb_Divide_idx_0</a> <a id="2154c26" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l2154" class='ln'>2154</a></td><td><span class="ct">       *  Switch: '&lt;S68&gt;/Switch'</span></td></tr>
 <tr name="2155" id="2155">
-<td><a id="l2155" class='ln'>2155</a></td><td>      <a id="2155c7" class="tk">rtb_Divide_idx_0</a> = 32767;</td></tr>
+<td><a id="l2155" class='ln'>2155</a></td><td><span class="ct">       *  Switch: '&lt;S77&gt;/Switch2'</span></td></tr>
 <tr name="2156" id="2156">
-<td><a id="l2156" class='ln'>2156</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2156" class='ln'>2156</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="2157" id="2157">
-<td><a id="l2157" class='ln'>2157</a></td><td>      <span class="kw">if</span> (<a id="2157c11" class="tk">rtb_Divide_idx_0</a> <a id="2157c28" class="tk">&lt;</a> <a id="2157c30" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l2157" class='ln'>2157</a></td><td>      <a id="2157c7" class="tk">rtDW</a>-&gt;<a id="2157c13" class="tk">Switch_p</a> = <a id="2157c24" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="2158" id="2158">
-<td><a id="l2158" class='ln'>2158</a></td><td>        <a id="2158c9" class="tk">rtb_Divide_idx_0</a> = <a id="2158c28" class="tk">-</a>32768;</td></tr>
+<td><a id="l2158" class='ln'>2158</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2159" id="2159">
-<td><a id="l2159" class='ln'>2159</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2159" class='ln'>2159</a></td><td>      <span class="ct">/* Switch: '&lt;S68&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2160" id="2160">
-<td><a id="l2160" class='ln'>2160</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2160" class='ln'>2160</a></td><td><span class="ct">       *  Sqrt: '&lt;S66&gt;/Sqrt'</span></td></tr>
 <tr name="2161" id="2161">
-<td><a id="l2161" class='ln'>2161</a></td><td></td></tr>
+<td><a id="l2161" class='ln'>2161</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="2162" id="2162">
-<td><a id="l2162" class='ln'>2162</a></td><td>    <span class="ct">/* Signum: '&lt;S76&gt;/Sign' incorporates:</span></td></tr>
+<td><a id="l2162" class='ln'>2162</a></td><td>      <a id="2162c7" class="tk">rtDW</a>-&gt;<a id="2162c13" class="tk">Switch_p</a> = <a id="2162c24" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2163" id="2163">
-<td><a id="l2163" class='ln'>2163</a></td><td><span class="ct">     *  Sqrt: '&lt;S74&gt;/Sqrt'</span></td></tr>
+<td><a id="l2163" class='ln'>2163</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2164" id="2164">
-<td><a id="l2164" class='ln'>2164</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2164" class='ln'>2164</a></td><td></td></tr>
 <tr name="2165" id="2165">
-<td><a id="l2165" class='ln'>2165</a></td><td>    <span class="kw">if</span> (<a id="2165c9" class="tk">rtb_Switch_f2_idx_1</a> <a id="2165c29" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2165" class='ln'>2165</a></td><td>    <span class="ct">/* End of Switch: '&lt;S68&gt;/Switch' */</span></td></tr>
 <tr name="2166" id="2166">
-<td><a id="l2166" class='ln'>2166</a></td><td>      <a id="2166c7" class="tk">rtb_Sum6_p</a> = <a id="2166c20" class="tk">-</a>1;</td></tr>
+<td><a id="l2166" class='ln'>2166</a></td><td></td></tr>
 <tr name="2167" id="2167">
-<td><a id="l2167" class='ln'>2167</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2167" class='ln'>2167</a></td><td>    <span class="ct">/* Switch: '&lt;S76&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="2168" id="2168">
-<td><a id="l2168" class='ln'>2168</a></td><td>      <a id="2168c7" class="tk">rtb_Sum6_p</a> = (<a id="2168c21" class="tk">int16_T</a>)(<a id="2168c30" class="tk">rtb_Switch_f2_idx_1</a> <a id="2168c50" class="tk">&gt;</a> 0);</td></tr>
+<td><a id="l2168" class='ln'>2168</a></td><td><span class="ct">     *  Constant: '&lt;S68&gt;/Constant1'</span></td></tr>
 <tr name="2169" id="2169">
-<td><a id="l2169" class='ln'>2169</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2169" class='ln'>2169</a></td><td><span class="ct">     *  Constant: '&lt;S68&gt;/Constant2'</span></td></tr>
 <tr name="2170" id="2170">
-<td><a id="l2170" class='ln'>2170</a></td><td></td></tr>
+<td><a id="l2170" class='ln'>2170</a></td><td><span class="ct">     *  Gain: '&lt;S68&gt;/Gain1'</span></td></tr>
 <tr name="2171" id="2171">
-<td><a id="l2171" class='ln'>2171</a></td><td>    <span class="ct">/* End of Signum: '&lt;S76&gt;/Sign' */</span></td></tr>
+<td><a id="l2171" class='ln'>2171</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S76&gt;/LowerRelop1'</span></td></tr>
 <tr name="2172" id="2172">
-<td><a id="l2172" class='ln'>2172</a></td><td></td></tr>
+<td><a id="l2172" class='ln'>2172</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S76&gt;/UpperRelop'</span></td></tr>
 <tr name="2173" id="2173">
-<td><a id="l2173" class='ln'>2173</a></td><td>    <span class="ct">/* Product: '&lt;S76&gt;/Divide2' incorporates:</span></td></tr>
+<td><a id="l2173" class='ln'>2173</a></td><td><span class="ct">     *  Switch: '&lt;S66&gt;/Switch'</span></td></tr>
 <tr name="2174" id="2174">
-<td><a id="l2174" class='ln'>2174</a></td><td><span class="ct">     *  Product: '&lt;S76&gt;/Divide1'</span></td></tr>
+<td><a id="l2174" class='ln'>2174</a></td><td><span class="ct">     *  Switch: '&lt;S76&gt;/Switch'</span></td></tr>
 <tr name="2175" id="2175">
 <td><a id="l2175" class='ln'>2175</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2176" id="2176">
-<td><a id="l2176" class='ln'>2176</a></td><td>    <a id="2176c5" class="tk">rtb_r_cos_M1</a> = (<a id="2176c21" class="tk">int16_T</a>)((<a id="2176c31" class="tk">int16_T</a>)<a id="2176c39" class="tk">rtb_Divide_idx_0</a> <a id="2176c56" class="tk">*</a> <a id="2176c58" class="tk">rtb_Sum6_p</a>);</td></tr>
+<td><a id="l2176" class='ln'>2176</a></td><td>    <span class="kw">if</span> (<a id="2176c9" class="tk">rtb_Gain_a</a> <a id="2176c20" class="tk">&gt;</a> <a id="2176c22" class="tk">rtP</a>.<a id="2176c26" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
 <tr name="2177" id="2177">
-<td><a id="l2177" class='ln'>2177</a></td><td></td></tr>
+<td><a id="l2177" class='ln'>2177</a></td><td>      <span class="ct">/* Switch: '&lt;S76&gt;/Switch2' */</span></td></tr>
 <tr name="2178" id="2178">
-<td><a id="l2178" class='ln'>2178</a></td><td>    <span class="ct">/* Switch: '&lt;S85&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l2178" class='ln'>2178</a></td><td>      <a id="2178c7" class="tk">rtDW</a>-&gt;<a id="2178c13" class="tk">Switch2</a> = <a id="2178c23" class="tk">rtP</a>.<a id="2178c27" class="tk">i_dqMax</a>;</td></tr>
 <tr name="2179" id="2179">
-<td><a id="l2179" class='ln'>2179</a></td><td><span class="ct">     *  Constant: '&lt;S76&gt;/Constant2'</span></td></tr>
+<td><a id="l2179" class='ln'>2179</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="2179c16" class="tk">rtb_Gain_a</a> <a id="2179c27" class="tk">&lt;</a> (<a id="2179c30" class="tk">int16_T</a>)<a id="2179c38" class="tk">-</a><a id="2179c39" class="tk">rtP</a>.<a id="2179c43" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
 <tr name="2180" id="2180">
-<td><a id="l2180" class='ln'>2180</a></td><td><span class="ct">     *  Constant: '&lt;S76&gt;/Constant3'</span></td></tr>
+<td><a id="l2180" class='ln'>2180</a></td><td>      <span class="ct">/* Switch: '&lt;S76&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2181" id="2181">
-<td><a id="l2181" class='ln'>2181</a></td><td><span class="ct">     *  Gain: '&lt;S76&gt;/Gain1'</span></td></tr>
+<td><a id="l2181" class='ln'>2181</a></td><td><span class="ct">       *  Constant: '&lt;S68&gt;/Constant2'</span></td></tr>
 <tr name="2182" id="2182">
-<td><a id="l2182" class='ln'>2182</a></td><td><span class="ct">     *  Product: '&lt;S76&gt;/Divide2'</span></td></tr>
+<td><a id="l2182" class='ln'>2182</a></td><td><span class="ct">       *  Gain: '&lt;S68&gt;/Gain1'</span></td></tr>
 <tr name="2183" id="2183">
-<td><a id="l2183" class='ln'>2183</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S85&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l2183" class='ln'>2183</a></td><td><span class="ct">       *  Switch: '&lt;S76&gt;/Switch2'</span></td></tr>
 <tr name="2184" id="2184">
-<td><a id="l2184" class='ln'>2184</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S85&gt;/UpperRelop'</span></td></tr>
+<td><a id="l2184" class='ln'>2184</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="2185" id="2185">
-<td><a id="l2185" class='ln'>2185</a></td><td><span class="ct">     *  Switch: '&lt;S85&gt;/Switch'</span></td></tr>
+<td><a id="l2185" class='ln'>2185</a></td><td>      <a id="2185c7" class="tk">rtDW</a>-&gt;<a id="2185c13" class="tk">Switch2</a> = (<a id="2185c24" class="tk">int16_T</a>)<a id="2185c32" class="tk">-</a><a id="2185c33" class="tk">rtP</a>.<a id="2185c37" class="tk">i_dqMax</a>;</td></tr>
 <tr name="2186" id="2186">
-<td><a id="l2186" class='ln'>2186</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2186" class='ln'>2186</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2187" id="2187">
-<td><a id="l2187" class='ln'>2187</a></td><td>    <span class="kw">if</span> (<a id="2187c9" class="tk">rtb_r_cos_M1</a> <a id="2187c22" class="tk">&gt;</a> <a id="2187c24" class="tk">rtP</a>.<a id="2187c28" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
+<td><a id="l2187" class='ln'>2187</a></td><td>      <span class="ct">/* Switch: '&lt;S76&gt;/Switch2' */</span></td></tr>
 <tr name="2188" id="2188">
-<td><a id="l2188" class='ln'>2188</a></td><td>      <a id="2188c7" class="tk">rtb_r_cos_M1</a> = <a id="2188c22" class="tk">rtP</a>.<a id="2188c26" class="tk">i_dqMax</a>;</td></tr>
+<td><a id="l2188" class='ln'>2188</a></td><td>      <a id="2188c7" class="tk">rtDW</a>-&gt;<a id="2188c13" class="tk">Switch2</a> = <a id="2188c23" class="tk">rtb_Gain_a</a>;</td></tr>
 <tr name="2189" id="2189">
-<td><a id="l2189" class='ln'>2189</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2189" class='ln'>2189</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2190" id="2190">
-<td><a id="l2190" class='ln'>2190</a></td><td>      <span class="kw">if</span> (<a id="2190c11" class="tk">rtb_r_cos_M1</a> <a id="2190c24" class="tk">&lt;</a> (<a id="2190c27" class="tk">int16_T</a>)<a id="2190c35" class="tk">-</a><a id="2190c36" class="tk">rtP</a>.<a id="2190c40" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
+<td><a id="l2190" class='ln'>2190</a></td><td></td></tr>
 <tr name="2191" id="2191">
-<td><a id="l2191" class='ln'>2191</a></td><td>        <span class="ct">/* Switch: '&lt;S85&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2191" class='ln'>2191</a></td><td>    <span class="ct">/* End of Switch: '&lt;S76&gt;/Switch2' */</span></td></tr>
 <tr name="2192" id="2192">
-<td><a id="l2192" class='ln'>2192</a></td><td><span class="ct">         *  Constant: '&lt;S76&gt;/Constant2'</span></td></tr>
+<td><a id="l2192" class='ln'>2192</a></td><td></td></tr>
 <tr name="2193" id="2193">
-<td><a id="l2193" class='ln'>2193</a></td><td><span class="ct">         *  Gain: '&lt;S76&gt;/Gain1'</span></td></tr>
+<td><a id="l2193" class='ln'>2193</a></td><td>    <span class="ct">/* Sqrt: '&lt;S78&gt;/Sqrt1' incorporates:</span></td></tr>
 <tr name="2194" id="2194">
-<td><a id="l2194" class='ln'>2194</a></td><td><span class="ct">         *  Switch: '&lt;S85&gt;/Switch2'</span></td></tr>
+<td><a id="l2194" class='ln'>2194</a></td><td><span class="ct">     *  Math: '&lt;S78&gt;/Math Function3'</span></td></tr>
 <tr name="2195" id="2195">
-<td><a id="l2195" class='ln'>2195</a></td><td><span class="ct">         */</span></td></tr>
+<td><a id="l2195" class='ln'>2195</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide1'</span></td></tr>
 <tr name="2196" id="2196">
-<td><a id="l2196" class='ln'>2196</a></td><td>        <a id="2196c9" class="tk">rtb_r_cos_M1</a> = (<a id="2196c25" class="tk">int16_T</a>)<a id="2196c33" class="tk">-</a><a id="2196c34" class="tk">rtP</a>.<a id="2196c38" class="tk">i_dqMax</a>;</td></tr>
+<td><a id="l2196" class='ln'>2196</a></td><td><span class="ct">     *  Sum: '&lt;S78&gt;/Add'</span></td></tr>
 <tr name="2197" id="2197">
-<td><a id="l2197" class='ln'>2197</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2197" class='ln'>2197</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2198" id="2198">
-<td><a id="l2198" class='ln'>2198</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2198" class='ln'>2198</a></td><td>    <a id="2198c5" class="tk">rtb_Gain_a</a> = <a id="2198c18" class="tk">rt_sqrt_Us32En10_Ys16En5_Is32En10_s_s</a>(<a id="2198c56" class="tk">rtb_RelationalOperator4_b</a></td></tr>
 <tr name="2199" id="2199">
-<td><a id="l2199" class='ln'>2199</a></td><td></td></tr>
+<td><a id="l2199" class='ln'>2199</a></td><td>      <a id="2199c7" class="tk">+</a> (<a id="2199c10" class="tk">int16_T</a>)<a id="2199c18" class="tk">rtb_Divide_e_idx_1</a> <a id="2199c37" class="tk">*</a> (<a id="2199c40" class="tk">int16_T</a>)<a id="2199c48" class="tk">rtb_Divide_e_idx_1</a>);</td></tr>
 <tr name="2200" id="2200">
-<td><a id="l2200" class='ln'>2200</a></td><td>    <span class="ct">/* End of Switch: '&lt;S85&gt;/Switch2' */</span></td></tr>
+<td><a id="l2200" class='ln'>2200</a></td><td></td></tr>
 <tr name="2201" id="2201">
-<td><a id="l2201" class='ln'>2201</a></td><td></td></tr>
+<td><a id="l2201" class='ln'>2201</a></td><td>    <span class="ct">/* Sum: '&lt;S69&gt;/Sum' incorporates:</span></td></tr>
 <tr name="2202" id="2202">
-<td><a id="l2202" class='ln'>2202</a></td><td>    <span class="ct">/* Switch: '&lt;S76&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2202" class='ln'>2202</a></td><td><span class="ct">     *  Sum: '&lt;S70&gt;/Sum1'</span></td></tr>
 <tr name="2203" id="2203">
-<td><a id="l2203" class='ln'>2203</a></td><td><span class="ct">     *  MinMax: '&lt;S76&gt;/Min1'</span></td></tr>
+<td><a id="l2203" class='ln'>2203</a></td><td><span class="ct">     *  Switch: '&lt;S71&gt;/Switch2'</span></td></tr>
 <tr name="2204" id="2204">
-<td><a id="l2204" class='ln'>2204</a></td><td><span class="ct">     *  Sqrt: '&lt;S74&gt;/Sqrt'</span></td></tr>
+<td><a id="l2204" class='ln'>2204</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2205" id="2205">
-<td><a id="l2205" class='ln'>2205</a></td><td><span class="ct">     *  Switch: '&lt;S85&gt;/Switch2'</span></td></tr>
+<td><a id="l2205" class='ln'>2205</a></td><td>    <a id="2205c5" class="tk">rtb_MathFunction2_n</a> = <a id="2205c27" class="tk">rtb_Divide_e_idx_2</a> <a id="2205c46" class="tk">-</a> <a id="2205c48" class="tk">rtb_Gain_h</a>;</td></tr>
 <tr name="2206" id="2206">
-<td><a id="l2206" class='ln'>2206</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2206" class='ln'>2206</a></td><td></td></tr>
 <tr name="2207" id="2207">
-<td><a id="l2207" class='ln'>2207</a></td><td>    <span class="kw">if</span> (<a id="2207c9" class="tk">rtb_Sum6_p</a> <a id="2207c20" class="tk">&gt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2207" class='ln'>2207</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S44&gt;/Do_Calc' */</span></td></tr>
 <tr name="2208" id="2208">
-<td><a id="l2208" class='ln'>2208</a></td><td>      <span class="ct">/* MinMax: '&lt;S76&gt;/Min' incorporates:</span></td></tr>
+<td><a id="l2208" class='ln'>2208</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2209" id="2209">
-<td><a id="l2209" class='ln'>2209</a></td><td><span class="ct">       *  Sqrt: '&lt;S74&gt;/Sqrt'</span></td></tr>
+<td><a id="l2209" class='ln'>2209</a></td><td></td></tr>
 <tr name="2210" id="2210">
-<td><a id="l2210" class='ln'>2210</a></td><td><span class="ct">       *  Switch: '&lt;S85&gt;/Switch2'</span></td></tr>
+<td><a id="l2210" class='ln'>2210</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S96&gt;/Relational Operator' incorporates:</span></td></tr>
 <tr name="2211" id="2211">
-<td><a id="l2211" class='ln'>2211</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l2211" class='ln'>2211</a></td><td><span class="ct">   *  Switch: '&lt;S76&gt;/Switch2'</span></td></tr>
 <tr name="2212" id="2212">
-<td><a id="l2212" class='ln'>2212</a></td><td>      <span class="kw">if</span> (<a id="2212c11" class="tk">rtb_r_cos_M1</a> <a id="2212c24" class="tk">&lt;</a> <a id="2212c26" class="tk">rtb_Switch_f2_idx_1</a>) <span class="br">{</span></td></tr>
+<td><a id="l2212" class='ln'>2212</a></td><td><span class="ct">   *  UnitDelay: '&lt;S96&gt;/UnitDelay'</span></td></tr>
 <tr name="2213" id="2213">
-<td><a id="l2213" class='ln'>2213</a></td><td>        <span class="ct">/* Switch: '&lt;S76&gt;/Switch' */</span></td></tr>
+<td><a id="l2213" class='ln'>2213</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2214" id="2214">
-<td><a id="l2214" class='ln'>2214</a></td><td>        <a id="2214c9" class="tk">rtDW</a>-&gt;<a id="2214c15" class="tk">Switch</a> = <a id="2214c24" class="tk">rtb_r_cos_M1</a>;</td></tr>
+<td><a id="l2214" class='ln'>2214</a></td><td>  <a id="2214c3" class="tk">rtb_LogicalOperator1_g</a> = (<a id="2214c29" class="tk">rtDW</a>-&gt;<a id="2214c35" class="tk">Switch2</a> <a id="2214c43" class="tk">!=</a> <a id="2214c46" class="tk">rtDW</a>-&gt;<a id="2214c52" class="tk">UnitDelay_DSTATE_l5</a>);</td></tr>
 <tr name="2215" id="2215">
-<td><a id="l2215" class='ln'>2215</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2215" class='ln'>2215</a></td><td></td></tr>
 <tr name="2216" id="2216">
-<td><a id="l2216" class='ln'>2216</a></td><td>        <span class="ct">/* Switch: '&lt;S76&gt;/Switch' */</span></td></tr>
+<td><a id="l2216" class='ln'>2216</a></td><td>  <span class="ct">/* Sum: '&lt;S87&gt;/Add' incorporates:</span></td></tr>
 <tr name="2217" id="2217">
-<td><a id="l2217" class='ln'>2217</a></td><td>        <a id="2217c9" class="tk">rtDW</a>-&gt;<a id="2217c15" class="tk">Switch</a> = <a id="2217c24" class="tk">rtb_Switch_f2_idx_1</a>;</td></tr>
+<td><a id="l2217" class='ln'>2217</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2218" id="2218">
-<td><a id="l2218" class='ln'>2218</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2218" class='ln'>2218</a></td><td><span class="ct">   *  Switch: '&lt;S76&gt;/Switch2'</span></td></tr>
 <tr name="2219" id="2219">
-<td><a id="l2219" class='ln'>2219</a></td><td></td></tr>
+<td><a id="l2219" class='ln'>2219</a></td><td><span class="ct">   *  UnitDelay: '&lt;S87&gt;/Unit Delay1'</span></td></tr>
 <tr name="2220" id="2220">
-<td><a id="l2220" class='ln'>2220</a></td><td>      <span class="ct">/* End of MinMax: '&lt;S76&gt;/Min' */</span></td></tr>
+<td><a id="l2220" class='ln'>2220</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2221" id="2221">
-<td><a id="l2221" class='ln'>2221</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="2221c16" class="tk">rtb_r_cos_M1</a> <a id="2221c29" class="tk">&gt;</a> <a id="2221c31" class="tk">rtb_Switch_f2_idx_1</a>) <span class="br">{</span></td></tr>
+<td><a id="l2221" class='ln'>2221</a></td><td>  <a id="2221c3" class="tk">rtb_Switch2_pl</a> = (<a id="2221c21" class="tk">int16_T</a>)(<a id="2221c30" class="tk">rtDW</a>-&gt;<a id="2221c36" class="tk">Switch2</a> <a id="2221c44" class="tk">-</a> <a id="2221c46" class="tk">rtDW</a>-&gt;<a id="2221c52" class="tk">UnitDelay1_DSTATE_j</a>);</td></tr>
 <tr name="2222" id="2222">
-<td><a id="l2222" class='ln'>2222</a></td><td>      <span class="ct">/* MinMax: '&lt;S76&gt;/Min1' incorporates:</span></td></tr>
+<td><a id="l2222" class='ln'>2222</a></td><td></td></tr>
 <tr name="2223" id="2223">
-<td><a id="l2223" class='ln'>2223</a></td><td><span class="ct">       *  Switch: '&lt;S76&gt;/Switch'</span></td></tr>
+<td><a id="l2223" class='ln'>2223</a></td><td>  <span class="ct">/* Abs: '&lt;S87&gt;/Abs' incorporates:</span></td></tr>
 <tr name="2224" id="2224">
-<td><a id="l2224" class='ln'>2224</a></td><td><span class="ct">       *  Switch: '&lt;S85&gt;/Switch2'</span></td></tr>
+<td><a id="l2224" class='ln'>2224</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2225" id="2225">
-<td><a id="l2225" class='ln'>2225</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l2225" class='ln'>2225</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2226" id="2226">
-<td><a id="l2226" class='ln'>2226</a></td><td>      <a id="2226c7" class="tk">rtDW</a>-&gt;<a id="2226c13" class="tk">Switch</a> = <a id="2226c22" class="tk">rtb_r_cos_M1</a>;</td></tr>
+<td><a id="l2226" class='ln'>2226</a></td><td>  <span class="kw">if</span> (<a id="2226c7" class="tk">rtb_Switch2_pl</a> <a id="2226c22" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="2227" id="2227">
-<td><a id="l2227" class='ln'>2227</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2227" class='ln'>2227</a></td><td>    <a id="2227c5" class="tk">rtb_Switch2_pl</a> = (<a id="2227c23" class="tk">int16_T</a>)<a id="2227c31" class="tk">-</a><a id="2227c32" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2228" id="2228">
-<td><a id="l2228" class='ln'>2228</a></td><td>      <span class="ct">/* Switch: '&lt;S76&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2228" class='ln'>2228</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2229" id="2229">
-<td><a id="l2229" class='ln'>2229</a></td><td><span class="ct">       *  Sqrt: '&lt;S74&gt;/Sqrt'</span></td></tr>
+<td><a id="l2229" class='ln'>2229</a></td><td></td></tr>
 <tr name="2230" id="2230">
-<td><a id="l2230" class='ln'>2230</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l2230" class='ln'>2230</a></td><td>  <span class="ct">/* End of Abs: '&lt;S87&gt;/Abs' */</span></td></tr>
 <tr name="2231" id="2231">
-<td><a id="l2231" class='ln'>2231</a></td><td>      <a id="2231c7" class="tk">rtDW</a>-&gt;<a id="2231c13" class="tk">Switch</a> = <a id="2231c22" class="tk">rtb_Switch_f2_idx_1</a>;</td></tr>
+<td><a id="l2231" class='ln'>2231</a></td><td></td></tr>
 <tr name="2232" id="2232">
-<td><a id="l2232" class='ln'>2232</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2232" class='ln'>2232</a></td><td>  <span class="ct">/* Outputs for Enabled SubSystem: '&lt;S87&gt;/Enabled Subsystem' incorporates:</span></td></tr>
 <tr name="2233" id="2233">
-<td><a id="l2233" class='ln'>2233</a></td><td></td></tr>
+<td><a id="l2233" class='ln'>2233</a></td><td><span class="ct">   *  EnablePort: '&lt;S97&gt;/Enable'</span></td></tr>
 <tr name="2234" id="2234">
-<td><a id="l2234" class='ln'>2234</a></td><td>    <span class="ct">/* End of Switch: '&lt;S76&gt;/Switch' */</span></td></tr>
+<td><a id="l2234" class='ln'>2234</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2235" id="2235">
-<td><a id="l2235" class='ln'>2235</a></td><td></td></tr>
+<td><a id="l2235" class='ln'>2235</a></td><td>  <span class="ct">/* If: '&lt;S98&gt;/If' incorporates:</span></td></tr>
 <tr name="2236" id="2236">
-<td><a id="l2236" class='ln'>2236</a></td><td>    <span class="ct">/* Switch: '&lt;S84&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l2236" class='ln'>2236</a></td><td><span class="ct">   *  Gain: '&lt;S87&gt;/Gain'</span></td></tr>
 <tr name="2237" id="2237">
-<td><a id="l2237" class='ln'>2237</a></td><td><span class="ct">     *  Constant: '&lt;S76&gt;/Constant1'</span></td></tr>
+<td><a id="l2237" class='ln'>2237</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2238" id="2238">
-<td><a id="l2238" class='ln'>2238</a></td><td><span class="ct">     *  Constant: '&lt;S76&gt;/Constant2'</span></td></tr>
+<td><a id="l2238" class='ln'>2238</a></td><td><span class="ct">   *  UnitDelay: '&lt;S87&gt;/Unit Delay1'</span></td></tr>
 <tr name="2239" id="2239">
-<td><a id="l2239" class='ln'>2239</a></td><td><span class="ct">     *  Gain: '&lt;S76&gt;/Gain1'</span></td></tr>
+<td><a id="l2239" class='ln'>2239</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2240" id="2240">
-<td><a id="l2240" class='ln'>2240</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S84&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l2240" class='ln'>2240</a></td><td>  <span class="kw">if</span> (<a id="2240c7" class="tk">rtb_LogicalOperator1_g</a>) <span class="br">{</span></td></tr>
 <tr name="2241" id="2241">
-<td><a id="l2241" class='ln'>2241</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S84&gt;/UpperRelop'</span></td></tr>
+<td><a id="l2241" class='ln'>2241</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S98&gt;/RateInit' incorporates:</span></td></tr>
 <tr name="2242" id="2242">
-<td><a id="l2242" class='ln'>2242</a></td><td><span class="ct">     *  Switch: '&lt;S74&gt;/Switch'</span></td></tr>
+<td><a id="l2242" class='ln'>2242</a></td><td><span class="ct">     *  ActionPort: '&lt;S99&gt;/Action Port'</span></td></tr>
 <tr name="2243" id="2243">
-<td><a id="l2243" class='ln'>2243</a></td><td><span class="ct">     *  Switch: '&lt;S84&gt;/Switch'</span></td></tr>
+<td><a id="l2243" class='ln'>2243</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2244" id="2244">
-<td><a id="l2244" class='ln'>2244</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2244" class='ln'>2244</a></td><td>    <a id="2244c5" class="tk">RateInit</a>(<a id="2244c14" class="tk">rtDW</a>-&gt;<a id="2244c20" class="tk">UnitDelay1_DSTATE_j</a>, <a id="2244c41" class="tk">rtDW</a>-&gt;<a id="2244c47" class="tk">Switch2</a>, (<a id="2244c57" class="tk">int16_T</a>)((13107 <a id="2244c73" class="tk">*</a></td></tr>
 <tr name="2245" id="2245">
-<td><a id="l2245" class='ln'>2245</a></td><td>    <span class="kw">if</span> (<a id="2245c9" class="tk">rtb_Min</a> <a id="2245c17" class="tk">&gt;</a> <a id="2245c19" class="tk">rtP</a>.<a id="2245c23" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
+<td><a id="l2245" class='ln'>2245</a></td><td>               <a id="2245c16" class="tk">rtb_Switch2_pl</a>) <a id="2245c32" class="tk">&gt;&gt;</a> 13), <a id="2245c40" class="tk">&amp;</a><a id="2245c41" class="tk">rtDW</a>-&gt;<a id="2245c47" class="tk">Divide_d</a>, <a id="2245c57" class="tk">&amp;</a><a id="2245c58" class="tk">rtDW</a>-&gt;<a id="2245c64" class="tk">Max_i</a>,</td></tr>
 <tr name="2246" id="2246">
-<td><a id="l2246" class='ln'>2246</a></td><td>      <span class="ct">/* Switch: '&lt;S84&gt;/Switch2' */</span></td></tr>
+<td><a id="l2246" class='ln'>2246</a></td><td>             <a id="2246c14" class="tk">&amp;</a><a id="2246c15" class="tk">rtDW</a>-&gt;<a id="2246c21" class="tk">Max1_e</a>);</td></tr>
 <tr name="2247" id="2247">
-<td><a id="l2247" class='ln'>2247</a></td><td>      <a id="2247c7" class="tk">rtDW</a>-&gt;<a id="2247c13" class="tk">Switch2</a> = <a id="2247c23" class="tk">rtP</a>.<a id="2247c27" class="tk">i_dqMax</a>;</td></tr>
+<td><a id="l2247" class='ln'>2247</a></td><td></td></tr>
 <tr name="2248" id="2248">
-<td><a id="l2248" class='ln'>2248</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="2248c16" class="tk">rtb_Min</a> <a id="2248c24" class="tk">&lt;</a> (<a id="2248c27" class="tk">int16_T</a>)<a id="2248c35" class="tk">-</a><a id="2248c36" class="tk">rtP</a>.<a id="2248c40" class="tk">i_dqMax</a>) <span class="br">{</span></td></tr>
+<td><a id="l2248" class='ln'>2248</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S98&gt;/RateInit' */</span></td></tr>
 <tr name="2249" id="2249">
-<td><a id="l2249" class='ln'>2249</a></td><td>      <span class="ct">/* Switch: '&lt;S84&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2249" class='ln'>2249</a></td><td></td></tr>
 <tr name="2250" id="2250">
-<td><a id="l2250" class='ln'>2250</a></td><td><span class="ct">       *  Constant: '&lt;S76&gt;/Constant2'</span></td></tr>
+<td><a id="l2250" class='ln'>2250</a></td><td>    <span class="ct">/* Switch: '&lt;S102&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="2251" id="2251">
-<td><a id="l2251" class='ln'>2251</a></td><td><span class="ct">       *  Gain: '&lt;S76&gt;/Gain1'</span></td></tr>
+<td><a id="l2251" class='ln'>2251</a></td><td><span class="ct">     *  Gain: '&lt;S87&gt;/Gain'</span></td></tr>
 <tr name="2252" id="2252">
-<td><a id="l2252" class='ln'>2252</a></td><td><span class="ct">       *  Switch: '&lt;S84&gt;/Switch2'</span></td></tr>
+<td><a id="l2252" class='ln'>2252</a></td><td><span class="ct">     *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2253" id="2253">
-<td><a id="l2253" class='ln'>2253</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l2253" class='ln'>2253</a></td><td><span class="ct">     *  UnitDelay: '&lt;S87&gt;/Unit Delay1'</span></td></tr>
 <tr name="2254" id="2254">
-<td><a id="l2254" class='ln'>2254</a></td><td>      <a id="2254c7" class="tk">rtDW</a>-&gt;<a id="2254c13" class="tk">Switch2</a> = (<a id="2254c24" class="tk">int16_T</a>)<a id="2254c32" class="tk">-</a><a id="2254c33" class="tk">rtP</a>.<a id="2254c37" class="tk">i_dqMax</a>;</td></tr>
+<td><a id="l2254" class='ln'>2254</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2255" id="2255">
-<td><a id="l2255" class='ln'>2255</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2255" class='ln'>2255</a></td><td>    <a id="2255c5" class="tk">rtb_Add2_lk</a> = <a id="2255c19" class="tk">rtDW</a>-&gt;<a id="2255c25" class="tk">UnitDelay1_DSTATE_j</a>;</td></tr>
 <tr name="2256" id="2256">
-<td><a id="l2256" class='ln'>2256</a></td><td>      <span class="ct">/* Switch: '&lt;S84&gt;/Switch2' */</span></td></tr>
+<td><a id="l2256" class='ln'>2256</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2257" id="2257">
-<td><a id="l2257" class='ln'>2257</a></td><td>      <a id="2257c7" class="tk">rtDW</a>-&gt;<a id="2257c13" class="tk">Switch2</a> = <a id="2257c23" class="tk">rtb_Min</a>;</td></tr>
+<td><a id="l2257" class='ln'>2257</a></td><td>    <span class="ct">/* Switch: '&lt;S102&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="2258" id="2258">
-<td><a id="l2258" class='ln'>2258</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2258" class='ln'>2258</a></td><td><span class="ct">     *  UnitDelay: '&lt;S102&gt;/UnitDelay'</span></td></tr>
 <tr name="2259" id="2259">
-<td><a id="l2259" class='ln'>2259</a></td><td></td></tr>
+<td><a id="l2259" class='ln'>2259</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2260" id="2260">
-<td><a id="l2260" class='ln'>2260</a></td><td>    <span class="ct">/* End of Switch: '&lt;S84&gt;/Switch2' */</span></td></tr>
+<td><a id="l2260" class='ln'>2260</a></td><td>    <a id="2260c5" class="tk">rtb_Add2_lk</a> = <a id="2260c19" class="tk">rtDW</a>-&gt;<a id="2260c25" class="tk">UnitDelay_DSTATE_g</a>;</td></tr>
 <tr name="2261" id="2261">
-<td><a id="l2261" class='ln'>2261</a></td><td></td></tr>
+<td><a id="l2261" class='ln'>2261</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2262" id="2262">
-<td><a id="l2262" class='ln'>2262</a></td><td>    <span class="ct">/* Sqrt: '&lt;S86&gt;/Sqrt1' incorporates:</span></td></tr>
+<td><a id="l2262" class='ln'>2262</a></td><td></td></tr>
 <tr name="2263" id="2263">
-<td><a id="l2263" class='ln'>2263</a></td><td><span class="ct">     *  Math: '&lt;S86&gt;/Math Function2'</span></td></tr>
+<td><a id="l2263" class='ln'>2263</a></td><td>  <span class="ct">/* End of If: '&lt;S98&gt;/If' */</span></td></tr>
 <tr name="2264" id="2264">
-<td><a id="l2264" class='ln'>2264</a></td><td><span class="ct">     *  Math: '&lt;S86&gt;/Math Function3'</span></td></tr>
+<td><a id="l2264" class='ln'>2264</a></td><td>  <span class="ct">/* End of Outputs for SubSystem: '&lt;S87&gt;/Enabled Subsystem' */</span></td></tr>
 <tr name="2265" id="2265">
-<td><a id="l2265" class='ln'>2265</a></td><td><span class="ct">     *  Product: '&lt;S76&gt;/Divide1'</span></td></tr>
+<td><a id="l2265" class='ln'>2265</a></td><td></td></tr>
 <tr name="2266" id="2266">
-<td><a id="l2266" class='ln'>2266</a></td><td><span class="ct">     *  Sum: '&lt;S86&gt;/Add'</span></td></tr>
+<td><a id="l2266" class='ln'>2266</a></td><td>  <span class="ct">/* Switch: '&lt;S98&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2267" id="2267">
-<td><a id="l2267" class='ln'>2267</a></td><td><span class="ct">     *  Switch: '&lt;S74&gt;/Switch'</span></td></tr>
+<td><a id="l2267" class='ln'>2267</a></td><td><span class="ct">   *  Constant: '&lt;S98&gt;/Constant'</span></td></tr>
 <tr name="2268" id="2268">
-<td><a id="l2268" class='ln'>2268</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2268" class='ln'>2268</a></td><td><span class="ct">   *  Product: '&lt;S99&gt;/Divide'</span></td></tr>
 <tr name="2269" id="2269">
-<td><a id="l2269" class='ln'>2269</a></td><td>    <a id="2269c5" class="tk">rtb_Min</a> = <a id="2269c15" class="tk">rt_sqrt_Us32En10_Ys16E_7VJYwqF9</a>(<a id="2269c47" class="tk">rtb_Min</a> <a id="2269c55" class="tk">*</a> <a id="2269c57" class="tk">rtb_Min</a> <a id="2269c65" class="tk">+</a> (<a id="2269c68" class="tk">int16_T</a>)</td></tr>
+<td><a id="l2269" class='ln'>2269</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S98&gt;/Equal'</span></td></tr>
 <tr name="2270" id="2270">
-<td><a id="l2270" class='ln'>2270</a></td><td>      <a id="2270c7" class="tk">rtb_Divide_idx_0</a> <a id="2270c24" class="tk">*</a> (<a id="2270c27" class="tk">int16_T</a>)<a id="2270c35" class="tk">rtb_Divide_idx_0</a>);</td></tr>
+<td><a id="l2270" class='ln'>2270</a></td><td><span class="ct">   *  Switch: '&lt;S76&gt;/Switch2'</span></td></tr>
 <tr name="2271" id="2271">
-<td><a id="l2271" class='ln'>2271</a></td><td></td></tr>
+<td><a id="l2271" class='ln'>2271</a></td><td><span class="ct">   *  UnitDelay: '&lt;S98&gt;/Unit Delay'</span></td></tr>
 <tr name="2272" id="2272">
-<td><a id="l2272" class='ln'>2272</a></td><td>    <span class="ct">/* Sum: '&lt;S77&gt;/Sum' incorporates:</span></td></tr>
+<td><a id="l2272" class='ln'>2272</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2273" id="2273">
-<td><a id="l2273" class='ln'>2273</a></td><td><span class="ct">     *  Sum: '&lt;S78&gt;/Sum1'</span></td></tr>
+<td><a id="l2273" class='ln'>2273</a></td><td>  <span class="kw">if</span> (<a id="2273c7" class="tk">rtDW</a>-&gt;<a id="2273c13" class="tk">Switch2</a> <a id="2273c21" class="tk">!=</a> <a id="2273c24" class="tk">rtDW</a>-&gt;<a id="2273c30" class="tk">UnitDelay_DSTATE_b</a>) <span class="br">{</span></td></tr>
 <tr name="2274" id="2274">
-<td><a id="l2274" class='ln'>2274</a></td><td><span class="ct">     *  Switch: '&lt;S79&gt;/Switch2'</span></td></tr>
+<td><a id="l2274" class='ln'>2274</a></td><td>    <a id="2274c5" class="tk">rtb_Switch2_pl</a> = <a id="2274c22" class="tk">rtDW</a>-&gt;<a id="2274c28" class="tk">Divide_d</a>;</td></tr>
 <tr name="2275" id="2275">
-<td><a id="l2275" class='ln'>2275</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2275" class='ln'>2275</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2276" id="2276">
-<td><a id="l2276" class='ln'>2276</a></td><td>    <a id="2276c5" class="tk">rtb_MathFunction2_p</a> = <a id="2276c27" class="tk">rtb_Divide_idx_1</a> <a id="2276c44" class="tk">-</a> <a id="2276c46" class="tk">rtb_Sum1_f</a>;</td></tr>
+<td><a id="l2276" class='ln'>2276</a></td><td>    <a id="2276c5" class="tk">rtb_Switch2_pl</a> = 0;</td></tr>
 <tr name="2277" id="2277">
-<td><a id="l2277" class='ln'>2277</a></td><td></td></tr>
+<td><a id="l2277" class='ln'>2277</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2278" id="2278">
-<td><a id="l2278" class='ln'>2278</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S53&gt;/Do_Calc' */</span></td></tr>
+<td><a id="l2278" class='ln'>2278</a></td><td></td></tr>
 <tr name="2279" id="2279">
-<td><a id="l2279" class='ln'>2279</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2279" class='ln'>2279</a></td><td>  <span class="ct">/* End of Switch: '&lt;S98&gt;/Switch' */</span></td></tr>
 <tr name="2280" id="2280">
 <td><a id="l2280" class='ln'>2280</a></td><td></td></tr>
 <tr name="2281" id="2281">
-<td><a id="l2281" class='ln'>2281</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S106&gt;/Relational Operator' incorporates:</span></td></tr>
+<td><a id="l2281" class='ln'>2281</a></td><td>  <span class="ct">/* Sum: '&lt;S101&gt;/Add2' */</span></td></tr>
 <tr name="2282" id="2282">
-<td><a id="l2282" class='ln'>2282</a></td><td><span class="ct">   *  Switch: '&lt;S84&gt;/Switch2'</span></td></tr>
+<td><a id="l2282" class='ln'>2282</a></td><td>  <a id="2282c3" class="tk">rtb_RelationalOperator4_b</a> = ((<a id="2282c33" class="tk">rtb_Add2_lk</a> <a id="2282c45" class="tk">&lt;&lt;</a> 5) <a id="2282c51" class="tk">+</a> <a id="2282c53" class="tk">rtb_Switch2_pl</a>) <a id="2282c69" class="tk">&gt;&gt;</a> 5;</td></tr>
 <tr name="2283" id="2283">
-<td><a id="l2283" class='ln'>2283</a></td><td><span class="ct">   *  UnitDelay: '&lt;S106&gt;/UnitDelay'</span></td></tr>
+<td><a id="l2283" class='ln'>2283</a></td><td>  <span class="kw">if</span> (<a id="2283c7" class="tk">rtb_RelationalOperator4_b</a> <a id="2283c33" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="2284" id="2284">
-<td><a id="l2284" class='ln'>2284</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2284" class='ln'>2284</a></td><td>    <a id="2284c5" class="tk">rtb_RelationalOperator4_b</a> = 32767;</td></tr>
 <tr name="2285" id="2285">
-<td><a id="l2285" class='ln'>2285</a></td><td>  <a id="2285c3" class="tk">rtb_Equal_k</a> = (<a id="2285c18" class="tk">rtDW</a>-&gt;<a id="2285c24" class="tk">Switch2</a> <a id="2285c32" class="tk">!=</a> <a id="2285c35" class="tk">rtDW</a>-&gt;<a id="2285c41" class="tk">UnitDelay_DSTATE_h</a>);</td></tr>
+<td><a id="l2285" class='ln'>2285</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2286" id="2286">
-<td><a id="l2286" class='ln'>2286</a></td><td></td></tr>
+<td><a id="l2286" class='ln'>2286</a></td><td>    <span class="kw">if</span> (<a id="2286c9" class="tk">rtb_RelationalOperator4_b</a> <a id="2286c35" class="tk">&lt;</a> <a id="2286c37" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="2287" id="2287">
-<td><a id="l2287" class='ln'>2287</a></td><td>  <span class="ct">/* Sum: '&lt;S97&gt;/Add' incorporates:</span></td></tr>
+<td><a id="l2287" class='ln'>2287</a></td><td>      <a id="2287c7" class="tk">rtb_RelationalOperator4_b</a> = <a id="2287c35" class="tk">-</a>32768;</td></tr>
 <tr name="2288" id="2288">
-<td><a id="l2288" class='ln'>2288</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2288" class='ln'>2288</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2289" id="2289">
-<td><a id="l2289" class='ln'>2289</a></td><td><span class="ct">   *  Switch: '&lt;S84&gt;/Switch2'</span></td></tr>
+<td><a id="l2289" class='ln'>2289</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2290" id="2290">
-<td><a id="l2290" class='ln'>2290</a></td><td><span class="ct">   *  UnitDelay: '&lt;S97&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l2290" class='ln'>2290</a></td><td></td></tr>
 <tr name="2291" id="2291">
-<td><a id="l2291" class='ln'>2291</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2291" class='ln'>2291</a></td><td>  <span class="ct">/* Switch: '&lt;S100&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="2292" id="2292">
-<td><a id="l2292" class='ln'>2292</a></td><td>  <a id="2292c3" class="tk">rtb_Sum6_p</a> = (<a id="2292c17" class="tk">int16_T</a>)(<a id="2292c26" class="tk">rtDW</a>-&gt;<a id="2292c32" class="tk">Switch2</a> <a id="2292c40" class="tk">-</a> <a id="2292c42" class="tk">rtDW</a>-&gt;<a id="2292c48" class="tk">UnitDelay1_DSTATE_i</a>);</td></tr>
+<td><a id="l2292" class='ln'>2292</a></td><td><span class="ct">   *  MinMax: '&lt;S99&gt;/Max'</span></td></tr>
 <tr name="2293" id="2293">
-<td><a id="l2293" class='ln'>2293</a></td><td></td></tr>
+<td><a id="l2293" class='ln'>2293</a></td><td><span class="ct">   *  MinMax: '&lt;S99&gt;/Max1'</span></td></tr>
 <tr name="2294" id="2294">
-<td><a id="l2294" class='ln'>2294</a></td><td>  <span class="ct">/* Abs: '&lt;S97&gt;/Abs' incorporates:</span></td></tr>
+<td><a id="l2294" class='ln'>2294</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S100&gt;/LowerRelop1'</span></td></tr>
 <tr name="2295" id="2295">
-<td><a id="l2295" class='ln'>2295</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2295" class='ln'>2295</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S100&gt;/UpperRelop'</span></td></tr>
 <tr name="2296" id="2296">
-<td><a id="l2296" class='ln'>2296</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2296" class='ln'>2296</a></td><td><span class="ct">   *  Sum: '&lt;S101&gt;/Add2'</span></td></tr>
 <tr name="2297" id="2297">
-<td><a id="l2297" class='ln'>2297</a></td><td>  <span class="kw">if</span> (<a id="2297c7" class="tk">rtb_Sum6_p</a> <a id="2297c18" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2297" class='ln'>2297</a></td><td><span class="ct">   *  Switch: '&lt;S100&gt;/Switch'</span></td></tr>
 <tr name="2298" id="2298">
-<td><a id="l2298" class='ln'>2298</a></td><td>    <a id="2298c5" class="tk">rtb_Sum6_p</a> = (<a id="2298c19" class="tk">int16_T</a>)<a id="2298c27" class="tk">-</a><a id="2298c28" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2298" class='ln'>2298</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2299" id="2299">
-<td><a id="l2299" class='ln'>2299</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2299" class='ln'>2299</a></td><td>  <span class="kw">if</span> ((<a id="2299c8" class="tk">int16_T</a>)<a id="2299c16" class="tk">rtb_RelationalOperator4_b</a> <a id="2299c42" class="tk">&gt;</a> <a id="2299c44" class="tk">rtDW</a>-&gt;<a id="2299c50" class="tk">Max_i</a>) <span class="br">{</span></td></tr>
 <tr name="2300" id="2300">
-<td><a id="l2300" class='ln'>2300</a></td><td></td></tr>
+<td><a id="l2300" class='ln'>2300</a></td><td>    <a id="2300c5" class="tk">rtb_Add2_lk</a> = <a id="2300c19" class="tk">rtDW</a>-&gt;<a id="2300c25" class="tk">Max_i</a>;</td></tr>
 <tr name="2301" id="2301">
-<td><a id="l2301" class='ln'>2301</a></td><td>  <span class="ct">/* End of Abs: '&lt;S97&gt;/Abs' */</span></td></tr>
+<td><a id="l2301" class='ln'>2301</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="2301c15" class="tk">int16_T</a>)<a id="2301c23" class="tk">rtb_RelationalOperator4_b</a> <a id="2301c49" class="tk">&lt;</a> <a id="2301c51" class="tk">rtDW</a>-&gt;<a id="2301c57" class="tk">Max1_e</a>) <span class="br">{</span></td></tr>
 <tr name="2302" id="2302">
-<td><a id="l2302" class='ln'>2302</a></td><td></td></tr>
+<td><a id="l2302" class='ln'>2302</a></td><td>    <span class="ct">/* Switch: '&lt;S100&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2303" id="2303">
-<td><a id="l2303" class='ln'>2303</a></td><td>  <span class="ct">/* Outputs for Enabled SubSystem: '&lt;S97&gt;/Enabled Subsystem' incorporates:</span></td></tr>
+<td><a id="l2303" class='ln'>2303</a></td><td><span class="ct">     *  MinMax: '&lt;S99&gt;/Max1'</span></td></tr>
 <tr name="2304" id="2304">
-<td><a id="l2304" class='ln'>2304</a></td><td><span class="ct">   *  EnablePort: '&lt;S107&gt;/Enable'</span></td></tr>
+<td><a id="l2304" class='ln'>2304</a></td><td><span class="ct">     *  Switch: '&lt;S100&gt;/Switch2'</span></td></tr>
 <tr name="2305" id="2305">
-<td><a id="l2305" class='ln'>2305</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2305" class='ln'>2305</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2306" id="2306">
-<td><a id="l2306" class='ln'>2306</a></td><td>  <span class="ct">/* If: '&lt;S108&gt;/If' incorporates:</span></td></tr>
+<td><a id="l2306" class='ln'>2306</a></td><td>    <a id="2306c5" class="tk">rtb_Add2_lk</a> = <a id="2306c19" class="tk">rtDW</a>-&gt;<a id="2306c25" class="tk">Max1_e</a>;</td></tr>
 <tr name="2307" id="2307">
-<td><a id="l2307" class='ln'>2307</a></td><td><span class="ct">   *  Gain: '&lt;S97&gt;/Gain'</span></td></tr>
+<td><a id="l2307" class='ln'>2307</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2308" id="2308">
-<td><a id="l2308" class='ln'>2308</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2308" class='ln'>2308</a></td><td>    <a id="2308c5" class="tk">rtb_Add2_lk</a> = (<a id="2308c20" class="tk">int16_T</a>)<a id="2308c28" class="tk">rtb_RelationalOperator4_b</a>;</td></tr>
 <tr name="2309" id="2309">
-<td><a id="l2309" class='ln'>2309</a></td><td><span class="ct">   *  UnitDelay: '&lt;S97&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l2309" class='ln'>2309</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2310" id="2310">
-<td><a id="l2310" class='ln'>2310</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2310" class='ln'>2310</a></td><td></td></tr>
 <tr name="2311" id="2311">
-<td><a id="l2311" class='ln'>2311</a></td><td>  <span class="kw">if</span> (<a id="2311c7" class="tk">rtb_Equal_k</a>) <span class="br">{</span></td></tr>
+<td><a id="l2311" class='ln'>2311</a></td><td>  <span class="ct">/* End of Switch: '&lt;S100&gt;/Switch2' */</span></td></tr>
 <tr name="2312" id="2312">
-<td><a id="l2312" class='ln'>2312</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S108&gt;/RateInit' incorporates:</span></td></tr>
+<td><a id="l2312" class='ln'>2312</a></td><td></td></tr>
 <tr name="2313" id="2313">
-<td><a id="l2313" class='ln'>2313</a></td><td><span class="ct">     *  ActionPort: '&lt;S109&gt;/Action Port'</span></td></tr>
+<td><a id="l2313" class='ln'>2313</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S103&gt;/Relational Operator' incorporates:</span></td></tr>
 <tr name="2314" id="2314">
-<td><a id="l2314" class='ln'>2314</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2314" class='ln'>2314</a></td><td><span class="ct">   *  Switch: '&lt;S68&gt;/Switch'</span></td></tr>
 <tr name="2315" id="2315">
-<td><a id="l2315" class='ln'>2315</a></td><td>    <a id="2315c5" class="tk">RateInit</a>(<a id="2315c14" class="tk">rtDW</a>-&gt;<a id="2315c20" class="tk">UnitDelay1_DSTATE_i</a>, <a id="2315c41" class="tk">rtDW</a>-&gt;<a id="2315c47" class="tk">Switch2</a>, (<a id="2315c57" class="tk">int16_T</a>)((13107 <a id="2315c73" class="tk">*</a></td></tr>
+<td><a id="l2315" class='ln'>2315</a></td><td><span class="ct">   *  UnitDelay: '&lt;S103&gt;/UnitDelay'</span></td></tr>
 <tr name="2316" id="2316">
-<td><a id="l2316" class='ln'>2316</a></td><td>               <a id="2316c16" class="tk">rtb_Sum6_p</a>) <a id="2316c28" class="tk">&gt;&gt;</a> 13), <a id="2316c36" class="tk">&amp;</a><a id="2316c37" class="tk">rtDW</a>-&gt;<a id="2316c43" class="tk">Divide_n</a>, <a id="2316c53" class="tk">&amp;</a><a id="2316c54" class="tk">rtDW</a>-&gt;<a id="2316c60" class="tk">Max_g</a>, <a id="2316c67" class="tk">&amp;</a><a id="2316c68" class="tk">rtDW</a>-&gt;<a id="2316c74" class="tk">Max1_j</a>);</td></tr>
+<td><a id="l2316" class='ln'>2316</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2317" id="2317">
-<td><a id="l2317" class='ln'>2317</a></td><td></td></tr>
+<td><a id="l2317" class='ln'>2317</a></td><td>  <a id="2317c3" class="tk">rtb_UnitDelay_c</a> = (<a id="2317c22" class="tk">rtDW</a>-&gt;<a id="2317c28" class="tk">Switch_p</a> <a id="2317c37" class="tk">!=</a> <a id="2317c40" class="tk">rtDW</a>-&gt;<a id="2317c46" class="tk">UnitDelay_DSTATE_er</a>);</td></tr>
 <tr name="2318" id="2318">
-<td><a id="l2318" class='ln'>2318</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S108&gt;/RateInit' */</span></td></tr>
+<td><a id="l2318" class='ln'>2318</a></td><td></td></tr>
 <tr name="2319" id="2319">
-<td><a id="l2319" class='ln'>2319</a></td><td></td></tr>
+<td><a id="l2319" class='ln'>2319</a></td><td>  <span class="ct">/* Sum: '&lt;S88&gt;/Add' incorporates:</span></td></tr>
 <tr name="2320" id="2320">
-<td><a id="l2320" class='ln'>2320</a></td><td>    <span class="ct">/* Switch: '&lt;S112&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l2320" class='ln'>2320</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2321" id="2321">
-<td><a id="l2321" class='ln'>2321</a></td><td><span class="ct">     *  Gain: '&lt;S97&gt;/Gain'</span></td></tr>
+<td><a id="l2321" class='ln'>2321</a></td><td><span class="ct">   *  Switch: '&lt;S68&gt;/Switch'</span></td></tr>
 <tr name="2322" id="2322">
-<td><a id="l2322" class='ln'>2322</a></td><td><span class="ct">     *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2322" class='ln'>2322</a></td><td><span class="ct">   *  UnitDelay: '&lt;S88&gt;/Unit Delay1'</span></td></tr>
 <tr name="2323" id="2323">
-<td><a id="l2323" class='ln'>2323</a></td><td><span class="ct">     *  UnitDelay: '&lt;S97&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l2323" class='ln'>2323</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2324" id="2324">
-<td><a id="l2324" class='ln'>2324</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2324" class='ln'>2324</a></td><td>  <a id="2324c3" class="tk">rtb_Switch2_pl</a> = (<a id="2324c21" class="tk">int16_T</a>)(<a id="2324c30" class="tk">rtDW</a>-&gt;<a id="2324c36" class="tk">Switch_p</a> <a id="2324c45" class="tk">-</a> <a id="2324c47" class="tk">rtDW</a>-&gt;<a id="2324c53" class="tk">UnitDelay1_DSTATE_p</a>);</td></tr>
 <tr name="2325" id="2325">
-<td><a id="l2325" class='ln'>2325</a></td><td>    <a id="2325c5" class="tk">rtb_Divide1_m</a> = <a id="2325c21" class="tk">rtDW</a>-&gt;<a id="2325c27" class="tk">UnitDelay1_DSTATE_i</a>;</td></tr>
+<td><a id="l2325" class='ln'>2325</a></td><td></td></tr>
 <tr name="2326" id="2326">
-<td><a id="l2326" class='ln'>2326</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2326" class='ln'>2326</a></td><td>  <span class="ct">/* Abs: '&lt;S88&gt;/Abs' incorporates:</span></td></tr>
 <tr name="2327" id="2327">
-<td><a id="l2327" class='ln'>2327</a></td><td>    <span class="ct">/* Switch: '&lt;S112&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l2327" class='ln'>2327</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2328" id="2328">
-<td><a id="l2328" class='ln'>2328</a></td><td><span class="ct">     *  UnitDelay: '&lt;S112&gt;/UnitDelay'</span></td></tr>
+<td><a id="l2328" class='ln'>2328</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2329" id="2329">
-<td><a id="l2329" class='ln'>2329</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2329" class='ln'>2329</a></td><td>  <span class="kw">if</span> (<a id="2329c7" class="tk">rtb_Switch2_pl</a> <a id="2329c22" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
 <tr name="2330" id="2330">
-<td><a id="l2330" class='ln'>2330</a></td><td>    <a id="2330c5" class="tk">rtb_Divide1_m</a> = <a id="2330c21" class="tk">rtDW</a>-&gt;<a id="2330c27" class="tk">UnitDelay_DSTATE_b</a>;</td></tr>
+<td><a id="l2330" class='ln'>2330</a></td><td>    <a id="2330c5" class="tk">rtb_Switch2_pl</a> = (<a id="2330c23" class="tk">int16_T</a>)<a id="2330c31" class="tk">-</a><a id="2330c32" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2331" id="2331">
 <td><a id="l2331" class='ln'>2331</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2332" id="2332">
 <td><a id="l2332" class='ln'>2332</a></td><td></td></tr>
 <tr name="2333" id="2333">
-<td><a id="l2333" class='ln'>2333</a></td><td>  <span class="ct">/* End of If: '&lt;S108&gt;/If' */</span></td></tr>
+<td><a id="l2333" class='ln'>2333</a></td><td>  <span class="ct">/* End of Abs: '&lt;S88&gt;/Abs' */</span></td></tr>
 <tr name="2334" id="2334">
-<td><a id="l2334" class='ln'>2334</a></td><td>  <span class="ct">/* End of Outputs for SubSystem: '&lt;S97&gt;/Enabled Subsystem' */</span></td></tr>
+<td><a id="l2334" class='ln'>2334</a></td><td></td></tr>
 <tr name="2335" id="2335">
-<td><a id="l2335" class='ln'>2335</a></td><td></td></tr>
+<td><a id="l2335" class='ln'>2335</a></td><td>  <span class="ct">/* Outputs for Enabled SubSystem: '&lt;S88&gt;/Enabled Subsystem' incorporates:</span></td></tr>
 <tr name="2336" id="2336">
-<td><a id="l2336" class='ln'>2336</a></td><td>  <span class="ct">/* Switch: '&lt;S108&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2336" class='ln'>2336</a></td><td><span class="ct">   *  EnablePort: '&lt;S104&gt;/Enable'</span></td></tr>
 <tr name="2337" id="2337">
-<td><a id="l2337" class='ln'>2337</a></td><td><span class="ct">   *  Constant: '&lt;S108&gt;/Constant'</span></td></tr>
+<td><a id="l2337" class='ln'>2337</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2338" id="2338">
-<td><a id="l2338" class='ln'>2338</a></td><td><span class="ct">   *  Product: '&lt;S109&gt;/Divide'</span></td></tr>
+<td><a id="l2338" class='ln'>2338</a></td><td>  <span class="ct">/* If: '&lt;S105&gt;/If' incorporates:</span></td></tr>
 <tr name="2339" id="2339">
-<td><a id="l2339" class='ln'>2339</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S108&gt;/Equal'</span></td></tr>
+<td><a id="l2339" class='ln'>2339</a></td><td><span class="ct">   *  Gain: '&lt;S88&gt;/Gain'</span></td></tr>
 <tr name="2340" id="2340">
-<td><a id="l2340" class='ln'>2340</a></td><td><span class="ct">   *  Switch: '&lt;S84&gt;/Switch2'</span></td></tr>
+<td><a id="l2340" class='ln'>2340</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2341" id="2341">
-<td><a id="l2341" class='ln'>2341</a></td><td><span class="ct">   *  UnitDelay: '&lt;S108&gt;/Unit Delay'</span></td></tr>
+<td><a id="l2341" class='ln'>2341</a></td><td><span class="ct">   *  UnitDelay: '&lt;S88&gt;/Unit Delay1'</span></td></tr>
 <tr name="2342" id="2342">
 <td><a id="l2342" class='ln'>2342</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2343" id="2343">
-<td><a id="l2343" class='ln'>2343</a></td><td>  <span class="kw">if</span> (<a id="2343c7" class="tk">rtDW</a>-&gt;<a id="2343c13" class="tk">Switch2</a> <a id="2343c21" class="tk">!=</a> <a id="2343c24" class="tk">rtDW</a>-&gt;<a id="2343c30" class="tk">UnitDelay_DSTATE_g</a>) <span class="br">{</span></td></tr>
+<td><a id="l2343" class='ln'>2343</a></td><td>  <span class="kw">if</span> (<a id="2343c7" class="tk">rtb_UnitDelay_c</a>) <span class="br">{</span></td></tr>
 <tr name="2344" id="2344">
-<td><a id="l2344" class='ln'>2344</a></td><td>    <a id="2344c5" class="tk">rtb_Switch_f2_idx_1</a> = <a id="2344c27" class="tk">rtDW</a>-&gt;<a id="2344c33" class="tk">Divide_n</a>;</td></tr>
+<td><a id="l2344" class='ln'>2344</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S105&gt;/RateInit' incorporates:</span></td></tr>
 <tr name="2345" id="2345">
-<td><a id="l2345" class='ln'>2345</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2345" class='ln'>2345</a></td><td><span class="ct">     *  ActionPort: '&lt;S106&gt;/Action Port'</span></td></tr>
 <tr name="2346" id="2346">
-<td><a id="l2346" class='ln'>2346</a></td><td>    <a id="2346c5" class="tk">rtb_Switch_f2_idx_1</a> = 0;</td></tr>
+<td><a id="l2346" class='ln'>2346</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2347" id="2347">
-<td><a id="l2347" class='ln'>2347</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2347" class='ln'>2347</a></td><td>    <a id="2347c5" class="tk">RateInit</a>(<a id="2347c14" class="tk">rtDW</a>-&gt;<a id="2347c20" class="tk">UnitDelay1_DSTATE_p</a>, <a id="2347c41" class="tk">rtDW</a>-&gt;<a id="2347c47" class="tk">Switch_p</a>, (<a id="2347c58" class="tk">int16_T</a>)((13107 <a id="2347c74" class="tk">*</a></td></tr>
 <tr name="2348" id="2348">
-<td><a id="l2348" class='ln'>2348</a></td><td></td></tr>
+<td><a id="l2348" class='ln'>2348</a></td><td>               <a id="2348c16" class="tk">rtb_Switch2_pl</a>) <a id="2348c32" class="tk">&gt;&gt;</a> 13), <a id="2348c40" class="tk">&amp;</a><a id="2348c41" class="tk">rtDW</a>-&gt;<a id="2348c47" class="tk">Divide_g</a>, <a id="2348c57" class="tk">&amp;</a><a id="2348c58" class="tk">rtDW</a>-&gt;<a id="2348c64" class="tk">Max_p</a>,</td></tr>
 <tr name="2349" id="2349">
-<td><a id="l2349" class='ln'>2349</a></td><td>  <span class="ct">/* End of Switch: '&lt;S108&gt;/Switch' */</span></td></tr>
+<td><a id="l2349" class='ln'>2349</a></td><td>             <a id="2349c14" class="tk">&amp;</a><a id="2349c15" class="tk">rtDW</a>-&gt;<a id="2349c21" class="tk">Max1_i</a>);</td></tr>
 <tr name="2350" id="2350">
 <td><a id="l2350" class='ln'>2350</a></td><td></td></tr>
 <tr name="2351" id="2351">
-<td><a id="l2351" class='ln'>2351</a></td><td>  <span class="ct">/* Sum: '&lt;S111&gt;/Add2' */</span></td></tr>
+<td><a id="l2351" class='ln'>2351</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S105&gt;/RateInit' */</span></td></tr>
 <tr name="2352" id="2352">
-<td><a id="l2352" class='ln'>2352</a></td><td>  <a id="2352c3" class="tk">rtb_Divide_idx_0</a> = ((<a id="2352c24" class="tk">rtb_Divide1_m</a> <a id="2352c38" class="tk">&lt;&lt;</a> 5) <a id="2352c44" class="tk">+</a> <a id="2352c46" class="tk">rtb_Switch_f2_idx_1</a>) <a id="2352c67" class="tk">&gt;&gt;</a> 5;</td></tr>
+<td><a id="l2352" class='ln'>2352</a></td><td></td></tr>
 <tr name="2353" id="2353">
-<td><a id="l2353" class='ln'>2353</a></td><td>  <span class="kw">if</span> (<a id="2353c7" class="tk">rtb_Divide_idx_0</a> <a id="2353c24" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l2353" class='ln'>2353</a></td><td>    <span class="ct">/* Switch: '&lt;S109&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="2354" id="2354">
-<td><a id="l2354" class='ln'>2354</a></td><td>    <a id="2354c5" class="tk">rtb_Divide_idx_0</a> = 32767;</td></tr>
+<td><a id="l2354" class='ln'>2354</a></td><td><span class="ct">     *  Gain: '&lt;S88&gt;/Gain'</span></td></tr>
 <tr name="2355" id="2355">
-<td><a id="l2355" class='ln'>2355</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2355" class='ln'>2355</a></td><td><span class="ct">     *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2356" id="2356">
-<td><a id="l2356" class='ln'>2356</a></td><td>    <span class="kw">if</span> (<a id="2356c9" class="tk">rtb_Divide_idx_0</a> <a id="2356c26" class="tk">&lt;</a> <a id="2356c28" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l2356" class='ln'>2356</a></td><td><span class="ct">     *  UnitDelay: '&lt;S88&gt;/Unit Delay1'</span></td></tr>
 <tr name="2357" id="2357">
-<td><a id="l2357" class='ln'>2357</a></td><td>      <a id="2357c7" class="tk">rtb_Divide_idx_0</a> = <a id="2357c26" class="tk">-</a>32768;</td></tr>
+<td><a id="l2357" class='ln'>2357</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2358" id="2358">
-<td><a id="l2358" class='ln'>2358</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2358" class='ln'>2358</a></td><td>    <a id="2358c5" class="tk">rtb_Sum6</a> = <a id="2358c16" class="tk">rtDW</a>-&gt;<a id="2358c22" class="tk">UnitDelay1_DSTATE_p</a>;</td></tr>
 <tr name="2359" id="2359">
-<td><a id="l2359" class='ln'>2359</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2359" class='ln'>2359</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2360" id="2360">
-<td><a id="l2360" class='ln'>2360</a></td><td></td></tr>
+<td><a id="l2360" class='ln'>2360</a></td><td>    <span class="ct">/* Switch: '&lt;S109&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="2361" id="2361">
-<td><a id="l2361" class='ln'>2361</a></td><td>  <span class="ct">/* Switch: '&lt;S110&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l2361" class='ln'>2361</a></td><td><span class="ct">     *  UnitDelay: '&lt;S109&gt;/UnitDelay'</span></td></tr>
 <tr name="2362" id="2362">
-<td><a id="l2362" class='ln'>2362</a></td><td><span class="ct">   *  MinMax: '&lt;S109&gt;/Max'</span></td></tr>
+<td><a id="l2362" class='ln'>2362</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2363" id="2363">
-<td><a id="l2363" class='ln'>2363</a></td><td><span class="ct">   *  MinMax: '&lt;S109&gt;/Max1'</span></td></tr>
+<td><a id="l2363" class='ln'>2363</a></td><td>    <a id="2363c5" class="tk">rtb_Sum6</a> = <a id="2363c16" class="tk">rtDW</a>-&gt;<a id="2363c22" class="tk">UnitDelay_DSTATE_o</a>;</td></tr>
 <tr name="2364" id="2364">
-<td><a id="l2364" class='ln'>2364</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S110&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l2364" class='ln'>2364</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2365" id="2365">
-<td><a id="l2365" class='ln'>2365</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S110&gt;/UpperRelop'</span></td></tr>
+<td><a id="l2365" class='ln'>2365</a></td><td></td></tr>
 <tr name="2366" id="2366">
-<td><a id="l2366" class='ln'>2366</a></td><td><span class="ct">   *  Sum: '&lt;S111&gt;/Add2'</span></td></tr>
+<td><a id="l2366" class='ln'>2366</a></td><td>  <span class="ct">/* End of If: '&lt;S105&gt;/If' */</span></td></tr>
 <tr name="2367" id="2367">
-<td><a id="l2367" class='ln'>2367</a></td><td><span class="ct">   *  Switch: '&lt;S110&gt;/Switch'</span></td></tr>
+<td><a id="l2367" class='ln'>2367</a></td><td>  <span class="ct">/* End of Outputs for SubSystem: '&lt;S88&gt;/Enabled Subsystem' */</span></td></tr>
 <tr name="2368" id="2368">
-<td><a id="l2368" class='ln'>2368</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2368" class='ln'>2368</a></td><td></td></tr>
 <tr name="2369" id="2369">
-<td><a id="l2369" class='ln'>2369</a></td><td>  <span class="kw">if</span> ((<a id="2369c8" class="tk">int16_T</a>)<a id="2369c16" class="tk">rtb_Divide_idx_0</a> <a id="2369c33" class="tk">&gt;</a> <a id="2369c35" class="tk">rtDW</a>-&gt;<a id="2369c41" class="tk">Max_g</a>) <span class="br">{</span></td></tr>
+<td><a id="l2369" class='ln'>2369</a></td><td>  <span class="ct">/* Switch: '&lt;S105&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2370" id="2370">
-<td><a id="l2370" class='ln'>2370</a></td><td>    <a id="2370c5" class="tk">rtb_Divide1_m</a> = <a id="2370c21" class="tk">rtDW</a>-&gt;<a id="2370c27" class="tk">Max_g</a>;</td></tr>
+<td><a id="l2370" class='ln'>2370</a></td><td><span class="ct">   *  Constant: '&lt;S105&gt;/Constant'</span></td></tr>
 <tr name="2371" id="2371">
-<td><a id="l2371" class='ln'>2371</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="2371c15" class="tk">int16_T</a>)<a id="2371c23" class="tk">rtb_Divide_idx_0</a> <a id="2371c40" class="tk">&lt;</a> <a id="2371c42" class="tk">rtDW</a>-&gt;<a id="2371c48" class="tk">Max1_j</a>) <span class="br">{</span></td></tr>
+<td><a id="l2371" class='ln'>2371</a></td><td><span class="ct">   *  Product: '&lt;S106&gt;/Divide'</span></td></tr>
 <tr name="2372" id="2372">
-<td><a id="l2372" class='ln'>2372</a></td><td>    <span class="ct">/* Switch: '&lt;S110&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2372" class='ln'>2372</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S105&gt;/Equal'</span></td></tr>
 <tr name="2373" id="2373">
-<td><a id="l2373" class='ln'>2373</a></td><td><span class="ct">     *  MinMax: '&lt;S109&gt;/Max1'</span></td></tr>
+<td><a id="l2373" class='ln'>2373</a></td><td><span class="ct">   *  Switch: '&lt;S68&gt;/Switch'</span></td></tr>
 <tr name="2374" id="2374">
-<td><a id="l2374" class='ln'>2374</a></td><td><span class="ct">     *  Switch: '&lt;S110&gt;/Switch2'</span></td></tr>
+<td><a id="l2374" class='ln'>2374</a></td><td><span class="ct">   *  UnitDelay: '&lt;S105&gt;/Unit Delay'</span></td></tr>
 <tr name="2375" id="2375">
-<td><a id="l2375" class='ln'>2375</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2375" class='ln'>2375</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2376" id="2376">
-<td><a id="l2376" class='ln'>2376</a></td><td>    <a id="2376c5" class="tk">rtb_Divide1_m</a> = <a id="2376c21" class="tk">rtDW</a>-&gt;<a id="2376c27" class="tk">Max1_j</a>;</td></tr>
+<td><a id="l2376" class='ln'>2376</a></td><td>  <span class="kw">if</span> (<a id="2376c7" class="tk">rtDW</a>-&gt;<a id="2376c13" class="tk">Switch_p</a> <a id="2376c22" class="tk">!=</a> <a id="2376c25" class="tk">rtDW</a>-&gt;<a id="2376c31" class="tk">UnitDelay_DSTATE_d</a>) <span class="br">{</span></td></tr>
 <tr name="2377" id="2377">
-<td><a id="l2377" class='ln'>2377</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2377" class='ln'>2377</a></td><td>    <a id="2377c5" class="tk">rtb_Switch2_pl</a> = <a id="2377c22" class="tk">rtDW</a>-&gt;<a id="2377c28" class="tk">Divide_g</a>;</td></tr>
 <tr name="2378" id="2378">
-<td><a id="l2378" class='ln'>2378</a></td><td>    <a id="2378c5" class="tk">rtb_Divide1_m</a> = (<a id="2378c22" class="tk">int16_T</a>)<a id="2378c30" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l2378" class='ln'>2378</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2379" id="2379">
-<td><a id="l2379" class='ln'>2379</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2379" class='ln'>2379</a></td><td>    <a id="2379c5" class="tk">rtb_Switch2_pl</a> = 0;</td></tr>
 <tr name="2380" id="2380">
-<td><a id="l2380" class='ln'>2380</a></td><td></td></tr>
+<td><a id="l2380" class='ln'>2380</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2381" id="2381">
-<td><a id="l2381" class='ln'>2381</a></td><td>  <span class="ct">/* End of Switch: '&lt;S110&gt;/Switch2' */</span></td></tr>
+<td><a id="l2381" class='ln'>2381</a></td><td></td></tr>
 <tr name="2382" id="2382">
-<td><a id="l2382" class='ln'>2382</a></td><td></td></tr>
+<td><a id="l2382" class='ln'>2382</a></td><td>  <span class="ct">/* End of Switch: '&lt;S105&gt;/Switch' */</span></td></tr>
 <tr name="2383" id="2383">
-<td><a id="l2383" class='ln'>2383</a></td><td>  <span class="ct">/* RelationalOperator: '&lt;S113&gt;/Relational Operator' incorporates:</span></td></tr>
+<td><a id="l2383" class='ln'>2383</a></td><td></td></tr>
 <tr name="2384" id="2384">
-<td><a id="l2384" class='ln'>2384</a></td><td><span class="ct">   *  Switch: '&lt;S76&gt;/Switch'</span></td></tr>
+<td><a id="l2384" class='ln'>2384</a></td><td>  <span class="ct">/* Sum: '&lt;S108&gt;/Add2' */</span></td></tr>
 <tr name="2385" id="2385">
-<td><a id="l2385" class='ln'>2385</a></td><td><span class="ct">   *  UnitDelay: '&lt;S113&gt;/UnitDelay'</span></td></tr>
+<td><a id="l2385" class='ln'>2385</a></td><td>  <a id="2385c3" class="tk">rtb_Divide_e_idx_1</a> = ((<a id="2385c26" class="tk">rtb_Sum6</a> <a id="2385c35" class="tk">&lt;&lt;</a> 5) <a id="2385c41" class="tk">+</a> <a id="2385c43" class="tk">rtb_Switch2_pl</a>) <a id="2385c59" class="tk">&gt;&gt;</a> 5;</td></tr>
 <tr name="2386" id="2386">
-<td><a id="l2386" class='ln'>2386</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2386" class='ln'>2386</a></td><td>  <span class="kw">if</span> (<a id="2386c7" class="tk">rtb_Divide_e_idx_1</a> <a id="2386c26" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="2387" id="2387">
-<td><a id="l2387" class='ln'>2387</a></td><td>  <a id="2387c3" class="tk">rtb_LogicalOperator12</a> = (<a id="2387c28" class="tk">rtDW</a>-&gt;<a id="2387c34" class="tk">Switch</a> <a id="2387c41" class="tk">!=</a> <a id="2387c44" class="tk">rtDW</a>-&gt;<a id="2387c50" class="tk">UnitDelay_DSTATE_o</a>);</td></tr>
+<td><a id="l2387" class='ln'>2387</a></td><td>    <a id="2387c5" class="tk">rtb_Divide_e_idx_1</a> = 32767;</td></tr>
 <tr name="2388" id="2388">
-<td><a id="l2388" class='ln'>2388</a></td><td></td></tr>
+<td><a id="l2388" class='ln'>2388</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2389" id="2389">
-<td><a id="l2389" class='ln'>2389</a></td><td>  <span class="ct">/* Sum: '&lt;S98&gt;/Add' incorporates:</span></td></tr>
+<td><a id="l2389" class='ln'>2389</a></td><td>    <span class="kw">if</span> (<a id="2389c9" class="tk">rtb_Divide_e_idx_1</a> <a id="2389c28" class="tk">&lt;</a> <a id="2389c30" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="2390" id="2390">
-<td><a id="l2390" class='ln'>2390</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2390" class='ln'>2390</a></td><td>      <a id="2390c7" class="tk">rtb_Divide_e_idx_1</a> = <a id="2390c28" class="tk">-</a>32768;</td></tr>
 <tr name="2391" id="2391">
-<td><a id="l2391" class='ln'>2391</a></td><td><span class="ct">   *  Switch: '&lt;S76&gt;/Switch'</span></td></tr>
+<td><a id="l2391" class='ln'>2391</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2392" id="2392">
-<td><a id="l2392" class='ln'>2392</a></td><td><span class="ct">   *  UnitDelay: '&lt;S98&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l2392" class='ln'>2392</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2393" id="2393">
-<td><a id="l2393" class='ln'>2393</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2393" class='ln'>2393</a></td><td></td></tr>
 <tr name="2394" id="2394">
-<td><a id="l2394" class='ln'>2394</a></td><td>  <a id="2394c3" class="tk">rtb_Sum6_p</a> = (<a id="2394c17" class="tk">int16_T</a>)(<a id="2394c26" class="tk">rtDW</a>-&gt;<a id="2394c32" class="tk">Switch</a> <a id="2394c39" class="tk">-</a> <a id="2394c41" class="tk">rtDW</a>-&gt;<a id="2394c47" class="tk">UnitDelay1_DSTATE_b</a>);</td></tr>
+<td><a id="l2394" class='ln'>2394</a></td><td>  <span class="ct">/* Switch: '&lt;S107&gt;/Switch2' incorporates:</span></td></tr>
 <tr name="2395" id="2395">
-<td><a id="l2395" class='ln'>2395</a></td><td></td></tr>
+<td><a id="l2395" class='ln'>2395</a></td><td><span class="ct">   *  MinMax: '&lt;S106&gt;/Max'</span></td></tr>
 <tr name="2396" id="2396">
-<td><a id="l2396" class='ln'>2396</a></td><td>  <span class="ct">/* Abs: '&lt;S98&gt;/Abs' incorporates:</span></td></tr>
+<td><a id="l2396" class='ln'>2396</a></td><td><span class="ct">   *  MinMax: '&lt;S106&gt;/Max1'</span></td></tr>
 <tr name="2397" id="2397">
-<td><a id="l2397" class='ln'>2397</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2397" class='ln'>2397</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S107&gt;/LowerRelop1'</span></td></tr>
 <tr name="2398" id="2398">
-<td><a id="l2398" class='ln'>2398</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2398" class='ln'>2398</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S107&gt;/UpperRelop'</span></td></tr>
 <tr name="2399" id="2399">
-<td><a id="l2399" class='ln'>2399</a></td><td>  <span class="kw">if</span> (<a id="2399c7" class="tk">rtb_Sum6_p</a> <a id="2399c18" class="tk">&lt;</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2399" class='ln'>2399</a></td><td><span class="ct">   *  Sum: '&lt;S108&gt;/Add2'</span></td></tr>
 <tr name="2400" id="2400">
-<td><a id="l2400" class='ln'>2400</a></td><td>    <a id="2400c5" class="tk">rtb_Sum6_p</a> = (<a id="2400c19" class="tk">int16_T</a>)<a id="2400c27" class="tk">-</a><a id="2400c28" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2400" class='ln'>2400</a></td><td><span class="ct">   *  Switch: '&lt;S107&gt;/Switch'</span></td></tr>
 <tr name="2401" id="2401">
-<td><a id="l2401" class='ln'>2401</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2401" class='ln'>2401</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2402" id="2402">
-<td><a id="l2402" class='ln'>2402</a></td><td></td></tr>
+<td><a id="l2402" class='ln'>2402</a></td><td>  <span class="kw">if</span> ((<a id="2402c8" class="tk">int16_T</a>)<a id="2402c16" class="tk">rtb_Divide_e_idx_1</a> <a id="2402c35" class="tk">&gt;</a> <a id="2402c37" class="tk">rtDW</a>-&gt;<a id="2402c43" class="tk">Max_p</a>) <span class="br">{</span></td></tr>
 <tr name="2403" id="2403">
-<td><a id="l2403" class='ln'>2403</a></td><td>  <span class="ct">/* End of Abs: '&lt;S98&gt;/Abs' */</span></td></tr>
+<td><a id="l2403" class='ln'>2403</a></td><td>    <a id="2403c5" class="tk">rtb_Divide1_oy</a> = <a id="2403c22" class="tk">rtDW</a>-&gt;<a id="2403c28" class="tk">Max_p</a>;</td></tr>
 <tr name="2404" id="2404">
-<td><a id="l2404" class='ln'>2404</a></td><td></td></tr>
+<td><a id="l2404" class='ln'>2404</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="2404c15" class="tk">int16_T</a>)<a id="2404c23" class="tk">rtb_Divide_e_idx_1</a> <a id="2404c42" class="tk">&lt;</a> <a id="2404c44" class="tk">rtDW</a>-&gt;<a id="2404c50" class="tk">Max1_i</a>) <span class="br">{</span></td></tr>
 <tr name="2405" id="2405">
-<td><a id="l2405" class='ln'>2405</a></td><td>  <span class="ct">/* Outputs for Enabled SubSystem: '&lt;S98&gt;/Enabled Subsystem' incorporates:</span></td></tr>
+<td><a id="l2405" class='ln'>2405</a></td><td>    <span class="ct">/* Switch: '&lt;S107&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2406" id="2406">
-<td><a id="l2406" class='ln'>2406</a></td><td><span class="ct">   *  EnablePort: '&lt;S114&gt;/Enable'</span></td></tr>
+<td><a id="l2406" class='ln'>2406</a></td><td><span class="ct">     *  MinMax: '&lt;S106&gt;/Max1'</span></td></tr>
 <tr name="2407" id="2407">
-<td><a id="l2407" class='ln'>2407</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2407" class='ln'>2407</a></td><td><span class="ct">     *  Switch: '&lt;S107&gt;/Switch2'</span></td></tr>
 <tr name="2408" id="2408">
-<td><a id="l2408" class='ln'>2408</a></td><td>  <span class="ct">/* If: '&lt;S115&gt;/If' incorporates:</span></td></tr>
+<td><a id="l2408" class='ln'>2408</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2409" id="2409">
-<td><a id="l2409" class='ln'>2409</a></td><td><span class="ct">   *  Gain: '&lt;S98&gt;/Gain'</span></td></tr>
+<td><a id="l2409" class='ln'>2409</a></td><td>    <a id="2409c5" class="tk">rtb_Divide1_oy</a> = <a id="2409c22" class="tk">rtDW</a>-&gt;<a id="2409c28" class="tk">Max1_i</a>;</td></tr>
 <tr name="2410" id="2410">
-<td><a id="l2410" class='ln'>2410</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2410" class='ln'>2410</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2411" id="2411">
-<td><a id="l2411" class='ln'>2411</a></td><td><span class="ct">   *  UnitDelay: '&lt;S98&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l2411" class='ln'>2411</a></td><td>    <a id="2411c5" class="tk">rtb_Divide1_oy</a> = (<a id="2411c23" class="tk">int16_T</a>)<a id="2411c31" class="tk">rtb_Divide_e_idx_1</a>;</td></tr>
 <tr name="2412" id="2412">
-<td><a id="l2412" class='ln'>2412</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2412" class='ln'>2412</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2413" id="2413">
-<td><a id="l2413" class='ln'>2413</a></td><td>  <span class="kw">if</span> (<a id="2413c7" class="tk">rtb_LogicalOperator12</a>) <span class="br">{</span></td></tr>
+<td><a id="l2413" class='ln'>2413</a></td><td></td></tr>
 <tr name="2414" id="2414">
-<td><a id="l2414" class='ln'>2414</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S115&gt;/RateInit' incorporates:</span></td></tr>
+<td><a id="l2414" class='ln'>2414</a></td><td>  <span class="ct">/* End of Switch: '&lt;S107&gt;/Switch2' */</span></td></tr>
 <tr name="2415" id="2415">
-<td><a id="l2415" class='ln'>2415</a></td><td><span class="ct">     *  ActionPort: '&lt;S116&gt;/Action Port'</span></td></tr>
+<td><a id="l2415" class='ln'>2415</a></td><td></td></tr>
 <tr name="2416" id="2416">
-<td><a id="l2416" class='ln'>2416</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2416" class='ln'>2416</a></td><td>  <span class="ct">/* DataTypeConversion: '&lt;S45&gt;/Data Type Conversion' incorporates:</span></td></tr>
 <tr name="2417" id="2417">
-<td><a id="l2417" class='ln'>2417</a></td><td>    <a id="2417c5" class="tk">RateInit</a>(<a id="2417c14" class="tk">rtDW</a>-&gt;<a id="2417c20" class="tk">UnitDelay1_DSTATE_b</a>, <a id="2417c41" class="tk">rtDW</a>-&gt;<a id="2417c47" class="tk">Switch</a>, (<a id="2417c56" class="tk">int16_T</a>)((13107 <a id="2417c72" class="tk">*</a></td></tr>
+<td><a id="l2417" class='ln'>2417</a></td><td><span class="ct">   *  Logic: '&lt;S45&gt;/Logical Operator'</span></td></tr>
 <tr name="2418" id="2418">
-<td><a id="l2418" class='ln'>2418</a></td><td>               <a id="2418c16" class="tk">rtb_Sum6_p</a>) <a id="2418c28" class="tk">&gt;&gt;</a> 13), <a id="2418c36" class="tk">&amp;</a><a id="2418c37" class="tk">rtDW</a>-&gt;<a id="2418c43" class="tk">Divide_l</a>, <a id="2418c53" class="tk">&amp;</a><a id="2418c54" class="tk">rtDW</a>-&gt;<a id="2418c60" class="tk">Max</a>, <a id="2418c65" class="tk">&amp;</a><a id="2418c66" class="tk">rtDW</a>-&gt;<a id="2418c72" class="tk">Max1</a>);</td></tr>
+<td><a id="l2418" class='ln'>2418</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S45&gt;/Equal'</span></td></tr>
 <tr name="2419" id="2419">
-<td><a id="l2419" class='ln'>2419</a></td><td></td></tr>
+<td><a id="l2419" class='ln'>2419</a></td><td><span class="ct">   *  UnitDelay: '&lt;S45&gt;/Unit Delay'</span></td></tr>
 <tr name="2420" id="2420">
-<td><a id="l2420" class='ln'>2420</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S115&gt;/RateInit' */</span></td></tr>
+<td><a id="l2420" class='ln'>2420</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2421" id="2421">
-<td><a id="l2421" class='ln'>2421</a></td><td></td></tr>
+<td><a id="l2421" class='ln'>2421</a></td><td>  <a id="2421c3" class="tk">rtb_DataTypeConversion_e</a> = (<a id="2421c31" class="tk">uint8_T</a>)((<a id="2421c41" class="tk">rtb_dz_cntTrnsDet</a> <a id="2421c59" class="tk">!=</a> 0) <a id="2421c65" class="tk">&amp;&amp;</a></td></tr>
 <tr name="2422" id="2422">
-<td><a id="l2422" class='ln'>2422</a></td><td>    <span class="ct">/* Switch: '&lt;S119&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l2422" class='ln'>2422</a></td><td>    (<a id="2422c6" class="tk">rtDW</a>-&gt;<a id="2422c12" class="tk">UnitDelay_DSTATE_h3</a> <a id="2422c32" class="tk">!=</a> <a id="2422c35" class="tk">rtb_dz_cntTrnsDet</a>));</td></tr>
 <tr name="2423" id="2423">
-<td><a id="l2423" class='ln'>2423</a></td><td><span class="ct">     *  Gain: '&lt;S98&gt;/Gain'</span></td></tr>
+<td><a id="l2423" class='ln'>2423</a></td><td></td></tr>
 <tr name="2424" id="2424">
-<td><a id="l2424" class='ln'>2424</a></td><td><span class="ct">     *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2424" class='ln'>2424</a></td><td>  <span class="ct">/* If: '&lt;S45&gt;/If1' incorporates:</span></td></tr>
 <tr name="2425" id="2425">
-<td><a id="l2425" class='ln'>2425</a></td><td><span class="ct">     *  UnitDelay: '&lt;S98&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l2425" class='ln'>2425</a></td><td><span class="ct">   *  Constant: '&lt;S85&gt;/Constant1'</span></td></tr>
 <tr name="2426" id="2426">
-<td><a id="l2426" class='ln'>2426</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2426" class='ln'>2426</a></td><td><span class="ct">   *  Constant: '&lt;S85&gt;/Constant3'</span></td></tr>
 <tr name="2427" id="2427">
-<td><a id="l2427" class='ln'>2427</a></td><td>    <a id="2427c5" class="tk">rtb_r_cos_M1</a> = <a id="2427c20" class="tk">rtDW</a>-&gt;<a id="2427c26" class="tk">UnitDelay1_DSTATE_b</a>;</td></tr>
+<td><a id="l2427" class='ln'>2427</a></td><td><span class="ct">   *  Constant: '&lt;S85&gt;/Constant4'</span></td></tr>
 <tr name="2428" id="2428">
-<td><a id="l2428" class='ln'>2428</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2428" class='ln'>2428</a></td><td><span class="ct">   *  Constant: '&lt;S85&gt;/Constant6'</span></td></tr>
 <tr name="2429" id="2429">
-<td><a id="l2429" class='ln'>2429</a></td><td>    <span class="ct">/* Switch: '&lt;S119&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l2429" class='ln'>2429</a></td><td><span class="ct">   *  Constant: '&lt;S85&gt;/Constant7'</span></td></tr>
 <tr name="2430" id="2430">
-<td><a id="l2430" class='ln'>2430</a></td><td><span class="ct">     *  UnitDelay: '&lt;S119&gt;/UnitDelay'</span></td></tr>
+<td><a id="l2430" class='ln'>2430</a></td><td><span class="ct">   *  Constant: '&lt;S85&gt;/Constant8'</span></td></tr>
 <tr name="2431" id="2431">
-<td><a id="l2431" class='ln'>2431</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2431" class='ln'>2431</a></td><td><span class="ct">   *  Gain: '&lt;S85&gt;/Gain1'</span></td></tr>
 <tr name="2432" id="2432">
-<td><a id="l2432" class='ln'>2432</a></td><td>    <a id="2432c5" class="tk">rtb_r_cos_M1</a> = <a id="2432c20" class="tk">rtDW</a>-&gt;<a id="2432c26" class="tk">UnitDelay_DSTATE_d</a>;</td></tr>
+<td><a id="l2432" class='ln'>2432</a></td><td><span class="ct">   *  Gain: '&lt;S85&gt;/Gain2'</span></td></tr>
 <tr name="2433" id="2433">
-<td><a id="l2433" class='ln'>2433</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2433" class='ln'>2433</a></td><td><span class="ct">   *  Inport: '&lt;S86&gt;/In1'</span></td></tr>
 <tr name="2434" id="2434">
-<td><a id="l2434" class='ln'>2434</a></td><td></td></tr>
+<td><a id="l2434" class='ln'>2434</a></td><td><span class="ct">   *  Merge: '&lt;S45&gt;/Merge'</span></td></tr>
 <tr name="2435" id="2435">
-<td><a id="l2435" class='ln'>2435</a></td><td>  <span class="ct">/* End of If: '&lt;S115&gt;/If' */</span></td></tr>
+<td><a id="l2435" class='ln'>2435</a></td><td><span class="ct">   *  Outport: '&lt;Root&gt;/f_Idq'</span></td></tr>
 <tr name="2436" id="2436">
-<td><a id="l2436" class='ln'>2436</a></td><td>  <span class="ct">/* End of Outputs for SubSystem: '&lt;S98&gt;/Enabled Subsystem' */</span></td></tr>
+<td><a id="l2436" class='ln'>2436</a></td><td><span class="ct">   *  Product: '&lt;S85&gt;/Divide'</span></td></tr>
 <tr name="2437" id="2437">
-<td><a id="l2437" class='ln'>2437</a></td><td></td></tr>
+<td><a id="l2437" class='ln'>2437</a></td><td><span class="ct">   *  Sum: '&lt;S85&gt;/Sum'</span></td></tr>
 <tr name="2438" id="2438">
-<td><a id="l2438" class='ln'>2438</a></td><td>  <span class="ct">/* Switch: '&lt;S115&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2438" class='ln'>2438</a></td><td><span class="ct">   *  Sum: '&lt;S85&gt;/Sum1'</span></td></tr>
 <tr name="2439" id="2439">
-<td><a id="l2439" class='ln'>2439</a></td><td><span class="ct">   *  Constant: '&lt;S115&gt;/Constant'</span></td></tr>
+<td><a id="l2439" class='ln'>2439</a></td><td><span class="ct">   *  Switch: '&lt;S100&gt;/Switch2'</span></td></tr>
 <tr name="2440" id="2440">
-<td><a id="l2440" class='ln'>2440</a></td><td><span class="ct">   *  Product: '&lt;S116&gt;/Divide'</span></td></tr>
+<td><a id="l2440" class='ln'>2440</a></td><td><span class="ct">   *  Switch: '&lt;S107&gt;/Switch2'</span></td></tr>
 <tr name="2441" id="2441">
-<td><a id="l2441" class='ln'>2441</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S115&gt;/Equal'</span></td></tr>
+<td><a id="l2441" class='ln'>2441</a></td><td><span class="ct">   *  Switch: '&lt;S111&gt;/Switch'</span></td></tr>
 <tr name="2442" id="2442">
-<td><a id="l2442" class='ln'>2442</a></td><td><span class="ct">   *  Switch: '&lt;S76&gt;/Switch'</span></td></tr>
+<td><a id="l2442" class='ln'>2442</a></td><td><span class="ct">   *  UnitDelay: '&lt;S35&gt;/UnitDelay1'</span></td></tr>
 <tr name="2443" id="2443">
-<td><a id="l2443" class='ln'>2443</a></td><td><span class="ct">   *  UnitDelay: '&lt;S115&gt;/Unit Delay'</span></td></tr>
+<td><a id="l2443" class='ln'>2443</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2444" id="2444">
-<td><a id="l2444" class='ln'>2444</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2444" class='ln'>2444</a></td><td>  <span class="kw">if</span> (<a id="2444c7" class="tk">rtb_dz_cntTrnsDet</a> <a id="2444c25" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
 <tr name="2445" id="2445">
-<td><a id="l2445" class='ln'>2445</a></td><td>  <span class="kw">if</span> (<a id="2445c7" class="tk">rtDW</a>-&gt;<a id="2445c13" class="tk">Switch</a> <a id="2445c20" class="tk">!=</a> <a id="2445c23" class="tk">rtDW</a>-&gt;<a id="2445c29" class="tk">UnitDelay_DSTATE_a</a>) <span class="br">{</span></td></tr>
+<td><a id="l2445" class='ln'>2445</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S45&gt;/CurrentLoop' incorporates:</span></td></tr>
 <tr name="2446" id="2446">
-<td><a id="l2446" class='ln'>2446</a></td><td>    <a id="2446c5" class="tk">rtb_Switch_f2_idx_1</a> = <a id="2446c27" class="tk">rtDW</a>-&gt;<a id="2446c33" class="tk">Divide_l</a>;</td></tr>
+<td><a id="l2446" class='ln'>2446</a></td><td><span class="ct">     *  ActionPort: '&lt;S85&gt;/Action Port'</span></td></tr>
 <tr name="2447" id="2447">
-<td><a id="l2447" class='ln'>2447</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2447" class='ln'>2447</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2448" id="2448">
-<td><a id="l2448" class='ln'>2448</a></td><td>    <a id="2448c5" class="tk">rtb_Switch_f2_idx_1</a> = 0;</td></tr>
+<td><a id="l2448" class='ln'>2448</a></td><td>    <span class="ct">/* Product: '&lt;S85&gt;/Divide' incorporates:</span></td></tr>
 <tr name="2449" id="2449">
-<td><a id="l2449" class='ln'>2449</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2449" class='ln'>2449</a></td><td><span class="ct">     *  Constant: '&lt;S85&gt;/Constant2'</span></td></tr>
 <tr name="2450" id="2450">
-<td><a id="l2450" class='ln'>2450</a></td><td></td></tr>
+<td><a id="l2450" class='ln'>2450</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vDC'</span></td></tr>
 <tr name="2451" id="2451">
-<td><a id="l2451" class='ln'>2451</a></td><td>  <span class="ct">/* End of Switch: '&lt;S115&gt;/Switch' */</span></td></tr>
+<td><a id="l2451" class='ln'>2451</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2452" id="2452">
-<td><a id="l2452" class='ln'>2452</a></td><td></td></tr>
+<td><a id="l2452" class='ln'>2452</a></td><td>    <a id="2452c5" class="tk">rtb_Switch2_pl</a> = (<a id="2452c23" class="tk">int16_T</a>)((<a id="2452c33" class="tk">rtU</a>-&gt;<a id="2452c38" class="tk">vDC</a> <a id="2452c42" class="tk">*</a> <a id="2452c44" class="tk">rtP</a>.<a id="2452c48" class="tk">V_modulation</a>) <a id="2452c62" class="tk">&gt;&gt;</a> 14);</td></tr>
 <tr name="2453" id="2453">
-<td><a id="l2453" class='ln'>2453</a></td><td>  <span class="ct">/* Sum: '&lt;S118&gt;/Add2' */</span></td></tr>
+<td><a id="l2453" class='ln'>2453</a></td><td></td></tr>
 <tr name="2454" id="2454">
-<td><a id="l2454" class='ln'>2454</a></td><td>  <a id="2454c3" class="tk">rtb_Divide_idx_1</a> = ((<a id="2454c24" class="tk">rtb_r_cos_M1</a> <a id="2454c37" class="tk">&lt;&lt;</a> 5) <a id="2454c43" class="tk">+</a> <a id="2454c45" class="tk">rtb_Switch_f2_idx_1</a>) <a id="2454c66" class="tk">&gt;&gt;</a> 5;</td></tr>
+<td><a id="l2454" class='ln'>2454</a></td><td>    <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S85&gt;/PI_backCalc_fixdt' */</span></td></tr>
 <tr name="2455" id="2455">
-<td><a id="l2455" class='ln'>2455</a></td><td>  <span class="kw">if</span> (<a id="2455c7" class="tk">rtb_Divide_idx_1</a> <a id="2455c24" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l2455" class='ln'>2455</a></td><td>    <a id="2455c5" class="tk">rtb_Switch2_au</a> = <a id="2455c22" class="tk">PI_backCalc_fixdt_i</a>((<a id="2455c43" class="tk">int16_T</a>)(<a id="2455c52" class="tk">rtb_Add2_lk</a> <a id="2455c64" class="tk">-</a> <a id="2455c66" class="tk">rtY</a>-&gt;<a id="2455c71" class="tk">f_Idq</a>[0]),</td></tr>
 <tr name="2456" id="2456">
-<td><a id="l2456" class='ln'>2456</a></td><td>    <a id="2456c5" class="tk">rtb_Divide_idx_1</a> = 32767;</td></tr>
+<td><a id="l2456" class='ln'>2456</a></td><td>      <a id="2456c7" class="tk">rtP</a>.<a id="2456c11" class="tk">cf_idKp</a>, <a id="2456c20" class="tk">rtP</a>.<a id="2456c24" class="tk">cf_idKi</a>, <a id="2456c33" class="tk">rtP</a>.<a id="2456c37" class="tk">cf_idKb</a>, <a id="2456c46" class="tk">rtb_Switch2_pl</a>, (<a id="2456c63" class="tk">int16_T</a>)</td></tr>
 <tr name="2457" id="2457">
-<td><a id="l2457" class='ln'>2457</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2457" class='ln'>2457</a></td><td>      <a id="2457c7" class="tk">-</a><a id="2457c8" class="tk">rtb_Switch2_pl</a>, <a id="2457c24" class="tk">rtDW</a>-&gt;<a id="2457c30" class="tk">UnitDelay1_DSTATE_o</a>[0], <a id="2457c54" class="tk">rtb_DataTypeConversion_e</a>,</td></tr>
 <tr name="2458" id="2458">
-<td><a id="l2458" class='ln'>2458</a></td><td>    <span class="kw">if</span> (<a id="2458c9" class="tk">rtb_Divide_idx_1</a> <a id="2458c26" class="tk">&lt;</a> <a id="2458c28" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l2458" class='ln'>2458</a></td><td>      <a id="2458c7" class="tk">&amp;</a><a id="2458c8" class="tk">rtDW</a>-&gt;<a id="2458c14" class="tk">PI_backCalc_fixdt_ig</a>, <a id="2458c36" class="tk">&amp;</a><a id="2458c37" class="tk">rtPrevZCX</a>-&gt;<a id="2458c48" class="tk">PI_backCalc_fixdt_ig</a>);</td></tr>
 <tr name="2459" id="2459">
-<td><a id="l2459" class='ln'>2459</a></td><td>      <a id="2459c7" class="tk">rtb_Divide_idx_1</a> = <a id="2459c26" class="tk">-</a>32768;</td></tr>
+<td><a id="l2459" class='ln'>2459</a></td><td></td></tr>
 <tr name="2460" id="2460">
-<td><a id="l2460" class='ln'>2460</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2460" class='ln'>2460</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S85&gt;/PI_backCalc_fixdt' */</span></td></tr>
 <tr name="2461" id="2461">
-<td><a id="l2461" class='ln'>2461</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2461" class='ln'>2461</a></td><td></td></tr>
 <tr name="2462" id="2462">
-<td><a id="l2462" class='ln'>2462</a></td><td></td></tr>
+<td><a id="l2462" class='ln'>2462</a></td><td>    <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S85&gt;/PI_backCalc_fixdt1' */</span></td></tr>
 <tr name="2463" id="2463">
-<td><a id="l2463" class='ln'>2463</a></td><td>  <span class="ct">/* Switch: '&lt;S117&gt;/Switch2' incorporates:</span></td></tr>
+<td><a id="l2463" class='ln'>2463</a></td><td>    <a id="2463c5" class="tk">rtb_Gain_ib</a> = <a id="2463c19" class="tk">PI_backCalc_fixdt_i</a>((<a id="2463c40" class="tk">int16_T</a>)(<a id="2463c49" class="tk">rtb_Divide1_oy</a> <a id="2463c64" class="tk">-</a> <a id="2463c66" class="tk">rtY</a>-&gt;<a id="2463c71" class="tk">f_Idq</a>[1]),</td></tr>
 <tr name="2464" id="2464">
-<td><a id="l2464" class='ln'>2464</a></td><td><span class="ct">   *  MinMax: '&lt;S116&gt;/Max'</span></td></tr>
+<td><a id="l2464" class='ln'>2464</a></td><td>      <a id="2464c7" class="tk">rtP</a>.<a id="2464c11" class="tk">cf_iqKp</a>, <a id="2464c20" class="tk">rtP</a>.<a id="2464c24" class="tk">cf_iqKi</a>, <a id="2464c33" class="tk">rtP</a>.<a id="2464c37" class="tk">cf_iqKb</a>, <a id="2464c46" class="tk">rtb_Switch2_pl</a>, (<a id="2464c63" class="tk">int16_T</a>)</td></tr>
 <tr name="2465" id="2465">
-<td><a id="l2465" class='ln'>2465</a></td><td><span class="ct">   *  MinMax: '&lt;S116&gt;/Max1'</span></td></tr>
+<td><a id="l2465" class='ln'>2465</a></td><td>      <a id="2465c7" class="tk">-</a><a id="2465c8" class="tk">rtb_Switch2_pl</a>, <a id="2465c24" class="tk">rtDW</a>-&gt;<a id="2465c30" class="tk">UnitDelay1_DSTATE_o</a>[1], <a id="2465c54" class="tk">rtb_DataTypeConversion_e</a>,</td></tr>
 <tr name="2466" id="2466">
-<td><a id="l2466" class='ln'>2466</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S117&gt;/LowerRelop1'</span></td></tr>
+<td><a id="l2466" class='ln'>2466</a></td><td>      <a id="2466c7" class="tk">&amp;</a><a id="2466c8" class="tk">rtDW</a>-&gt;<a id="2466c14" class="tk">PI_backCalc_fixdt1</a>, <a id="2466c34" class="tk">&amp;</a><a id="2466c35" class="tk">rtPrevZCX</a>-&gt;<a id="2466c46" class="tk">PI_backCalc_fixdt1</a>);</td></tr>
 <tr name="2467" id="2467">
-<td><a id="l2467" class='ln'>2467</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S117&gt;/UpperRelop'</span></td></tr>
+<td><a id="l2467" class='ln'>2467</a></td><td></td></tr>
 <tr name="2468" id="2468">
-<td><a id="l2468" class='ln'>2468</a></td><td><span class="ct">   *  Sum: '&lt;S118&gt;/Add2'</span></td></tr>
+<td><a id="l2468" class='ln'>2468</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S85&gt;/PI_backCalc_fixdt1' */</span></td></tr>
 <tr name="2469" id="2469">
-<td><a id="l2469" class='ln'>2469</a></td><td><span class="ct">   *  Switch: '&lt;S117&gt;/Switch'</span></td></tr>
+<td><a id="l2469" class='ln'>2469</a></td><td></td></tr>
 <tr name="2470" id="2470">
-<td><a id="l2470" class='ln'>2470</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2470" class='ln'>2470</a></td><td>    <span class="ct">/* Sum: '&lt;S85&gt;/Sum2' incorporates:</span></td></tr>
 <tr name="2471" id="2471">
-<td><a id="l2471" class='ln'>2471</a></td><td>  <span class="kw">if</span> ((<a id="2471c8" class="tk">int16_T</a>)<a id="2471c16" class="tk">rtb_Divide_idx_1</a> <a id="2471c33" class="tk">&gt;</a> <a id="2471c35" class="tk">rtDW</a>-&gt;<a id="2471c41" class="tk">Max</a>) <span class="br">{</span></td></tr>
+<td><a id="l2471" class='ln'>2471</a></td><td><span class="ct">     *  Constant: '&lt;S85&gt;/Constant1'</span></td></tr>
 <tr name="2472" id="2472">
-<td><a id="l2472" class='ln'>2472</a></td><td>    <a id="2472c5" class="tk">rtb_r_cos_M1</a> = <a id="2472c20" class="tk">rtDW</a>-&gt;<a id="2472c26" class="tk">Max</a>;</td></tr>
+<td><a id="l2472" class='ln'>2472</a></td><td><span class="ct">     *  Constant: '&lt;S85&gt;/Constant3'</span></td></tr>
 <tr name="2473" id="2473">
-<td><a id="l2473" class='ln'>2473</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="2473c15" class="tk">int16_T</a>)<a id="2473c23" class="tk">rtb_Divide_idx_1</a> <a id="2473c40" class="tk">&lt;</a> <a id="2473c42" class="tk">rtDW</a>-&gt;<a id="2473c48" class="tk">Max1</a>) <span class="br">{</span></td></tr>
+<td><a id="l2473" class='ln'>2473</a></td><td><span class="ct">     *  Constant: '&lt;S85&gt;/Constant4'</span></td></tr>
 <tr name="2474" id="2474">
-<td><a id="l2474" class='ln'>2474</a></td><td>    <span class="ct">/* Switch: '&lt;S117&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2474" class='ln'>2474</a></td><td><span class="ct">     *  Constant: '&lt;S85&gt;/Constant6'</span></td></tr>
 <tr name="2475" id="2475">
-<td><a id="l2475" class='ln'>2475</a></td><td><span class="ct">     *  MinMax: '&lt;S116&gt;/Max1'</span></td></tr>
+<td><a id="l2475" class='ln'>2475</a></td><td><span class="ct">     *  Constant: '&lt;S85&gt;/Constant7'</span></td></tr>
 <tr name="2476" id="2476">
-<td><a id="l2476" class='ln'>2476</a></td><td><span class="ct">     *  Switch: '&lt;S117&gt;/Switch2'</span></td></tr>
+<td><a id="l2476" class='ln'>2476</a></td><td><span class="ct">     *  Constant: '&lt;S85&gt;/Constant8'</span></td></tr>
 <tr name="2477" id="2477">
-<td><a id="l2477" class='ln'>2477</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2477" class='ln'>2477</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S85&gt;/Data Type Conversion'</span></td></tr>
 <tr name="2478" id="2478">
-<td><a id="l2478" class='ln'>2478</a></td><td>    <a id="2478c5" class="tk">rtb_r_cos_M1</a> = <a id="2478c20" class="tk">rtDW</a>-&gt;<a id="2478c26" class="tk">Max1</a>;</td></tr>
+<td><a id="l2478" class='ln'>2478</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S85&gt;/Data Type Conversion1'</span></td></tr>
 <tr name="2479" id="2479">
-<td><a id="l2479" class='ln'>2479</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2479" class='ln'>2479</a></td><td><span class="ct">     *  Gain: '&lt;S85&gt;/Gain1'</span></td></tr>
 <tr name="2480" id="2480">
-<td><a id="l2480" class='ln'>2480</a></td><td>    <a id="2480c5" class="tk">rtb_r_cos_M1</a> = (<a id="2480c21" class="tk">int16_T</a>)<a id="2480c29" class="tk">rtb_Divide_idx_1</a>;</td></tr>
+<td><a id="l2480" class='ln'>2480</a></td><td><span class="ct">     *  Gain: '&lt;S85&gt;/Gain2'</span></td></tr>
 <tr name="2481" id="2481">
-<td><a id="l2481" class='ln'>2481</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2481" class='ln'>2481</a></td><td><span class="ct">     *  Merge: '&lt;S45&gt;/Merge'</span></td></tr>
 <tr name="2482" id="2482">
-<td><a id="l2482" class='ln'>2482</a></td><td></td></tr>
+<td><a id="l2482" class='ln'>2482</a></td><td><span class="ct">     *  Outport: '&lt;Root&gt;/f_Idq'</span></td></tr>
 <tr name="2483" id="2483">
-<td><a id="l2483" class='ln'>2483</a></td><td>  <span class="ct">/* End of Switch: '&lt;S117&gt;/Switch2' */</span></td></tr>
+<td><a id="l2483" class='ln'>2483</a></td><td><span class="ct">     *  Product: '&lt;S85&gt;/Divide'</span></td></tr>
 <tr name="2484" id="2484">
-<td><a id="l2484" class='ln'>2484</a></td><td></td></tr>
+<td><a id="l2484" class='ln'>2484</a></td><td><span class="ct">     *  Sum: '&lt;S85&gt;/Sum'</span></td></tr>
 <tr name="2485" id="2485">
-<td><a id="l2485" class='ln'>2485</a></td><td>  <span class="ct">/* DataTypeConversion: '&lt;S54&gt;/Data Type Conversion' incorporates:</span></td></tr>
+<td><a id="l2485" class='ln'>2485</a></td><td><span class="ct">     *  Sum: '&lt;S85&gt;/Sum1'</span></td></tr>
 <tr name="2486" id="2486">
-<td><a id="l2486" class='ln'>2486</a></td><td><span class="ct">   *  Logic: '&lt;S54&gt;/Logical Operator'</span></td></tr>
+<td><a id="l2486" class='ln'>2486</a></td><td><span class="ct">     *  Switch: '&lt;S100&gt;/Switch2'</span></td></tr>
 <tr name="2487" id="2487">
-<td><a id="l2487" class='ln'>2487</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S54&gt;/Equal'</span></td></tr>
+<td><a id="l2487" class='ln'>2487</a></td><td><span class="ct">     *  Switch: '&lt;S107&gt;/Switch2'</span></td></tr>
 <tr name="2488" id="2488">
-<td><a id="l2488" class='ln'>2488</a></td><td><span class="ct">   *  UnitDelay: '&lt;S54&gt;/Unit Delay'</span></td></tr>
+<td><a id="l2488" class='ln'>2488</a></td><td><span class="ct">     *  Switch: '&lt;S93&gt;/Switch2'</span></td></tr>
 <tr name="2489" id="2489">
-<td><a id="l2489" class='ln'>2489</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2489" class='ln'>2489</a></td><td><span class="ct">     *  Switch: '&lt;S95&gt;/Switch2'</span></td></tr>
 <tr name="2490" id="2490">
-<td><a id="l2490" class='ln'>2490</a></td><td>  <a id="2490c3" class="tk">rtb_DataTypeConversion_j</a> = (<a id="2490c31" class="tk">uint8_T</a>)((<a id="2490c41" class="tk">rtb_z_ctrlMod</a> <a id="2490c55" class="tk">!=</a> 0) <a id="2490c61" class="tk">&amp;&amp;</a></td></tr>
+<td><a id="l2490" class='ln'>2490</a></td><td><span class="ct">     *  UnitDelay: '&lt;S35&gt;/UnitDelay1'</span></td></tr>
 <tr name="2491" id="2491">
-<td><a id="l2491" class='ln'>2491</a></td><td>    (<a id="2491c6" class="tk">rtDW</a>-&gt;<a id="2491c12" class="tk">UnitDelay_DSTATE_bm</a> <a id="2491c32" class="tk">!=</a> <a id="2491c35" class="tk">rtb_z_ctrlMod</a>));</td></tr>
+<td><a id="l2491" class='ln'>2491</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2492" id="2492">
-<td><a id="l2492" class='ln'>2492</a></td><td></td></tr>
+<td><a id="l2492" class='ln'>2492</a></td><td>    <a id="2492c5" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[0] = (<a id="2492c59" class="tk">int16_T</a>)</td></tr>
 <tr name="2493" id="2493">
-<td><a id="l2493" class='ln'>2493</a></td><td>  <span class="ct">/* If: '&lt;S54&gt;/If1' incorporates:</span></td></tr>
+<td><a id="l2493" class='ln'>2493</a></td><td>      (<a id="2493c8" class="tk">rtb_Switch2_au</a> <a id="2493c23" class="tk">&gt;&gt;</a> 9);</td></tr>
 <tr name="2494" id="2494">
-<td><a id="l2494" class='ln'>2494</a></td><td><span class="ct">   *  Constant: '&lt;S95&gt;/Constant1'</span></td></tr>
+<td><a id="l2494" class='ln'>2494</a></td><td>    <a id="2494c5" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1] = (<a id="2494c59" class="tk">int16_T</a>)(<a id="2494c68" class="tk">rtb_Gain_ib</a> <a id="2494c80" class="tk">&gt;&gt;</a></td></tr>
 <tr name="2495" id="2495">
-<td><a id="l2495" class='ln'>2495</a></td><td><span class="ct">   *  Constant: '&lt;S95&gt;/Constant3'</span></td></tr>
+<td><a id="l2495" class='ln'>2495</a></td><td>      9);</td></tr>
 <tr name="2496" id="2496">
-<td><a id="l2496" class='ln'>2496</a></td><td><span class="ct">   *  Constant: '&lt;S95&gt;/Constant4'</span></td></tr>
+<td><a id="l2496" class='ln'>2496</a></td><td></td></tr>
 <tr name="2497" id="2497">
-<td><a id="l2497" class='ln'>2497</a></td><td><span class="ct">   *  Constant: '&lt;S95&gt;/Constant6'</span></td></tr>
+<td><a id="l2497" class='ln'>2497</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S45&gt;/CurrentLoop' */</span></td></tr>
 <tr name="2498" id="2498">
-<td><a id="l2498" class='ln'>2498</a></td><td><span class="ct">   *  Constant: '&lt;S95&gt;/Constant7'</span></td></tr>
+<td><a id="l2498" class='ln'>2498</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2499" id="2499">
-<td><a id="l2499" class='ln'>2499</a></td><td><span class="ct">   *  Constant: '&lt;S95&gt;/Constant8'</span></td></tr>
+<td><a id="l2499" class='ln'>2499</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S45&gt;/OpenLoop' incorporates:</span></td></tr>
 <tr name="2500" id="2500">
-<td><a id="l2500" class='ln'>2500</a></td><td><span class="ct">   *  Gain: '&lt;S95&gt;/Gain1'</span></td></tr>
+<td><a id="l2500" class='ln'>2500</a></td><td><span class="ct">     *  ActionPort: '&lt;S86&gt;/Action Port'</span></td></tr>
 <tr name="2501" id="2501">
-<td><a id="l2501" class='ln'>2501</a></td><td><span class="ct">   *  Gain: '&lt;S95&gt;/Gain2'</span></td></tr>
+<td><a id="l2501" class='ln'>2501</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2502" id="2502">
-<td><a id="l2502" class='ln'>2502</a></td><td><span class="ct">   *  Inport: '&lt;S96&gt;/In1'</span></td></tr>
+<td><a id="l2502" class='ln'>2502</a></td><td>    <a id="2502c5" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[0] = <a id="2502c58" class="tk">rtDW</a>-&gt;<a id="2502c64" class="tk">Switch</a>[0];</td></tr>
 <tr name="2503" id="2503">
-<td><a id="l2503" class='ln'>2503</a></td><td><span class="ct">   *  Merge: '&lt;S26&gt;/Merge'</span></td></tr>
+<td><a id="l2503" class='ln'>2503</a></td><td>    <a id="2503c5" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1] = <a id="2503c58" class="tk">rtDW</a>-&gt;<a id="2503c64" class="tk">Switch</a>[1];</td></tr>
 <tr name="2504" id="2504">
-<td><a id="l2504" class='ln'>2504</a></td><td><span class="ct">   *  Merge: '&lt;S54&gt;/Merge'</span></td></tr>
+<td><a id="l2504" class='ln'>2504</a></td><td></td></tr>
 <tr name="2505" id="2505">
-<td><a id="l2505" class='ln'>2505</a></td><td><span class="ct">   *  Outport: '&lt;Root&gt;/f_Idq'</span></td></tr>
+<td><a id="l2505" class='ln'>2505</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S45&gt;/OpenLoop' */</span></td></tr>
 <tr name="2506" id="2506">
-<td><a id="l2506" class='ln'>2506</a></td><td><span class="ct">   *  Product: '&lt;S95&gt;/Divide'</span></td></tr>
+<td><a id="l2506" class='ln'>2506</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2507" id="2507">
-<td><a id="l2507" class='ln'>2507</a></td><td><span class="ct">   *  Sum: '&lt;S95&gt;/Sum'</span></td></tr>
+<td><a id="l2507" class='ln'>2507</a></td><td></td></tr>
 <tr name="2508" id="2508">
-<td><a id="l2508" class='ln'>2508</a></td><td><span class="ct">   *  Sum: '&lt;S95&gt;/Sum1'</span></td></tr>
+<td><a id="l2508" class='ln'>2508</a></td><td>  <span class="ct">/* End of If: '&lt;S45&gt;/If1' */</span></td></tr>
 <tr name="2509" id="2509">
-<td><a id="l2509" class='ln'>2509</a></td><td><span class="ct">   *  Switch: '&lt;S110&gt;/Switch2'</span></td></tr>
+<td><a id="l2509" class='ln'>2509</a></td><td></td></tr>
 <tr name="2510" id="2510">
-<td><a id="l2510" class='ln'>2510</a></td><td><span class="ct">   *  Switch: '&lt;S117&gt;/Switch2'</span></td></tr>
+<td><a id="l2510" class='ln'>2510</a></td><td>  <span class="ct">/* Product: '&lt;S42&gt;/Divide2' incorporates:</span></td></tr>
 <tr name="2511" id="2511">
-<td><a id="l2511" class='ln'>2511</a></td><td><span class="ct">   *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l2511" class='ln'>2511</a></td><td><span class="ct">   *  Constant: '&lt;S42&gt;/Constant'</span></td></tr>
 <tr name="2512" id="2512">
-<td><a id="l2512" class='ln'>2512</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2512" class='ln'>2512</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/vDC'</span></td></tr>
 <tr name="2513" id="2513">
-<td><a id="l2513" class='ln'>2513</a></td><td>  <span class="kw">if</span> (<a id="2513c7" class="tk">rtb_z_ctrlMod</a> <a id="2513c21" class="tk">!=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2513" class='ln'>2513</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2514" id="2514">
-<td><a id="l2514" class='ln'>2514</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S54&gt;/CurrentLoop' incorporates:</span></td></tr>
+<td><a id="l2514" class='ln'>2514</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2515" id="2515">
-<td><a id="l2515" class='ln'>2515</a></td><td><span class="ct">     *  ActionPort: '&lt;S95&gt;/Action Port'</span></td></tr>
+<td><a id="l2515" class='ln'>2515</a></td><td>  <a id="2515c3" class="tk">rtb_Switch2_pl</a> = (<a id="2515c21" class="tk">int16_T</a>)<a id="2515c29" class="tk">div_nde_s32_floor</a>(<a id="2515c47" class="tk">rtU</a>-&gt;<a id="2515c52" class="tk">vDC</a> <a id="2515c56" class="tk">&lt;&lt;</a> 14, <a id="2515c63" class="tk">rtP</a>.<a id="2515c67" class="tk">V_modulation</a>);</td></tr>
 <tr name="2516" id="2516">
-<td><a id="l2516" class='ln'>2516</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2516" class='ln'>2516</a></td><td></td></tr>
 <tr name="2517" id="2517">
-<td><a id="l2517" class='ln'>2517</a></td><td>    <span class="ct">/* Product: '&lt;S95&gt;/Divide' incorporates:</span></td></tr>
+<td><a id="l2517" class='ln'>2517</a></td><td>  <span class="ct">/* Sum: '&lt;S42&gt;/Sum of Elements' incorporates:</span></td></tr>
 <tr name="2518" id="2518">
-<td><a id="l2518" class='ln'>2518</a></td><td><span class="ct">     *  Constant: '&lt;S95&gt;/Constant2'</span></td></tr>
+<td><a id="l2518" class='ln'>2518</a></td><td><span class="ct">   *  Math: '&lt;S42&gt;/Math Function'</span></td></tr>
 <tr name="2519" id="2519">
-<td><a id="l2519" class='ln'>2519</a></td><td><span class="ct">     *  Inport: '&lt;Root&gt;/vDC'</span></td></tr>
+<td><a id="l2519" class='ln'>2519</a></td><td><span class="ct">   *  Merge: '&lt;S45&gt;/Merge'</span></td></tr>
 <tr name="2520" id="2520">
-<td><a id="l2520" class='ln'>2520</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2520" class='ln'>2520</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2521" id="2521">
-<td><a id="l2521" class='ln'>2521</a></td><td>    <a id="2521c5" class="tk">rtb_Sum6_p</a> = (<a id="2521c19" class="tk">int16_T</a>)((<a id="2521c29" class="tk">rtU</a>-&gt;<a id="2521c34" class="tk">vDC</a> <a id="2521c38" class="tk">*</a> <a id="2521c40" class="tk">rtP</a>.<a id="2521c44" class="tk">V_modulation</a>) <a id="2521c58" class="tk">&gt;&gt;</a> 14);</td></tr>
+<td><a id="l2521" class='ln'>2521</a></td><td>  <a id="2521c3" class="tk">tmp_2</a> = (<a id="2521c12" class="tk">int64_T</a>)((<a id="2521c22" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[0] <a id="2521c73" class="tk">*</a></td></tr>
 <tr name="2522" id="2522">
-<td><a id="l2522" class='ln'>2522</a></td><td></td></tr>
+<td><a id="l2522" class='ln'>2522</a></td><td>                     <a id="2522c22" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[0]) <a id="2522c74" class="tk">&gt;&gt;</a> 4) <a id="2522c80" class="tk">+</a></td></tr>
 <tr name="2523" id="2523">
-<td><a id="l2523" class='ln'>2523</a></td><td>    <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S95&gt;/PI_backCalc_fixdt' */</span></td></tr>
+<td><a id="l2523" class='ln'>2523</a></td><td>    ((<a id="2523c7" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1] <a id="2523c58" class="tk">*</a></td></tr>
 <tr name="2524" id="2524">
-<td><a id="l2524" class='ln'>2524</a></td><td>    <a id="2524c5" class="tk">rtb_Switch_np</a> = <a id="2524c21" class="tk">PI_backCalc_fixdt_o</a>((<a id="2524c42" class="tk">int16_T</a>)(<a id="2524c51" class="tk">rtb_Divide1_m</a> <a id="2524c65" class="tk">-</a> <a id="2524c67" class="tk">rtY</a>-&gt;<a id="2524c72" class="tk">f_Idq</a>[0]),</td></tr>
+<td><a id="l2524" class='ln'>2524</a></td><td>      <a id="2524c7" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1]) <a id="2524c59" class="tk">&gt;&gt;</a> 4);</td></tr>
 <tr name="2525" id="2525">
-<td><a id="l2525" class='ln'>2525</a></td><td>      <a id="2525c7" class="tk">rtP</a>.<a id="2525c11" class="tk">cf_idKp</a>, <a id="2525c20" class="tk">rtP</a>.<a id="2525c24" class="tk">cf_idKi</a>, <a id="2525c33" class="tk">rtP</a>.<a id="2525c37" class="tk">cf_idKb</a>, <a id="2525c46" class="tk">rtb_Sum6_p</a>, (<a id="2525c59" class="tk">int16_T</a>)<a id="2525c67" class="tk">-</a><a id="2525c68" class="tk">rtb_Sum6_p</a>,</td></tr>
+<td><a id="l2525" class='ln'>2525</a></td><td>  <span class="kw">if</span> (<a id="2525c7" class="tk">tmp_2</a> <a id="2525c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
 <tr name="2526" id="2526">
-<td><a id="l2526" class='ln'>2526</a></td><td>      <a id="2526c7" class="tk">rtDW</a>-&gt;<a id="2526c13" class="tk">UnitDelay1_DSTATE_f</a>[0], <a id="2526c37" class="tk">rtb_DataTypeConversion_j</a>,</td></tr>
+<td><a id="l2526" class='ln'>2526</a></td><td>    <a id="2526c5" class="tk">tmp_2</a> = 2147483647LL;</td></tr>
 <tr name="2527" id="2527">
-<td><a id="l2527" class='ln'>2527</a></td><td>      <a id="2527c7" class="tk">&amp;</a><a id="2527c8" class="tk">rtDW</a>-&gt;<a id="2527c14" class="tk">PI_backCalc_fixdt_o3</a>, <a id="2527c36" class="tk">&amp;</a><a id="2527c37" class="tk">rtPrevZCX</a>-&gt;<a id="2527c48" class="tk">PI_backCalc_fixdt_o3</a>);</td></tr>
+<td><a id="l2527" class='ln'>2527</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2528" id="2528">
-<td><a id="l2528" class='ln'>2528</a></td><td></td></tr>
+<td><a id="l2528" class='ln'>2528</a></td><td>    <span class="kw">if</span> (<a id="2528c9" class="tk">tmp_2</a> <a id="2528c15" class="tk">&lt;</a> <a id="2528c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
 <tr name="2529" id="2529">
-<td><a id="l2529" class='ln'>2529</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S95&gt;/PI_backCalc_fixdt' */</span></td></tr>
+<td><a id="l2529" class='ln'>2529</a></td><td>      <a id="2529c7" class="tk">tmp_2</a> = <a id="2529c15" class="tk">-</a>2147483648LL;</td></tr>
 <tr name="2530" id="2530">
-<td><a id="l2530" class='ln'>2530</a></td><td></td></tr>
+<td><a id="l2530" class='ln'>2530</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2531" id="2531">
-<td><a id="l2531" class='ln'>2531</a></td><td>    <span class="ct">/* Outputs for Atomic SubSystem: '&lt;S95&gt;/PI_backCalc_fixdt1' */</span></td></tr>
+<td><a id="l2531" class='ln'>2531</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2532" id="2532">
-<td><a id="l2532" class='ln'>2532</a></td><td>    <a id="2532c5" class="tk">rtb_Gain_b0</a> = <a id="2532c19" class="tk">PI_backCalc_fixdt_o</a>((<a id="2532c40" class="tk">int16_T</a>)(<a id="2532c49" class="tk">rtb_r_cos_M1</a> <a id="2532c62" class="tk">-</a> <a id="2532c64" class="tk">rtY</a>-&gt;<a id="2532c69" class="tk">f_Idq</a>[1]),</td></tr>
+<td><a id="l2532" class='ln'>2532</a></td><td></td></tr>
 <tr name="2533" id="2533">
-<td><a id="l2533" class='ln'>2533</a></td><td>      <a id="2533c7" class="tk">rtP</a>.<a id="2533c11" class="tk">cf_iqKp</a>, <a id="2533c20" class="tk">rtP</a>.<a id="2533c24" class="tk">cf_iqKi</a>, <a id="2533c33" class="tk">rtP</a>.<a id="2533c37" class="tk">cf_iqKb</a>, <a id="2533c46" class="tk">rtb_Sum6_p</a>, (<a id="2533c59" class="tk">int16_T</a>)<a id="2533c67" class="tk">-</a><a id="2533c68" class="tk">rtb_Sum6_p</a>,</td></tr>
+<td><a id="l2533" class='ln'>2533</a></td><td>  <span class="ct">/* Product: '&lt;S42&gt;/Divide' incorporates:</span></td></tr>
 <tr name="2534" id="2534">
-<td><a id="l2534" class='ln'>2534</a></td><td>      <a id="2534c7" class="tk">rtDW</a>-&gt;<a id="2534c13" class="tk">UnitDelay1_DSTATE_f</a>[1], <a id="2534c37" class="tk">rtb_DataTypeConversion_j</a>,</td></tr>
+<td><a id="l2534" class='ln'>2534</a></td><td><span class="ct">   *  Math: '&lt;S42&gt;/Math Function1'</span></td></tr>
 <tr name="2535" id="2535">
-<td><a id="l2535" class='ln'>2535</a></td><td>      <a id="2535c7" class="tk">&amp;</a><a id="2535c8" class="tk">rtDW</a>-&gt;<a id="2535c14" class="tk">PI_backCalc_fixdt1</a>, <a id="2535c34" class="tk">&amp;</a><a id="2535c35" class="tk">rtPrevZCX</a>-&gt;<a id="2535c46" class="tk">PI_backCalc_fixdt1</a>);</td></tr>
+<td><a id="l2535" class='ln'>2535</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2536" id="2536">
-<td><a id="l2536" class='ln'>2536</a></td><td></td></tr>
+<td><a id="l2536" class='ln'>2536</a></td><td><span class="ct">   *  Sum: '&lt;S42&gt;/Sum of Elements'</span></td></tr>
 <tr name="2537" id="2537">
-<td><a id="l2537" class='ln'>2537</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S95&gt;/PI_backCalc_fixdt1' */</span></td></tr>
+<td><a id="l2537" class='ln'>2537</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2538" id="2538">
-<td><a id="l2538" class='ln'>2538</a></td><td></td></tr>
+<td><a id="l2538" class='ln'>2538</a></td><td>  <a id="2538c3" class="tk">tmp_2</a> = ((<a id="2538c13" class="tk">int64_T</a>)(<a id="2538c22" class="tk">int32_T</a>)<a id="2538c30" class="tk">tmp_2</a> <a id="2538c36" class="tk">&lt;&lt;</a> 14) <a id="2538c43" class="tk">/</a> ((<a id="2538c47" class="tk">rtb_Switch2_pl</a> <a id="2538c62" class="tk">*</a> <a id="2538c64" class="tk">rtb_Switch2_pl</a>) <a id="2538c80" class="tk">&gt;&gt;</a></td></tr>
 <tr name="2539" id="2539">
-<td><a id="l2539" class='ln'>2539</a></td><td>    <span class="ct">/* Sum: '&lt;S95&gt;/Sum2' incorporates:</span></td></tr>
+<td><a id="l2539" class='ln'>2539</a></td><td>    4);</td></tr>
 <tr name="2540" id="2540">
-<td><a id="l2540" class='ln'>2540</a></td><td><span class="ct">     *  Constant: '&lt;S95&gt;/Constant1'</span></td></tr>
+<td><a id="l2540" class='ln'>2540</a></td><td>  <span class="kw">if</span> (<a id="2540c7" class="tk">tmp_2</a> <a id="2540c13" class="tk">&lt;</a> 0LL) <span class="br">{</span></td></tr>
 <tr name="2541" id="2541">
-<td><a id="l2541" class='ln'>2541</a></td><td><span class="ct">     *  Constant: '&lt;S95&gt;/Constant3'</span></td></tr>
+<td><a id="l2541" class='ln'>2541</a></td><td>    <a id="2541c5" class="tk">tmp_2</a> = 0LL;</td></tr>
 <tr name="2542" id="2542">
-<td><a id="l2542" class='ln'>2542</a></td><td><span class="ct">     *  Constant: '&lt;S95&gt;/Constant4'</span></td></tr>
+<td><a id="l2542" class='ln'>2542</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2543" id="2543">
-<td><a id="l2543" class='ln'>2543</a></td><td><span class="ct">     *  Constant: '&lt;S95&gt;/Constant6'</span></td></tr>
+<td><a id="l2543" class='ln'>2543</a></td><td>    <span class="kw">if</span> (<a id="2543c9" class="tk">tmp_2</a> <a id="2543c15" class="tk">&gt;</a> 65535LL) <span class="br">{</span></td></tr>
 <tr name="2544" id="2544">
-<td><a id="l2544" class='ln'>2544</a></td><td><span class="ct">     *  Constant: '&lt;S95&gt;/Constant7'</span></td></tr>
+<td><a id="l2544" class='ln'>2544</a></td><td>      <a id="2544c7" class="tk">tmp_2</a> = 65535LL;</td></tr>
 <tr name="2545" id="2545">
-<td><a id="l2545" class='ln'>2545</a></td><td><span class="ct">     *  Constant: '&lt;S95&gt;/Constant8'</span></td></tr>
+<td><a id="l2545" class='ln'>2545</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2546" id="2546">
-<td><a id="l2546" class='ln'>2546</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S95&gt;/Data Type Conversion'</span></td></tr>
+<td><a id="l2546" class='ln'>2546</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2547" id="2547">
-<td><a id="l2547" class='ln'>2547</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S95&gt;/Data Type Conversion1'</span></td></tr>
+<td><a id="l2547" class='ln'>2547</a></td><td></td></tr>
 <tr name="2548" id="2548">
-<td><a id="l2548" class='ln'>2548</a></td><td><span class="ct">     *  Gain: '&lt;S95&gt;/Gain1'</span></td></tr>
+<td><a id="l2548" class='ln'>2548</a></td><td>  <span class="ct">/* Sqrt: '&lt;S42&gt;/Sqrt' incorporates:</span></td></tr>
 <tr name="2549" id="2549">
-<td><a id="l2549" class='ln'>2549</a></td><td><span class="ct">     *  Gain: '&lt;S95&gt;/Gain2'</span></td></tr>
+<td><a id="l2549" class='ln'>2549</a></td><td><span class="ct">   *  Product: '&lt;S42&gt;/Divide'</span></td></tr>
 <tr name="2550" id="2550">
-<td><a id="l2550" class='ln'>2550</a></td><td><span class="ct">     *  Merge: '&lt;S54&gt;/Merge'</span></td></tr>
+<td><a id="l2550" class='ln'>2550</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2551" id="2551">
-<td><a id="l2551" class='ln'>2551</a></td><td><span class="ct">     *  Outport: '&lt;Root&gt;/f_Idq'</span></td></tr>
+<td><a id="l2551" class='ln'>2551</a></td><td>  <a id="2551c3" class="tk">rtb_Sum1_p</a> = <a id="2551c16" class="tk">rt_sqrt_Uu16En14_Yu16En14_Iu32En28_s_s</a>((<a id="2551c56" class="tk">uint16_T</a>)<a id="2551c65" class="tk">tmp_2</a>);</td></tr>
 <tr name="2552" id="2552">
-<td><a id="l2552" class='ln'>2552</a></td><td><span class="ct">     *  Product: '&lt;S95&gt;/Divide'</span></td></tr>
+<td><a id="l2552" class='ln'>2552</a></td><td></td></tr>
 <tr name="2553" id="2553">
-<td><a id="l2553" class='ln'>2553</a></td><td><span class="ct">     *  Sum: '&lt;S95&gt;/Sum'</span></td></tr>
+<td><a id="l2553" class='ln'>2553</a></td><td>  <span class="ct">/* Switch: '&lt;S42&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2554" id="2554">
-<td><a id="l2554" class='ln'>2554</a></td><td><span class="ct">     *  Sum: '&lt;S95&gt;/Sum1'</span></td></tr>
+<td><a id="l2554" class='ln'>2554</a></td><td><span class="ct">   *  Merge: '&lt;S45&gt;/Merge'</span></td></tr>
 <tr name="2555" id="2555">
-<td><a id="l2555" class='ln'>2555</a></td><td><span class="ct">     *  Switch: '&lt;S103&gt;/Switch2'</span></td></tr>
+<td><a id="l2555" class='ln'>2555</a></td><td><span class="ct">   *  Sqrt: '&lt;S42&gt;/Sqrt'</span></td></tr>
 <tr name="2556" id="2556">
-<td><a id="l2556" class='ln'>2556</a></td><td><span class="ct">     *  Switch: '&lt;S105&gt;/Switch2'</span></td></tr>
+<td><a id="l2556" class='ln'>2556</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2557" id="2557">
-<td><a id="l2557" class='ln'>2557</a></td><td><span class="ct">     *  Switch: '&lt;S110&gt;/Switch2'</span></td></tr>
+<td><a id="l2557" class='ln'>2557</a></td><td>  <span class="kw">if</span> (<a id="2557c7" class="tk">rtb_Sum1_p</a> <a id="2557c18" class="tk">&gt;</a> 16384) <span class="br">{</span></td></tr>
 <tr name="2558" id="2558">
-<td><a id="l2558" class='ln'>2558</a></td><td><span class="ct">     *  Switch: '&lt;S117&gt;/Switch2'</span></td></tr>
+<td><a id="l2558" class='ln'>2558</a></td><td>    <span class="ct">/* Switch: '&lt;S42&gt;/Switch' incorporates:</span></td></tr>
 <tr name="2559" id="2559">
-<td><a id="l2559" class='ln'>2559</a></td><td><span class="ct">     *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l2559" class='ln'>2559</a></td><td><span class="ct">     *  Merge: '&lt;S45&gt;/Merge'</span></td></tr>
 <tr name="2560" id="2560">
-<td><a id="l2560" class='ln'>2560</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2560" class='ln'>2560</a></td><td><span class="ct">     *  MultiPortSwitch: '&lt;S42&gt;/Multiport Switch'</span></td></tr>
 <tr name="2561" id="2561">
-<td><a id="l2561" class='ln'>2561</a></td><td>    <a id="2561c5" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[0] = (<a id="2561c43" class="tk">int16_T</a>)(<a id="2561c52" class="tk">rtb_Switch_np</a> <a id="2561c66" class="tk">&gt;&gt;</a> 9);</td></tr>
+<td><a id="l2561" class='ln'>2561</a></td><td><span class="ct">     *  Product: '&lt;S42&gt;/Divide1'</span></td></tr>
 <tr name="2562" id="2562">
-<td><a id="l2562" class='ln'>2562</a></td><td>    <a id="2562c5" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1] = (<a id="2562c43" class="tk">int16_T</a>)(<a id="2562c52" class="tk">rtb_Gain_b0</a> <a id="2562c64" class="tk">&gt;&gt;</a> 9);</td></tr>
+<td><a id="l2562" class='ln'>2562</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2563" id="2563">
-<td><a id="l2563" class='ln'>2563</a></td><td></td></tr>
+<td><a id="l2563" class='ln'>2563</a></td><td>    <a id="2563c5" class="tk">rtb_UnitDelay1_ko</a>[0] = (<a id="2563c29" class="tk">int16_T</a>)</td></tr>
 <tr name="2564" id="2564">
-<td><a id="l2564" class='ln'>2564</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S54&gt;/CurrentLoop' */</span></td></tr>
+<td><a id="l2564" class='ln'>2564</a></td><td>      ((<a id="2564c9" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[0] <a id="2564c60" class="tk">&lt;&lt;</a> 14) <a id="2564c67" class="tk">/</a> <a id="2564c69" class="tk">rtb_Sum1_p</a>);</td></tr>
 <tr name="2565" id="2565">
-<td><a id="l2565" class='ln'>2565</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2565" class='ln'>2565</a></td><td>    <a id="2565c5" class="tk">rtb_UnitDelay1_ko</a>[1] = (<a id="2565c29" class="tk">int16_T</a>)</td></tr>
 <tr name="2566" id="2566">
-<td><a id="l2566" class='ln'>2566</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S54&gt;/OpenLoop' incorporates:</span></td></tr>
+<td><a id="l2566" class='ln'>2566</a></td><td>      ((<a id="2566c9" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1] <a id="2566c60" class="tk">&lt;&lt;</a> 14) <a id="2566c67" class="tk">/</a> <a id="2566c69" class="tk">rtb_Sum1_p</a>);</td></tr>
 <tr name="2567" id="2567">
-<td><a id="l2567" class='ln'>2567</a></td><td><span class="ct">     *  ActionPort: '&lt;S96&gt;/Action Port'</span></td></tr>
+<td><a id="l2567" class='ln'>2567</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2568" id="2568">
-<td><a id="l2568" class='ln'>2568</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2568" class='ln'>2568</a></td><td>    <a id="2568c5" class="tk">rtb_UnitDelay1_ko</a>[0] = <a id="2568c28" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[0];</td></tr>
 <tr name="2569" id="2569">
-<td><a id="l2569" class='ln'>2569</a></td><td>    <a id="2569c5" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[0] = <a id="2569c42" class="tk">rtDW</a>-&gt;<a id="2569c48" class="tk">Merge</a>[0];</td></tr>
+<td><a id="l2569" class='ln'>2569</a></td><td>    <a id="2569c5" class="tk">rtb_UnitDelay1_ko</a>[1] = <a id="2569c28" class="tk">rtb_TmpSignalConversionAtLow_Pass_FilterInport1</a>[1];</td></tr>
 <tr name="2570" id="2570">
-<td><a id="l2570" class='ln'>2570</a></td><td>    <a id="2570c5" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1] = <a id="2570c42" class="tk">rtDW</a>-&gt;<a id="2570c48" class="tk">Merge</a>[1];</td></tr>
+<td><a id="l2570" class='ln'>2570</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2571" id="2571">
 <td><a id="l2571" class='ln'>2571</a></td><td></td></tr>
 <tr name="2572" id="2572">
-<td><a id="l2572" class='ln'>2572</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S54&gt;/OpenLoop' */</span></td></tr>
+<td><a id="l2572" class='ln'>2572</a></td><td>  <span class="ct">/* End of Switch: '&lt;S42&gt;/Switch' */</span></td></tr>
 <tr name="2573" id="2573">
-<td><a id="l2573" class='ln'>2573</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2573" class='ln'>2573</a></td><td></td></tr>
 <tr name="2574" id="2574">
-<td><a id="l2574" class='ln'>2574</a></td><td></td></tr>
+<td><a id="l2574" class='ln'>2574</a></td><td>  <span class="ct">/* Sum: '&lt;S52&gt;/Sum1' incorporates:</span></td></tr>
 <tr name="2575" id="2575">
-<td><a id="l2575" class='ln'>2575</a></td><td>  <span class="ct">/* End of If: '&lt;S54&gt;/If1' */</span></td></tr>
+<td><a id="l2575" class='ln'>2575</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="2576" id="2576">
-<td><a id="l2576" class='ln'>2576</a></td><td></td></tr>
+<td><a id="l2576" class='ln'>2576</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_sin_M1'</span></td></tr>
 <tr name="2577" id="2577">
-<td><a id="l2577" class='ln'>2577</a></td><td>  <span class="ct">/* Product: '&lt;S51&gt;/Divide2' incorporates:</span></td></tr>
+<td><a id="l2577" class='ln'>2577</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide2'</span></td></tr>
 <tr name="2578" id="2578">
-<td><a id="l2578" class='ln'>2578</a></td><td><span class="ct">   *  Constant: '&lt;S51&gt;/Constant'</span></td></tr>
+<td><a id="l2578" class='ln'>2578</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide3'</span></td></tr>
 <tr name="2579" id="2579">
-<td><a id="l2579" class='ln'>2579</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/vDC'</span></td></tr>
+<td><a id="l2579" class='ln'>2579</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2580" id="2580">
-<td><a id="l2580" class='ln'>2580</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2580" class='ln'>2580</a></td><td>  <a id="2580c3" class="tk">rtb_Divide_e_idx_2</a> = (<a id="2580c25" class="tk">int16_T</a>)((<a id="2580c35" class="tk">rtb_UnitDelay1_ko</a>[0] <a id="2580c56" class="tk">*</a></td></tr>
 <tr name="2581" id="2581">
-<td><a id="l2581" class='ln'>2581</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2581" class='ln'>2581</a></td><td>    <a id="2581c5" class="tk">rtConstP</a>.<a id="2581c14" class="tk">pooled12</a>[<a id="2581c23" class="tk">rtb_Divide_d</a>]) <a id="2581c38" class="tk">&gt;&gt;</a> 14) <a id="2581c45" class="tk">+</a> (<a id="2581c48" class="tk">int16_T</a>)((<a id="2581c58" class="tk">rtb_UnitDelay1_ko</a>[1] <a id="2581c79" class="tk">*</a></td></tr>
 <tr name="2582" id="2582">
-<td><a id="l2582" class='ln'>2582</a></td><td>  <a id="2582c3" class="tk">rtb_Sum6_p</a> = (<a id="2582c17" class="tk">int16_T</a>)<a id="2582c25" class="tk">div_nde_s32_floor</a>(<a id="2582c43" class="tk">rtU</a>-&gt;<a id="2582c48" class="tk">vDC</a> <a id="2582c52" class="tk">&lt;&lt;</a> 14, <a id="2582c59" class="tk">rtP</a>.<a id="2582c63" class="tk">V_modulation</a>);</td></tr>
+<td><a id="l2582" class='ln'>2582</a></td><td>    <a id="2582c5" class="tk">rtConstP</a>.<a id="2582c14" class="tk">pooled13</a>[<a id="2582c23" class="tk">rtb_Divide_d</a>]) <a id="2582c38" class="tk">&gt;&gt;</a> 14);</td></tr>
 <tr name="2583" id="2583">
-<td><a id="l2583" class='ln'>2583</a></td><td></td></tr>
+<td><a id="l2583" class='ln'>2583</a></td><td>  <span class="kw">if</span> (<a id="2583c7" class="tk">rtb_Divide_e_idx_2</a> <a id="2583c26" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="2584" id="2584">
-<td><a id="l2584" class='ln'>2584</a></td><td>  <span class="ct">/* Sum: '&lt;S51&gt;/Sum of Elements' incorporates:</span></td></tr>
+<td><a id="l2584" class='ln'>2584</a></td><td>    <a id="2584c5" class="tk">rtb_Divide_e_idx_2</a> = 32767;</td></tr>
 <tr name="2585" id="2585">
-<td><a id="l2585" class='ln'>2585</a></td><td><span class="ct">   *  Math: '&lt;S51&gt;/Math Function'</span></td></tr>
+<td><a id="l2585" class='ln'>2585</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2586" id="2586">
-<td><a id="l2586" class='ln'>2586</a></td><td><span class="ct">   *  Merge: '&lt;S54&gt;/Merge'</span></td></tr>
+<td><a id="l2586" class='ln'>2586</a></td><td>    <span class="kw">if</span> (<a id="2586c9" class="tk">rtb_Divide_e_idx_2</a> <a id="2586c28" class="tk">&lt;</a> <a id="2586c30" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="2587" id="2587">
-<td><a id="l2587" class='ln'>2587</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2587" class='ln'>2587</a></td><td>      <a id="2587c7" class="tk">rtb_Divide_e_idx_2</a> = <a id="2587c28" class="tk">-</a>32768;</td></tr>
 <tr name="2588" id="2588">
-<td><a id="l2588" class='ln'>2588</a></td><td>  <a id="2588c3" class="tk">tmp_2</a> = (<a id="2588c12" class="tk">int64_T</a>)((<a id="2588c22" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[0] <a id="2588c57" class="tk">*</a></td></tr>
+<td><a id="l2588" class='ln'>2588</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2589" id="2589">
-<td><a id="l2589" class='ln'>2589</a></td><td>                     <a id="2589c22" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[0]) <a id="2589c58" class="tk">&gt;&gt;</a> 4) <a id="2589c64" class="tk">+</a></td></tr>
+<td><a id="l2589" class='ln'>2589</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2590" id="2590">
-<td><a id="l2590" class='ln'>2590</a></td><td>    ((<a id="2590c7" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1] <a id="2590c42" class="tk">*</a> <a id="2590c44" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1]) <a id="2590c80" class="tk">&gt;&gt;</a></td></tr>
+<td><a id="l2590" class='ln'>2590</a></td><td></td></tr>
 <tr name="2591" id="2591">
-<td><a id="l2591" class='ln'>2591</a></td><td>     4);</td></tr>
+<td><a id="l2591" class='ln'>2591</a></td><td>  <span class="ct">/* Sum: '&lt;S52&gt;/Sum6' incorporates:</span></td></tr>
 <tr name="2592" id="2592">
-<td><a id="l2592" class='ln'>2592</a></td><td>  <span class="kw">if</span> (<a id="2592c7" class="tk">tmp_2</a> <a id="2592c13" class="tk">&gt;</a> 2147483647LL) <span class="br">{</span></td></tr>
+<td><a id="l2592" class='ln'>2592</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="2593" id="2593">
-<td><a id="l2593" class='ln'>2593</a></td><td>    <a id="2593c5" class="tk">tmp_2</a> = 2147483647LL;</td></tr>
+<td><a id="l2593" class='ln'>2593</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S49&gt;/r_sin_M1'</span></td></tr>
 <tr name="2594" id="2594">
-<td><a id="l2594" class='ln'>2594</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2594" class='ln'>2594</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide1'</span></td></tr>
 <tr name="2595" id="2595">
-<td><a id="l2595" class='ln'>2595</a></td><td>    <span class="kw">if</span> (<a id="2595c9" class="tk">tmp_2</a> <a id="2595c15" class="tk">&lt;</a> <a id="2595c17" class="tk">-</a>2147483648LL) <span class="br">{</span></td></tr>
+<td><a id="l2595" class='ln'>2595</a></td><td><span class="ct">   *  Product: '&lt;S52&gt;/Divide4'</span></td></tr>
 <tr name="2596" id="2596">
-<td><a id="l2596" class='ln'>2596</a></td><td>      <a id="2596c7" class="tk">tmp_2</a> = <a id="2596c15" class="tk">-</a>2147483648LL;</td></tr>
+<td><a id="l2596" class='ln'>2596</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2597" id="2597">
-<td><a id="l2597" class='ln'>2597</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2597" class='ln'>2597</a></td><td>  <a id="2597c3" class="tk">tmp</a> = (<a id="2597c10" class="tk">int16_T</a>)((<a id="2597c20" class="tk">rtb_UnitDelay1_ko</a>[0] <a id="2597c41" class="tk">*</a> <a id="2597c43" class="tk">rtConstP</a>.<a id="2597c52" class="tk">pooled13</a>[<a id="2597c61" class="tk">rtb_Divide_d</a>]) <a id="2597c76" class="tk">&gt;&gt;</a> 14)</td></tr>
 <tr name="2598" id="2598">
-<td><a id="l2598" class='ln'>2598</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2598" class='ln'>2598</a></td><td>    <a id="2598c5" class="tk">-</a> (<a id="2598c8" class="tk">int16_T</a>)((<a id="2598c18" class="tk">rtb_UnitDelay1_ko</a>[1] <a id="2598c39" class="tk">*</a> <a id="2598c41" class="tk">rtConstP</a>.<a id="2598c50" class="tk">pooled12</a>[<a id="2598c59" class="tk">rtb_Divide_d</a>]) <a id="2598c74" class="tk">&gt;&gt;</a> 14);</td></tr>
 <tr name="2599" id="2599">
-<td><a id="l2599" class='ln'>2599</a></td><td></td></tr>
+<td><a id="l2599" class='ln'>2599</a></td><td>  <span class="kw">if</span> (<a id="2599c7" class="tk">tmp</a> <a id="2599c11" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="2600" id="2600">
-<td><a id="l2600" class='ln'>2600</a></td><td>  <span class="ct">/* Product: '&lt;S51&gt;/Divide' incorporates:</span></td></tr>
+<td><a id="l2600" class='ln'>2600</a></td><td>    <a id="2600c5" class="tk">tmp</a> = 32767;</td></tr>
 <tr name="2601" id="2601">
-<td><a id="l2601" class='ln'>2601</a></td><td><span class="ct">   *  Math: '&lt;S51&gt;/Math Function1'</span></td></tr>
+<td><a id="l2601" class='ln'>2601</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2602" id="2602">
-<td><a id="l2602" class='ln'>2602</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2602" class='ln'>2602</a></td><td>    <span class="kw">if</span> (<a id="2602c9" class="tk">tmp</a> <a id="2602c13" class="tk">&lt;</a> <a id="2602c15" class="tk">-</a>32768) <span class="br">{</span></td></tr>
 <tr name="2603" id="2603">
-<td><a id="l2603" class='ln'>2603</a></td><td><span class="ct">   *  Sum: '&lt;S51&gt;/Sum of Elements'</span></td></tr>
+<td><a id="l2603" class='ln'>2603</a></td><td>      <a id="2603c7" class="tk">tmp</a> = <a id="2603c13" class="tk">-</a>32768;</td></tr>
 <tr name="2604" id="2604">
-<td><a id="l2604" class='ln'>2604</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2604" class='ln'>2604</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2605" id="2605">
-<td><a id="l2605" class='ln'>2605</a></td><td>  <a id="2605c3" class="tk">tmp_2</a> = ((<a id="2605c13" class="tk">int64_T</a>)(<a id="2605c22" class="tk">int32_T</a>)<a id="2605c30" class="tk">tmp_2</a> <a id="2605c36" class="tk">&lt;&lt;</a> 14) <a id="2605c43" class="tk">/</a> ((<a id="2605c47" class="tk">rtb_Sum6_p</a> <a id="2605c58" class="tk">*</a> <a id="2605c60" class="tk">rtb_Sum6_p</a>) <a id="2605c72" class="tk">&gt;&gt;</a> 4);</td></tr>
+<td><a id="l2605" class='ln'>2605</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2606" id="2606">
-<td><a id="l2606" class='ln'>2606</a></td><td>  <span class="kw">if</span> (<a id="2606c7" class="tk">tmp_2</a> <a id="2606c13" class="tk">&lt;</a> 0LL) <span class="br">{</span></td></tr>
+<td><a id="l2606" class='ln'>2606</a></td><td></td></tr>
 <tr name="2607" id="2607">
-<td><a id="l2607" class='ln'>2607</a></td><td>    <a id="2607c5" class="tk">tmp_2</a> = 0LL;</td></tr>
+<td><a id="l2607" class='ln'>2607</a></td><td>  <span class="ct">/* Product: '&lt;S53&gt;/Divide7' incorporates:</span></td></tr>
 <tr name="2608" id="2608">
-<td><a id="l2608" class='ln'>2608</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2608" class='ln'>2608</a></td><td><span class="ct">   *  Constant: '&lt;S53&gt;/Constant3'</span></td></tr>
 <tr name="2609" id="2609">
-<td><a id="l2609" class='ln'>2609</a></td><td>    <span class="kw">if</span> (<a id="2609c9" class="tk">tmp_2</a> <a id="2609c15" class="tk">&gt;</a> 65535LL) <span class="br">{</span></td></tr>
+<td><a id="l2609" class='ln'>2609</a></td><td><span class="ct">   *  Sum: '&lt;S52&gt;/Sum1'</span></td></tr>
 <tr name="2610" id="2610">
-<td><a id="l2610" class='ln'>2610</a></td><td>      <a id="2610c7" class="tk">tmp_2</a> = 65535LL;</td></tr>
+<td><a id="l2610" class='ln'>2610</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2611" id="2611">
-<td><a id="l2611" class='ln'>2611</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2611" class='ln'>2611</a></td><td>  <a id="2611c3" class="tk">rtb_Switch2_pl</a> = (<a id="2611c21" class="tk">int16_T</a>)((2365 <a id="2611c36" class="tk">*</a> (<a id="2611c39" class="tk">int16_T</a>)<a id="2611c47" class="tk">rtb_Divide_e_idx_2</a>) <a id="2611c67" class="tk">&gt;&gt;</a> 11);</td></tr>
 <tr name="2612" id="2612">
-<td><a id="l2612" class='ln'>2612</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2612" class='ln'>2612</a></td><td></td></tr>
 <tr name="2613" id="2613">
-<td><a id="l2613" class='ln'>2613</a></td><td></td></tr>
+<td><a id="l2613" class='ln'>2613</a></td><td>  <span class="ct">/* MATLAB Function: '&lt;S53&gt;/sector_select' incorporates:</span></td></tr>
 <tr name="2614" id="2614">
-<td><a id="l2614" class='ln'>2614</a></td><td>  <span class="ct">/* Sqrt: '&lt;S51&gt;/Sqrt' incorporates:</span></td></tr>
+<td><a id="l2614" class='ln'>2614</a></td><td><span class="ct">   *  Product: '&lt;S53&gt;/Divide7'</span></td></tr>
 <tr name="2615" id="2615">
-<td><a id="l2615" class='ln'>2615</a></td><td><span class="ct">   *  Product: '&lt;S51&gt;/Divide'</span></td></tr>
+<td><a id="l2615" class='ln'>2615</a></td><td><span class="ct">   *  Sum: '&lt;S52&gt;/Sum1'</span></td></tr>
 <tr name="2616" id="2616">
-<td><a id="l2616" class='ln'>2616</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2616" class='ln'>2616</a></td><td><span class="ct">   *  Sum: '&lt;S52&gt;/Sum6'</span></td></tr>
 <tr name="2617" id="2617">
-<td><a id="l2617" class='ln'>2617</a></td><td>  <a id="2617c3" class="tk">rtb_BitwiseOperator2</a> = <a id="2617c26" class="tk">rt_sqrt_Uu16En14_Yu16E_WMwW1mku</a>((<a id="2617c59" class="tk">uint16_T</a>)<a id="2617c68" class="tk">tmp_2</a>);</td></tr>
+<td><a id="l2617" class='ln'>2617</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2618" id="2618">
-<td><a id="l2618" class='ln'>2618</a></td><td></td></tr>
+<td><a id="l2618" class='ln'>2618</a></td><td>  <span class="kw">if</span> ((<a id="2618c8" class="tk">int16_T</a>)<a id="2618c16" class="tk">rtb_Divide_e_idx_2</a> <a id="2618c35" class="tk">&gt;=</a> 0) <span class="br">{</span></td></tr>
 <tr name="2619" id="2619">
-<td><a id="l2619" class='ln'>2619</a></td><td>  <span class="ct">/* Switch: '&lt;S51&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2619" class='ln'>2619</a></td><td>    <span class="kw">if</span> ((<a id="2619c10" class="tk">int16_T</a>)<a id="2619c18" class="tk">tmp</a> <a id="2619c22" class="tk">&gt;=</a> 0) <span class="br">{</span></td></tr>
 <tr name="2620" id="2620">
-<td><a id="l2620" class='ln'>2620</a></td><td><span class="ct">   *  Merge: '&lt;S54&gt;/Merge'</span></td></tr>
+<td><a id="l2620" class='ln'>2620</a></td><td>      <span class="kw">if</span> (<a id="2620c11" class="tk">rtb_Switch2_pl</a> <a id="2620c26" class="tk">&gt;</a> ((<a id="2620c30" class="tk">int16_T</a>)<a id="2620c38" class="tk">tmp</a> <a id="2620c42" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
 <tr name="2621" id="2621">
-<td><a id="l2621" class='ln'>2621</a></td><td><span class="ct">   *  Sqrt: '&lt;S51&gt;/Sqrt'</span></td></tr>
+<td><a id="l2621" class='ln'>2621</a></td><td>        <span class="ct">/* DataTypeConversion: '&lt;S53&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="2622" id="2622">
-<td><a id="l2622" class='ln'>2622</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2622" class='ln'>2622</a></td><td>        <a id="2622c9" class="tk">rtb_DataTypeConversion_e</a> = 2U;</td></tr>
 <tr name="2623" id="2623">
-<td><a id="l2623" class='ln'>2623</a></td><td>  <span class="kw">if</span> (<a id="2623c7" class="tk">rtb_BitwiseOperator2</a> <a id="2623c28" class="tk">&gt;</a> 16384) <span class="br">{</span></td></tr>
+<td><a id="l2623" class='ln'>2623</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2624" id="2624">
-<td><a id="l2624" class='ln'>2624</a></td><td>    <span class="ct">/* Switch: '&lt;S51&gt;/Switch' incorporates:</span></td></tr>
+<td><a id="l2624" class='ln'>2624</a></td><td>        <span class="ct">/* DataTypeConversion: '&lt;S53&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="2625" id="2625">
-<td><a id="l2625" class='ln'>2625</a></td><td><span class="ct">     *  Merge: '&lt;S54&gt;/Merge'</span></td></tr>
+<td><a id="l2625" class='ln'>2625</a></td><td>        <a id="2625c9" class="tk">rtb_DataTypeConversion_e</a> = 1U;</td></tr>
 <tr name="2626" id="2626">
-<td><a id="l2626" class='ln'>2626</a></td><td><span class="ct">     *  MultiPortSwitch: '&lt;S51&gt;/Multiport Switch'</span></td></tr>
+<td><a id="l2626" class='ln'>2626</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="2627" id="2627">
-<td><a id="l2627" class='ln'>2627</a></td><td><span class="ct">     *  Product: '&lt;S51&gt;/Divide1'</span></td></tr>
+<td><a id="l2627" class='ln'>2627</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2628" id="2628">
-<td><a id="l2628" class='ln'>2628</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2628" class='ln'>2628</a></td><td>      <a id="2628c7" class="tk">rtb_Gain_b</a> = <a id="2628c20" class="tk">-</a><a id="2628c21" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2629" id="2629">
-<td><a id="l2629" class='ln'>2629</a></td><td>    <a id="2629c5" class="tk">rtb_Switch_f2_idx_0</a> = (<a id="2629c28" class="tk">int16_T</a>)((<a id="2629c38" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[0] <a id="2629c73" class="tk">&lt;&lt;</a> 14) <a id="2629c80" class="tk">/</a></td></tr>
+<td><a id="l2629" class='ln'>2629</a></td><td>      <span class="kw">if</span> (<a id="2629c11" class="tk">-</a><a id="2629c12" class="tk">rtb_Switch2_pl</a> <a id="2629c27" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="2630" id="2630">
-<td><a id="l2630" class='ln'>2630</a></td><td>      <a id="2630c7" class="tk">rtb_BitwiseOperator2</a>);</td></tr>
+<td><a id="l2630" class='ln'>2630</a></td><td>        <a id="2630c9" class="tk">rtb_Gain_b</a> = 32767;</td></tr>
 <tr name="2631" id="2631">
-<td><a id="l2631" class='ln'>2631</a></td><td>    <a id="2631c5" class="tk">rtb_Switch_f2_idx_1</a> = (<a id="2631c28" class="tk">int16_T</a>)((<a id="2631c38" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1] <a id="2631c73" class="tk">&lt;&lt;</a> 14) <a id="2631c80" class="tk">/</a></td></tr>
+<td><a id="l2631" class='ln'>2631</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="2632" id="2632">
-<td><a id="l2632" class='ln'>2632</a></td><td>      <a id="2632c7" class="tk">rtb_BitwiseOperator2</a>);</td></tr>
+<td><a id="l2632" class='ln'>2632</a></td><td></td></tr>
 <tr name="2633" id="2633">
-<td><a id="l2633" class='ln'>2633</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2633" class='ln'>2633</a></td><td>      <span class="kw">if</span> (<a id="2633c11" class="tk">rtb_Gain_b</a> <a id="2633c22" class="tk">&gt;</a> ((<a id="2633c26" class="tk">int16_T</a>)<a id="2633c34" class="tk">tmp</a> <a id="2633c38" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
 <tr name="2634" id="2634">
-<td><a id="l2634" class='ln'>2634</a></td><td>    <a id="2634c5" class="tk">rtb_Switch_f2_idx_0</a> = <a id="2634c27" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[0];</td></tr>
+<td><a id="l2634" class='ln'>2634</a></td><td>        <span class="ct">/* DataTypeConversion: '&lt;S53&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="2635" id="2635">
-<td><a id="l2635" class='ln'>2635</a></td><td>    <a id="2635c5" class="tk">rtb_Switch_f2_idx_1</a> = <a id="2635c27" class="tk">rtb_TmpSignalConversionAtLow_Pa</a>[1];</td></tr>
+<td><a id="l2635" class='ln'>2635</a></td><td>        <a id="2635c9" class="tk">rtb_DataTypeConversion_e</a> = 3U;</td></tr>
 <tr name="2636" id="2636">
-<td><a id="l2636" class='ln'>2636</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2636" class='ln'>2636</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2637" id="2637">
-<td><a id="l2637" class='ln'>2637</a></td><td></td></tr>
+<td><a id="l2637" class='ln'>2637</a></td><td>        <span class="ct">/* DataTypeConversion: '&lt;S53&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="2638" id="2638">
-<td><a id="l2638" class='ln'>2638</a></td><td>  <span class="ct">/* End of Switch: '&lt;S51&gt;/Switch' */</span></td></tr>
+<td><a id="l2638" class='ln'>2638</a></td><td>        <a id="2638c9" class="tk">rtb_DataTypeConversion_e</a> = 2U;</td></tr>
 <tr name="2639" id="2639">
-<td><a id="l2639" class='ln'>2639</a></td><td></td></tr>
+<td><a id="l2639" class='ln'>2639</a></td><td>      <span class="br">}</span></td></tr>
 <tr name="2640" id="2640">
-<td><a id="l2640" class='ln'>2640</a></td><td>  <span class="ct">/* Sum: '&lt;S60&gt;/Sum1' incorporates:</span></td></tr>
+<td><a id="l2640" class='ln'>2640</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2641" id="2641">
-<td><a id="l2641" class='ln'>2641</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S58&gt;/r_cos_M1'</span></td></tr>
+<td><a id="l2641" class='ln'>2641</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="2641c15" class="tk">int16_T</a>)<a id="2641c23" class="tk">tmp</a> <a id="2641c27" class="tk">&gt;=</a> 0) <span class="br">{</span></td></tr>
 <tr name="2642" id="2642">
-<td><a id="l2642" class='ln'>2642</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S58&gt;/r_sin_M1'</span></td></tr>
+<td><a id="l2642" class='ln'>2642</a></td><td>    <a id="2642c5" class="tk">rtb_Gain_b</a> = <a id="2642c18" class="tk">-</a><a id="2642c19" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2643" id="2643">
-<td><a id="l2643" class='ln'>2643</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide2'</span></td></tr>
+<td><a id="l2643" class='ln'>2643</a></td><td>    <span class="kw">if</span> (<a id="2643c9" class="tk">-</a><a id="2643c10" class="tk">rtb_Switch2_pl</a> <a id="2643c25" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
 <tr name="2644" id="2644">
-<td><a id="l2644" class='ln'>2644</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide3'</span></td></tr>
+<td><a id="l2644" class='ln'>2644</a></td><td>      <a id="2644c7" class="tk">rtb_Gain_b</a> = 32767;</td></tr>
 <tr name="2645" id="2645">
-<td><a id="l2645" class='ln'>2645</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2645" class='ln'>2645</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2646" id="2646">
-<td><a id="l2646" class='ln'>2646</a></td><td>  <a id="2646c3" class="tk">tmp_0</a> = (<a id="2646c12" class="tk">int16_T</a>)((<a id="2646c22" class="tk">rtb_Switch_f2_idx_0</a> <a id="2646c42" class="tk">*</a> <a id="2646c44" class="tk">rtConstP</a>.<a id="2646c53" class="tk">pooled8</a>[<a id="2646c61" class="tk">rtb_LogicalOperator3</a>])</td></tr>
+<td><a id="l2646" class='ln'>2646</a></td><td></td></tr>
 <tr name="2647" id="2647">
-<td><a id="l2647" class='ln'>2647</a></td><td>                    <a id="2647c21" class="tk">&gt;&gt;</a> 14) <a id="2647c28" class="tk">+</a> (<a id="2647c31" class="tk">int16_T</a>)((<a id="2647c41" class="tk">rtb_Switch_f2_idx_1</a> <a id="2647c61" class="tk">*</a></td></tr>
+<td><a id="l2647" class='ln'>2647</a></td><td>    <span class="kw">if</span> (<a id="2647c9" class="tk">rtb_Gain_b</a> <a id="2647c20" class="tk">&gt;</a> ((<a id="2647c24" class="tk">int16_T</a>)<a id="2647c32" class="tk">tmp</a> <a id="2647c36" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
 <tr name="2648" id="2648">
-<td><a id="l2648" class='ln'>2648</a></td><td>    <a id="2648c5" class="tk">rtConstP</a>.<a id="2648c14" class="tk">pooled9</a>[<a id="2648c22" class="tk">rtb_LogicalOperator3</a>]) <a id="2648c45" class="tk">&gt;&gt;</a> 14);</td></tr>
+<td><a id="l2648" class='ln'>2648</a></td><td>      <span class="ct">/* DataTypeConversion: '&lt;S53&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="2649" id="2649">
-<td><a id="l2649" class='ln'>2649</a></td><td>  <span class="kw">if</span> (<a id="2649c7" class="tk">tmp_0</a> <a id="2649c13" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l2649" class='ln'>2649</a></td><td>      <a id="2649c7" class="tk">rtb_DataTypeConversion_e</a> = 5U;</td></tr>
 <tr name="2650" id="2650">
-<td><a id="l2650" class='ln'>2650</a></td><td>    <a id="2650c5" class="tk">tmp_0</a> = 32767;</td></tr>
+<td><a id="l2650" class='ln'>2650</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2651" id="2651">
-<td><a id="l2651" class='ln'>2651</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2651" class='ln'>2651</a></td><td>      <span class="ct">/* DataTypeConversion: '&lt;S53&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="2652" id="2652">
-<td><a id="l2652" class='ln'>2652</a></td><td>    <span class="kw">if</span> (<a id="2652c9" class="tk">tmp_0</a> <a id="2652c15" class="tk">&lt;</a> <a id="2652c17" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l2652" class='ln'>2652</a></td><td>      <a id="2652c7" class="tk">rtb_DataTypeConversion_e</a> = 6U;</td></tr>
 <tr name="2653" id="2653">
-<td><a id="l2653" class='ln'>2653</a></td><td>      <a id="2653c7" class="tk">tmp_0</a> = <a id="2653c15" class="tk">-</a>32768;</td></tr>
+<td><a id="l2653" class='ln'>2653</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="2654" id="2654">
-<td><a id="l2654" class='ln'>2654</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2654" class='ln'>2654</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="2654c14" class="tk">rtb_Switch2_pl</a> <a id="2654c29" class="tk">&gt;</a> ((<a id="2654c33" class="tk">int16_T</a>)<a id="2654c41" class="tk">tmp</a> <a id="2654c45" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
 <tr name="2655" id="2655">
-<td><a id="l2655" class='ln'>2655</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2655" class='ln'>2655</a></td><td>    <span class="ct">/* DataTypeConversion: '&lt;S53&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="2656" id="2656">
-<td><a id="l2656" class='ln'>2656</a></td><td></td></tr>
+<td><a id="l2656" class='ln'>2656</a></td><td>    <a id="2656c5" class="tk">rtb_DataTypeConversion_e</a> = 4U;</td></tr>
 <tr name="2657" id="2657">
-<td><a id="l2657" class='ln'>2657</a></td><td>  <span class="ct">/* Sum: '&lt;S60&gt;/Sum6' incorporates:</span></td></tr>
+<td><a id="l2657" class='ln'>2657</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2658" id="2658">
-<td><a id="l2658" class='ln'>2658</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S58&gt;/r_cos_M1'</span></td></tr>
+<td><a id="l2658" class='ln'>2658</a></td><td>    <span class="ct">/* DataTypeConversion: '&lt;S53&gt;/Data Type Conversion' */</span></td></tr>
 <tr name="2659" id="2659">
-<td><a id="l2659" class='ln'>2659</a></td><td><span class="ct">   *  Interpolation_n-D: '&lt;S58&gt;/r_sin_M1'</span></td></tr>
+<td><a id="l2659" class='ln'>2659</a></td><td>    <a id="2659c5" class="tk">rtb_DataTypeConversion_e</a> = 5U;</td></tr>
 <tr name="2660" id="2660">
-<td><a id="l2660" class='ln'>2660</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide1'</span></td></tr>
+<td><a id="l2660" class='ln'>2660</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2661" id="2661">
-<td><a id="l2661" class='ln'>2661</a></td><td><span class="ct">   *  Product: '&lt;S60&gt;/Divide4'</span></td></tr>
+<td><a id="l2661" class='ln'>2661</a></td><td></td></tr>
 <tr name="2662" id="2662">
-<td><a id="l2662" class='ln'>2662</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2662" class='ln'>2662</a></td><td>  <span class="ct">/* End of MATLAB Function: '&lt;S53&gt;/sector_select' */</span></td></tr>
 <tr name="2663" id="2663">
-<td><a id="l2663" class='ln'>2663</a></td><td>  <a id="2663c3" class="tk">tmp</a> = (<a id="2663c10" class="tk">int16_T</a>)((<a id="2663c20" class="tk">rtb_Switch_f2_idx_0</a> <a id="2663c40" class="tk">*</a> <a id="2663c42" class="tk">rtConstP</a>.<a id="2663c51" class="tk">pooled9</a>[<a id="2663c59" class="tk">rtb_LogicalOperator3</a>])</td></tr>
+<td><a id="l2663" class='ln'>2663</a></td><td></td></tr>
 <tr name="2664" id="2664">
-<td><a id="l2664" class='ln'>2664</a></td><td>                  <a id="2664c19" class="tk">&gt;&gt;</a> 14) <a id="2664c26" class="tk">-</a> (<a id="2664c29" class="tk">int16_T</a>)((<a id="2664c39" class="tk">rtb_Switch_f2_idx_1</a> <a id="2664c59" class="tk">*</a></td></tr>
+<td><a id="l2664" class='ln'>2664</a></td><td>  <span class="ct">/* Gain: '&lt;S53&gt;/Gain' incorporates:</span></td></tr>
 <tr name="2665" id="2665">
-<td><a id="l2665" class='ln'>2665</a></td><td>    <a id="2665c5" class="tk">rtConstP</a>.<a id="2665c14" class="tk">pooled8</a>[<a id="2665c22" class="tk">rtb_LogicalOperator3</a>]) <a id="2665c45" class="tk">&gt;&gt;</a> 14);</td></tr>
+<td><a id="l2665" class='ln'>2665</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/vDC'</span></td></tr>
 <tr name="2666" id="2666">
-<td><a id="l2666" class='ln'>2666</a></td><td>  <span class="kw">if</span> (<a id="2666c7" class="tk">tmp</a> <a id="2666c11" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l2666" class='ln'>2666</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2667" id="2667">
-<td><a id="l2667" class='ln'>2667</a></td><td>    <a id="2667c5" class="tk">tmp</a> = 32767;</td></tr>
+<td><a id="l2667" class='ln'>2667</a></td><td>  <a id="2667c3" class="tk">rtb_Gain_b</a> = 18919 <a id="2667c22" class="tk">*</a> <a id="2667c24" class="tk">rtU</a>-&gt;<a id="2667c29" class="tk">vDC</a>;</td></tr>
 <tr name="2668" id="2668">
-<td><a id="l2668" class='ln'>2668</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2668" class='ln'>2668</a></td><td></td></tr>
 <tr name="2669" id="2669">
-<td><a id="l2669" class='ln'>2669</a></td><td>    <span class="kw">if</span> (<a id="2669c9" class="tk">tmp</a> <a id="2669c13" class="tk">&lt;</a> <a id="2669c15" class="tk">-</a>32768) <span class="br">{</span></td></tr>
+<td><a id="l2669" class='ln'>2669</a></td><td>  <span class="ct">/* Product: '&lt;S53&gt;/Divide' incorporates:</span></td></tr>
 <tr name="2670" id="2670">
-<td><a id="l2670" class='ln'>2670</a></td><td>      <a id="2670c7" class="tk">tmp</a> = <a id="2670c13" class="tk">-</a>32768;</td></tr>
+<td><a id="l2670" class='ln'>2670</a></td><td><span class="ct">   *  Gain: '&lt;S53&gt;/Gain'</span></td></tr>
 <tr name="2671" id="2671">
-<td><a id="l2671" class='ln'>2671</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2671" class='ln'>2671</a></td><td><span class="ct">   *  Sum: '&lt;S52&gt;/Sum6'</span></td></tr>
 <tr name="2672" id="2672">
-<td><a id="l2672" class='ln'>2672</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2672" class='ln'>2672</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2673" id="2673">
-<td><a id="l2673" class='ln'>2673</a></td><td></td></tr>
+<td><a id="l2673" class='ln'>2673</a></td><td>  <a id="2673c3" class="tk">rtb_Sum6</a> = (<a id="2673c15" class="tk">int16_T</a>)(((<a id="2673c26" class="tk">int64_T</a>)(<a id="2673c35" class="tk">int16_T</a>)<a id="2673c43" class="tk">tmp</a> <a id="2673c47" class="tk">&lt;&lt;</a> 26) <a id="2673c54" class="tk">/</a> <a id="2673c56" class="tk">rtb_Gain_b</a>);</td></tr>
 <tr name="2674" id="2674">
-<td><a id="l2674" class='ln'>2674</a></td><td>  <span class="ct">/* Product: '&lt;S61&gt;/Divide7' incorporates:</span></td></tr>
+<td><a id="l2674" class='ln'>2674</a></td><td></td></tr>
 <tr name="2675" id="2675">
-<td><a id="l2675" class='ln'>2675</a></td><td><span class="ct">   *  Constant: '&lt;S61&gt;/Constant3'</span></td></tr>
+<td><a id="l2675" class='ln'>2675</a></td><td>  <span class="ct">/* Product: '&lt;S53&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="2676" id="2676">
-<td><a id="l2676" class='ln'>2676</a></td><td><span class="ct">   *  Sum: '&lt;S60&gt;/Sum1'</span></td></tr>
+<td><a id="l2676" class='ln'>2676</a></td><td><span class="ct">   *  Gain: '&lt;S53&gt;/Gain'</span></td></tr>
 <tr name="2677" id="2677">
-<td><a id="l2677" class='ln'>2677</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2677" class='ln'>2677</a></td><td><span class="ct">   *  Sum: '&lt;S52&gt;/Sum1'</span></td></tr>
 <tr name="2678" id="2678">
-<td><a id="l2678" class='ln'>2678</a></td><td>  <a id="2678c3" class="tk">rtb_Sum6_p</a> = (<a id="2678c17" class="tk">int16_T</a>)((2365 <a id="2678c32" class="tk">*</a> (<a id="2678c35" class="tk">int16_T</a>)<a id="2678c43" class="tk">tmp_0</a>) <a id="2678c50" class="tk">&gt;&gt;</a> 11);</td></tr>
+<td><a id="l2678" class='ln'>2678</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2679" id="2679">
-<td><a id="l2679" class='ln'>2679</a></td><td></td></tr>
+<td><a id="l2679" class='ln'>2679</a></td><td>  <a id="2679c3" class="tk">rtb_Sum1_ak</a> = (<a id="2679c18" class="tk">int16_T</a>)(((<a id="2679c29" class="tk">int64_T</a>)(<a id="2679c38" class="tk">int16_T</a>)<a id="2679c46" class="tk">rtb_Divide_e_idx_2</a> <a id="2679c65" class="tk">&lt;&lt;</a> 26) <a id="2679c72" class="tk">/</a></td></tr>
 <tr name="2680" id="2680">
-<td><a id="l2680" class='ln'>2680</a></td><td>  <span class="ct">/* MATLAB Function: '&lt;S61&gt;/sector_select' incorporates:</span></td></tr>
+<td><a id="l2680" class='ln'>2680</a></td><td>    <a id="2680c5" class="tk">rtb_Gain_b</a>);</td></tr>
 <tr name="2681" id="2681">
-<td><a id="l2681" class='ln'>2681</a></td><td><span class="ct">   *  Product: '&lt;S61&gt;/Divide7'</span></td></tr>
+<td><a id="l2681" class='ln'>2681</a></td><td></td></tr>
 <tr name="2682" id="2682">
-<td><a id="l2682" class='ln'>2682</a></td><td><span class="ct">   *  Sum: '&lt;S60&gt;/Sum1'</span></td></tr>
+<td><a id="l2682" class='ln'>2682</a></td><td>  <span class="ct">/* MultiPortSwitch: '&lt;S54&gt;/Multiport Switch' incorporates:</span></td></tr>
 <tr name="2683" id="2683">
-<td><a id="l2683" class='ln'>2683</a></td><td><span class="ct">   *  Sum: '&lt;S60&gt;/Sum6'</span></td></tr>
+<td><a id="l2683" class='ln'>2683</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion1'</span></td></tr>
 <tr name="2684" id="2684">
 <td><a id="l2684" class='ln'>2684</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2685" id="2685">
-<td><a id="l2685" class='ln'>2685</a></td><td>  <span class="kw">if</span> ((<a id="2685c8" class="tk">int16_T</a>)<a id="2685c16" class="tk">tmp_0</a> <a id="2685c22" class="tk">&gt;=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2685" class='ln'>2685</a></td><td>  <span class="kw">switch</span> (<a id="2685c11" class="tk">rtb_DataTypeConversion_e</a>) <span class="br">{</span></td></tr>
 <tr name="2686" id="2686">
-<td><a id="l2686" class='ln'>2686</a></td><td>    <span class="kw">if</span> ((<a id="2686c10" class="tk">int16_T</a>)<a id="2686c18" class="tk">tmp</a> <a id="2686c22" class="tk">&gt;=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2686" class='ln'>2686</a></td><td>   <span class="kw">case</span> 1<a id="2686c10" class="tk">:</a></td></tr>
 <tr name="2687" id="2687">
-<td><a id="l2687" class='ln'>2687</a></td><td>      <span class="kw">if</span> (<a id="2687c11" class="tk">rtb_Sum6_p</a> <a id="2687c22" class="tk">&gt;</a> ((<a id="2687c26" class="tk">int16_T</a>)<a id="2687c34" class="tk">tmp</a> <a id="2687c38" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
+<td><a id="l2687" class='ln'>2687</a></td><td>    <span class="ct">/* Product: '&lt;S56&gt;/Divide3' incorporates:</span></td></tr>
 <tr name="2688" id="2688">
-<td><a id="l2688" class='ln'>2688</a></td><td>        <span class="ct">/* DataTypeConversion: '&lt;S61&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l2688" class='ln'>2688</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2689" id="2689">
-<td><a id="l2689" class='ln'>2689</a></td><td>        <a id="2689c9" class="tk">rtb_DataTypeConversion_j</a> = 2U;</td></tr>
+<td><a id="l2689" class='ln'>2689</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2690" id="2690">
-<td><a id="l2690" class='ln'>2690</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2690" class='ln'>2690</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2691" id="2691">
-<td><a id="l2691" class='ln'>2691</a></td><td>        <span class="ct">/* DataTypeConversion: '&lt;S61&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l2691" class='ln'>2691</a></td><td><span class="ct">     *  Product: '&lt;S56&gt;/Divide2'</span></td></tr>
 <tr name="2692" id="2692">
-<td><a id="l2692" class='ln'>2692</a></td><td>        <a id="2692c9" class="tk">rtb_DataTypeConversion_j</a> = 1U;</td></tr>
+<td><a id="l2692" class='ln'>2692</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2693" id="2693">
-<td><a id="l2693" class='ln'>2693</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2693" class='ln'>2693</a></td><td>    <a id="2693c5" class="tk">rtb_Divide3_k</a> = (<a id="2693c22" class="tk">int16_T</a>)(((<a id="2693c33" class="tk">int16_T</a>)((<a id="2693c43" class="tk">rtb_Sum1_ak</a> <a id="2693c55" class="tk">*</a> 9459) <a id="2693c63" class="tk">&gt;&gt;</a> 13) <a id="2693c70" class="tk">*</a> (<a id="2693c73" class="tk">int16_T</a>)</td></tr>
 <tr name="2694" id="2694">
-<td><a id="l2694" class='ln'>2694</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2694" class='ln'>2694</a></td><td>      <a id="2694c7" class="tk">rtP</a>.<a id="2694c11" class="tk">i_pwm_count</a>) <a id="2694c24" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2695" id="2695">
-<td><a id="l2695" class='ln'>2695</a></td><td>      <a id="2695c7" class="tk">rtb_Gain_p2</a> = <a id="2695c21" class="tk">-</a><a id="2695c22" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2695" class='ln'>2695</a></td><td></td></tr>
 <tr name="2696" id="2696">
-<td><a id="l2696" class='ln'>2696</a></td><td>      <span class="kw">if</span> (<a id="2696c11" class="tk">-</a><a id="2696c12" class="tk">rtb_Sum6_p</a> <a id="2696c23" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l2696" class='ln'>2696</a></td><td>    <span class="ct">/* Product: '&lt;S56&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="2697" id="2697">
-<td><a id="l2697" class='ln'>2697</a></td><td>        <a id="2697c9" class="tk">rtb_Gain_p2</a> = 32767;</td></tr>
+<td><a id="l2697" class='ln'>2697</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2698" id="2698">
-<td><a id="l2698" class='ln'>2698</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2698" class='ln'>2698</a></td><td><span class="ct">     *  Constant: '&lt;S56&gt;/Constant'</span></td></tr>
 <tr name="2699" id="2699">
-<td><a id="l2699" class='ln'>2699</a></td><td></td></tr>
+<td><a id="l2699" class='ln'>2699</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2700" id="2700">
-<td><a id="l2700" class='ln'>2700</a></td><td>      <span class="kw">if</span> (<a id="2700c11" class="tk">rtb_Gain_p2</a> <a id="2700c23" class="tk">&gt;</a> ((<a id="2700c27" class="tk">int16_T</a>)<a id="2700c35" class="tk">tmp</a> <a id="2700c39" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
+<td><a id="l2700" class='ln'>2700</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide'</span></td></tr>
 <tr name="2701" id="2701">
-<td><a id="l2701" class='ln'>2701</a></td><td>        <span class="ct">/* DataTypeConversion: '&lt;S61&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l2701" class='ln'>2701</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2702" id="2702">
-<td><a id="l2702" class='ln'>2702</a></td><td>        <a id="2702c9" class="tk">rtb_DataTypeConversion_j</a> = 3U;</td></tr>
+<td><a id="l2702" class='ln'>2702</a></td><td><span class="ct">     *  Product: '&lt;S56&gt;/Divide'</span></td></tr>
 <tr name="2703" id="2703">
-<td><a id="l2703" class='ln'>2703</a></td><td>      <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2703" class='ln'>2703</a></td><td><span class="ct">     *  Sum: '&lt;S56&gt;/Add'</span></td></tr>
 <tr name="2704" id="2704">
-<td><a id="l2704" class='ln'>2704</a></td><td>        <span class="ct">/* DataTypeConversion: '&lt;S61&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l2704" class='ln'>2704</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2705" id="2705">
-<td><a id="l2705" class='ln'>2705</a></td><td>        <a id="2705c9" class="tk">rtb_DataTypeConversion_j</a> = 2U;</td></tr>
+<td><a id="l2705" class='ln'>2705</a></td><td>    <a id="2705c5" class="tk">rtb_Sum1_ak</a> = (<a id="2705c20" class="tk">int16_T</a>)(((<a id="2705c31" class="tk">int16_T</a>)(<a id="2705c40" class="tk">rtb_Sum6</a> <a id="2705c49" class="tk">-</a> ((<a id="2705c53" class="tk">rtb_Sum1_ak</a> <a id="2705c65" class="tk">*</a> 9459) <a id="2705c73" class="tk">&gt;&gt;</a> 14)) <a id="2705c81" class="tk">*</a></td></tr>
 <tr name="2706" id="2706">
-<td><a id="l2706" class='ln'>2706</a></td><td>      <span class="br">}</span></td></tr>
+<td><a id="l2706" class='ln'>2706</a></td><td>      (<a id="2706c8" class="tk">int16_T</a>)<a id="2706c16" class="tk">rtP</a>.<a id="2706c20" class="tk">i_pwm_count</a>) <a id="2706c33" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2707" id="2707">
-<td><a id="l2707" class='ln'>2707</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2707" class='ln'>2707</a></td><td></td></tr>
 <tr name="2708" id="2708">
-<td><a id="l2708" class='ln'>2708</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> ((<a id="2708c15" class="tk">int16_T</a>)<a id="2708c23" class="tk">tmp</a> <a id="2708c27" class="tk">&gt;=</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l2708" class='ln'>2708</a></td><td>    <span class="ct">/* Product: '&lt;S56&gt;/Divide4' incorporates:</span></td></tr>
 <tr name="2709" id="2709">
-<td><a id="l2709" class='ln'>2709</a></td><td>    <a id="2709c5" class="tk">rtb_Gain_p2</a> = <a id="2709c19" class="tk">-</a><a id="2709c20" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2709" class='ln'>2709</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2710" id="2710">
-<td><a id="l2710" class='ln'>2710</a></td><td>    <span class="kw">if</span> (<a id="2710c9" class="tk">-</a><a id="2710c10" class="tk">rtb_Sum6_p</a> <a id="2710c21" class="tk">&gt;</a> 32767) <span class="br">{</span></td></tr>
+<td><a id="l2710" class='ln'>2710</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2711" id="2711">
-<td><a id="l2711" class='ln'>2711</a></td><td>      <a id="2711c7" class="tk">rtb_Gain_p2</a> = 32767;</td></tr>
+<td><a id="l2711" class='ln'>2711</a></td><td><span class="ct">     *  Sum: '&lt;S56&gt;/Add1'</span></td></tr>
 <tr name="2712" id="2712">
-<td><a id="l2712" class='ln'>2712</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2712" class='ln'>2712</a></td><td><span class="ct">     *  Sum: '&lt;S56&gt;/Add2'</span></td></tr>
 <tr name="2713" id="2713">
-<td><a id="l2713" class='ln'>2713</a></td><td></td></tr>
+<td><a id="l2713" class='ln'>2713</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2714" id="2714">
-<td><a id="l2714" class='ln'>2714</a></td><td>    <span class="kw">if</span> (<a id="2714c9" class="tk">rtb_Gain_p2</a> <a id="2714c21" class="tk">&gt;</a> ((<a id="2714c25" class="tk">int16_T</a>)<a id="2714c33" class="tk">tmp</a> <a id="2714c37" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
+<td><a id="l2714" class='ln'>2714</a></td><td>    <a id="2714c5" class="tk">rtb_Switch2_pl</a> = (<a id="2714c23" class="tk">int16_T</a>)((<a id="2714c33" class="tk">int16_T</a>)((<a id="2714c43" class="tk">int16_T</a>)((<a id="2714c53" class="tk">int16_T</a>)<a id="2714c61" class="tk">rtP</a>.<a id="2714c65" class="tk">i_pwm_count</a> <a id="2714c77" class="tk">-</a></td></tr>
 <tr name="2715" id="2715">
-<td><a id="l2715" class='ln'>2715</a></td><td>      <span class="ct">/* DataTypeConversion: '&lt;S61&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l2715" class='ln'>2715</a></td><td>      <a id="2715c7" class="tk">rtb_Sum1_ak</a>) <a id="2715c20" class="tk">-</a> <a id="2715c22" class="tk">rtb_Divide3_k</a>) <a id="2715c37" class="tk">&gt;&gt;</a> 1);</td></tr>
 <tr name="2716" id="2716">
-<td><a id="l2716" class='ln'>2716</a></td><td>      <a id="2716c7" class="tk">rtb_DataTypeConversion_j</a> = 5U;</td></tr>
+<td><a id="l2716" class='ln'>2716</a></td><td></td></tr>
 <tr name="2717" id="2717">
-<td><a id="l2717" class='ln'>2717</a></td><td>    <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2717" class='ln'>2717</a></td><td>    <span class="ct">/* Sum: '&lt;S56&gt;/Add3' */</span></td></tr>
 <tr name="2718" id="2718">
-<td><a id="l2718" class='ln'>2718</a></td><td>      <span class="ct">/* DataTypeConversion: '&lt;S61&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l2718" class='ln'>2718</a></td><td>    <a id="2718c5" class="tk">rtb_Sum6</a> = (<a id="2718c17" class="tk">int16_T</a>)(<a id="2718c26" class="tk">rtb_Switch2_pl</a> <a id="2718c41" class="tk">+</a> <a id="2718c43" class="tk">rtb_Divide3_k</a>);</td></tr>
 <tr name="2719" id="2719">
-<td><a id="l2719" class='ln'>2719</a></td><td>      <a id="2719c7" class="tk">rtb_DataTypeConversion_j</a> = 6U;</td></tr>
+<td><a id="l2719" class='ln'>2719</a></td><td></td></tr>
 <tr name="2720" id="2720">
-<td><a id="l2720" class='ln'>2720</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l2720" class='ln'>2720</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/n_Duty' incorporates:</span></td></tr>
 <tr name="2721" id="2721">
-<td><a id="l2721" class='ln'>2721</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="kw">if</span> (<a id="2721c14" class="tk">rtb_Sum6_p</a> <a id="2721c25" class="tk">&gt;</a> ((<a id="2721c29" class="tk">int16_T</a>)<a id="2721c37" class="tk">tmp</a> <a id="2721c41" class="tk">&lt;&lt;</a> 1)) <span class="br">{</span></td></tr>
+<td><a id="l2721" class='ln'>2721</a></td><td><span class="ct">     *  Sum: '&lt;S56&gt;/Add4'</span></td></tr>
 <tr name="2722" id="2722">
-<td><a id="l2722" class='ln'>2722</a></td><td>    <span class="ct">/* DataTypeConversion: '&lt;S61&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l2722" class='ln'>2722</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2723" id="2723">
-<td><a id="l2723" class='ln'>2723</a></td><td>    <a id="2723c5" class="tk">rtb_DataTypeConversion_j</a> = 4U;</td></tr>
+<td><a id="l2723" class='ln'>2723</a></td><td>    <a id="2723c5" class="tk">rtY</a>-&gt;<a id="2723c10" class="tk">n_Duty</a>[0] = (<a id="2723c23" class="tk">int16_T</a>)(<a id="2723c32" class="tk">rtb_Sum6</a> <a id="2723c41" class="tk">+</a> <a id="2723c43" class="tk">rtb_Sum1_ak</a>);</td></tr>
 <tr name="2724" id="2724">
-<td><a id="l2724" class='ln'>2724</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l2724" class='ln'>2724</a></td><td>    <a id="2724c5" class="tk">rtY</a>-&gt;<a id="2724c10" class="tk">n_Duty</a>[1] = <a id="2724c22" class="tk">rtb_Sum6</a>;</td></tr>
 <tr name="2725" id="2725">
-<td><a id="l2725" class='ln'>2725</a></td><td>    <span class="ct">/* DataTypeConversion: '&lt;S61&gt;/Data Type Conversion' */</span></td></tr>
+<td><a id="l2725" class='ln'>2725</a></td><td>    <a id="2725c5" class="tk">rtY</a>-&gt;<a id="2725c10" class="tk">n_Duty</a>[2] = <a id="2725c22" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2726" id="2726">
-<td><a id="l2726" class='ln'>2726</a></td><td>    <a id="2726c5" class="tk">rtb_DataTypeConversion_j</a> = 5U;</td></tr>
+<td><a id="l2726" class='ln'>2726</a></td><td>    <span class="kw">break</span>;</td></tr>
 <tr name="2727" id="2727">
-<td><a id="l2727" class='ln'>2727</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l2727" class='ln'>2727</a></td><td></td></tr>
 <tr name="2728" id="2728">
-<td><a id="l2728" class='ln'>2728</a></td><td></td></tr>
+<td><a id="l2728" class='ln'>2728</a></td><td>   <span class="kw">case</span> 2<a id="2728c10" class="tk">:</a></td></tr>
 <tr name="2729" id="2729">
-<td><a id="l2729" class='ln'>2729</a></td><td>  <span class="ct">/* End of MATLAB Function: '&lt;S61&gt;/sector_select' */</span></td></tr>
+<td><a id="l2729" class='ln'>2729</a></td><td>    <span class="ct">/* Product: '&lt;S57&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="2730" id="2730">
-<td><a id="l2730" class='ln'>2730</a></td><td></td></tr>
+<td><a id="l2730" class='ln'>2730</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2731" id="2731">
-<td><a id="l2731" class='ln'>2731</a></td><td>  <span class="ct">/* Gain: '&lt;S61&gt;/Gain' incorporates:</span></td></tr>
+<td><a id="l2731" class='ln'>2731</a></td><td><span class="ct">     *  Constant: '&lt;S57&gt;/Constant'</span></td></tr>
 <tr name="2732" id="2732">
-<td><a id="l2732" class='ln'>2732</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/vDC'</span></td></tr>
+<td><a id="l2732" class='ln'>2732</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2733" id="2733">
-<td><a id="l2733" class='ln'>2733</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2733" class='ln'>2733</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide'</span></td></tr>
 <tr name="2734" id="2734">
-<td><a id="l2734" class='ln'>2734</a></td><td>  <a id="2734c3" class="tk">rtb_Gain_p2</a> = 18919 <a id="2734c23" class="tk">*</a> <a id="2734c25" class="tk">rtU</a>-&gt;<a id="2734c30" class="tk">vDC</a>;</td></tr>
+<td><a id="l2734" class='ln'>2734</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2735" id="2735">
-<td><a id="l2735" class='ln'>2735</a></td><td></td></tr>
+<td><a id="l2735" class='ln'>2735</a></td><td><span class="ct">     *  Product: '&lt;S57&gt;/Divide'</span></td></tr>
 <tr name="2736" id="2736">
-<td><a id="l2736" class='ln'>2736</a></td><td>  <span class="ct">/* Product: '&lt;S61&gt;/Divide' incorporates:</span></td></tr>
+<td><a id="l2736" class='ln'>2736</a></td><td><span class="ct">     *  Sum: '&lt;S57&gt;/Add'</span></td></tr>
 <tr name="2737" id="2737">
-<td><a id="l2737" class='ln'>2737</a></td><td><span class="ct">   *  Gain: '&lt;S61&gt;/Gain'</span></td></tr>
+<td><a id="l2737" class='ln'>2737</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2738" id="2738">
-<td><a id="l2738" class='ln'>2738</a></td><td><span class="ct">   *  Sum: '&lt;S60&gt;/Sum6'</span></td></tr>
+<td><a id="l2738" class='ln'>2738</a></td><td>    <a id="2738c5" class="tk">rtb_Divide3_k</a> = (<a id="2738c22" class="tk">int16_T</a>)(((<a id="2738c33" class="tk">int16_T</a>)(((<a id="2738c44" class="tk">rtb_Sum1_ak</a> <a id="2738c56" class="tk">*</a> 9459) <a id="2738c64" class="tk">&gt;&gt;</a> 14) <a id="2738c71" class="tk">+</a> <a id="2738c73" class="tk">rtb_Sum6</a>)</td></tr>
 <tr name="2739" id="2739">
-<td><a id="l2739" class='ln'>2739</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2739" class='ln'>2739</a></td><td>      <a id="2739c7" class="tk">*</a> (<a id="2739c10" class="tk">int16_T</a>)<a id="2739c18" class="tk">rtP</a>.<a id="2739c22" class="tk">i_pwm_count</a>) <a id="2739c35" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2740" id="2740">
-<td><a id="l2740" class='ln'>2740</a></td><td>  <a id="2740c3" class="tk">rtb_Sum6_k</a> = (<a id="2740c17" class="tk">int16_T</a>)(((<a id="2740c28" class="tk">int64_T</a>)(<a id="2740c37" class="tk">int16_T</a>)<a id="2740c45" class="tk">tmp</a> <a id="2740c49" class="tk">&lt;&lt;</a> 26) <a id="2740c56" class="tk">/</a> <a id="2740c58" class="tk">rtb_Gain_p2</a>);</td></tr>
+<td><a id="l2740" class='ln'>2740</a></td><td></td></tr>
 <tr name="2741" id="2741">
-<td><a id="l2741" class='ln'>2741</a></td><td></td></tr>
+<td><a id="l2741" class='ln'>2741</a></td><td>    <span class="ct">/* Product: '&lt;S57&gt;/Divide3' incorporates:</span></td></tr>
 <tr name="2742" id="2742">
-<td><a id="l2742" class='ln'>2742</a></td><td>  <span class="ct">/* Product: '&lt;S61&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l2742" class='ln'>2742</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2743" id="2743">
-<td><a id="l2743" class='ln'>2743</a></td><td><span class="ct">   *  Gain: '&lt;S61&gt;/Gain'</span></td></tr>
+<td><a id="l2743" class='ln'>2743</a></td><td><span class="ct">     *  Constant: '&lt;S57&gt;/Constant'</span></td></tr>
 <tr name="2744" id="2744">
-<td><a id="l2744" class='ln'>2744</a></td><td><span class="ct">   *  Sum: '&lt;S60&gt;/Sum1'</span></td></tr>
+<td><a id="l2744" class='ln'>2744</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2745" id="2745">
-<td><a id="l2745" class='ln'>2745</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2745" class='ln'>2745</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide'</span></td></tr>
 <tr name="2746" id="2746">
-<td><a id="l2746" class='ln'>2746</a></td><td>  <a id="2746c3" class="tk">rtb_Sum1_a</a> = (<a id="2746c17" class="tk">int16_T</a>)(((<a id="2746c28" class="tk">int64_T</a>)(<a id="2746c37" class="tk">int16_T</a>)<a id="2746c45" class="tk">tmp_0</a> <a id="2746c51" class="tk">&lt;&lt;</a> 26) <a id="2746c58" class="tk">/</a> <a id="2746c60" class="tk">rtb_Gain_p2</a>);</td></tr>
+<td><a id="l2746" class='ln'>2746</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2747" id="2747">
-<td><a id="l2747" class='ln'>2747</a></td><td></td></tr>
+<td><a id="l2747" class='ln'>2747</a></td><td><span class="ct">     *  Product: '&lt;S57&gt;/Divide2'</span></td></tr>
 <tr name="2748" id="2748">
-<td><a id="l2748" class='ln'>2748</a></td><td>  <span class="ct">/* MultiPortSwitch: '&lt;S62&gt;/Multiport Switch' incorporates:</span></td></tr>
+<td><a id="l2748" class='ln'>2748</a></td><td><span class="ct">     *  Sum: '&lt;S57&gt;/Add5'</span></td></tr>
 <tr name="2749" id="2749">
-<td><a id="l2749" class='ln'>2749</a></td><td><span class="ct">   *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion1'</span></td></tr>
+<td><a id="l2749" class='ln'>2749</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2750" id="2750">
-<td><a id="l2750" class='ln'>2750</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l2750" class='ln'>2750</a></td><td>    <a id="2750c5" class="tk">rtb_Sum1_ak</a> = (<a id="2750c20" class="tk">int16_T</a>)(((<a id="2750c31" class="tk">int16_T</a>)(((<a id="2750c42" class="tk">rtb_Sum1_ak</a> <a id="2750c54" class="tk">*</a> 9459) <a id="2750c62" class="tk">&gt;&gt;</a> 14) <a id="2750c69" class="tk">-</a> <a id="2750c71" class="tk">rtb_Sum6</a>) <a id="2750c81" class="tk">*</a></td></tr>
 <tr name="2751" id="2751">
-<td><a id="l2751" class='ln'>2751</a></td><td>  <span class="kw">switch</span> (<a id="2751c11" class="tk">rtb_DataTypeConversion_j</a>) <span class="br">{</span></td></tr>
+<td><a id="l2751" class='ln'>2751</a></td><td>      (<a id="2751c8" class="tk">int16_T</a>)<a id="2751c16" class="tk">rtP</a>.<a id="2751c20" class="tk">i_pwm_count</a>) <a id="2751c33" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2752" id="2752">
-<td><a id="l2752" class='ln'>2752</a></td><td>   <span class="kw">case</span> 1<a id="2752c10" class="tk">:</a></td></tr>
+<td><a id="l2752" class='ln'>2752</a></td><td></td></tr>
 <tr name="2753" id="2753">
-<td><a id="l2753" class='ln'>2753</a></td><td>    <span class="ct">/* Product: '&lt;S64&gt;/Divide3' incorporates:</span></td></tr>
+<td><a id="l2753" class='ln'>2753</a></td><td>    <span class="ct">/* Product: '&lt;S57&gt;/Divide4' incorporates:</span></td></tr>
 <tr name="2754" id="2754">
-<td><a id="l2754" class='ln'>2754</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2754" class='ln'>2754</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2755" id="2755">
-<td><a id="l2755" class='ln'>2755</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2755" class='ln'>2755</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2756" id="2756">
-<td><a id="l2756" class='ln'>2756</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2756" class='ln'>2756</a></td><td><span class="ct">     *  Sum: '&lt;S57&gt;/Add1'</span></td></tr>
 <tr name="2757" id="2757">
-<td><a id="l2757" class='ln'>2757</a></td><td><span class="ct">     *  Product: '&lt;S64&gt;/Divide2'</span></td></tr>
+<td><a id="l2757" class='ln'>2757</a></td><td><span class="ct">     *  Sum: '&lt;S57&gt;/Add2'</span></td></tr>
 <tr name="2758" id="2758">
 <td><a id="l2758" class='ln'>2758</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2759" id="2759">
-<td><a id="l2759" class='ln'>2759</a></td><td>    <a id="2759c5" class="tk">rtb_Divide3_k</a> = (<a id="2759c22" class="tk">int16_T</a>)(((<a id="2759c33" class="tk">int16_T</a>)((<a id="2759c43" class="tk">rtb_Sum1_a</a> <a id="2759c54" class="tk">*</a> 9459) <a id="2759c62" class="tk">&gt;&gt;</a> 13) <a id="2759c69" class="tk">*</a> (<a id="2759c72" class="tk">int16_T</a>)</td></tr>
+<td><a id="l2759" class='ln'>2759</a></td><td>    <a id="2759c5" class="tk">rtb_Switch2_pl</a> = (<a id="2759c23" class="tk">int16_T</a>)((<a id="2759c33" class="tk">int16_T</a>)((<a id="2759c43" class="tk">int16_T</a>)((<a id="2759c53" class="tk">int16_T</a>)<a id="2759c61" class="tk">rtP</a>.<a id="2759c65" class="tk">i_pwm_count</a> <a id="2759c77" class="tk">-</a></td></tr>
 <tr name="2760" id="2760">
-<td><a id="l2760" class='ln'>2760</a></td><td>      <a id="2760c7" class="tk">rtP</a>.<a id="2760c11" class="tk">i_pwm_count</a>) <a id="2760c24" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2760" class='ln'>2760</a></td><td>      <a id="2760c7" class="tk">rtb_Sum1_ak</a>) <a id="2760c20" class="tk">-</a> <a id="2760c22" class="tk">rtb_Divide3_k</a>) <a id="2760c37" class="tk">&gt;&gt;</a> 1);</td></tr>
 <tr name="2761" id="2761">
 <td><a id="l2761" class='ln'>2761</a></td><td></td></tr>
 <tr name="2762" id="2762">
-<td><a id="l2762" class='ln'>2762</a></td><td>    <span class="ct">/* Product: '&lt;S64&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l2762" class='ln'>2762</a></td><td>    <span class="ct">/* Sum: '&lt;S57&gt;/Add3' */</span></td></tr>
 <tr name="2763" id="2763">
-<td><a id="l2763" class='ln'>2763</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2763" class='ln'>2763</a></td><td>    <a id="2763c5" class="tk">rtb_Sum6</a> = (<a id="2763c17" class="tk">int16_T</a>)(<a id="2763c26" class="tk">rtb_Switch2_pl</a> <a id="2763c41" class="tk">+</a> <a id="2763c43" class="tk">rtb_Divide3_k</a>);</td></tr>
 <tr name="2764" id="2764">
-<td><a id="l2764" class='ln'>2764</a></td><td><span class="ct">     *  Constant: '&lt;S64&gt;/Constant'</span></td></tr>
+<td><a id="l2764" class='ln'>2764</a></td><td></td></tr>
 <tr name="2765" id="2765">
-<td><a id="l2765" class='ln'>2765</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2765" class='ln'>2765</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/n_Duty' incorporates:</span></td></tr>
 <tr name="2766" id="2766">
-<td><a id="l2766" class='ln'>2766</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
+<td><a id="l2766" class='ln'>2766</a></td><td><span class="ct">     *  Sum: '&lt;S57&gt;/Add4'</span></td></tr>
 <tr name="2767" id="2767">
-<td><a id="l2767" class='ln'>2767</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2767" class='ln'>2767</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2768" id="2768">
-<td><a id="l2768" class='ln'>2768</a></td><td><span class="ct">     *  Product: '&lt;S64&gt;/Divide'</span></td></tr>
+<td><a id="l2768" class='ln'>2768</a></td><td>    <a id="2768c5" class="tk">rtY</a>-&gt;<a id="2768c10" class="tk">n_Duty</a>[0] = <a id="2768c22" class="tk">rtb_Sum6</a>;</td></tr>
 <tr name="2769" id="2769">
-<td><a id="l2769" class='ln'>2769</a></td><td><span class="ct">     *  Sum: '&lt;S64&gt;/Add'</span></td></tr>
+<td><a id="l2769" class='ln'>2769</a></td><td>    <a id="2769c5" class="tk">rtY</a>-&gt;<a id="2769c10" class="tk">n_Duty</a>[1] = (<a id="2769c23" class="tk">int16_T</a>)(<a id="2769c32" class="tk">rtb_Sum6</a> <a id="2769c41" class="tk">+</a> <a id="2769c43" class="tk">rtb_Sum1_ak</a>);</td></tr>
 <tr name="2770" id="2770">
-<td><a id="l2770" class='ln'>2770</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2770" class='ln'>2770</a></td><td>    <a id="2770c5" class="tk">rtY</a>-&gt;<a id="2770c10" class="tk">n_Duty</a>[2] = <a id="2770c22" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2771" id="2771">
-<td><a id="l2771" class='ln'>2771</a></td><td>    <a id="2771c5" class="tk">rtb_Sum1_a</a> = (<a id="2771c19" class="tk">int16_T</a>)(((<a id="2771c30" class="tk">int16_T</a>)(<a id="2771c39" class="tk">rtb_Sum6_k</a> <a id="2771c50" class="tk">-</a> ((<a id="2771c54" class="tk">rtb_Sum1_a</a> <a id="2771c65" class="tk">*</a> 9459) <a id="2771c73" class="tk">&gt;&gt;</a> 14)) <a id="2771c81" class="tk">*</a></td></tr>
+<td><a id="l2771" class='ln'>2771</a></td><td>    <span class="kw">break</span>;</td></tr>
 <tr name="2772" id="2772">
-<td><a id="l2772" class='ln'>2772</a></td><td>      (<a id="2772c8" class="tk">int16_T</a>)<a id="2772c16" class="tk">rtP</a>.<a id="2772c20" class="tk">i_pwm_count</a>) <a id="2772c33" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2772" class='ln'>2772</a></td><td></td></tr>
 <tr name="2773" id="2773">
-<td><a id="l2773" class='ln'>2773</a></td><td></td></tr>
+<td><a id="l2773" class='ln'>2773</a></td><td>   <span class="kw">case</span> 3<a id="2773c10" class="tk">:</a></td></tr>
 <tr name="2774" id="2774">
-<td><a id="l2774" class='ln'>2774</a></td><td>    <span class="ct">/* Product: '&lt;S64&gt;/Divide4' incorporates:</span></td></tr>
+<td><a id="l2774" class='ln'>2774</a></td><td>    <span class="ct">/* Product: '&lt;S58&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="2775" id="2775">
-<td><a id="l2775" class='ln'>2775</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2775" class='ln'>2775</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2776" id="2776">
-<td><a id="l2776" class='ln'>2776</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2776" class='ln'>2776</a></td><td><span class="ct">     *  Constant: '&lt;S58&gt;/Constant'</span></td></tr>
 <tr name="2777" id="2777">
-<td><a id="l2777" class='ln'>2777</a></td><td><span class="ct">     *  Sum: '&lt;S64&gt;/Add1'</span></td></tr>
+<td><a id="l2777" class='ln'>2777</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2778" id="2778">
-<td><a id="l2778" class='ln'>2778</a></td><td><span class="ct">     *  Sum: '&lt;S64&gt;/Add2'</span></td></tr>
+<td><a id="l2778" class='ln'>2778</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide'</span></td></tr>
 <tr name="2779" id="2779">
-<td><a id="l2779" class='ln'>2779</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2779" class='ln'>2779</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2780" id="2780">
-<td><a id="l2780" class='ln'>2780</a></td><td>    <a id="2780c5" class="tk">rtb_Sum6_p</a> = (<a id="2780c19" class="tk">int16_T</a>)((<a id="2780c29" class="tk">int16_T</a>)((<a id="2780c39" class="tk">int16_T</a>)((<a id="2780c49" class="tk">int16_T</a>)<a id="2780c57" class="tk">rtP</a>.<a id="2780c61" class="tk">i_pwm_count</a> <a id="2780c73" class="tk">-</a></td></tr>
+<td><a id="l2780" class='ln'>2780</a></td><td><span class="ct">     *  Product: '&lt;S58&gt;/Divide'</span></td></tr>
 <tr name="2781" id="2781">
-<td><a id="l2781" class='ln'>2781</a></td><td>      <a id="2781c7" class="tk">rtb_Sum1_a</a>) <a id="2781c19" class="tk">-</a> <a id="2781c21" class="tk">rtb_Divide3_k</a>) <a id="2781c36" class="tk">&gt;&gt;</a> 1);</td></tr>
+<td><a id="l2781" class='ln'>2781</a></td><td><span class="ct">     *  Sum: '&lt;S58&gt;/Add'</span></td></tr>
 <tr name="2782" id="2782">
-<td><a id="l2782" class='ln'>2782</a></td><td></td></tr>
+<td><a id="l2782" class='ln'>2782</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2783" id="2783">
-<td><a id="l2783" class='ln'>2783</a></td><td>    <span class="ct">/* Sum: '&lt;S64&gt;/Add3' */</span></td></tr>
+<td><a id="l2783" class='ln'>2783</a></td><td>    <a id="2783c5" class="tk">rtb_Sum6</a> = (<a id="2783c17" class="tk">int16_T</a>)(((<a id="2783c28" class="tk">int16_T</a>)(<a id="2783c37" class="tk">-</a><a id="2783c38" class="tk">rtb_Sum6</a> <a id="2783c47" class="tk">-</a> ((<a id="2783c51" class="tk">rtb_Sum1_ak</a> <a id="2783c63" class="tk">*</a> 9459) <a id="2783c71" class="tk">&gt;&gt;</a> 14)) <a id="2783c79" class="tk">*</a></td></tr>
 <tr name="2784" id="2784">
-<td><a id="l2784" class='ln'>2784</a></td><td>    <a id="2784c5" class="tk">rtb_Sum6_k</a> = (<a id="2784c19" class="tk">int16_T</a>)(<a id="2784c28" class="tk">rtb_Sum6_p</a> <a id="2784c39" class="tk">+</a> <a id="2784c41" class="tk">rtb_Divide3_k</a>);</td></tr>
+<td><a id="l2784" class='ln'>2784</a></td><td>                          (<a id="2784c28" class="tk">int16_T</a>)<a id="2784c36" class="tk">rtP</a>.<a id="2784c40" class="tk">i_pwm_count</a>) <a id="2784c53" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2785" id="2785">
 <td><a id="l2785" class='ln'>2785</a></td><td></td></tr>
 <tr name="2786" id="2786">
-<td><a id="l2786" class='ln'>2786</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/pwm_Duty' incorporates:</span></td></tr>
+<td><a id="l2786" class='ln'>2786</a></td><td>    <span class="ct">/* Product: '&lt;S58&gt;/Divide3' incorporates:</span></td></tr>
 <tr name="2787" id="2787">
-<td><a id="l2787" class='ln'>2787</a></td><td><span class="ct">     *  Sum: '&lt;S64&gt;/Add4'</span></td></tr>
+<td><a id="l2787" class='ln'>2787</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2788" id="2788">
-<td><a id="l2788" class='ln'>2788</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2788" class='ln'>2788</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2789" id="2789">
-<td><a id="l2789" class='ln'>2789</a></td><td>    <a id="2789c5" class="tk">rtY</a>-&gt;<a id="2789c10" class="tk">pwm_Duty</a>[0] = (<a id="2789c25" class="tk">int16_T</a>)(<a id="2789c34" class="tk">rtb_Sum6_k</a> <a id="2789c45" class="tk">+</a> <a id="2789c47" class="tk">rtb_Sum1_a</a>);</td></tr>
+<td><a id="l2789" class='ln'>2789</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2790" id="2790">
-<td><a id="l2790" class='ln'>2790</a></td><td>    <a id="2790c5" class="tk">rtY</a>-&gt;<a id="2790c10" class="tk">pwm_Duty</a>[1] = <a id="2790c24" class="tk">rtb_Sum6_k</a>;</td></tr>
+<td><a id="l2790" class='ln'>2790</a></td><td><span class="ct">     *  Product: '&lt;S58&gt;/Divide2'</span></td></tr>
 <tr name="2791" id="2791">
-<td><a id="l2791" class='ln'>2791</a></td><td>    <a id="2791c5" class="tk">rtY</a>-&gt;<a id="2791c10" class="tk">pwm_Duty</a>[2] = <a id="2791c24" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2791" class='ln'>2791</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2792" id="2792">
-<td><a id="l2792" class='ln'>2792</a></td><td>    <span class="kw">break</span>;</td></tr>
+<td><a id="l2792" class='ln'>2792</a></td><td>    <a id="2792c5" class="tk">rtb_Sum1_ak</a> = (<a id="2792c20" class="tk">int16_T</a>)(((<a id="2792c31" class="tk">int16_T</a>)((<a id="2792c41" class="tk">rtb_Sum1_ak</a> <a id="2792c53" class="tk">*</a> 9459) <a id="2792c61" class="tk">&gt;&gt;</a> 13) <a id="2792c68" class="tk">*</a> (<a id="2792c71" class="tk">int16_T</a>)</td></tr>
 <tr name="2793" id="2793">
-<td><a id="l2793" class='ln'>2793</a></td><td></td></tr>
+<td><a id="l2793" class='ln'>2793</a></td><td>      <a id="2793c7" class="tk">rtP</a>.<a id="2793c11" class="tk">i_pwm_count</a>) <a id="2793c24" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2794" id="2794">
-<td><a id="l2794" class='ln'>2794</a></td><td>   <span class="kw">case</span> 2<a id="2794c10" class="tk">:</a></td></tr>
+<td><a id="l2794" class='ln'>2794</a></td><td></td></tr>
 <tr name="2795" id="2795">
-<td><a id="l2795" class='ln'>2795</a></td><td>    <span class="ct">/* Product: '&lt;S65&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l2795" class='ln'>2795</a></td><td>    <span class="ct">/* Product: '&lt;S58&gt;/Divide4' incorporates:</span></td></tr>
 <tr name="2796" id="2796">
-<td><a id="l2796" class='ln'>2796</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2796" class='ln'>2796</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2797" id="2797">
-<td><a id="l2797" class='ln'>2797</a></td><td><span class="ct">     *  Constant: '&lt;S65&gt;/Constant'</span></td></tr>
+<td><a id="l2797" class='ln'>2797</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2798" id="2798">
-<td><a id="l2798" class='ln'>2798</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2798" class='ln'>2798</a></td><td><span class="ct">     *  Sum: '&lt;S58&gt;/Add1'</span></td></tr>
 <tr name="2799" id="2799">
-<td><a id="l2799" class='ln'>2799</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
+<td><a id="l2799" class='ln'>2799</a></td><td><span class="ct">     *  Sum: '&lt;S58&gt;/Add2'</span></td></tr>
 <tr name="2800" id="2800">
-<td><a id="l2800" class='ln'>2800</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2800" class='ln'>2800</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2801" id="2801">
-<td><a id="l2801" class='ln'>2801</a></td><td><span class="ct">     *  Product: '&lt;S65&gt;/Divide'</span></td></tr>
+<td><a id="l2801" class='ln'>2801</a></td><td>    <a id="2801c5" class="tk">rtb_Switch2_pl</a> = (<a id="2801c23" class="tk">int16_T</a>)((<a id="2801c33" class="tk">int16_T</a>)((<a id="2801c43" class="tk">int16_T</a>)((<a id="2801c53" class="tk">int16_T</a>)<a id="2801c61" class="tk">rtP</a>.<a id="2801c65" class="tk">i_pwm_count</a> <a id="2801c77" class="tk">-</a></td></tr>
 <tr name="2802" id="2802">
-<td><a id="l2802" class='ln'>2802</a></td><td><span class="ct">     *  Sum: '&lt;S65&gt;/Add'</span></td></tr>
+<td><a id="l2802" class='ln'>2802</a></td><td>      <a id="2802c7" class="tk">rtb_Sum1_ak</a>) <a id="2802c20" class="tk">-</a> <a id="2802c22" class="tk">rtb_Sum6</a>) <a id="2802c32" class="tk">&gt;&gt;</a> 1);</td></tr>
 <tr name="2803" id="2803">
-<td><a id="l2803" class='ln'>2803</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2803" class='ln'>2803</a></td><td></td></tr>
 <tr name="2804" id="2804">
-<td><a id="l2804" class='ln'>2804</a></td><td>    <a id="2804c5" class="tk">rtb_Divide3_k</a> = (<a id="2804c22" class="tk">int16_T</a>)(((<a id="2804c33" class="tk">int16_T</a>)(((<a id="2804c44" class="tk">rtb_Sum1_a</a> <a id="2804c55" class="tk">*</a> 9459) <a id="2804c63" class="tk">&gt;&gt;</a> 14) <a id="2804c70" class="tk">+</a></td></tr>
+<td><a id="l2804" class='ln'>2804</a></td><td>    <span class="ct">/* Sum: '&lt;S58&gt;/Add3' */</span></td></tr>
 <tr name="2805" id="2805">
-<td><a id="l2805" class='ln'>2805</a></td><td>      <a id="2805c7" class="tk">rtb_Sum6_k</a>) <a id="2805c19" class="tk">*</a> (<a id="2805c22" class="tk">int16_T</a>)<a id="2805c30" class="tk">rtP</a>.<a id="2805c34" class="tk">i_pwm_count</a>) <a id="2805c47" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2805" class='ln'>2805</a></td><td>    <a id="2805c5" class="tk">rtb_Sum6</a> <a id="2805c14" class="tk">+=</a> <a id="2805c17" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2806" id="2806">
 <td><a id="l2806" class='ln'>2806</a></td><td></td></tr>
 <tr name="2807" id="2807">
-<td><a id="l2807" class='ln'>2807</a></td><td>    <span class="ct">/* Product: '&lt;S65&gt;/Divide3' incorporates:</span></td></tr>
+<td><a id="l2807" class='ln'>2807</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/n_Duty' incorporates:</span></td></tr>
 <tr name="2808" id="2808">
-<td><a id="l2808" class='ln'>2808</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2808" class='ln'>2808</a></td><td><span class="ct">     *  Sum: '&lt;S58&gt;/Add4'</span></td></tr>
 <tr name="2809" id="2809">
-<td><a id="l2809" class='ln'>2809</a></td><td><span class="ct">     *  Constant: '&lt;S65&gt;/Constant'</span></td></tr>
+<td><a id="l2809" class='ln'>2809</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2810" id="2810">
-<td><a id="l2810" class='ln'>2810</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2810" class='ln'>2810</a></td><td>    <a id="2810c5" class="tk">rtY</a>-&gt;<a id="2810c10" class="tk">n_Duty</a>[0] = <a id="2810c22" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2811" id="2811">
-<td><a id="l2811" class='ln'>2811</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
+<td><a id="l2811" class='ln'>2811</a></td><td>    <a id="2811c5" class="tk">rtY</a>-&gt;<a id="2811c10" class="tk">n_Duty</a>[1] = (<a id="2811c23" class="tk">int16_T</a>)(<a id="2811c32" class="tk">rtb_Sum6</a> <a id="2811c41" class="tk">+</a> <a id="2811c43" class="tk">rtb_Sum1_ak</a>);</td></tr>
 <tr name="2812" id="2812">
-<td><a id="l2812" class='ln'>2812</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2812" class='ln'>2812</a></td><td>    <a id="2812c5" class="tk">rtY</a>-&gt;<a id="2812c10" class="tk">n_Duty</a>[2] = <a id="2812c22" class="tk">rtb_Sum6</a>;</td></tr>
 <tr name="2813" id="2813">
-<td><a id="l2813" class='ln'>2813</a></td><td><span class="ct">     *  Product: '&lt;S65&gt;/Divide2'</span></td></tr>
+<td><a id="l2813" class='ln'>2813</a></td><td>    <span class="kw">break</span>;</td></tr>
 <tr name="2814" id="2814">
-<td><a id="l2814" class='ln'>2814</a></td><td><span class="ct">     *  Sum: '&lt;S65&gt;/Add5'</span></td></tr>
+<td><a id="l2814" class='ln'>2814</a></td><td></td></tr>
 <tr name="2815" id="2815">
-<td><a id="l2815" class='ln'>2815</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2815" class='ln'>2815</a></td><td>   <span class="kw">case</span> 4<a id="2815c10" class="tk">:</a></td></tr>
 <tr name="2816" id="2816">
-<td><a id="l2816" class='ln'>2816</a></td><td>    <a id="2816c5" class="tk">rtb_Sum1_a</a> = (<a id="2816c19" class="tk">int16_T</a>)(((<a id="2816c30" class="tk">int16_T</a>)(((<a id="2816c41" class="tk">rtb_Sum1_a</a> <a id="2816c52" class="tk">*</a> 9459) <a id="2816c60" class="tk">&gt;&gt;</a> 14) <a id="2816c67" class="tk">-</a> <a id="2816c69" class="tk">rtb_Sum6_k</a>) <a id="2816c81" class="tk">*</a></td></tr>
+<td><a id="l2816" class='ln'>2816</a></td><td>    <span class="ct">/* Product: '&lt;S59&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="2817" id="2817">
-<td><a id="l2817" class='ln'>2817</a></td><td>      (<a id="2817c8" class="tk">int16_T</a>)<a id="2817c16" class="tk">rtP</a>.<a id="2817c20" class="tk">i_pwm_count</a>) <a id="2817c33" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2817" class='ln'>2817</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2818" id="2818">
-<td><a id="l2818" class='ln'>2818</a></td><td></td></tr>
+<td><a id="l2818" class='ln'>2818</a></td><td><span class="ct">     *  Constant: '&lt;S59&gt;/Constant'</span></td></tr>
 <tr name="2819" id="2819">
-<td><a id="l2819" class='ln'>2819</a></td><td>    <span class="ct">/* Product: '&lt;S65&gt;/Divide4' incorporates:</span></td></tr>
+<td><a id="l2819" class='ln'>2819</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2820" id="2820">
-<td><a id="l2820" class='ln'>2820</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2820" class='ln'>2820</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide'</span></td></tr>
 <tr name="2821" id="2821">
-<td><a id="l2821" class='ln'>2821</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2821" class='ln'>2821</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2822" id="2822">
-<td><a id="l2822" class='ln'>2822</a></td><td><span class="ct">     *  Sum: '&lt;S65&gt;/Add1'</span></td></tr>
+<td><a id="l2822" class='ln'>2822</a></td><td><span class="ct">     *  Product: '&lt;S59&gt;/Divide'</span></td></tr>
 <tr name="2823" id="2823">
-<td><a id="l2823" class='ln'>2823</a></td><td><span class="ct">     *  Sum: '&lt;S65&gt;/Add2'</span></td></tr>
+<td><a id="l2823" class='ln'>2823</a></td><td><span class="ct">     *  Sum: '&lt;S59&gt;/Add'</span></td></tr>
 <tr name="2824" id="2824">
 <td><a id="l2824" class='ln'>2824</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2825" id="2825">
-<td><a id="l2825" class='ln'>2825</a></td><td>    <a id="2825c5" class="tk">rtb_Sum6_p</a> = (<a id="2825c19" class="tk">int16_T</a>)((<a id="2825c29" class="tk">int16_T</a>)((<a id="2825c39" class="tk">int16_T</a>)((<a id="2825c49" class="tk">int16_T</a>)<a id="2825c57" class="tk">rtP</a>.<a id="2825c61" class="tk">i_pwm_count</a> <a id="2825c73" class="tk">-</a></td></tr>
+<td><a id="l2825" class='ln'>2825</a></td><td>    <a id="2825c5" class="tk">rtb_Sum6</a> = (<a id="2825c17" class="tk">int16_T</a>)(((<a id="2825c28" class="tk">int16_T</a>)(((<a id="2825c39" class="tk">rtb_Sum1_ak</a> <a id="2825c51" class="tk">*</a> 9459) <a id="2825c59" class="tk">&gt;&gt;</a> 14) <a id="2825c66" class="tk">-</a> <a id="2825c68" class="tk">rtb_Sum6</a>) <a id="2825c78" class="tk">*</a></td></tr>
 <tr name="2826" id="2826">
-<td><a id="l2826" class='ln'>2826</a></td><td>      <a id="2826c7" class="tk">rtb_Sum1_a</a>) <a id="2826c19" class="tk">-</a> <a id="2826c21" class="tk">rtb_Divide3_k</a>) <a id="2826c36" class="tk">&gt;&gt;</a> 1);</td></tr>
+<td><a id="l2826" class='ln'>2826</a></td><td>                          (<a id="2826c28" class="tk">int16_T</a>)<a id="2826c36" class="tk">rtP</a>.<a id="2826c40" class="tk">i_pwm_count</a>) <a id="2826c53" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2827" id="2827">
 <td><a id="l2827" class='ln'>2827</a></td><td></td></tr>
 <tr name="2828" id="2828">
-<td><a id="l2828" class='ln'>2828</a></td><td>    <span class="ct">/* Sum: '&lt;S65&gt;/Add3' */</span></td></tr>
+<td><a id="l2828" class='ln'>2828</a></td><td>    <span class="ct">/* Product: '&lt;S59&gt;/Divide3' incorporates:</span></td></tr>
 <tr name="2829" id="2829">
-<td><a id="l2829" class='ln'>2829</a></td><td>    <a id="2829c5" class="tk">rtb_Sum6_k</a> = (<a id="2829c19" class="tk">int16_T</a>)(<a id="2829c28" class="tk">rtb_Sum6_p</a> <a id="2829c39" class="tk">+</a> <a id="2829c41" class="tk">rtb_Divide3_k</a>);</td></tr>
+<td><a id="l2829" class='ln'>2829</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2830" id="2830">
-<td><a id="l2830" class='ln'>2830</a></td><td></td></tr>
+<td><a id="l2830" class='ln'>2830</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2831" id="2831">
-<td><a id="l2831" class='ln'>2831</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/pwm_Duty' incorporates:</span></td></tr>
+<td><a id="l2831" class='ln'>2831</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2832" id="2832">
-<td><a id="l2832" class='ln'>2832</a></td><td><span class="ct">     *  Sum: '&lt;S65&gt;/Add4'</span></td></tr>
+<td><a id="l2832" class='ln'>2832</a></td><td><span class="ct">     *  Product: '&lt;S59&gt;/Divide2'</span></td></tr>
 <tr name="2833" id="2833">
-<td><a id="l2833" class='ln'>2833</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2833" class='ln'>2833</a></td><td><span class="ct">     *  Sum: '&lt;S59&gt;/Add5'</span></td></tr>
 <tr name="2834" id="2834">
-<td><a id="l2834" class='ln'>2834</a></td><td>    <a id="2834c5" class="tk">rtY</a>-&gt;<a id="2834c10" class="tk">pwm_Duty</a>[0] = <a id="2834c24" class="tk">rtb_Sum6_k</a>;</td></tr>
+<td><a id="l2834" class='ln'>2834</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2835" id="2835">
-<td><a id="l2835" class='ln'>2835</a></td><td>    <a id="2835c5" class="tk">rtY</a>-&gt;<a id="2835c10" class="tk">pwm_Duty</a>[1] = (<a id="2835c25" class="tk">int16_T</a>)(<a id="2835c34" class="tk">rtb_Sum6_k</a> <a id="2835c45" class="tk">+</a> <a id="2835c47" class="tk">rtb_Sum1_a</a>);</td></tr>
+<td><a id="l2835" class='ln'>2835</a></td><td>    <a id="2835c5" class="tk">rtb_Sum1_ak</a> = (<a id="2835c20" class="tk">int16_T</a>)(((<a id="2835c31" class="tk">int16_T</a>)(<a id="2835c40" class="tk">-</a>((<a id="2835c43" class="tk">int16_T</a>)((<a id="2835c53" class="tk">rtb_Sum1_ak</a> <a id="2835c65" class="tk">*</a> 9459) <a id="2835c73" class="tk">&gt;&gt;</a> 13) <a id="2835c80" class="tk">&lt;&lt;</a></td></tr>
 <tr name="2836" id="2836">
-<td><a id="l2836" class='ln'>2836</a></td><td>    <a id="2836c5" class="tk">rtY</a>-&gt;<a id="2836c10" class="tk">pwm_Duty</a>[2] = <a id="2836c24" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2836" class='ln'>2836</a></td><td>      2) <a id="2836c10" class="tk">&gt;&gt;</a> 2) <a id="2836c16" class="tk">*</a> (<a id="2836c19" class="tk">int16_T</a>)<a id="2836c27" class="tk">rtP</a>.<a id="2836c31" class="tk">i_pwm_count</a>) <a id="2836c44" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2837" id="2837">
-<td><a id="l2837" class='ln'>2837</a></td><td>    <span class="kw">break</span>;</td></tr>
+<td><a id="l2837" class='ln'>2837</a></td><td></td></tr>
 <tr name="2838" id="2838">
-<td><a id="l2838" class='ln'>2838</a></td><td></td></tr>
+<td><a id="l2838" class='ln'>2838</a></td><td>    <span class="ct">/* Product: '&lt;S59&gt;/Divide4' incorporates:</span></td></tr>
 <tr name="2839" id="2839">
-<td><a id="l2839" class='ln'>2839</a></td><td>   <span class="kw">case</span> 3<a id="2839c10" class="tk">:</a></td></tr>
+<td><a id="l2839" class='ln'>2839</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2840" id="2840">
-<td><a id="l2840" class='ln'>2840</a></td><td>    <span class="ct">/* Product: '&lt;S66&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l2840" class='ln'>2840</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2841" id="2841">
-<td><a id="l2841" class='ln'>2841</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2841" class='ln'>2841</a></td><td><span class="ct">     *  Sum: '&lt;S59&gt;/Add1'</span></td></tr>
 <tr name="2842" id="2842">
-<td><a id="l2842" class='ln'>2842</a></td><td><span class="ct">     *  Constant: '&lt;S66&gt;/Constant'</span></td></tr>
+<td><a id="l2842" class='ln'>2842</a></td><td><span class="ct">     *  Sum: '&lt;S59&gt;/Add2'</span></td></tr>
 <tr name="2843" id="2843">
-<td><a id="l2843" class='ln'>2843</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2843" class='ln'>2843</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2844" id="2844">
-<td><a id="l2844" class='ln'>2844</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
+<td><a id="l2844" class='ln'>2844</a></td><td>    <a id="2844c5" class="tk">rtb_Switch2_pl</a> = (<a id="2844c23" class="tk">int16_T</a>)((<a id="2844c33" class="tk">int16_T</a>)((<a id="2844c43" class="tk">int16_T</a>)((<a id="2844c53" class="tk">int16_T</a>)<a id="2844c61" class="tk">rtP</a>.<a id="2844c65" class="tk">i_pwm_count</a> <a id="2844c77" class="tk">-</a></td></tr>
 <tr name="2845" id="2845">
-<td><a id="l2845" class='ln'>2845</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2845" class='ln'>2845</a></td><td>      <a id="2845c7" class="tk">rtb_Sum1_ak</a>) <a id="2845c20" class="tk">-</a> <a id="2845c22" class="tk">rtb_Sum6</a>) <a id="2845c32" class="tk">&gt;&gt;</a> 1);</td></tr>
 <tr name="2846" id="2846">
-<td><a id="l2846" class='ln'>2846</a></td><td><span class="ct">     *  Product: '&lt;S66&gt;/Divide'</span></td></tr>
+<td><a id="l2846" class='ln'>2846</a></td><td></td></tr>
 <tr name="2847" id="2847">
-<td><a id="l2847" class='ln'>2847</a></td><td><span class="ct">     *  Sum: '&lt;S66&gt;/Add'</span></td></tr>
+<td><a id="l2847" class='ln'>2847</a></td><td>    <span class="ct">/* Sum: '&lt;S59&gt;/Add3' */</span></td></tr>
 <tr name="2848" id="2848">
-<td><a id="l2848" class='ln'>2848</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2848" class='ln'>2848</a></td><td>    <a id="2848c5" class="tk">rtb_Sum6</a> <a id="2848c14" class="tk">+=</a> <a id="2848c17" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2849" id="2849">
-<td><a id="l2849" class='ln'>2849</a></td><td>    <a id="2849c5" class="tk">rtb_Sum6_k</a> = (<a id="2849c19" class="tk">int16_T</a>)(((<a id="2849c30" class="tk">int16_T</a>)(<a id="2849c39" class="tk">-</a><a id="2849c40" class="tk">rtb_Sum6_k</a> <a id="2849c51" class="tk">-</a> ((<a id="2849c55" class="tk">rtb_Sum1_a</a> <a id="2849c66" class="tk">*</a> 9459) <a id="2849c74" class="tk">&gt;&gt;</a> 14))</td></tr>
+<td><a id="l2849" class='ln'>2849</a></td><td></td></tr>
 <tr name="2850" id="2850">
-<td><a id="l2850" class='ln'>2850</a></td><td>      <a id="2850c7" class="tk">*</a> (<a id="2850c10" class="tk">int16_T</a>)<a id="2850c18" class="tk">rtP</a>.<a id="2850c22" class="tk">i_pwm_count</a>) <a id="2850c35" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2850" class='ln'>2850</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/n_Duty' incorporates:</span></td></tr>
 <tr name="2851" id="2851">
-<td><a id="l2851" class='ln'>2851</a></td><td></td></tr>
+<td><a id="l2851" class='ln'>2851</a></td><td><span class="ct">     *  Sum: '&lt;S59&gt;/Add4'</span></td></tr>
 <tr name="2852" id="2852">
-<td><a id="l2852" class='ln'>2852</a></td><td>    <span class="ct">/* Product: '&lt;S66&gt;/Divide3' incorporates:</span></td></tr>
+<td><a id="l2852" class='ln'>2852</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2853" id="2853">
-<td><a id="l2853" class='ln'>2853</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2853" class='ln'>2853</a></td><td>    <a id="2853c5" class="tk">rtY</a>-&gt;<a id="2853c10" class="tk">n_Duty</a>[0] = <a id="2853c22" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2854" id="2854">
-<td><a id="l2854" class='ln'>2854</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2854" class='ln'>2854</a></td><td>    <a id="2854c5" class="tk">rtY</a>-&gt;<a id="2854c10" class="tk">n_Duty</a>[1] = <a id="2854c22" class="tk">rtb_Sum6</a>;</td></tr>
 <tr name="2855" id="2855">
-<td><a id="l2855" class='ln'>2855</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2855" class='ln'>2855</a></td><td>    <a id="2855c5" class="tk">rtY</a>-&gt;<a id="2855c10" class="tk">n_Duty</a>[2] = (<a id="2855c23" class="tk">int16_T</a>)(<a id="2855c32" class="tk">rtb_Sum6</a> <a id="2855c41" class="tk">+</a> <a id="2855c43" class="tk">rtb_Sum1_ak</a>);</td></tr>
 <tr name="2856" id="2856">
-<td><a id="l2856" class='ln'>2856</a></td><td><span class="ct">     *  Product: '&lt;S66&gt;/Divide2'</span></td></tr>
+<td><a id="l2856" class='ln'>2856</a></td><td>    <span class="kw">break</span>;</td></tr>
 <tr name="2857" id="2857">
-<td><a id="l2857" class='ln'>2857</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2857" class='ln'>2857</a></td><td></td></tr>
 <tr name="2858" id="2858">
-<td><a id="l2858" class='ln'>2858</a></td><td>    <a id="2858c5" class="tk">rtb_Sum1_a</a> = (<a id="2858c19" class="tk">int16_T</a>)(((<a id="2858c30" class="tk">int16_T</a>)((<a id="2858c40" class="tk">rtb_Sum1_a</a> <a id="2858c51" class="tk">*</a> 9459) <a id="2858c59" class="tk">&gt;&gt;</a> 13) <a id="2858c66" class="tk">*</a> (<a id="2858c69" class="tk">int16_T</a>)</td></tr>
+<td><a id="l2858" class='ln'>2858</a></td><td>   <span class="kw">case</span> 5<a id="2858c10" class="tk">:</a></td></tr>
 <tr name="2859" id="2859">
-<td><a id="l2859" class='ln'>2859</a></td><td>      <a id="2859c7" class="tk">rtP</a>.<a id="2859c11" class="tk">i_pwm_count</a>) <a id="2859c24" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2859" class='ln'>2859</a></td><td>    <span class="ct">/* Product: '&lt;S60&gt;/Divide3' incorporates:</span></td></tr>
 <tr name="2860" id="2860">
-<td><a id="l2860" class='ln'>2860</a></td><td></td></tr>
+<td><a id="l2860" class='ln'>2860</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2861" id="2861">
-<td><a id="l2861" class='ln'>2861</a></td><td>    <span class="ct">/* Product: '&lt;S66&gt;/Divide4' incorporates:</span></td></tr>
+<td><a id="l2861" class='ln'>2861</a></td><td><span class="ct">     *  Constant: '&lt;S60&gt;/Constant'</span></td></tr>
 <tr name="2862" id="2862">
-<td><a id="l2862" class='ln'>2862</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2862" class='ln'>2862</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2863" id="2863">
-<td><a id="l2863" class='ln'>2863</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2863" class='ln'>2863</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide'</span></td></tr>
 <tr name="2864" id="2864">
-<td><a id="l2864" class='ln'>2864</a></td><td><span class="ct">     *  Sum: '&lt;S66&gt;/Add1'</span></td></tr>
+<td><a id="l2864" class='ln'>2864</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2865" id="2865">
-<td><a id="l2865" class='ln'>2865</a></td><td><span class="ct">     *  Sum: '&lt;S66&gt;/Add2'</span></td></tr>
+<td><a id="l2865" class='ln'>2865</a></td><td><span class="ct">     *  Product: '&lt;S60&gt;/Divide2'</span></td></tr>
 <tr name="2866" id="2866">
-<td><a id="l2866" class='ln'>2866</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2866" class='ln'>2866</a></td><td><span class="ct">     *  Sum: '&lt;S60&gt;/Add5'</span></td></tr>
 <tr name="2867" id="2867">
-<td><a id="l2867" class='ln'>2867</a></td><td>    <a id="2867c5" class="tk">rtb_Sum6_p</a> = (<a id="2867c19" class="tk">int16_T</a>)((<a id="2867c29" class="tk">int16_T</a>)((<a id="2867c39" class="tk">int16_T</a>)((<a id="2867c49" class="tk">int16_T</a>)<a id="2867c57" class="tk">rtP</a>.<a id="2867c61" class="tk">i_pwm_count</a> <a id="2867c73" class="tk">-</a></td></tr>
+<td><a id="l2867" class='ln'>2867</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2868" id="2868">
-<td><a id="l2868" class='ln'>2868</a></td><td>      <a id="2868c7" class="tk">rtb_Sum1_a</a>) <a id="2868c19" class="tk">-</a> <a id="2868c21" class="tk">rtb_Sum6_k</a>) <a id="2868c33" class="tk">&gt;&gt;</a> 1);</td></tr>
+<td><a id="l2868" class='ln'>2868</a></td><td>    <a id="2868c5" class="tk">rtb_Divide3_k</a> = (<a id="2868c22" class="tk">int16_T</a>)(((<a id="2868c33" class="tk">int16_T</a>)(<a id="2868c42" class="tk">rtb_Sum6</a> <a id="2868c51" class="tk">-</a> ((<a id="2868c55" class="tk">rtb_Sum1_ak</a> <a id="2868c67" class="tk">*</a> 9459) <a id="2868c75" class="tk">&gt;&gt;</a> 14))</td></tr>
 <tr name="2869" id="2869">
-<td><a id="l2869" class='ln'>2869</a></td><td></td></tr>
+<td><a id="l2869" class='ln'>2869</a></td><td>      <a id="2869c7" class="tk">*</a> (<a id="2869c10" class="tk">int16_T</a>)<a id="2869c18" class="tk">rtP</a>.<a id="2869c22" class="tk">i_pwm_count</a>) <a id="2869c35" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2870" id="2870">
-<td><a id="l2870" class='ln'>2870</a></td><td>    <span class="ct">/* Sum: '&lt;S66&gt;/Add3' */</span></td></tr>
+<td><a id="l2870" class='ln'>2870</a></td><td></td></tr>
 <tr name="2871" id="2871">
-<td><a id="l2871" class='ln'>2871</a></td><td>    <a id="2871c5" class="tk">rtb_Sum6_k</a> <a id="2871c16" class="tk">+=</a> <a id="2871c19" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2871" class='ln'>2871</a></td><td>    <span class="ct">/* Product: '&lt;S60&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="2872" id="2872">
-<td><a id="l2872" class='ln'>2872</a></td><td></td></tr>
+<td><a id="l2872" class='ln'>2872</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2873" id="2873">
-<td><a id="l2873" class='ln'>2873</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/pwm_Duty' incorporates:</span></td></tr>
+<td><a id="l2873" class='ln'>2873</a></td><td><span class="ct">     *  Constant: '&lt;S60&gt;/Constant'</span></td></tr>
 <tr name="2874" id="2874">
-<td><a id="l2874" class='ln'>2874</a></td><td><span class="ct">     *  Sum: '&lt;S66&gt;/Add4'</span></td></tr>
+<td><a id="l2874" class='ln'>2874</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2875" id="2875">
-<td><a id="l2875" class='ln'>2875</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2875" class='ln'>2875</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide'</span></td></tr>
 <tr name="2876" id="2876">
-<td><a id="l2876" class='ln'>2876</a></td><td>    <a id="2876c5" class="tk">rtY</a>-&gt;<a id="2876c10" class="tk">pwm_Duty</a>[0] = <a id="2876c24" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2876" class='ln'>2876</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2877" id="2877">
-<td><a id="l2877" class='ln'>2877</a></td><td>    <a id="2877c5" class="tk">rtY</a>-&gt;<a id="2877c10" class="tk">pwm_Duty</a>[1] = (<a id="2877c25" class="tk">int16_T</a>)(<a id="2877c34" class="tk">rtb_Sum6_k</a> <a id="2877c45" class="tk">+</a> <a id="2877c47" class="tk">rtb_Sum1_a</a>);</td></tr>
+<td><a id="l2877" class='ln'>2877</a></td><td><span class="ct">     *  Product: '&lt;S60&gt;/Divide'</span></td></tr>
 <tr name="2878" id="2878">
-<td><a id="l2878" class='ln'>2878</a></td><td>    <a id="2878c5" class="tk">rtY</a>-&gt;<a id="2878c10" class="tk">pwm_Duty</a>[2] = <a id="2878c24" class="tk">rtb_Sum6_k</a>;</td></tr>
+<td><a id="l2878" class='ln'>2878</a></td><td><span class="ct">     *  Sum: '&lt;S60&gt;/Add'</span></td></tr>
 <tr name="2879" id="2879">
-<td><a id="l2879" class='ln'>2879</a></td><td>    <span class="kw">break</span>;</td></tr>
+<td><a id="l2879" class='ln'>2879</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2880" id="2880">
-<td><a id="l2880" class='ln'>2880</a></td><td></td></tr>
+<td><a id="l2880" class='ln'>2880</a></td><td>    <a id="2880c5" class="tk">rtb_Sum1_ak</a> = (<a id="2880c20" class="tk">int16_T</a>)(((<a id="2880c31" class="tk">int16_T</a>)(<a id="2880c40" class="tk">-</a><a id="2880c41" class="tk">rtb_Sum6</a> <a id="2880c50" class="tk">-</a> ((<a id="2880c54" class="tk">rtb_Sum1_ak</a> <a id="2880c66" class="tk">*</a> 9459) <a id="2880c74" class="tk">&gt;&gt;</a> 14))</td></tr>
 <tr name="2881" id="2881">
-<td><a id="l2881" class='ln'>2881</a></td><td>   <span class="kw">case</span> 4<a id="2881c10" class="tk">:</a></td></tr>
+<td><a id="l2881" class='ln'>2881</a></td><td>      <a id="2881c7" class="tk">*</a> (<a id="2881c10" class="tk">int16_T</a>)<a id="2881c18" class="tk">rtP</a>.<a id="2881c22" class="tk">i_pwm_count</a>) <a id="2881c35" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2882" id="2882">
-<td><a id="l2882" class='ln'>2882</a></td><td>    <span class="ct">/* Product: '&lt;S67&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l2882" class='ln'>2882</a></td><td></td></tr>
 <tr name="2883" id="2883">
-<td><a id="l2883" class='ln'>2883</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2883" class='ln'>2883</a></td><td>    <span class="ct">/* Product: '&lt;S60&gt;/Divide4' incorporates:</span></td></tr>
 <tr name="2884" id="2884">
-<td><a id="l2884" class='ln'>2884</a></td><td><span class="ct">     *  Constant: '&lt;S67&gt;/Constant'</span></td></tr>
+<td><a id="l2884" class='ln'>2884</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2885" id="2885">
-<td><a id="l2885" class='ln'>2885</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2885" class='ln'>2885</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2886" id="2886">
-<td><a id="l2886" class='ln'>2886</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
+<td><a id="l2886" class='ln'>2886</a></td><td><span class="ct">     *  Sum: '&lt;S60&gt;/Add1'</span></td></tr>
 <tr name="2887" id="2887">
-<td><a id="l2887" class='ln'>2887</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2887" class='ln'>2887</a></td><td><span class="ct">     *  Sum: '&lt;S60&gt;/Add2'</span></td></tr>
 <tr name="2888" id="2888">
-<td><a id="l2888" class='ln'>2888</a></td><td><span class="ct">     *  Product: '&lt;S67&gt;/Divide'</span></td></tr>
+<td><a id="l2888" class='ln'>2888</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2889" id="2889">
-<td><a id="l2889" class='ln'>2889</a></td><td><span class="ct">     *  Sum: '&lt;S67&gt;/Add'</span></td></tr>
+<td><a id="l2889" class='ln'>2889</a></td><td>    <a id="2889c5" class="tk">rtb_Switch2_pl</a> = (<a id="2889c23" class="tk">int16_T</a>)((<a id="2889c33" class="tk">int16_T</a>)((<a id="2889c43" class="tk">int16_T</a>)((<a id="2889c53" class="tk">int16_T</a>)<a id="2889c61" class="tk">rtP</a>.<a id="2889c65" class="tk">i_pwm_count</a> <a id="2889c77" class="tk">-</a></td></tr>
 <tr name="2890" id="2890">
-<td><a id="l2890" class='ln'>2890</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2890" class='ln'>2890</a></td><td>      <a id="2890c7" class="tk">rtb_Sum1_ak</a>) <a id="2890c20" class="tk">-</a> <a id="2890c22" class="tk">rtb_Divide3_k</a>) <a id="2890c37" class="tk">&gt;&gt;</a> 1);</td></tr>
 <tr name="2891" id="2891">
-<td><a id="l2891" class='ln'>2891</a></td><td>    <a id="2891c5" class="tk">rtb_Sum6_k</a> = (<a id="2891c19" class="tk">int16_T</a>)(((<a id="2891c30" class="tk">int16_T</a>)(((<a id="2891c41" class="tk">rtb_Sum1_a</a> <a id="2891c52" class="tk">*</a> 9459) <a id="2891c60" class="tk">&gt;&gt;</a> 14) <a id="2891c67" class="tk">-</a> <a id="2891c69" class="tk">rtb_Sum6_k</a>) <a id="2891c81" class="tk">*</a></td></tr>
+<td><a id="l2891" class='ln'>2891</a></td><td></td></tr>
 <tr name="2892" id="2892">
-<td><a id="l2892" class='ln'>2892</a></td><td>      (<a id="2892c8" class="tk">int16_T</a>)<a id="2892c16" class="tk">rtP</a>.<a id="2892c20" class="tk">i_pwm_count</a>) <a id="2892c33" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2892" class='ln'>2892</a></td><td>    <span class="ct">/* Sum: '&lt;S60&gt;/Add3' */</span></td></tr>
 <tr name="2893" id="2893">
-<td><a id="l2893" class='ln'>2893</a></td><td></td></tr>
+<td><a id="l2893" class='ln'>2893</a></td><td>    <a id="2893c5" class="tk">rtb_Sum6</a> = (<a id="2893c17" class="tk">int16_T</a>)(<a id="2893c26" class="tk">rtb_Switch2_pl</a> <a id="2893c41" class="tk">+</a> <a id="2893c43" class="tk">rtb_Divide3_k</a>);</td></tr>
 <tr name="2894" id="2894">
-<td><a id="l2894" class='ln'>2894</a></td><td>    <span class="ct">/* Product: '&lt;S67&gt;/Divide3' incorporates:</span></td></tr>
+<td><a id="l2894" class='ln'>2894</a></td><td></td></tr>
 <tr name="2895" id="2895">
-<td><a id="l2895" class='ln'>2895</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2895" class='ln'>2895</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/n_Duty' incorporates:</span></td></tr>
 <tr name="2896" id="2896">
-<td><a id="l2896" class='ln'>2896</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2896" class='ln'>2896</a></td><td><span class="ct">     *  Sum: '&lt;S60&gt;/Add4'</span></td></tr>
 <tr name="2897" id="2897">
-<td><a id="l2897" class='ln'>2897</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2897" class='ln'>2897</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2898" id="2898">
-<td><a id="l2898" class='ln'>2898</a></td><td><span class="ct">     *  Product: '&lt;S67&gt;/Divide2'</span></td></tr>
+<td><a id="l2898" class='ln'>2898</a></td><td>    <a id="2898c5" class="tk">rtY</a>-&gt;<a id="2898c10" class="tk">n_Duty</a>[0] = <a id="2898c22" class="tk">rtb_Sum6</a>;</td></tr>
 <tr name="2899" id="2899">
-<td><a id="l2899" class='ln'>2899</a></td><td><span class="ct">     *  Sum: '&lt;S67&gt;/Add5'</span></td></tr>
+<td><a id="l2899" class='ln'>2899</a></td><td>    <a id="2899c5" class="tk">rtY</a>-&gt;<a id="2899c10" class="tk">n_Duty</a>[1] = <a id="2899c22" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2900" id="2900">
-<td><a id="l2900" class='ln'>2900</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2900" class='ln'>2900</a></td><td>    <a id="2900c5" class="tk">rtY</a>-&gt;<a id="2900c10" class="tk">n_Duty</a>[2] = (<a id="2900c23" class="tk">int16_T</a>)(<a id="2900c32" class="tk">rtb_Sum6</a> <a id="2900c41" class="tk">+</a> <a id="2900c43" class="tk">rtb_Sum1_ak</a>);</td></tr>
 <tr name="2901" id="2901">
-<td><a id="l2901" class='ln'>2901</a></td><td>    <a id="2901c5" class="tk">rtb_Sum1_a</a> = (<a id="2901c19" class="tk">int16_T</a>)(((<a id="2901c30" class="tk">int16_T</a>)(<a id="2901c39" class="tk">-</a>((<a id="2901c42" class="tk">int16_T</a>)((<a id="2901c52" class="tk">rtb_Sum1_a</a> <a id="2901c63" class="tk">*</a> 9459) <a id="2901c71" class="tk">&gt;&gt;</a> 13) <a id="2901c78" class="tk">&lt;&lt;</a></td></tr>
+<td><a id="l2901" class='ln'>2901</a></td><td>    <span class="kw">break</span>;</td></tr>
 <tr name="2902" id="2902">
-<td><a id="l2902" class='ln'>2902</a></td><td>      2) <a id="2902c10" class="tk">&gt;&gt;</a> 2) <a id="2902c16" class="tk">*</a> (<a id="2902c19" class="tk">int16_T</a>)<a id="2902c27" class="tk">rtP</a>.<a id="2902c31" class="tk">i_pwm_count</a>) <a id="2902c44" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2902" class='ln'>2902</a></td><td></td></tr>
 <tr name="2903" id="2903">
-<td><a id="l2903" class='ln'>2903</a></td><td></td></tr>
+<td><a id="l2903" class='ln'>2903</a></td><td>   <span class="kw">default</span><a id="2903c11" class="tk">:</a></td></tr>
 <tr name="2904" id="2904">
-<td><a id="l2904" class='ln'>2904</a></td><td>    <span class="ct">/* Product: '&lt;S67&gt;/Divide4' incorporates:</span></td></tr>
+<td><a id="l2904" class='ln'>2904</a></td><td>    <span class="ct">/* Product: '&lt;S61&gt;/Divide3' incorporates:</span></td></tr>
 <tr name="2905" id="2905">
-<td><a id="l2905" class='ln'>2905</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2905" class='ln'>2905</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2906" id="2906">
-<td><a id="l2906" class='ln'>2906</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2906" class='ln'>2906</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2907" id="2907">
-<td><a id="l2907" class='ln'>2907</a></td><td><span class="ct">     *  Sum: '&lt;S67&gt;/Add1'</span></td></tr>
+<td><a id="l2907" class='ln'>2907</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2908" id="2908">
-<td><a id="l2908" class='ln'>2908</a></td><td><span class="ct">     *  Sum: '&lt;S67&gt;/Add2'</span></td></tr>
+<td><a id="l2908" class='ln'>2908</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide2'</span></td></tr>
 <tr name="2909" id="2909">
-<td><a id="l2909" class='ln'>2909</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2909" class='ln'>2909</a></td><td><span class="ct">     *  Sum: '&lt;S61&gt;/Add5'</span></td></tr>
 <tr name="2910" id="2910">
-<td><a id="l2910" class='ln'>2910</a></td><td>    <a id="2910c5" class="tk">rtb_Sum6_p</a> = (<a id="2910c19" class="tk">int16_T</a>)((<a id="2910c29" class="tk">int16_T</a>)((<a id="2910c39" class="tk">int16_T</a>)((<a id="2910c49" class="tk">int16_T</a>)<a id="2910c57" class="tk">rtP</a>.<a id="2910c61" class="tk">i_pwm_count</a> <a id="2910c73" class="tk">-</a></td></tr>
+<td><a id="l2910" class='ln'>2910</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2911" id="2911">
-<td><a id="l2911" class='ln'>2911</a></td><td>      <a id="2911c7" class="tk">rtb_Sum1_a</a>) <a id="2911c19" class="tk">-</a> <a id="2911c21" class="tk">rtb_Sum6_k</a>) <a id="2911c33" class="tk">&gt;&gt;</a> 1);</td></tr>
+<td><a id="l2911" class='ln'>2911</a></td><td>    <a id="2911c5" class="tk">rtb_Divide3_k</a> = (<a id="2911c22" class="tk">int16_T</a>)(((<a id="2911c33" class="tk">int16_T</a>)(<a id="2911c42" class="tk">-</a>((<a id="2911c45" class="tk">int16_T</a>)((<a id="2911c55" class="tk">rtb_Sum1_ak</a> <a id="2911c67" class="tk">*</a> 9459) <a id="2911c75" class="tk">&gt;&gt;</a> 13)</td></tr>
 <tr name="2912" id="2912">
-<td><a id="l2912" class='ln'>2912</a></td><td></td></tr>
+<td><a id="l2912" class='ln'>2912</a></td><td>      <a id="2912c7" class="tk">&lt;&lt;</a> 2) <a id="2912c13" class="tk">&gt;&gt;</a> 2) <a id="2912c19" class="tk">*</a> (<a id="2912c22" class="tk">int16_T</a>)<a id="2912c30" class="tk">rtP</a>.<a id="2912c34" class="tk">i_pwm_count</a>) <a id="2912c47" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2913" id="2913">
-<td><a id="l2913" class='ln'>2913</a></td><td>    <span class="ct">/* Sum: '&lt;S67&gt;/Add3' */</span></td></tr>
+<td><a id="l2913" class='ln'>2913</a></td><td></td></tr>
 <tr name="2914" id="2914">
-<td><a id="l2914" class='ln'>2914</a></td><td>    <a id="2914c5" class="tk">rtb_Sum6_k</a> <a id="2914c16" class="tk">+=</a> <a id="2914c19" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2914" class='ln'>2914</a></td><td>    <span class="ct">/* Product: '&lt;S61&gt;/Divide1' incorporates:</span></td></tr>
 <tr name="2915" id="2915">
-<td><a id="l2915" class='ln'>2915</a></td><td></td></tr>
+<td><a id="l2915" class='ln'>2915</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2916" id="2916">
-<td><a id="l2916" class='ln'>2916</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/pwm_Duty' incorporates:</span></td></tr>
+<td><a id="l2916" class='ln'>2916</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant'</span></td></tr>
 <tr name="2917" id="2917">
-<td><a id="l2917" class='ln'>2917</a></td><td><span class="ct">     *  Sum: '&lt;S67&gt;/Add4'</span></td></tr>
+<td><a id="l2917" class='ln'>2917</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2918" id="2918">
-<td><a id="l2918" class='ln'>2918</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2918" class='ln'>2918</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide'</span></td></tr>
 <tr name="2919" id="2919">
-<td><a id="l2919" class='ln'>2919</a></td><td>    <a id="2919c5" class="tk">rtY</a>-&gt;<a id="2919c10" class="tk">pwm_Duty</a>[0] = <a id="2919c24" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2919" class='ln'>2919</a></td><td><span class="ct">     *  Product: '&lt;S53&gt;/Divide1'</span></td></tr>
 <tr name="2920" id="2920">
-<td><a id="l2920" class='ln'>2920</a></td><td>    <a id="2920c5" class="tk">rtY</a>-&gt;<a id="2920c10" class="tk">pwm_Duty</a>[1] = <a id="2920c24" class="tk">rtb_Sum6_k</a>;</td></tr>
+<td><a id="l2920" class='ln'>2920</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
 <tr name="2921" id="2921">
-<td><a id="l2921" class='ln'>2921</a></td><td>    <a id="2921c5" class="tk">rtY</a>-&gt;<a id="2921c10" class="tk">pwm_Duty</a>[2] = (<a id="2921c25" class="tk">int16_T</a>)(<a id="2921c34" class="tk">rtb_Sum6_k</a> <a id="2921c45" class="tk">+</a> <a id="2921c47" class="tk">rtb_Sum1_a</a>);</td></tr>
+<td><a id="l2921" class='ln'>2921</a></td><td><span class="ct">     *  Sum: '&lt;S61&gt;/Add'</span></td></tr>
 <tr name="2922" id="2922">
-<td><a id="l2922" class='ln'>2922</a></td><td>    <span class="kw">break</span>;</td></tr>
+<td><a id="l2922" class='ln'>2922</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2923" id="2923">
-<td><a id="l2923" class='ln'>2923</a></td><td></td></tr>
+<td><a id="l2923" class='ln'>2923</a></td><td>    <a id="2923c5" class="tk">rtb_Sum1_ak</a> = (<a id="2923c20" class="tk">int16_T</a>)(((<a id="2923c31" class="tk">int16_T</a>)(((<a id="2923c42" class="tk">rtb_Sum1_ak</a> <a id="2923c54" class="tk">*</a> 9459) <a id="2923c62" class="tk">&gt;&gt;</a> 14) <a id="2923c69" class="tk">+</a> <a id="2923c71" class="tk">rtb_Sum6</a>) <a id="2923c81" class="tk">*</a></td></tr>
 <tr name="2924" id="2924">
-<td><a id="l2924" class='ln'>2924</a></td><td>   <span class="kw">case</span> 5<a id="2924c10" class="tk">:</a></td></tr>
+<td><a id="l2924" class='ln'>2924</a></td><td>      (<a id="2924c8" class="tk">int16_T</a>)<a id="2924c16" class="tk">rtP</a>.<a id="2924c20" class="tk">i_pwm_count</a>) <a id="2924c33" class="tk">&gt;&gt;</a> 12);</td></tr>
 <tr name="2925" id="2925">
-<td><a id="l2925" class='ln'>2925</a></td><td>    <span class="ct">/* Product: '&lt;S68&gt;/Divide3' incorporates:</span></td></tr>
+<td><a id="l2925" class='ln'>2925</a></td><td></td></tr>
 <tr name="2926" id="2926">
-<td><a id="l2926" class='ln'>2926</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2926" class='ln'>2926</a></td><td>    <span class="ct">/* Product: '&lt;S61&gt;/Divide4' incorporates:</span></td></tr>
 <tr name="2927" id="2927">
-<td><a id="l2927" class='ln'>2927</a></td><td><span class="ct">     *  Constant: '&lt;S68&gt;/Constant'</span></td></tr>
+<td><a id="l2927" class='ln'>2927</a></td><td><span class="ct">     *  Constant: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="2928" id="2928">
-<td><a id="l2928" class='ln'>2928</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2928" class='ln'>2928</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S53&gt;/Data Type Conversion2'</span></td></tr>
 <tr name="2929" id="2929">
-<td><a id="l2929" class='ln'>2929</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
+<td><a id="l2929" class='ln'>2929</a></td><td><span class="ct">     *  Sum: '&lt;S61&gt;/Add1'</span></td></tr>
 <tr name="2930" id="2930">
-<td><a id="l2930" class='ln'>2930</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2930" class='ln'>2930</a></td><td><span class="ct">     *  Sum: '&lt;S61&gt;/Add2'</span></td></tr>
 <tr name="2931" id="2931">
-<td><a id="l2931" class='ln'>2931</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide2'</span></td></tr>
+<td><a id="l2931" class='ln'>2931</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2932" id="2932">
-<td><a id="l2932" class='ln'>2932</a></td><td><span class="ct">     *  Sum: '&lt;S68&gt;/Add5'</span></td></tr>
+<td><a id="l2932" class='ln'>2932</a></td><td>    <a id="2932c5" class="tk">rtb_Switch2_pl</a> = (<a id="2932c23" class="tk">int16_T</a>)((<a id="2932c33" class="tk">int16_T</a>)((<a id="2932c43" class="tk">int16_T</a>)((<a id="2932c53" class="tk">int16_T</a>)<a id="2932c61" class="tk">rtP</a>.<a id="2932c65" class="tk">i_pwm_count</a> <a id="2932c77" class="tk">-</a></td></tr>
 <tr name="2933" id="2933">
-<td><a id="l2933" class='ln'>2933</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2933" class='ln'>2933</a></td><td>      <a id="2933c7" class="tk">rtb_Sum1_ak</a>) <a id="2933c20" class="tk">-</a> <a id="2933c22" class="tk">rtb_Divide3_k</a>) <a id="2933c37" class="tk">&gt;&gt;</a> 1);</td></tr>
 <tr name="2934" id="2934">
-<td><a id="l2934" class='ln'>2934</a></td><td>    <a id="2934c5" class="tk">rtb_Divide3_k</a> = (<a id="2934c22" class="tk">int16_T</a>)(((<a id="2934c33" class="tk">int16_T</a>)(<a id="2934c42" class="tk">rtb_Sum6_k</a> <a id="2934c53" class="tk">-</a> ((<a id="2934c57" class="tk">rtb_Sum1_a</a> <a id="2934c68" class="tk">*</a> 9459) <a id="2934c76" class="tk">&gt;&gt;</a> 14))</td></tr>
+<td><a id="l2934" class='ln'>2934</a></td><td></td></tr>
 <tr name="2935" id="2935">
-<td><a id="l2935" class='ln'>2935</a></td><td>      <a id="2935c7" class="tk">*</a> (<a id="2935c10" class="tk">int16_T</a>)<a id="2935c18" class="tk">rtP</a>.<a id="2935c22" class="tk">i_pwm_count</a>) <a id="2935c35" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2935" class='ln'>2935</a></td><td>    <span class="ct">/* Sum: '&lt;S61&gt;/Add3' */</span></td></tr>
 <tr name="2936" id="2936">
-<td><a id="l2936" class='ln'>2936</a></td><td></td></tr>
+<td><a id="l2936" class='ln'>2936</a></td><td>    <a id="2936c5" class="tk">rtb_Sum6</a> = (<a id="2936c17" class="tk">int16_T</a>)(<a id="2936c26" class="tk">rtb_Switch2_pl</a> <a id="2936c41" class="tk">+</a> <a id="2936c43" class="tk">rtb_Divide3_k</a>);</td></tr>
 <tr name="2937" id="2937">
-<td><a id="l2937" class='ln'>2937</a></td><td>    <span class="ct">/* Product: '&lt;S68&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l2937" class='ln'>2937</a></td><td></td></tr>
 <tr name="2938" id="2938">
-<td><a id="l2938" class='ln'>2938</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2938" class='ln'>2938</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/n_Duty' incorporates:</span></td></tr>
 <tr name="2939" id="2939">
-<td><a id="l2939" class='ln'>2939</a></td><td><span class="ct">     *  Constant: '&lt;S68&gt;/Constant'</span></td></tr>
+<td><a id="l2939" class='ln'>2939</a></td><td><span class="ct">     *  Sum: '&lt;S61&gt;/Add4'</span></td></tr>
 <tr name="2940" id="2940">
-<td><a id="l2940" class='ln'>2940</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2940" class='ln'>2940</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2941" id="2941">
-<td><a id="l2941" class='ln'>2941</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
+<td><a id="l2941" class='ln'>2941</a></td><td>    <a id="2941c5" class="tk">rtY</a>-&gt;<a id="2941c10" class="tk">n_Duty</a>[0] = (<a id="2941c23" class="tk">int16_T</a>)(<a id="2941c32" class="tk">rtb_Sum6</a> <a id="2941c41" class="tk">+</a> <a id="2941c43" class="tk">rtb_Sum1_ak</a>);</td></tr>
 <tr name="2942" id="2942">
-<td><a id="l2942" class='ln'>2942</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2942" class='ln'>2942</a></td><td>    <a id="2942c5" class="tk">rtY</a>-&gt;<a id="2942c10" class="tk">n_Duty</a>[1] = <a id="2942c22" class="tk">rtb_Switch2_pl</a>;</td></tr>
 <tr name="2943" id="2943">
-<td><a id="l2943" class='ln'>2943</a></td><td><span class="ct">     *  Product: '&lt;S68&gt;/Divide'</span></td></tr>
+<td><a id="l2943" class='ln'>2943</a></td><td>    <a id="2943c5" class="tk">rtY</a>-&gt;<a id="2943c10" class="tk">n_Duty</a>[2] = <a id="2943c22" class="tk">rtb_Sum6</a>;</td></tr>
 <tr name="2944" id="2944">
-<td><a id="l2944" class='ln'>2944</a></td><td><span class="ct">     *  Sum: '&lt;S68&gt;/Add'</span></td></tr>
+<td><a id="l2944" class='ln'>2944</a></td><td>    <span class="kw">break</span>;</td></tr>
 <tr name="2945" id="2945">
-<td><a id="l2945" class='ln'>2945</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2945" class='ln'>2945</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2946" id="2946">
-<td><a id="l2946" class='ln'>2946</a></td><td>    <a id="2946c5" class="tk">rtb_Sum1_a</a> = (<a id="2946c19" class="tk">int16_T</a>)(((<a id="2946c30" class="tk">int16_T</a>)(<a id="2946c39" class="tk">-</a><a id="2946c40" class="tk">rtb_Sum6_k</a> <a id="2946c51" class="tk">-</a> ((<a id="2946c55" class="tk">rtb_Sum1_a</a> <a id="2946c66" class="tk">*</a> 9459) <a id="2946c74" class="tk">&gt;&gt;</a> 14))</td></tr>
+<td><a id="l2946" class='ln'>2946</a></td><td></td></tr>
 <tr name="2947" id="2947">
-<td><a id="l2947" class='ln'>2947</a></td><td>      <a id="2947c7" class="tk">*</a> (<a id="2947c10" class="tk">int16_T</a>)<a id="2947c18" class="tk">rtP</a>.<a id="2947c22" class="tk">i_pwm_count</a>) <a id="2947c35" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2947" class='ln'>2947</a></td><td>  <span class="ct">/* End of MultiPortSwitch: '&lt;S54&gt;/Multiport Switch' */</span></td></tr>
 <tr name="2948" id="2948">
 <td><a id="l2948" class='ln'>2948</a></td><td></td></tr>
 <tr name="2949" id="2949">
-<td><a id="l2949" class='ln'>2949</a></td><td>    <span class="ct">/* Product: '&lt;S68&gt;/Divide4' incorporates:</span></td></tr>
+<td><a id="l2949" class='ln'>2949</a></td><td>  <span class="ct">/* Switch: '&lt;S109&gt;/Switch2' */</span></td></tr>
 <tr name="2950" id="2950">
-<td><a id="l2950" class='ln'>2950</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2950" class='ln'>2950</a></td><td>  <span class="kw">if</span> (<a id="2950c7" class="tk">rtb_UnitDelay_c</a>) <span class="br">{</span></td></tr>
 <tr name="2951" id="2951">
-<td><a id="l2951" class='ln'>2951</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2951" class='ln'>2951</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S109&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="2952" id="2952">
-<td><a id="l2952" class='ln'>2952</a></td><td><span class="ct">     *  Sum: '&lt;S68&gt;/Add1'</span></td></tr>
+<td><a id="l2952" class='ln'>2952</a></td><td><span class="ct">     *  UnitDelay: '&lt;S88&gt;/Unit Delay1'</span></td></tr>
 <tr name="2953" id="2953">
-<td><a id="l2953" class='ln'>2953</a></td><td><span class="ct">     *  Sum: '&lt;S68&gt;/Add2'</span></td></tr>
+<td><a id="l2953" class='ln'>2953</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2954" id="2954">
-<td><a id="l2954" class='ln'>2954</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2954" class='ln'>2954</a></td><td>    <a id="2954c5" class="tk">rtDW</a>-&gt;<a id="2954c11" class="tk">UnitDelay_DSTATE_o</a> = <a id="2954c32" class="tk">rtDW</a>-&gt;<a id="2954c38" class="tk">UnitDelay1_DSTATE_p</a>;</td></tr>
 <tr name="2955" id="2955">
-<td><a id="l2955" class='ln'>2955</a></td><td>    <a id="2955c5" class="tk">rtb_Sum6_p</a> = (<a id="2955c19" class="tk">int16_T</a>)((<a id="2955c29" class="tk">int16_T</a>)((<a id="2955c39" class="tk">int16_T</a>)((<a id="2955c49" class="tk">int16_T</a>)<a id="2955c57" class="tk">rtP</a>.<a id="2955c61" class="tk">i_pwm_count</a> <a id="2955c73" class="tk">-</a></td></tr>
+<td><a id="l2955" class='ln'>2955</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2956" id="2956">
-<td><a id="l2956" class='ln'>2956</a></td><td>      <a id="2956c7" class="tk">rtb_Sum1_a</a>) <a id="2956c19" class="tk">-</a> <a id="2956c21" class="tk">rtb_Divide3_k</a>) <a id="2956c36" class="tk">&gt;&gt;</a> 1);</td></tr>
+<td><a id="l2956" class='ln'>2956</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S109&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="2957" id="2957">
-<td><a id="l2957" class='ln'>2957</a></td><td></td></tr>
+<td><a id="l2957" class='ln'>2957</a></td><td><span class="ct">     *  Sum: '&lt;S108&gt;/Add2'</span></td></tr>
 <tr name="2958" id="2958">
-<td><a id="l2958" class='ln'>2958</a></td><td>    <span class="ct">/* Sum: '&lt;S68&gt;/Add3' */</span></td></tr>
+<td><a id="l2958" class='ln'>2958</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2959" id="2959">
-<td><a id="l2959" class='ln'>2959</a></td><td>    <a id="2959c5" class="tk">rtb_Sum6_k</a> = (<a id="2959c19" class="tk">int16_T</a>)(<a id="2959c28" class="tk">rtb_Sum6_p</a> <a id="2959c39" class="tk">+</a> <a id="2959c41" class="tk">rtb_Divide3_k</a>);</td></tr>
+<td><a id="l2959" class='ln'>2959</a></td><td>    <a id="2959c5" class="tk">rtDW</a>-&gt;<a id="2959c11" class="tk">UnitDelay_DSTATE_o</a> = (<a id="2959c33" class="tk">int16_T</a>)<a id="2959c41" class="tk">rtb_Divide_e_idx_1</a>;</td></tr>
 <tr name="2960" id="2960">
-<td><a id="l2960" class='ln'>2960</a></td><td></td></tr>
+<td><a id="l2960" class='ln'>2960</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2961" id="2961">
-<td><a id="l2961" class='ln'>2961</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/pwm_Duty' incorporates:</span></td></tr>
+<td><a id="l2961" class='ln'>2961</a></td><td></td></tr>
 <tr name="2962" id="2962">
-<td><a id="l2962" class='ln'>2962</a></td><td><span class="ct">     *  Sum: '&lt;S68&gt;/Add4'</span></td></tr>
+<td><a id="l2962" class='ln'>2962</a></td><td>  <span class="ct">/* End of Switch: '&lt;S109&gt;/Switch2' */</span></td></tr>
 <tr name="2963" id="2963">
-<td><a id="l2963" class='ln'>2963</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2963" class='ln'>2963</a></td><td></td></tr>
 <tr name="2964" id="2964">
-<td><a id="l2964" class='ln'>2964</a></td><td>    <a id="2964c5" class="tk">rtY</a>-&gt;<a id="2964c10" class="tk">pwm_Duty</a>[0] = <a id="2964c24" class="tk">rtb_Sum6_k</a>;</td></tr>
+<td><a id="l2964" class='ln'>2964</a></td><td>  <span class="ct">/* Switch: '&lt;S102&gt;/Switch2' */</span></td></tr>
 <tr name="2965" id="2965">
-<td><a id="l2965" class='ln'>2965</a></td><td>    <a id="2965c5" class="tk">rtY</a>-&gt;<a id="2965c10" class="tk">pwm_Duty</a>[1] = <a id="2965c24" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l2965" class='ln'>2965</a></td><td>  <span class="kw">if</span> (<a id="2965c7" class="tk">rtb_LogicalOperator1_g</a>) <span class="br">{</span></td></tr>
 <tr name="2966" id="2966">
-<td><a id="l2966" class='ln'>2966</a></td><td>    <a id="2966c5" class="tk">rtY</a>-&gt;<a id="2966c10" class="tk">pwm_Duty</a>[2] = (<a id="2966c25" class="tk">int16_T</a>)(<a id="2966c34" class="tk">rtb_Sum6_k</a> <a id="2966c45" class="tk">+</a> <a id="2966c47" class="tk">rtb_Sum1_a</a>);</td></tr>
+<td><a id="l2966" class='ln'>2966</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S102&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="2967" id="2967">
-<td><a id="l2967" class='ln'>2967</a></td><td>    <span class="kw">break</span>;</td></tr>
+<td><a id="l2967" class='ln'>2967</a></td><td><span class="ct">     *  UnitDelay: '&lt;S87&gt;/Unit Delay1'</span></td></tr>
 <tr name="2968" id="2968">
-<td><a id="l2968" class='ln'>2968</a></td><td></td></tr>
+<td><a id="l2968" class='ln'>2968</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2969" id="2969">
-<td><a id="l2969" class='ln'>2969</a></td><td>   <span class="kw">default</span><a id="2969c11" class="tk">:</a></td></tr>
+<td><a id="l2969" class='ln'>2969</a></td><td>    <a id="2969c5" class="tk">rtDW</a>-&gt;<a id="2969c11" class="tk">UnitDelay_DSTATE_g</a> = <a id="2969c32" class="tk">rtDW</a>-&gt;<a id="2969c38" class="tk">UnitDelay1_DSTATE_j</a>;</td></tr>
 <tr name="2970" id="2970">
-<td><a id="l2970" class='ln'>2970</a></td><td>    <span class="ct">/* Product: '&lt;S69&gt;/Divide3' incorporates:</span></td></tr>
+<td><a id="l2970" class='ln'>2970</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
 <tr name="2971" id="2971">
-<td><a id="l2971" class='ln'>2971</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2971" class='ln'>2971</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S102&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="2972" id="2972">
-<td><a id="l2972" class='ln'>2972</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2972" class='ln'>2972</a></td><td><span class="ct">     *  Sum: '&lt;S101&gt;/Add2'</span></td></tr>
 <tr name="2973" id="2973">
-<td><a id="l2973" class='ln'>2973</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2973" class='ln'>2973</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2974" id="2974">
-<td><a id="l2974" class='ln'>2974</a></td><td><span class="ct">     *  Product: '&lt;S69&gt;/Divide2'</span></td></tr>
+<td><a id="l2974" class='ln'>2974</a></td><td>    <a id="2974c5" class="tk">rtDW</a>-&gt;<a id="2974c11" class="tk">UnitDelay_DSTATE_g</a> = (<a id="2974c33" class="tk">int16_T</a>)<a id="2974c41" class="tk">rtb_RelationalOperator4_b</a>;</td></tr>
 <tr name="2975" id="2975">
-<td><a id="l2975" class='ln'>2975</a></td><td><span class="ct">     *  Sum: '&lt;S69&gt;/Add5'</span></td></tr>
+<td><a id="l2975" class='ln'>2975</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2976" id="2976">
-<td><a id="l2976" class='ln'>2976</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2976" class='ln'>2976</a></td><td></td></tr>
 <tr name="2977" id="2977">
-<td><a id="l2977" class='ln'>2977</a></td><td>    <a id="2977c5" class="tk">rtb_Divide3_k</a> = (<a id="2977c22" class="tk">int16_T</a>)(((<a id="2977c33" class="tk">int16_T</a>)(<a id="2977c42" class="tk">-</a>((<a id="2977c45" class="tk">int16_T</a>)((<a id="2977c55" class="tk">rtb_Sum1_a</a> <a id="2977c66" class="tk">*</a> 9459) <a id="2977c74" class="tk">&gt;&gt;</a> 13) <a id="2977c81" class="tk">&lt;&lt;</a></td></tr>
+<td><a id="l2977" class='ln'>2977</a></td><td>  <span class="ct">/* End of Switch: '&lt;S102&gt;/Switch2' */</span></td></tr>
 <tr name="2978" id="2978">
-<td><a id="l2978" class='ln'>2978</a></td><td>      2) <a id="2978c10" class="tk">&gt;&gt;</a> 2) <a id="2978c16" class="tk">*</a> (<a id="2978c19" class="tk">int16_T</a>)<a id="2978c27" class="tk">rtP</a>.<a id="2978c31" class="tk">i_pwm_count</a>) <a id="2978c44" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2978" class='ln'>2978</a></td><td></td></tr>
 <tr name="2979" id="2979">
-<td><a id="l2979" class='ln'>2979</a></td><td></td></tr>
+<td><a id="l2979" class='ln'>2979</a></td><td>  <span class="ct">/* Switch: '&lt;S5&gt;/Switch1' incorporates:</span></td></tr>
 <tr name="2980" id="2980">
-<td><a id="l2980" class='ln'>2980</a></td><td>    <span class="ct">/* Product: '&lt;S69&gt;/Divide1' incorporates:</span></td></tr>
+<td><a id="l2980" class='ln'>2980</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S7&gt;/Relational Operator'</span></td></tr>
 <tr name="2981" id="2981">
-<td><a id="l2981" class='ln'>2981</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2981" class='ln'>2981</a></td><td><span class="ct">   *  UnitDelay: '&lt;S7&gt;/UnitDelay'</span></td></tr>
 <tr name="2982" id="2982">
-<td><a id="l2982" class='ln'>2982</a></td><td><span class="ct">     *  Constant: '&lt;S69&gt;/Constant'</span></td></tr>
+<td><a id="l2982" class='ln'>2982</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="2983" id="2983">
-<td><a id="l2983" class='ln'>2983</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2983" class='ln'>2983</a></td><td>  <span class="kw">if</span> (<a id="2983c7" class="tk">rtb_RelationalOperator</a> <a id="2983c30" class="tk">!=</a> <a id="2983c33" class="tk">rtDW</a>-&gt;<a id="2983c39" class="tk">UnitDelay_DSTATE_f</a>) <span class="br">{</span></td></tr>
 <tr name="2984" id="2984">
-<td><a id="l2984" class='ln'>2984</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide'</span></td></tr>
+<td><a id="l2984" class='ln'>2984</a></td><td>    <a id="2984c5" class="tk">rtb_UnitDelay_n</a> = <a id="2984c23" class="tk">rtb_Sum_d</a>;</td></tr>
 <tr name="2985" id="2985">
-<td><a id="l2985" class='ln'>2985</a></td><td><span class="ct">     *  Product: '&lt;S61&gt;/Divide1'</span></td></tr>
+<td><a id="l2985" class='ln'>2985</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="2986" id="2986">
-<td><a id="l2986" class='ln'>2986</a></td><td><span class="ct">     *  Product: '&lt;S69&gt;/Divide'</span></td></tr>
+<td><a id="l2986" class='ln'>2986</a></td><td></td></tr>
 <tr name="2987" id="2987">
-<td><a id="l2987" class='ln'>2987</a></td><td><span class="ct">     *  Sum: '&lt;S69&gt;/Add'</span></td></tr>
+<td><a id="l2987" class='ln'>2987</a></td><td>  <span class="ct">/* End of Switch: '&lt;S5&gt;/Switch1' */</span></td></tr>
 <tr name="2988" id="2988">
-<td><a id="l2988" class='ln'>2988</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2988" class='ln'>2988</a></td><td></td></tr>
 <tr name="2989" id="2989">
-<td><a id="l2989" class='ln'>2989</a></td><td>    <a id="2989c5" class="tk">rtb_Sum1_a</a> = (<a id="2989c19" class="tk">int16_T</a>)(((<a id="2989c30" class="tk">int16_T</a>)(((<a id="2989c41" class="tk">rtb_Sum1_a</a> <a id="2989c52" class="tk">*</a> 9459) <a id="2989c60" class="tk">&gt;&gt;</a> 14) <a id="2989c67" class="tk">+</a> <a id="2989c69" class="tk">rtb_Sum6_k</a>) <a id="2989c81" class="tk">*</a></td></tr>
+<td><a id="l2989" class='ln'>2989</a></td><td>  <span class="ct">/* If: '&lt;S20&gt;/If1' */</span></td></tr>
 <tr name="2990" id="2990">
-<td><a id="l2990" class='ln'>2990</a></td><td>      (<a id="2990c8" class="tk">int16_T</a>)<a id="2990c16" class="tk">rtP</a>.<a id="2990c20" class="tk">i_pwm_count</a>) <a id="2990c33" class="tk">&gt;&gt;</a> 12);</td></tr>
+<td><a id="l2990" class='ln'>2990</a></td><td>  <span class="kw">if</span> (<a id="2990c7" class="tk">rtb_Edge_Detect</a>) <span class="br">{</span></td></tr>
 <tr name="2991" id="2991">
-<td><a id="l2991" class='ln'>2991</a></td><td></td></tr>
+<td><a id="l2991" class='ln'>2991</a></td><td>    <span class="ct">/* Outputs for IfAction SubSystem: '&lt;S20&gt;/AdvCtrlDetect' incorporates:</span></td></tr>
 <tr name="2992" id="2992">
-<td><a id="l2992" class='ln'>2992</a></td><td>    <span class="ct">/* Product: '&lt;S69&gt;/Divide4' incorporates:</span></td></tr>
+<td><a id="l2992" class='ln'>2992</a></td><td><span class="ct">     *  ActionPort: '&lt;S28&gt;/Action Port'</span></td></tr>
 <tr name="2993" id="2993">
-<td><a id="l2993" class='ln'>2993</a></td><td><span class="ct">     *  Constant: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l2993" class='ln'>2993</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2994" id="2994">
-<td><a id="l2994" class='ln'>2994</a></td><td><span class="ct">     *  DataTypeConversion: '&lt;S61&gt;/Data Type Conversion2'</span></td></tr>
+<td><a id="l2994" class='ln'>2994</a></td><td>    <span class="ct">/* Relay: '&lt;S28&gt;/n_commDeacv' incorporates:</span></td></tr>
 <tr name="2995" id="2995">
-<td><a id="l2995" class='ln'>2995</a></td><td><span class="ct">     *  Sum: '&lt;S69&gt;/Add1'</span></td></tr>
+<td><a id="l2995" class='ln'>2995</a></td><td><span class="ct">     *  Abs: '&lt;S20&gt;/Abs5'</span></td></tr>
 <tr name="2996" id="2996">
-<td><a id="l2996" class='ln'>2996</a></td><td><span class="ct">     *  Sum: '&lt;S69&gt;/Add2'</span></td></tr>
+<td><a id="l2996" class='ln'>2996</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="2997" id="2997">
-<td><a id="l2997" class='ln'>2997</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l2997" class='ln'>2997</a></td><td>    <a id="2997c5" class="tk">rtDW</a>-&gt;<a id="2997c11" class="tk">n_commDeacv_Mode</a> = ((<a id="2997c32" class="tk">rtb_Rem1</a> <a id="2997c41" class="tk">&gt;=</a> 480U) <a id="2997c50" class="tk">||</a> ((<a id="2997c55" class="tk">rtb_Rem1</a> <a id="2997c64" class="tk">&gt;</a> 240U) <a id="2997c72" class="tk">&amp;&amp;</a></td></tr>
 <tr name="2998" id="2998">
-<td><a id="l2998" class='ln'>2998</a></td><td>    <a id="2998c5" class="tk">rtb_Sum6_p</a> = (<a id="2998c19" class="tk">int16_T</a>)((<a id="2998c29" class="tk">int16_T</a>)((<a id="2998c39" class="tk">int16_T</a>)((<a id="2998c49" class="tk">int16_T</a>)<a id="2998c57" class="tk">rtP</a>.<a id="2998c61" class="tk">i_pwm_count</a> <a id="2998c73" class="tk">-</a></td></tr>
+<td><a id="l2998" class='ln'>2998</a></td><td>      <a id="2998c7" class="tk">rtDW</a>-&gt;<a id="2998c13" class="tk">n_commDeacv_Mode</a>));</td></tr>
 <tr name="2999" id="2999">
-<td><a id="l2999" class='ln'>2999</a></td><td>      <a id="2999c7" class="tk">rtb_Sum1_a</a>) <a id="2999c19" class="tk">-</a> <a id="2999c21" class="tk">rtb_Divide3_k</a>) <a id="2999c36" class="tk">&gt;&gt;</a> 1);</td></tr>
+<td><a id="l2999" class='ln'>2999</a></td><td></td></tr>
 <tr name="3000" id="3000">
-<td><a id="l3000" class='ln'>3000</a></td><td></td></tr>
+<td><a id="l3000" class='ln'>3000</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/b_advCtrl' incorporates:</span></td></tr>
 <tr name="3001" id="3001">
-<td><a id="l3001" class='ln'>3001</a></td><td>    <span class="ct">/* Sum: '&lt;S69&gt;/Add3' */</span></td></tr>
+<td><a id="l3001" class='ln'>3001</a></td><td><span class="ct">     *  Constant: '&lt;S30&gt;/Constant'</span></td></tr>
 <tr name="3002" id="3002">
-<td><a id="l3002" class='ln'>3002</a></td><td>    <a id="3002c5" class="tk">rtb_Sum6_k</a> = (<a id="3002c19" class="tk">int16_T</a>)(<a id="3002c28" class="tk">rtb_Sum6_p</a> <a id="3002c39" class="tk">+</a> <a id="3002c41" class="tk">rtb_Divide3_k</a>);</td></tr>
+<td><a id="l3002" class='ln'>3002</a></td><td><span class="ct">     *  RelationalOperator: '&lt;S30&gt;/Compare'</span></td></tr>
 <tr name="3003" id="3003">
-<td><a id="l3003" class='ln'>3003</a></td><td></td></tr>
+<td><a id="l3003" class='ln'>3003</a></td><td><span class="ct">     *  Relay: '&lt;S28&gt;/n_commDeacv'</span></td></tr>
 <tr name="3004" id="3004">
-<td><a id="l3004" class='ln'>3004</a></td><td>    <span class="ct">/* Outport: '&lt;Root&gt;/pwm_Duty' incorporates:</span></td></tr>
+<td><a id="l3004" class='ln'>3004</a></td><td><span class="ct">     *  Sum: '&lt;S28&gt;/Sum13'</span></td></tr>
 <tr name="3005" id="3005">
-<td><a id="l3005" class='ln'>3005</a></td><td><span class="ct">     *  Sum: '&lt;S69&gt;/Add4'</span></td></tr>
+<td><a id="l3005" class='ln'>3005</a></td><td><span class="ct">     *  UnitDelay: '&lt;S28&gt;/UnitDelay2'</span></td></tr>
 <tr name="3006" id="3006">
-<td><a id="l3006" class='ln'>3006</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3006" class='ln'>3006</a></td><td><span class="ct">     *  UnitDelay: '&lt;S28&gt;/UnitDelay3'</span></td></tr>
 <tr name="3007" id="3007">
-<td><a id="l3007" class='ln'>3007</a></td><td>    <a id="3007c5" class="tk">rtY</a>-&gt;<a id="3007c10" class="tk">pwm_Duty</a>[0] = (<a id="3007c25" class="tk">int16_T</a>)(<a id="3007c34" class="tk">rtb_Sum6_k</a> <a id="3007c45" class="tk">+</a> <a id="3007c47" class="tk">rtb_Sum1_a</a>);</td></tr>
+<td><a id="l3007" class='ln'>3007</a></td><td><span class="ct">     *  UnitDelay: '&lt;S28&gt;/UnitDelay5'</span></td></tr>
 <tr name="3008" id="3008">
-<td><a id="l3008" class='ln'>3008</a></td><td>    <a id="3008c5" class="tk">rtY</a>-&gt;<a id="3008c10" class="tk">pwm_Duty</a>[1] = <a id="3008c24" class="tk">rtb_Sum6_p</a>;</td></tr>
+<td><a id="l3008" class='ln'>3008</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3009" id="3009">
-<td><a id="l3009" class='ln'>3009</a></td><td>    <a id="3009c5" class="tk">rtY</a>-&gt;<a id="3009c10" class="tk">pwm_Duty</a>[2] = <a id="3009c24" class="tk">rtb_Sum6_k</a>;</td></tr>
+<td><a id="l3009" class='ln'>3009</a></td><td>    <a id="3009c5" class="tk">rtY</a>-&gt;<a id="3009c10" class="tk">b_advCtrl</a> = ((<a id="3009c24" class="tk">uint16_T</a>)((<a id="3009c35" class="tk">uint32_T</a>)(<a id="3009c45" class="tk">uint16_T</a>)((<a id="3009c56" class="tk">uint32_T</a>)(<a id="3009c66" class="tk">uint16_T</a>)</td></tr>
 <tr name="3010" id="3010">
-<td><a id="l3010" class='ln'>3010</a></td><td>    <span class="kw">break</span>;</td></tr>
+<td><a id="l3010" class='ln'>3010</a></td><td>      ((<a id="3010c9" class="tk">uint32_T</a>)<a id="3010c18" class="tk">rtDW</a>-&gt;<a id="3010c24" class="tk">UnitDelay2_DSTATE_o</a> <a id="3010c44" class="tk">+</a> <a id="3010c46" class="tk">rtDW</a>-&gt;<a id="3010c52" class="tk">UnitDelay3_DSTATE_p</a>) <a id="3010c73" class="tk">+</a></td></tr>
 <tr name="3011" id="3011">
-<td><a id="l3011" class='ln'>3011</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l3011" class='ln'>3011</a></td><td>      <a id="3011c7" class="tk">rtDW</a>-&gt;<a id="3011c13" class="tk">UnitDelay5_DSTATE_m</a>) <a id="3011c34" class="tk">+</a> <a id="3011c36" class="tk">rtDW</a>-&gt;<a id="3011c42" class="tk">n_commDeacv_Mode</a>) <a id="3011c60" class="tk">&gt;=</a> 4);</td></tr>
 <tr name="3012" id="3012">
 <td><a id="l3012" class='ln'>3012</a></td><td></td></tr>
 <tr name="3013" id="3013">
-<td><a id="l3013" class='ln'>3013</a></td><td>  <span class="ct">/* End of MultiPortSwitch: '&lt;S62&gt;/Multiport Switch' */</span></td></tr>
+<td><a id="l3013" class='ln'>3013</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S28&gt;/UnitDelay2' incorporates:</span></td></tr>
 <tr name="3014" id="3014">
-<td><a id="l3014" class='ln'>3014</a></td><td></td></tr>
+<td><a id="l3014" class='ln'>3014</a></td><td><span class="ct">     *  UnitDelay: '&lt;S28&gt;/UnitDelay3'</span></td></tr>
 <tr name="3015" id="3015">
-<td><a id="l3015" class='ln'>3015</a></td><td>  <span class="ct">/* Switch: '&lt;S119&gt;/Switch2' */</span></td></tr>
+<td><a id="l3015" class='ln'>3015</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3016" id="3016">
-<td><a id="l3016" class='ln'>3016</a></td><td>  <span class="kw">if</span> (<a id="3016c7" class="tk">rtb_LogicalOperator12</a>) <span class="br">{</span></td></tr>
+<td><a id="l3016" class='ln'>3016</a></td><td>    <a id="3016c5" class="tk">rtDW</a>-&gt;<a id="3016c11" class="tk">UnitDelay2_DSTATE_o</a> = <a id="3016c33" class="tk">rtDW</a>-&gt;<a id="3016c39" class="tk">UnitDelay3_DSTATE_p</a>;</td></tr>
 <tr name="3017" id="3017">
-<td><a id="l3017" class='ln'>3017</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S119&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l3017" class='ln'>3017</a></td><td></td></tr>
 <tr name="3018" id="3018">
-<td><a id="l3018" class='ln'>3018</a></td><td><span class="ct">     *  UnitDelay: '&lt;S98&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l3018" class='ln'>3018</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S28&gt;/UnitDelay3' incorporates:</span></td></tr>
 <tr name="3019" id="3019">
-<td><a id="l3019" class='ln'>3019</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3019" class='ln'>3019</a></td><td><span class="ct">     *  UnitDelay: '&lt;S28&gt;/UnitDelay5'</span></td></tr>
 <tr name="3020" id="3020">
-<td><a id="l3020" class='ln'>3020</a></td><td>    <a id="3020c5" class="tk">rtDW</a>-&gt;<a id="3020c11" class="tk">UnitDelay_DSTATE_d</a> = <a id="3020c32" class="tk">rtDW</a>-&gt;<a id="3020c38" class="tk">UnitDelay1_DSTATE_b</a>;</td></tr>
+<td><a id="l3020" class='ln'>3020</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3021" id="3021">
-<td><a id="l3021" class='ln'>3021</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l3021" class='ln'>3021</a></td><td>    <a id="3021c5" class="tk">rtDW</a>-&gt;<a id="3021c11" class="tk">UnitDelay3_DSTATE_p</a> = <a id="3021c33" class="tk">rtDW</a>-&gt;<a id="3021c39" class="tk">UnitDelay5_DSTATE_m</a>;</td></tr>
 <tr name="3022" id="3022">
-<td><a id="l3022" class='ln'>3022</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S119&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l3022" class='ln'>3022</a></td><td></td></tr>
 <tr name="3023" id="3023">
-<td><a id="l3023" class='ln'>3023</a></td><td><span class="ct">     *  Sum: '&lt;S118&gt;/Add2'</span></td></tr>
+<td><a id="l3023" class='ln'>3023</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S28&gt;/UnitDelay5' incorporates:</span></td></tr>
 <tr name="3024" id="3024">
-<td><a id="l3024" class='ln'>3024</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3024" class='ln'>3024</a></td><td><span class="ct">     *  Logic: '&lt;S28&gt;/Logical Operator3'</span></td></tr>
 <tr name="3025" id="3025">
-<td><a id="l3025" class='ln'>3025</a></td><td>    <a id="3025c5" class="tk">rtDW</a>-&gt;<a id="3025c11" class="tk">UnitDelay_DSTATE_d</a> = (<a id="3025c33" class="tk">int16_T</a>)<a id="3025c41" class="tk">rtb_Divide_idx_1</a>;</td></tr>
+<td><a id="l3025" class='ln'>3025</a></td><td><span class="ct">     *  Relay: '&lt;S28&gt;/n_commDeacv'</span></td></tr>
 <tr name="3026" id="3026">
-<td><a id="l3026" class='ln'>3026</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l3026" class='ln'>3026</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3027" id="3027">
-<td><a id="l3027" class='ln'>3027</a></td><td></td></tr>
+<td><a id="l3027" class='ln'>3027</a></td><td>    <a id="3027c5" class="tk">rtDW</a>-&gt;<a id="3027c11" class="tk">UnitDelay5_DSTATE_m</a> = <a id="3027c33" class="tk">rtDW</a>-&gt;<a id="3027c39" class="tk">n_commDeacv_Mode</a>;</td></tr>
 <tr name="3028" id="3028">
-<td><a id="l3028" class='ln'>3028</a></td><td>  <span class="ct">/* End of Switch: '&lt;S119&gt;/Switch2' */</span></td></tr>
+<td><a id="l3028" class='ln'>3028</a></td><td></td></tr>
 <tr name="3029" id="3029">
-<td><a id="l3029" class='ln'>3029</a></td><td></td></tr>
+<td><a id="l3029" class='ln'>3029</a></td><td>    <span class="ct">/* End of Outputs for SubSystem: '&lt;S20&gt;/AdvCtrlDetect' */</span></td></tr>
 <tr name="3030" id="3030">
-<td><a id="l3030" class='ln'>3030</a></td><td>  <span class="ct">/* Switch: '&lt;S112&gt;/Switch2' */</span></td></tr>
+<td><a id="l3030" class='ln'>3030</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="3031" id="3031">
-<td><a id="l3031" class='ln'>3031</a></td><td>  <span class="kw">if</span> (<a id="3031c7" class="tk">rtb_Equal_k</a>) <span class="br">{</span></td></tr>
+<td><a id="l3031" class='ln'>3031</a></td><td></td></tr>
 <tr name="3032" id="3032">
-<td><a id="l3032" class='ln'>3032</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S112&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l3032" class='ln'>3032</a></td><td>  <span class="ct">/* End of If: '&lt;S20&gt;/If1' */</span></td></tr>
 <tr name="3033" id="3033">
-<td><a id="l3033" class='ln'>3033</a></td><td><span class="ct">     *  UnitDelay: '&lt;S97&gt;/Unit Delay1'</span></td></tr>
+<td><a id="l3033" class='ln'>3033</a></td><td></td></tr>
 <tr name="3034" id="3034">
-<td><a id="l3034" class='ln'>3034</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3034" class='ln'>3034</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S17&gt;/Delay' incorporates:</span></td></tr>
 <tr name="3035" id="3035">
-<td><a id="l3035" class='ln'>3035</a></td><td>    <a id="3035c5" class="tk">rtDW</a>-&gt;<a id="3035c11" class="tk">UnitDelay_DSTATE_b</a> = <a id="3035c32" class="tk">rtDW</a>-&gt;<a id="3035c38" class="tk">UnitDelay1_DSTATE_i</a>;</td></tr>
+<td><a id="l3035" class='ln'>3035</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_abc'</span></td></tr>
 <tr name="3036" id="3036">
-<td><a id="l3036" class='ln'>3036</a></td><td>  <span class="br">}</span> <span class="kw">else</span> <span class="br">{</span></td></tr>
+<td><a id="l3036" class='ln'>3036</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3037" id="3037">
-<td><a id="l3037" class='ln'>3037</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S112&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l3037" class='ln'>3037</a></td><td>  <a id="3037c3" class="tk">rtDW</a>-&gt;<a id="3037c9" class="tk">Delay_DSTATE_p</a> = <a id="3037c26" class="tk">rtU</a>-&gt;<a id="3037c31" class="tk">hall_abc</a>[0];</td></tr>
 <tr name="3038" id="3038">
-<td><a id="l3038" class='ln'>3038</a></td><td><span class="ct">     *  Sum: '&lt;S111&gt;/Add2'</span></td></tr>
+<td><a id="l3038" class='ln'>3038</a></td><td></td></tr>
 <tr name="3039" id="3039">
-<td><a id="l3039" class='ln'>3039</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3039" class='ln'>3039</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S17&gt;/Delay1' incorporates:</span></td></tr>
 <tr name="3040" id="3040">
-<td><a id="l3040" class='ln'>3040</a></td><td>    <a id="3040c5" class="tk">rtDW</a>-&gt;<a id="3040c11" class="tk">UnitDelay_DSTATE_b</a> = (<a id="3040c33" class="tk">int16_T</a>)<a id="3040c41" class="tk">rtb_Divide_idx_0</a>;</td></tr>
+<td><a id="l3040" class='ln'>3040</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_abc'</span></td></tr>
 <tr name="3041" id="3041">
-<td><a id="l3041" class='ln'>3041</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l3041" class='ln'>3041</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3042" id="3042">
-<td><a id="l3042" class='ln'>3042</a></td><td></td></tr>
+<td><a id="l3042" class='ln'>3042</a></td><td>  <a id="3042c3" class="tk">rtDW</a>-&gt;<a id="3042c9" class="tk">Delay1_DSTATE</a> = <a id="3042c25" class="tk">rtU</a>-&gt;<a id="3042c30" class="tk">hall_abc</a>[1];</td></tr>
 <tr name="3043" id="3043">
-<td><a id="l3043" class='ln'>3043</a></td><td>  <span class="ct">/* End of Switch: '&lt;S112&gt;/Switch2' */</span></td></tr>
+<td><a id="l3043" class='ln'>3043</a></td><td></td></tr>
 <tr name="3044" id="3044">
-<td><a id="l3044" class='ln'>3044</a></td><td></td></tr>
+<td><a id="l3044" class='ln'>3044</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S17&gt;/Delay2' incorporates:</span></td></tr>
 <tr name="3045" id="3045">
-<td><a id="l3045" class='ln'>3045</a></td><td>  <span class="ct">/* Switch: '&lt;S37&gt;/Switch1' incorporates:</span></td></tr>
+<td><a id="l3045" class='ln'>3045</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_abc'</span></td></tr>
 <tr name="3046" id="3046">
-<td><a id="l3046" class='ln'>3046</a></td><td><span class="ct">   *  RelationalOperator: '&lt;S39&gt;/Relational Operator'</span></td></tr>
+<td><a id="l3046" class='ln'>3046</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3047" id="3047">
-<td><a id="l3047" class='ln'>3047</a></td><td><span class="ct">   *  UnitDelay: '&lt;S39&gt;/UnitDelay'</span></td></tr>
+<td><a id="l3047" class='ln'>3047</a></td><td>  <a id="3047c3" class="tk">rtDW</a>-&gt;<a id="3047c9" class="tk">Delay2_DSTATE</a> = <a id="3047c25" class="tk">rtU</a>-&gt;<a id="3047c30" class="tk">hall_abc</a>[2];</td></tr>
 <tr name="3048" id="3048">
-<td><a id="l3048" class='ln'>3048</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3048" class='ln'>3048</a></td><td></td></tr>
 <tr name="3049" id="3049">
-<td><a id="l3049" class='ln'>3049</a></td><td>  <span class="kw">if</span> (<a id="3049c7" class="tk">rtb_n_commDeacv</a> <a id="3049c23" class="tk">!=</a> <a id="3049c26" class="tk">rtDW</a>-&gt;<a id="3049c32" class="tk">UnitDelay_DSTATE_bv</a>) <span class="br">{</span></td></tr>
+<td><a id="l3049" class='ln'>3049</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S20&gt;/UnitDelay4' incorporates:</span></td></tr>
 <tr name="3050" id="3050">
-<td><a id="l3050" class='ln'>3050</a></td><td>    <a id="3050c5" class="tk">rtb_UnitDelay</a> = <a id="3050c21" class="tk">rtb_Sum_i</a>;</td></tr>
+<td><a id="l3050" class='ln'>3050</a></td><td><span class="ct">   *  Abs: '&lt;S20&gt;/Abs5'</span></td></tr>
 <tr name="3051" id="3051">
-<td><a id="l3051" class='ln'>3051</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l3051" class='ln'>3051</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3052" id="3052">
-<td><a id="l3052" class='ln'>3052</a></td><td></td></tr>
+<td><a id="l3052" class='ln'>3052</a></td><td>  <a id="3052c3" class="tk">rtDW</a>-&gt;<a id="3052c9" class="tk">UnitDelay4_DSTATE</a> = <a id="3052c29" class="tk">rtb_Rem1</a>;</td></tr>
 <tr name="3053" id="3053">
-<td><a id="l3053" class='ln'>3053</a></td><td>  <span class="ct">/* End of Switch: '&lt;S37&gt;/Switch1' */</span></td></tr>
+<td><a id="l3053" class='ln'>3053</a></td><td></td></tr>
 <tr name="3054" id="3054">
-<td><a id="l3054" class='ln'>3054</a></td><td></td></tr>
+<td><a id="l3054" class='ln'>3054</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S5&gt;/UnitDelay' */</span></td></tr>
 <tr name="3055" id="3055">
-<td><a id="l3055" class='ln'>3055</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S6&gt;/UnitDelay1' incorporates:</span></td></tr>
+<td><a id="l3055" class='ln'>3055</a></td><td>  <a id="3055c3" class="tk">rtDW</a>-&gt;<a id="3055c9" class="tk">UnitDelay_DSTATE_p</a> = <a id="3055c30" class="tk">rtb_UnitDelay_n</a>;</td></tr>
 <tr name="3056" id="3056">
-<td><a id="l3056" class='ln'>3056</a></td><td><span class="ct">   *  Switch: '&lt;S51&gt;/Switch'</span></td></tr>
+<td><a id="l3056" class='ln'>3056</a></td><td></td></tr>
 <tr name="3057" id="3057">
-<td><a id="l3057" class='ln'>3057</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3057" class='ln'>3057</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S6&gt;/UnitDelay' */</span></td></tr>
 <tr name="3058" id="3058">
-<td><a id="l3058" class='ln'>3058</a></td><td>  <a id="3058c3" class="tk">rtDW</a>-&gt;<a id="3058c9" class="tk">UnitDelay1_DSTATE_f</a>[0] = <a id="3058c34" class="tk">rtb_Switch_f2_idx_0</a>;</td></tr>
+<td><a id="l3058" class='ln'>3058</a></td><td>  <a id="3058c3" class="tk">rtDW</a>-&gt;<a id="3058c9" class="tk">UnitDelay_DSTATE_gv</a> = <a id="3058c31" class="tk">rtb_RelationalOperator</a>;</td></tr>
 <tr name="3059" id="3059">
-<td><a id="l3059" class='ln'>3059</a></td><td>  <a id="3059c3" class="tk">rtDW</a>-&gt;<a id="3059c9" class="tk">UnitDelay1_DSTATE_f</a>[1] = <a id="3059c34" class="tk">rtb_Switch_f2_idx_1</a>;</td></tr>
+<td><a id="l3059" class='ln'>3059</a></td><td></td></tr>
 <tr name="3060" id="3060">
-<td><a id="l3060" class='ln'>3060</a></td><td></td></tr>
+<td><a id="l3060" class='ln'>3060</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S10&gt;/UnitDelay' */</span></td></tr>
 <tr name="3061" id="3061">
-<td><a id="l3061" class='ln'>3061</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S37&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l3061" class='ln'>3061</a></td><td>  <a id="3061c3" class="tk">rtDW</a>-&gt;<a id="3061c9" class="tk">UnitDelay_DSTATE_oy</a> = <a id="3061c31" class="tk">rtb_RelationalOperator4_d</a>;</td></tr>
 <tr name="3062" id="3062">
-<td><a id="l3062" class='ln'>3062</a></td><td>  <a id="3062c3" class="tk">rtDW</a>-&gt;<a id="3062c9" class="tk">UnitDelay_DSTATE_j</a> = <a id="3062c30" class="tk">rtb_UnitDelay</a>;</td></tr>
+<td><a id="l3062" class='ln'>3062</a></td><td></td></tr>
 <tr name="3063" id="3063">
-<td><a id="l3063" class='ln'>3063</a></td><td></td></tr>
+<td><a id="l3063" class='ln'>3063</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S38&gt;/UnitDelay1' incorporates:</span></td></tr>
 <tr name="3064" id="3064">
-<td><a id="l3064" class='ln'>3064</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S9&gt;/Delay' incorporates:</span></td></tr>
+<td><a id="l3064" class='ln'>3064</a></td><td><span class="ct">   *  Sum: '&lt;S38&gt;/Sum3'</span></td></tr>
 <tr name="3065" id="3065">
-<td><a id="l3065" class='ln'>3065</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_A'</span></td></tr>
+<td><a id="l3065" class='ln'>3065</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3066" id="3066">
-<td><a id="l3066" class='ln'>3066</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3066" class='ln'>3066</a></td><td>  <a id="3066c3" class="tk">rtDW</a>-&gt;<a id="3066c9" class="tk">UnitDelay1_DSTATE</a> = <a id="3066c29" class="tk">rtb_Merge</a>;</td></tr>
 <tr name="3067" id="3067">
-<td><a id="l3067" class='ln'>3067</a></td><td>  <a id="3067c3" class="tk">rtDW</a>-&gt;<a id="3067c9" class="tk">Delay_DSTATE_d</a> = <a id="3067c26" class="tk">rtU</a>-&gt;<a id="3067c31" class="tk">hall_A</a>;</td></tr>
+<td><a id="l3067" class='ln'>3067</a></td><td></td></tr>
 <tr name="3068" id="3068">
-<td><a id="l3068" class='ln'>3068</a></td><td></td></tr>
+<td><a id="l3068" class='ln'>3068</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S1&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="3069" id="3069">
-<td><a id="l3069" class='ln'>3069</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S9&gt;/Delay1' incorporates:</span></td></tr>
+<td><a id="l3069" class='ln'>3069</a></td><td><span class="ct">   *  Switch: '&lt;S42&gt;/Switch'</span></td></tr>
 <tr name="3070" id="3070">
-<td><a id="l3070" class='ln'>3070</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_B'</span></td></tr>
+<td><a id="l3070" class='ln'>3070</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3071" id="3071">
-<td><a id="l3071" class='ln'>3071</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3071" class='ln'>3071</a></td><td>  <a id="3071c3" class="tk">rtDW</a>-&gt;<a id="3071c9" class="tk">UnitDelay_DSTATE_k</a>[0] = <a id="3071c33" class="tk">rtb_UnitDelay1_ko</a>[0];</td></tr>
 <tr name="3072" id="3072">
-<td><a id="l3072" class='ln'>3072</a></td><td>  <a id="3072c3" class="tk">rtDW</a>-&gt;<a id="3072c9" class="tk">Delay1_DSTATE</a> = <a id="3072c25" class="tk">rtU</a>-&gt;<a id="3072c30" class="tk">hall_B</a>;</td></tr>
+<td><a id="l3072" class='ln'>3072</a></td><td></td></tr>
 <tr name="3073" id="3073">
-<td><a id="l3073" class='ln'>3073</a></td><td></td></tr>
+<td><a id="l3073" class='ln'>3073</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S35&gt;/UnitDelay1' incorporates:</span></td></tr>
 <tr name="3074" id="3074">
-<td><a id="l3074" class='ln'>3074</a></td><td>  <span class="ct">/* Update for Delay: '&lt;S9&gt;/Delay2' incorporates:</span></td></tr>
+<td><a id="l3074" class='ln'>3074</a></td><td><span class="ct">   *  Switch: '&lt;S42&gt;/Switch'</span></td></tr>
 <tr name="3075" id="3075">
-<td><a id="l3075" class='ln'>3075</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/hall_C'</span></td></tr>
+<td><a id="l3075" class='ln'>3075</a></td><td><span class="ct">   *  UnitDelay: '&lt;S1&gt;/Unit Delay'</span></td></tr>
 <tr name="3076" id="3076">
 <td><a id="l3076" class='ln'>3076</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3077" id="3077">
-<td><a id="l3077" class='ln'>3077</a></td><td>  <a id="3077c3" class="tk">rtDW</a>-&gt;<a id="3077c9" class="tk">Delay2_DSTATE</a> = <a id="3077c25" class="tk">rtU</a>-&gt;<a id="3077c30" class="tk">hall_C</a>;</td></tr>
+<td><a id="l3077" class='ln'>3077</a></td><td>  <a id="3077c3" class="tk">rtDW</a>-&gt;<a id="3077c9" class="tk">UnitDelay1_DSTATE_o</a>[0] = <a id="3077c34" class="tk">rtb_UnitDelay1_ko</a>[0];</td></tr>
 <tr name="3078" id="3078">
 <td><a id="l3078" class='ln'>3078</a></td><td></td></tr>
 <tr name="3079" id="3079">
-<td><a id="l3079" class='ln'>3079</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S14&gt;/UnitDelay3' incorporates:</span></td></tr>
+<td><a id="l3079" class='ln'>3079</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S4&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="3080" id="3080">
-<td><a id="l3080" class='ln'>3080</a></td><td><span class="ct">   *  Inport: '&lt;Root&gt;/us_Count'</span></td></tr>
+<td><a id="l3080" class='ln'>3080</a></td><td><span class="ct">   *  Switch: '&lt;S42&gt;/Switch'</span></td></tr>
 <tr name="3081" id="3081">
-<td><a id="l3081" class='ln'>3081</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3081" class='ln'>3081</a></td><td><span class="ct">   *  UnitDelay: '&lt;S1&gt;/Unit Delay'</span></td></tr>
 <tr name="3082" id="3082">
-<td><a id="l3082" class='ln'>3082</a></td><td>  <a id="3082c3" class="tk">rtDW</a>-&gt;<a id="3082c9" class="tk">UnitDelay3_DSTATE</a> = <a id="3082c29" class="tk">rtU</a>-&gt;<a id="3082c34" class="tk">us_Count</a>;</td></tr>
+<td><a id="l3082" class='ln'>3082</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3083" id="3083">
-<td><a id="l3083" class='ln'>3083</a></td><td></td></tr>
+<td><a id="l3083" class='ln'>3083</a></td><td>  <a id="3083c3" class="tk">rtDW</a>-&gt;<a id="3083c9" class="tk">UnitDelay_DSTATE_e</a>[0] = <a id="3083c33" class="tk">rtb_UnitDelay1_ko</a>[0];</td></tr>
 <tr name="3084" id="3084">
-<td><a id="l3084" class='ln'>3084</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S14&gt;/UnitDelay4' incorporates:</span></td></tr>
+<td><a id="l3084" class='ln'>3084</a></td><td></td></tr>
 <tr name="3085" id="3085">
-<td><a id="l3085" class='ln'>3085</a></td><td><span class="ct">   *  Abs: '&lt;S14&gt;/Abs5'</span></td></tr>
+<td><a id="l3085" class='ln'>3085</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S1&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="3086" id="3086">
-<td><a id="l3086" class='ln'>3086</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3086" class='ln'>3086</a></td><td><span class="ct">   *  Switch: '&lt;S42&gt;/Switch'</span></td></tr>
 <tr name="3087" id="3087">
-<td><a id="l3087" class='ln'>3087</a></td><td>  <a id="3087c3" class="tk">rtDW</a>-&gt;<a id="3087c9" class="tk">UnitDelay4_DSTATE</a> = <a id="3087c29" class="tk">rtb_Switch2</a>;</td></tr>
+<td><a id="l3087" class='ln'>3087</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3088" id="3088">
-<td><a id="l3088" class='ln'>3088</a></td><td></td></tr>
+<td><a id="l3088" class='ln'>3088</a></td><td>  <a id="3088c3" class="tk">rtDW</a>-&gt;<a id="3088c9" class="tk">UnitDelay_DSTATE_k</a>[1] = <a id="3088c33" class="tk">rtb_UnitDelay1_ko</a>[1];</td></tr>
 <tr name="3089" id="3089">
-<td><a id="l3089" class='ln'>3089</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S38&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l3089" class='ln'>3089</a></td><td></td></tr>
 <tr name="3090" id="3090">
-<td><a id="l3090" class='ln'>3090</a></td><td>  <a id="3090c3" class="tk">rtDW</a>-&gt;<a id="3090c9" class="tk">UnitDelay_DSTATE_k</a> = <a id="3090c30" class="tk">rtb_n_commDeacv</a>;</td></tr>
+<td><a id="l3090" class='ln'>3090</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S35&gt;/UnitDelay1' incorporates:</span></td></tr>
 <tr name="3091" id="3091">
-<td><a id="l3091" class='ln'>3091</a></td><td></td></tr>
+<td><a id="l3091" class='ln'>3091</a></td><td><span class="ct">   *  Switch: '&lt;S42&gt;/Switch'</span></td></tr>
 <tr name="3092" id="3092">
-<td><a id="l3092" class='ln'>3092</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S42&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l3092" class='ln'>3092</a></td><td><span class="ct">   *  UnitDelay: '&lt;S1&gt;/Unit Delay'</span></td></tr>
 <tr name="3093" id="3093">
-<td><a id="l3093" class='ln'>3093</a></td><td>  <a id="3093c3" class="tk">rtDW</a>-&gt;<a id="3093c9" class="tk">UnitDelay_DSTATE_nx</a> = <a id="3093c31" class="tk">rtb_RelationalOperator4_f</a>;</td></tr>
+<td><a id="l3093" class='ln'>3093</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3094" id="3094">
-<td><a id="l3094" class='ln'>3094</a></td><td></td></tr>
+<td><a id="l3094" class='ln'>3094</a></td><td>  <a id="3094c3" class="tk">rtDW</a>-&gt;<a id="3094c9" class="tk">UnitDelay1_DSTATE_o</a>[1] = <a id="3094c34" class="tk">rtb_UnitDelay1_ko</a>[1];</td></tr>
 <tr name="3095" id="3095">
-<td><a id="l3095" class='ln'>3095</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S7&gt;/UnitDelay1' incorporates:</span></td></tr>
+<td><a id="l3095" class='ln'>3095</a></td><td></td></tr>
 <tr name="3096" id="3096">
-<td><a id="l3096" class='ln'>3096</a></td><td><span class="ct">   *  Sum: '&lt;S7&gt;/Sum3'</span></td></tr>
+<td><a id="l3096" class='ln'>3096</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S4&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="3097" id="3097">
-<td><a id="l3097" class='ln'>3097</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3097" class='ln'>3097</a></td><td><span class="ct">   *  Switch: '&lt;S42&gt;/Switch'</span></td></tr>
 <tr name="3098" id="3098">
-<td><a id="l3098" class='ln'>3098</a></td><td>  <a id="3098c3" class="tk">rtDW</a>-&gt;<a id="3098c9" class="tk">UnitDelay1_DSTATE</a> = <a id="3098c29" class="tk">qY</a>;</td></tr>
+<td><a id="l3098" class='ln'>3098</a></td><td><span class="ct">   *  UnitDelay: '&lt;S1&gt;/Unit Delay'</span></td></tr>
 <tr name="3099" id="3099">
-<td><a id="l3099" class='ln'>3099</a></td><td></td></tr>
+<td><a id="l3099" class='ln'>3099</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3100" id="3100">
-<td><a id="l3100" class='ln'>3100</a></td><td>  <span class="ct">/* If: '&lt;S53&gt;/If' */</span></td></tr>
+<td><a id="l3100" class='ln'>3100</a></td><td>  <a id="3100c3" class="tk">rtDW</a>-&gt;<a id="3100c9" class="tk">UnitDelay_DSTATE_e</a>[1] = <a id="3100c33" class="tk">rtb_UnitDelay1_ko</a>[1];</td></tr>
 <tr name="3101" id="3101">
-<td><a id="l3101" class='ln'>3101</a></td><td>  <span class="kw">if</span> (<a id="3101c7" class="tk">rtb_Sum2</a> <a id="3101c16" class="tk">==</a> 0) <span class="br">{</span></td></tr>
+<td><a id="l3101" class='ln'>3101</a></td><td></td></tr>
 <tr name="3102" id="3102">
-<td><a id="l3102" class='ln'>3102</a></td><td>    <span class="ct">/* Update for IfAction SubSystem: '&lt;S53&gt;/Do_Calc' incorporates:</span></td></tr>
+<td><a id="l3102" class='ln'>3102</a></td><td>  <span class="ct">/* If: '&lt;S44&gt;/If' */</span></td></tr>
 <tr name="3103" id="3103">
-<td><a id="l3103" class='ln'>3103</a></td><td><span class="ct">     *  ActionPort: '&lt;S70&gt;/Action Port'</span></td></tr>
+<td><a id="l3103" class='ln'>3103</a></td><td>  <span class="kw">if</span> (<a id="3103c7" class="tk">rtb_Sum2</a> <a id="3103c16" class="tk">==</a> 0) <span class="br">{</span></td></tr>
 <tr name="3104" id="3104">
-<td><a id="l3104" class='ln'>3104</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3104" class='ln'>3104</a></td><td>    <span class="ct">/* Update for IfAction SubSystem: '&lt;S44&gt;/Do_Calc' incorporates:</span></td></tr>
 <tr name="3105" id="3105">
-<td><a id="l3105" class='ln'>3105</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S70&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l3105" class='ln'>3105</a></td><td><span class="ct">     *  ActionPort: '&lt;S62&gt;/Action Port'</span></td></tr>
 <tr name="3106" id="3106">
-<td><a id="l3106" class='ln'>3106</a></td><td>    <a id="3106c5" class="tk">rtDW</a>-&gt;<a id="3106c11" class="tk">UnitDelay_DSTATE_p2</a> = <a id="3106c33" class="tk">rtb_z_ctrlMod</a>;</td></tr>
+<td><a id="l3106" class='ln'>3106</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3107" id="3107">
-<td><a id="l3107" class='ln'>3107</a></td><td></td></tr>
+<td><a id="l3107" class='ln'>3107</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S62&gt;/Unit Delay' */</span></td></tr>
 <tr name="3108" id="3108">
-<td><a id="l3108" class='ln'>3108</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S70&gt;/Unit Delay1' incorporates:</span></td></tr>
+<td><a id="l3108" class='ln'>3108</a></td><td>    <a id="3108c5" class="tk">rtDW</a>-&gt;<a id="3108c11" class="tk">UnitDelay_DSTATE_lv</a> = <a id="3108c33" class="tk">rtb_dz_cntTrnsDet</a>;</td></tr>
 <tr name="3109" id="3109">
-<td><a id="l3109" class='ln'>3109</a></td><td><span class="ct">     *  Merge: '&lt;S73&gt;/Merge'</span></td></tr>
+<td><a id="l3109" class='ln'>3109</a></td><td></td></tr>
 <tr name="3110" id="3110">
-<td><a id="l3110" class='ln'>3110</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3110" class='ln'>3110</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S62&gt;/Unit Delay1' incorporates:</span></td></tr>
 <tr name="3111" id="3111">
-<td><a id="l3111" class='ln'>3111</a></td><td>    <a id="3111c5" class="tk">rtDW</a>-&gt;<a id="3111c11" class="tk">UnitDelay1_DSTATE_g</a> = <a id="3111c33" class="tk">rtDW</a>-&gt;<a id="3111c39" class="tk">Merge_f</a>;</td></tr>
+<td><a id="l3111" class='ln'>3111</a></td><td><span class="ct">     *  Merge: '&lt;S65&gt;/Merge'</span></td></tr>
 <tr name="3112" id="3112">
-<td><a id="l3112" class='ln'>3112</a></td><td></td></tr>
+<td><a id="l3112" class='ln'>3112</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3113" id="3113">
-<td><a id="l3113" class='ln'>3113</a></td><td>    <span class="ct">/* Update for If: '&lt;S73&gt;/If' */</span></td></tr>
+<td><a id="l3113" class='ln'>3113</a></td><td>    <a id="3113c5" class="tk">rtDW</a>-&gt;<a id="3113c11" class="tk">UnitDelay1_DSTATE_jp</a> = <a id="3113c34" class="tk">rtDW</a>-&gt;<a id="3113c40" class="tk">Merge</a>;</td></tr>
 <tr name="3114" id="3114">
-<td><a id="l3114" class='ln'>3114</a></td><td>    <span class="kw">switch</span> (<a id="3114c13" class="tk">rtDW</a>-&gt;<a id="3114c19" class="tk">If_ActiveSubsystem_h</a>) <span class="br">{</span></td></tr>
+<td><a id="l3114" class='ln'>3114</a></td><td></td></tr>
 <tr name="3115" id="3115">
-<td><a id="l3115" class='ln'>3115</a></td><td>     <span class="kw">case</span> 0<a id="3115c12" class="tk">:</a></td></tr>
+<td><a id="l3115" class='ln'>3115</a></td><td>    <span class="ct">/* Update for If: '&lt;S65&gt;/If' */</span></td></tr>
 <tr name="3116" id="3116">
-<td><a id="l3116" class='ln'>3116</a></td><td>      <span class="ct">/* Update for IfAction SubSystem: '&lt;S73&gt;/speed_mode' incorporates:</span></td></tr>
+<td><a id="l3116" class='ln'>3116</a></td><td>    <span class="kw">switch</span> (<a id="3116c13" class="tk">rtDW</a>-&gt;<a id="3116c19" class="tk">If_ActiveSubsystem_k</a>) <span class="br">{</span></td></tr>
 <tr name="3117" id="3117">
-<td><a id="l3117" class='ln'>3117</a></td><td><span class="ct">       *  ActionPort: '&lt;S87&gt;/Action Port'</span></td></tr>
+<td><a id="l3117" class='ln'>3117</a></td><td>     <span class="kw">case</span> 0<a id="3117c12" class="tk">:</a></td></tr>
 <tr name="3118" id="3118">
-<td><a id="l3118" class='ln'>3118</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l3118" class='ln'>3118</a></td><td>      <span class="ct">/* Update for IfAction SubSystem: '&lt;S65&gt;/speed_mode' incorporates:</span></td></tr>
 <tr name="3119" id="3119">
-<td><a id="l3119" class='ln'>3119</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S87&gt;/Unit Delay' incorporates:</span></td></tr>
+<td><a id="l3119" class='ln'>3119</a></td><td><span class="ct">       *  ActionPort: '&lt;S79&gt;/Action Port'</span></td></tr>
 <tr name="3120" id="3120">
-<td><a id="l3120" class='ln'>3120</a></td><td><span class="ct">       *  Sqrt: '&lt;S86&gt;/Sqrt1'</span></td></tr>
+<td><a id="l3120" class='ln'>3120</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="3121" id="3121">
-<td><a id="l3121" class='ln'>3121</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l3121" class='ln'>3121</a></td><td>      <span class="ct">/* Update for UnitDelay: '&lt;S79&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="3122" id="3122">
-<td><a id="l3122" class='ln'>3122</a></td><td>      <a id="3122c7" class="tk">rtDW</a>-&gt;<a id="3122c13" class="tk">UnitDelay_DSTATE_l</a> = <a id="3122c34" class="tk">rtb_Min</a>;</td></tr>
+<td><a id="l3122" class='ln'>3122</a></td><td><span class="ct">       *  Sqrt: '&lt;S78&gt;/Sqrt1'</span></td></tr>
 <tr name="3123" id="3123">
-<td><a id="l3123" class='ln'>3123</a></td><td></td></tr>
+<td><a id="l3123" class='ln'>3123</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="3124" id="3124">
-<td><a id="l3124" class='ln'>3124</a></td><td>      <span class="ct">/* End of Update for SubSystem: '&lt;S73&gt;/speed_mode' */</span></td></tr>
+<td><a id="l3124" class='ln'>3124</a></td><td>      <a id="3124c7" class="tk">rtDW</a>-&gt;<a id="3124c13" class="tk">UnitDelay_DSTATE_di</a> = <a id="3124c35" class="tk">rtb_Gain_a</a>;</td></tr>
 <tr name="3125" id="3125">
-<td><a id="l3125" class='ln'>3125</a></td><td>      <span class="kw">break</span>;</td></tr>
+<td><a id="l3125" class='ln'>3125</a></td><td></td></tr>
 <tr name="3126" id="3126">
-<td><a id="l3126" class='ln'>3126</a></td><td></td></tr>
+<td><a id="l3126" class='ln'>3126</a></td><td>      <span class="ct">/* End of Update for SubSystem: '&lt;S65&gt;/speed_mode' */</span></td></tr>
 <tr name="3127" id="3127">
-<td><a id="l3127" class='ln'>3127</a></td><td>     <span class="kw">case</span> 1<a id="3127c12" class="tk">:</a></td></tr>
+<td><a id="l3127" class='ln'>3127</a></td><td>      <span class="kw">break</span>;</td></tr>
 <tr name="3128" id="3128">
-<td><a id="l3128" class='ln'>3128</a></td><td>      <span class="ct">/* Update for IfAction SubSystem: '&lt;S73&gt;/torque_mode' incorporates:</span></td></tr>
+<td><a id="l3128" class='ln'>3128</a></td><td></td></tr>
 <tr name="3129" id="3129">
-<td><a id="l3129" class='ln'>3129</a></td><td><span class="ct">       *  ActionPort: '&lt;S88&gt;/Action Port'</span></td></tr>
+<td><a id="l3129" class='ln'>3129</a></td><td>     <span class="kw">case</span> 1<a id="3129c12" class="tk">:</a></td></tr>
 <tr name="3130" id="3130">
-<td><a id="l3130" class='ln'>3130</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l3130" class='ln'>3130</a></td><td>      <span class="ct">/* Update for IfAction SubSystem: '&lt;S65&gt;/torque_mode' incorporates:</span></td></tr>
 <tr name="3131" id="3131">
-<td><a id="l3131" class='ln'>3131</a></td><td>      <span class="ct">/* Update for Delay: '&lt;S88&gt;/Delay' incorporates:</span></td></tr>
+<td><a id="l3131" class='ln'>3131</a></td><td><span class="ct">       *  ActionPort: '&lt;S80&gt;/Action Port'</span></td></tr>
 <tr name="3132" id="3132">
-<td><a id="l3132" class='ln'>3132</a></td><td><span class="ct">       *  Sqrt: '&lt;S86&gt;/Sqrt1'</span></td></tr>
+<td><a id="l3132" class='ln'>3132</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="3133" id="3133">
-<td><a id="l3133" class='ln'>3133</a></td><td><span class="ct">       */</span></td></tr>
+<td><a id="l3133" class='ln'>3133</a></td><td>      <span class="ct">/* Update for Delay: '&lt;S80&gt;/Delay' incorporates:</span></td></tr>
 <tr name="3134" id="3134">
-<td><a id="l3134" class='ln'>3134</a></td><td>      <a id="3134c7" class="tk">rtDW</a>-&gt;<a id="3134c13" class="tk">icLoad_p</a> = 0U;</td></tr>
+<td><a id="l3134" class='ln'>3134</a></td><td><span class="ct">       *  Sqrt: '&lt;S78&gt;/Sqrt1'</span></td></tr>
 <tr name="3135" id="3135">
-<td><a id="l3135" class='ln'>3135</a></td><td>      <a id="3135c7" class="tk">rtDW</a>-&gt;<a id="3135c13" class="tk">Delay_DSTATE</a> = <a id="3135c28" class="tk">rtb_Min</a>;</td></tr>
+<td><a id="l3135" class='ln'>3135</a></td><td><span class="ct">       */</span></td></tr>
 <tr name="3136" id="3136">
-<td><a id="l3136" class='ln'>3136</a></td><td></td></tr>
+<td><a id="l3136" class='ln'>3136</a></td><td>      <a id="3136c7" class="tk">rtDW</a>-&gt;<a id="3136c13" class="tk">icLoad_i</a> = 0U;</td></tr>
 <tr name="3137" id="3137">
-<td><a id="l3137" class='ln'>3137</a></td><td>      <span class="ct">/* End of Update for SubSystem: '&lt;S73&gt;/torque_mode' */</span></td></tr>
+<td><a id="l3137" class='ln'>3137</a></td><td>      <a id="3137c7" class="tk">rtDW</a>-&gt;<a id="3137c13" class="tk">Delay_DSTATE</a> = <a id="3137c28" class="tk">rtb_Gain_a</a>;</td></tr>
 <tr name="3138" id="3138">
-<td><a id="l3138" class='ln'>3138</a></td><td>      <span class="kw">break</span>;</td></tr>
+<td><a id="l3138" class='ln'>3138</a></td><td></td></tr>
 <tr name="3139" id="3139">
-<td><a id="l3139" class='ln'>3139</a></td><td>    <span class="br">}</span></td></tr>
+<td><a id="l3139" class='ln'>3139</a></td><td>      <span class="ct">/* End of Update for SubSystem: '&lt;S65&gt;/torque_mode' */</span></td></tr>
 <tr name="3140" id="3140">
-<td><a id="l3140" class='ln'>3140</a></td><td></td></tr>
+<td><a id="l3140" class='ln'>3140</a></td><td>      <span class="kw">break</span>;</td></tr>
 <tr name="3141" id="3141">
-<td><a id="l3141" class='ln'>3141</a></td><td>    <span class="ct">/* End of Update for If: '&lt;S73&gt;/If' */</span></td></tr>
+<td><a id="l3141" class='ln'>3141</a></td><td>    <span class="br">}</span></td></tr>
 <tr name="3142" id="3142">
 <td><a id="l3142" class='ln'>3142</a></td><td></td></tr>
 <tr name="3143" id="3143">
-<td><a id="l3143" class='ln'>3143</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S74&gt;/Unit Delay1' incorporates:</span></td></tr>
+<td><a id="l3143" class='ln'>3143</a></td><td>    <span class="ct">/* End of Update for If: '&lt;S65&gt;/If' */</span></td></tr>
 <tr name="3144" id="3144">
-<td><a id="l3144" class='ln'>3144</a></td><td><span class="ct">     *  Sqrt: '&lt;S51&gt;/Sqrt'</span></td></tr>
+<td><a id="l3144" class='ln'>3144</a></td><td></td></tr>
 <tr name="3145" id="3145">
-<td><a id="l3145" class='ln'>3145</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3145" class='ln'>3145</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S66&gt;/Unit Delay1' incorporates:</span></td></tr>
 <tr name="3146" id="3146">
-<td><a id="l3146" class='ln'>3146</a></td><td>    <a id="3146c5" class="tk">rtDW</a>-&gt;<a id="3146c11" class="tk">UnitDelay1_DSTATE_c</a> = <a id="3146c33" class="tk">rtb_BitwiseOperator2</a>;</td></tr>
+<td><a id="l3146" class='ln'>3146</a></td><td><span class="ct">     *  Sqrt: '&lt;S42&gt;/Sqrt'</span></td></tr>
 <tr name="3147" id="3147">
-<td><a id="l3147" class='ln'>3147</a></td><td></td></tr>
+<td><a id="l3147" class='ln'>3147</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3148" id="3148">
-<td><a id="l3148" class='ln'>3148</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S77&gt;/Unit Delay' incorporates:</span></td></tr>
+<td><a id="l3148" class='ln'>3148</a></td><td>    <a id="3148c5" class="tk">rtDW</a>-&gt;<a id="3148c11" class="tk">UnitDelay1_DSTATE_pl</a> = <a id="3148c34" class="tk">rtb_Sum1_p</a>;</td></tr>
 <tr name="3149" id="3149">
-<td><a id="l3149" class='ln'>3149</a></td><td><span class="ct">     *  Sum: '&lt;S77&gt;/Sum'</span></td></tr>
+<td><a id="l3149" class='ln'>3149</a></td><td></td></tr>
 <tr name="3150" id="3150">
-<td><a id="l3150" class='ln'>3150</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3150" class='ln'>3150</a></td><td>    <span class="ct">/* Update for UnitDelay: '&lt;S69&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="3151" id="3151">
-<td><a id="l3151" class='ln'>3151</a></td><td>    <a id="3151c5" class="tk">rtDW</a>-&gt;<a id="3151c11" class="tk">UnitDelay_DSTATE</a> = <a id="3151c30" class="tk">rtb_MathFunction2_p</a>;</td></tr>
+<td><a id="l3151" class='ln'>3151</a></td><td><span class="ct">     *  Sum: '&lt;S69&gt;/Sum'</span></td></tr>
 <tr name="3152" id="3152">
-<td><a id="l3152" class='ln'>3152</a></td><td></td></tr>
+<td><a id="l3152" class='ln'>3152</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3153" id="3153">
-<td><a id="l3153" class='ln'>3153</a></td><td>    <span class="ct">/* Update for Delay: '&lt;S78&gt;/Resettable Delay' incorporates:</span></td></tr>
+<td><a id="l3153" class='ln'>3153</a></td><td>    <a id="3153c5" class="tk">rtDW</a>-&gt;<a id="3153c11" class="tk">UnitDelay_DSTATE_l</a> = <a id="3153c32" class="tk">rtb_MathFunction2_n</a>;</td></tr>
 <tr name="3154" id="3154">
-<td><a id="l3154" class='ln'>3154</a></td><td><span class="ct">     *  Sum: '&lt;S78&gt;/Sum1'</span></td></tr>
+<td><a id="l3154" class='ln'>3154</a></td><td></td></tr>
 <tr name="3155" id="3155">
-<td><a id="l3155" class='ln'>3155</a></td><td><span class="ct">     */</span></td></tr>
+<td><a id="l3155" class='ln'>3155</a></td><td>    <span class="ct">/* Update for Delay: '&lt;S70&gt;/Resettable Delay' incorporates:</span></td></tr>
 <tr name="3156" id="3156">
-<td><a id="l3156" class='ln'>3156</a></td><td>    <a id="3156c5" class="tk">rtDW</a>-&gt;<a id="3156c11" class="tk">icLoad</a> = 0U;</td></tr>
+<td><a id="l3156" class='ln'>3156</a></td><td><span class="ct">     *  Sum: '&lt;S70&gt;/Sum1'</span></td></tr>
 <tr name="3157" id="3157">
-<td><a id="l3157" class='ln'>3157</a></td><td>    <a id="3157c5" class="tk">rtDW</a>-&gt;<a id="3157c11" class="tk">ResettableDelay_DSTATE</a> = <a id="3157c36" class="tk">rtb_Sum1_f</a>;</td></tr>
+<td><a id="l3157" class='ln'>3157</a></td><td><span class="ct">     */</span></td></tr>
 <tr name="3158" id="3158">
-<td><a id="l3158" class='ln'>3158</a></td><td></td></tr>
+<td><a id="l3158" class='ln'>3158</a></td><td>    <a id="3158c5" class="tk">rtDW</a>-&gt;<a id="3158c11" class="tk">icLoad</a> = 0U;</td></tr>
 <tr name="3159" id="3159">
-<td><a id="l3159" class='ln'>3159</a></td><td>    <span class="ct">/* End of Update for SubSystem: '&lt;S53&gt;/Do_Calc' */</span></td></tr>
+<td><a id="l3159" class='ln'>3159</a></td><td>    <a id="3159c5" class="tk">rtDW</a>-&gt;<a id="3159c11" class="tk">ResettableDelay_DSTATE</a> = <a id="3159c36" class="tk">rtb_Gain_h</a>;</td></tr>
 <tr name="3160" id="3160">
-<td><a id="l3160" class='ln'>3160</a></td><td>  <span class="br">}</span></td></tr>
+<td><a id="l3160" class='ln'>3160</a></td><td></td></tr>
 <tr name="3161" id="3161">
-<td><a id="l3161" class='ln'>3161</a></td><td></td></tr>
+<td><a id="l3161" class='ln'>3161</a></td><td>    <span class="ct">/* End of Update for SubSystem: '&lt;S44&gt;/Do_Calc' */</span></td></tr>
 <tr name="3162" id="3162">
-<td><a id="l3162" class='ln'>3162</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S106&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l3162" class='ln'>3162</a></td><td>  <span class="br">}</span></td></tr>
 <tr name="3163" id="3163">
-<td><a id="l3163" class='ln'>3163</a></td><td><span class="ct">   *  Switch: '&lt;S84&gt;/Switch2'</span></td></tr>
+<td><a id="l3163" class='ln'>3163</a></td><td></td></tr>
 <tr name="3164" id="3164">
-<td><a id="l3164" class='ln'>3164</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3164" class='ln'>3164</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S96&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="3165" id="3165">
-<td><a id="l3165" class='ln'>3165</a></td><td>  <a id="3165c3" class="tk">rtDW</a>-&gt;<a id="3165c9" class="tk">UnitDelay_DSTATE_h</a> = <a id="3165c30" class="tk">rtDW</a>-&gt;<a id="3165c36" class="tk">Switch2</a>;</td></tr>
+<td><a id="l3165" class='ln'>3165</a></td><td><span class="ct">   *  Switch: '&lt;S76&gt;/Switch2'</span></td></tr>
 <tr name="3166" id="3166">
-<td><a id="l3166" class='ln'>3166</a></td><td></td></tr>
+<td><a id="l3166" class='ln'>3166</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3167" id="3167">
-<td><a id="l3167" class='ln'>3167</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S97&gt;/Unit Delay1' incorporates:</span></td></tr>
+<td><a id="l3167" class='ln'>3167</a></td><td>  <a id="3167c3" class="tk">rtDW</a>-&gt;<a id="3167c9" class="tk">UnitDelay_DSTATE_l5</a> = <a id="3167c31" class="tk">rtDW</a>-&gt;<a id="3167c37" class="tk">Switch2</a>;</td></tr>
 <tr name="3168" id="3168">
-<td><a id="l3168" class='ln'>3168</a></td><td><span class="ct">   *  Switch: '&lt;S110&gt;/Switch2'</span></td></tr>
+<td><a id="l3168" class='ln'>3168</a></td><td></td></tr>
 <tr name="3169" id="3169">
-<td><a id="l3169" class='ln'>3169</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3169" class='ln'>3169</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S87&gt;/Unit Delay1' incorporates:</span></td></tr>
 <tr name="3170" id="3170">
-<td><a id="l3170" class='ln'>3170</a></td><td>  <a id="3170c3" class="tk">rtDW</a>-&gt;<a id="3170c9" class="tk">UnitDelay1_DSTATE_i</a> = <a id="3170c31" class="tk">rtb_Divide1_m</a>;</td></tr>
+<td><a id="l3170" class='ln'>3170</a></td><td><span class="ct">   *  Switch: '&lt;S100&gt;/Switch2'</span></td></tr>
 <tr name="3171" id="3171">
-<td><a id="l3171" class='ln'>3171</a></td><td></td></tr>
+<td><a id="l3171" class='ln'>3171</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3172" id="3172">
-<td><a id="l3172" class='ln'>3172</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S108&gt;/Unit Delay' incorporates:</span></td></tr>
+<td><a id="l3172" class='ln'>3172</a></td><td>  <a id="3172c3" class="tk">rtDW</a>-&gt;<a id="3172c9" class="tk">UnitDelay1_DSTATE_j</a> = <a id="3172c31" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="3173" id="3173">
-<td><a id="l3173" class='ln'>3173</a></td><td><span class="ct">   *  Switch: '&lt;S110&gt;/Switch2'</span></td></tr>
+<td><a id="l3173" class='ln'>3173</a></td><td></td></tr>
 <tr name="3174" id="3174">
-<td><a id="l3174" class='ln'>3174</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3174" class='ln'>3174</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S98&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="3175" id="3175">
-<td><a id="l3175" class='ln'>3175</a></td><td>  <a id="3175c3" class="tk">rtDW</a>-&gt;<a id="3175c9" class="tk">UnitDelay_DSTATE_g</a> = <a id="3175c30" class="tk">rtb_Divide1_m</a>;</td></tr>
+<td><a id="l3175" class='ln'>3175</a></td><td><span class="ct">   *  Switch: '&lt;S100&gt;/Switch2'</span></td></tr>
 <tr name="3176" id="3176">
-<td><a id="l3176" class='ln'>3176</a></td><td></td></tr>
+<td><a id="l3176" class='ln'>3176</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3177" id="3177">
-<td><a id="l3177" class='ln'>3177</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S113&gt;/UnitDelay' incorporates:</span></td></tr>
+<td><a id="l3177" class='ln'>3177</a></td><td>  <a id="3177c3" class="tk">rtDW</a>-&gt;<a id="3177c9" class="tk">UnitDelay_DSTATE_b</a> = <a id="3177c30" class="tk">rtb_Add2_lk</a>;</td></tr>
 <tr name="3178" id="3178">
-<td><a id="l3178" class='ln'>3178</a></td><td><span class="ct">   *  Switch: '&lt;S76&gt;/Switch'</span></td></tr>
+<td><a id="l3178" class='ln'>3178</a></td><td></td></tr>
 <tr name="3179" id="3179">
-<td><a id="l3179" class='ln'>3179</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3179" class='ln'>3179</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S103&gt;/UnitDelay' incorporates:</span></td></tr>
 <tr name="3180" id="3180">
-<td><a id="l3180" class='ln'>3180</a></td><td>  <a id="3180c3" class="tk">rtDW</a>-&gt;<a id="3180c9" class="tk">UnitDelay_DSTATE_o</a> = <a id="3180c30" class="tk">rtDW</a>-&gt;<a id="3180c36" class="tk">Switch</a>;</td></tr>
+<td><a id="l3180" class='ln'>3180</a></td><td><span class="ct">   *  Switch: '&lt;S68&gt;/Switch'</span></td></tr>
 <tr name="3181" id="3181">
-<td><a id="l3181" class='ln'>3181</a></td><td></td></tr>
+<td><a id="l3181" class='ln'>3181</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3182" id="3182">
-<td><a id="l3182" class='ln'>3182</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S98&gt;/Unit Delay1' incorporates:</span></td></tr>
+<td><a id="l3182" class='ln'>3182</a></td><td>  <a id="3182c3" class="tk">rtDW</a>-&gt;<a id="3182c9" class="tk">UnitDelay_DSTATE_er</a> = <a id="3182c31" class="tk">rtDW</a>-&gt;<a id="3182c37" class="tk">Switch_p</a>;</td></tr>
 <tr name="3183" id="3183">
-<td><a id="l3183" class='ln'>3183</a></td><td><span class="ct">   *  Switch: '&lt;S117&gt;/Switch2'</span></td></tr>
+<td><a id="l3183" class='ln'>3183</a></td><td></td></tr>
 <tr name="3184" id="3184">
-<td><a id="l3184" class='ln'>3184</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3184" class='ln'>3184</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S88&gt;/Unit Delay1' incorporates:</span></td></tr>
 <tr name="3185" id="3185">
-<td><a id="l3185" class='ln'>3185</a></td><td>  <a id="3185c3" class="tk">rtDW</a>-&gt;<a id="3185c9" class="tk">UnitDelay1_DSTATE_b</a> = <a id="3185c31" class="tk">rtb_r_cos_M1</a>;</td></tr>
+<td><a id="l3185" class='ln'>3185</a></td><td><span class="ct">   *  Switch: '&lt;S107&gt;/Switch2'</span></td></tr>
 <tr name="3186" id="3186">
-<td><a id="l3186" class='ln'>3186</a></td><td></td></tr>
+<td><a id="l3186" class='ln'>3186</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3187" id="3187">
-<td><a id="l3187" class='ln'>3187</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S115&gt;/Unit Delay' incorporates:</span></td></tr>
+<td><a id="l3187" class='ln'>3187</a></td><td>  <a id="3187c3" class="tk">rtDW</a>-&gt;<a id="3187c9" class="tk">UnitDelay1_DSTATE_p</a> = <a id="3187c31" class="tk">rtb_Divide1_oy</a>;</td></tr>
 <tr name="3188" id="3188">
-<td><a id="l3188" class='ln'>3188</a></td><td><span class="ct">   *  Switch: '&lt;S117&gt;/Switch2'</span></td></tr>
+<td><a id="l3188" class='ln'>3188</a></td><td></td></tr>
 <tr name="3189" id="3189">
-<td><a id="l3189" class='ln'>3189</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3189" class='ln'>3189</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S105&gt;/Unit Delay' incorporates:</span></td></tr>
 <tr name="3190" id="3190">
-<td><a id="l3190" class='ln'>3190</a></td><td>  <a id="3190c3" class="tk">rtDW</a>-&gt;<a id="3190c9" class="tk">UnitDelay_DSTATE_a</a> = <a id="3190c30" class="tk">rtb_r_cos_M1</a>;</td></tr>
+<td><a id="l3190" class='ln'>3190</a></td><td><span class="ct">   *  Switch: '&lt;S107&gt;/Switch2'</span></td></tr>
 <tr name="3191" id="3191">
-<td><a id="l3191" class='ln'>3191</a></td><td></td></tr>
+<td><a id="l3191" class='ln'>3191</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3192" id="3192">
-<td><a id="l3192" class='ln'>3192</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S54&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l3192" class='ln'>3192</a></td><td>  <a id="3192c3" class="tk">rtDW</a>-&gt;<a id="3192c9" class="tk">UnitDelay_DSTATE_d</a> = <a id="3192c30" class="tk">rtb_Divide1_oy</a>;</td></tr>
 <tr name="3193" id="3193">
-<td><a id="l3193" class='ln'>3193</a></td><td>  <a id="3193c3" class="tk">rtDW</a>-&gt;<a id="3193c9" class="tk">UnitDelay_DSTATE_bm</a> = <a id="3193c31" class="tk">rtb_z_ctrlMod</a>;</td></tr>
+<td><a id="l3193" class='ln'>3193</a></td><td></td></tr>
 <tr name="3194" id="3194">
-<td><a id="l3194" class='ln'>3194</a></td><td></td></tr>
+<td><a id="l3194" class='ln'>3194</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S45&gt;/Unit Delay' */</span></td></tr>
 <tr name="3195" id="3195">
-<td><a id="l3195" class='ln'>3195</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S39&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l3195" class='ln'>3195</a></td><td>  <a id="3195c3" class="tk">rtDW</a>-&gt;<a id="3195c9" class="tk">UnitDelay_DSTATE_h3</a> = <a id="3195c31" class="tk">rtb_dz_cntTrnsDet</a>;</td></tr>
 <tr name="3196" id="3196">
-<td><a id="l3196" class='ln'>3196</a></td><td>  <a id="3196c3" class="tk">rtDW</a>-&gt;<a id="3196c9" class="tk">UnitDelay_DSTATE_bv</a> = <a id="3196c31" class="tk">rtb_n_commDeacv</a>;</td></tr>
+<td><a id="l3196" class='ln'>3196</a></td><td></td></tr>
 <tr name="3197" id="3197">
-<td><a id="l3197" class='ln'>3197</a></td><td></td></tr>
+<td><a id="l3197" class='ln'>3197</a></td><td>  <span class="ct">/* Update for UnitDelay: '&lt;S7&gt;/UnitDelay' */</span></td></tr>
 <tr name="3198" id="3198">
-<td><a id="l3198" class='ln'>3198</a></td><td>  <span class="ct">/* End of Outputs for SubSystem: '&lt;Root&gt;/PMSM_Controller' */</span></td></tr>
+<td><a id="l3198" class='ln'>3198</a></td><td>  <a id="3198c3" class="tk">rtDW</a>-&gt;<a id="3198c9" class="tk">UnitDelay_DSTATE_f</a> = <a id="3198c30" class="tk">rtb_RelationalOperator</a>;</td></tr>
 <tr name="3199" id="3199">
 <td><a id="l3199" class='ln'>3199</a></td><td></td></tr>
 <tr name="3200" id="3200">
-<td><a id="l3200" class='ln'>3200</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/f_Vdq' incorporates:</span></td></tr>
+<td><a id="l3200" class='ln'>3200</a></td><td>  <span class="ct">/* End of Outputs for SubSystem: '&lt;Root&gt;/PMSM_Controller' */</span></td></tr>
 <tr name="3201" id="3201">
-<td><a id="l3201" class='ln'>3201</a></td><td><span class="ct">   *  UnitDelay: '&lt;S6&gt;/UnitDelay1'</span></td></tr>
+<td><a id="l3201" class='ln'>3201</a></td><td></td></tr>
 <tr name="3202" id="3202">
-<td><a id="l3202" class='ln'>3202</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3202" class='ln'>3202</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/n_Sector' */</span></td></tr>
 <tr name="3203" id="3203">
-<td><a id="l3203" class='ln'>3203</a></td><td>  <a id="3203c3" class="tk">rtY</a>-&gt;<a id="3203c8" class="tk">f_Vdq</a>[0] = <a id="3203c19" class="tk">rtb_UnitDelay1_m</a>[0];</td></tr>
+<td><a id="l3203" class='ln'>3203</a></td><td>  <a id="3203c3" class="tk">rtY</a>-&gt;<a id="3203c8" class="tk">n_Sector</a> = <a id="3203c19" class="tk">rtb_DataTypeConversion_e</a>;</td></tr>
 <tr name="3204" id="3204">
-<td><a id="l3204" class='ln'>3204</a></td><td>  <a id="3204c3" class="tk">rtY</a>-&gt;<a id="3204c8" class="tk">f_Vdq</a>[1] = <a id="3204c19" class="tk">rtb_UnitDelay1_m</a>[1];</td></tr>
+<td><a id="l3204" class='ln'>3204</a></td><td></td></tr>
 <tr name="3205" id="3205">
-<td><a id="l3205" class='ln'>3205</a></td><td></td></tr>
+<td><a id="l3205" class='ln'>3205</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/n_MotError' */</span></td></tr>
 <tr name="3206" id="3206">
-<td><a id="l3206" class='ln'>3206</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/n_Sector' */</span></td></tr>
+<td><a id="l3206" class='ln'>3206</a></td><td>  <a id="3206c3" class="tk">rtY</a>-&gt;<a id="3206c8" class="tk">n_MotError</a> = <a id="3206c21" class="tk">rtb_UnitDelay_n</a>;</td></tr>
 <tr name="3207" id="3207">
-<td><a id="l3207" class='ln'>3207</a></td><td>  <a id="3207c3" class="tk">rtY</a>-&gt;<a id="3207c8" class="tk">n_Sector</a> = <a id="3207c19" class="tk">rtb_DataTypeConversion_j</a>;</td></tr>
+<td><a id="l3207" class='ln'>3207</a></td><td></td></tr>
 <tr name="3208" id="3208">
-<td><a id="l3208" class='ln'>3208</a></td><td></td></tr>
+<td><a id="l3208" class='ln'>3208</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/f_MotAngle' incorporates:</span></td></tr>
 <tr name="3209" id="3209">
-<td><a id="l3209" class='ln'>3209</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/n_MotError' */</span></td></tr>
+<td><a id="l3209" class='ln'>3209</a></td><td><span class="ct">   *  Switch: '&lt;S1&gt;/Switch'</span></td></tr>
 <tr name="3210" id="3210">
-<td><a id="l3210" class='ln'>3210</a></td><td>  <a id="3210c3" class="tk">rtY</a>-&gt;<a id="3210c8" class="tk">n_MotError</a> = <a id="3210c21" class="tk">rtb_UnitDelay</a>;</td></tr>
+<td><a id="l3210" class='ln'>3210</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3211" id="3211">
-<td><a id="l3211" class='ln'>3211</a></td><td></td></tr>
+<td><a id="l3211" class='ln'>3211</a></td><td>  <a id="3211c3" class="tk">rtY</a>-&gt;<a id="3211c8" class="tk">f_MotAngle</a> = <a id="3211c21" class="tk">rtb_r_cos_M1</a>;</td></tr>
 <tr name="3212" id="3212">
-<td><a id="l3212" class='ln'>3212</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/f_MotAngle' incorporates:</span></td></tr>
+<td><a id="l3212" class='ln'>3212</a></td><td></td></tr>
 <tr name="3213" id="3213">
-<td><a id="l3213" class='ln'>3213</a></td><td><span class="ct">   *  Merge: '&lt;S3&gt;/Merge'</span></td></tr>
+<td><a id="l3213" class='ln'>3213</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/f_MotRPM' incorporates:</span></td></tr>
 <tr name="3214" id="3214">
-<td><a id="l3214" class='ln'>3214</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3214" class='ln'>3214</a></td><td><span class="ct">   *  Switch: '&lt;S20&gt;/Switch2'</span></td></tr>
 <tr name="3215" id="3215">
-<td><a id="l3215" class='ln'>3215</a></td><td>  <a id="3215c3" class="tk">rtY</a>-&gt;<a id="3215c8" class="tk">f_MotAngle</a> = <a id="3215c21" class="tk">rtDW</a>-&gt;<a id="3215c27" class="tk">Merge_i</a>;</td></tr>
+<td><a id="l3215" class='ln'>3215</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3216" id="3216">
-<td><a id="l3216" class='ln'>3216</a></td><td></td></tr>
+<td><a id="l3216" class='ln'>3216</a></td><td>  <a id="3216c3" class="tk">rtY</a>-&gt;<a id="3216c8" class="tk">f_MotRPM</a> = <a id="3216c19" class="tk">rtb_Switch3</a>;</td></tr>
 <tr name="3217" id="3217">
-<td><a id="l3217" class='ln'>3217</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/f_MotRPM' incorporates:</span></td></tr>
+<td><a id="l3217" class='ln'>3217</a></td><td></td></tr>
 <tr name="3218" id="3218">
-<td><a id="l3218" class='ln'>3218</a></td><td><span class="ct">   *  Switch: '&lt;S14&gt;/Switch2'</span></td></tr>
+<td><a id="l3218" class='ln'>3218</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/n_hallStat' */</span></td></tr>
 <tr name="3219" id="3219">
-<td><a id="l3219" class='ln'>3219</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3219" class='ln'>3219</a></td><td>  <a id="3219c3" class="tk">rtY</a>-&gt;<a id="3219c8" class="tk">n_hallStat</a> = <a id="3219c21" class="tk">rtb_Add_h</a>;</td></tr>
 <tr name="3220" id="3220">
-<td><a id="l3220" class='ln'>3220</a></td><td>  <a id="3220c3" class="tk">rtY</a>-&gt;<a id="3220c8" class="tk">f_MotRPM</a> = <a id="3220c19" class="tk">rtb_Switch3</a>;</td></tr>
+<td><a id="l3220" class='ln'>3220</a></td><td></td></tr>
 <tr name="3221" id="3221">
-<td><a id="l3221" class='ln'>3221</a></td><td></td></tr>
+<td><a id="l3221" class='ln'>3221</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/n_FocMode' */</span></td></tr>
 <tr name="3222" id="3222">
-<td><a id="l3222" class='ln'>3222</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/f_hallAngle' incorporates:</span></td></tr>
+<td><a id="l3222" class='ln'>3222</a></td><td>  <a id="3222c3" class="tk">rtY</a>-&gt;<a id="3222c8" class="tk">n_FocMode</a> = <a id="3222c20" class="tk">rtb_dz_cntTrnsDet</a>;</td></tr>
 <tr name="3223" id="3223">
-<td><a id="l3223" class='ln'>3223</a></td><td><span class="ct">   *  Merge: '&lt;S15&gt;/Merge'</span></td></tr>
+<td><a id="l3223" class='ln'>3223</a></td><td><span class="br">}</span></td></tr>
 <tr name="3224" id="3224">
-<td><a id="l3224" class='ln'>3224</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3224" class='ln'>3224</a></td><td></td></tr>
 <tr name="3225" id="3225">
-<td><a id="l3225" class='ln'>3225</a></td><td>  <a id="3225c3" class="tk">rtY</a>-&gt;<a id="3225c8" class="tk">f_hallAngle</a> = <a id="3225c22" class="tk">rtb_Sum3_jm</a>;</td></tr>
+<td><a id="l3225" class='ln'>3225</a></td><td><span class="ct">/* Model initialize function */</span></td></tr>
 <tr name="3226" id="3226">
-<td><a id="l3226" class='ln'>3226</a></td><td></td></tr>
+<td><a id="l3226" class='ln'>3226</a></td><td><span class="kw">void</span> <a id="3226c6" class="tk">PMSM_Controller_initialize</a>(<a id="3226c33" class="tk">RT_MODEL</a> <a id="3226c42" class="tk">*</a><span class="kw">const</span> <a id="3226c49" class="tk">rtM</a>)</td></tr>
 <tr name="3227" id="3227">
-<td><a id="l3227" class='ln'>3227</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/n_hallStat' */</span></td></tr>
+<td><a id="l3227" class='ln'>3227</a></td><td><span class="br">{</span></td></tr>
 <tr name="3228" id="3228">
-<td><a id="l3228" class='ln'>3228</a></td><td>  <a id="3228c3" class="tk">rtY</a>-&gt;<a id="3228c8" class="tk">n_hallStat</a> = <a id="3228c21" class="tk">rtb_Add_gf</a>;</td></tr>
+<td><a id="l3228" class='ln'>3228</a></td><td>  <a id="3228c3" class="tk">DW</a> <a id="3228c6" class="tk">*</a><a id="3228c7" class="tk">rtDW</a> = <a id="3228c14" class="tk">rtM</a>-&gt;<a id="3228c19" class="tk">dwork</a>;</td></tr>
 <tr name="3229" id="3229">
-<td><a id="l3229" class='ln'>3229</a></td><td></td></tr>
+<td><a id="l3229" class='ln'>3229</a></td><td>  <a id="3229c3" class="tk">PrevZCX</a> <a id="3229c11" class="tk">*</a><a id="3229c12" class="tk">rtPrevZCX</a> = <a id="3229c24" class="tk">rtM</a>-&gt;<a id="3229c29" class="tk">prevZCSigState</a>;</td></tr>
 <tr name="3230" id="3230">
-<td><a id="l3230" class='ln'>3230</a></td><td>  <span class="ct">/* Outport: '&lt;Root&gt;/n_runingMode' */</span></td></tr>
+<td><a id="l3230" class='ln'>3230</a></td><td>  <a id="3230c3" class="tk">rtPrevZCX</a>-&gt;<a id="3230c14" class="tk">ResettableDelay_Reset_ZCE_f</a> = <a id="3230c44" class="tk">POS_ZCSIG</a>;</td></tr>
 <tr name="3231" id="3231">
-<td><a id="l3231" class='ln'>3231</a></td><td>  <a id="3231c3" class="tk">rtY</a>-&gt;<a id="3231c8" class="tk">n_runingMode</a> = <a id="3231c23" class="tk">rtb_z_ctrlMod</a>;</td></tr>
+<td><a id="l3231" class='ln'>3231</a></td><td>  <a id="3231c3" class="tk">rtPrevZCX</a>-&gt;<a id="3231c14" class="tk">PI_backCalc_fixdt1</a>.<a id="3231c33" class="tk">ResettableDelay_Reset_ZCE</a> = <a id="3231c61" class="tk">POS_ZCSIG</a>;</td></tr>
 <tr name="3232" id="3232">
-<td><a id="l3232" class='ln'>3232</a></td><td><span class="br">}</span></td></tr>
+<td><a id="l3232" class='ln'>3232</a></td><td>  <a id="3232c3" class="tk">rtPrevZCX</a>-&gt;<a id="3232c14" class="tk">PI_backCalc_fixdt_ig</a>.<a id="3232c35" class="tk">ResettableDelay_Reset_ZCE</a> = <a id="3232c63" class="tk">POS_ZCSIG</a>;</td></tr>
 <tr name="3233" id="3233">
-<td><a id="l3233" class='ln'>3233</a></td><td></td></tr>
+<td><a id="l3233" class='ln'>3233</a></td><td>  <a id="3233c3" class="tk">rtPrevZCX</a>-&gt;<a id="3233c14" class="tk">PI_Speed</a>.<a id="3233c23" class="tk">ResettableDelay_Reset_ZCE_fm</a> = <a id="3233c54" class="tk">POS_ZCSIG</a>;</td></tr>
 <tr name="3234" id="3234">
-<td><a id="l3234" class='ln'>3234</a></td><td><span class="ct">/* Model initialize function */</span></td></tr>
+<td><a id="l3234" class='ln'>3234</a></td><td></td></tr>
 <tr name="3235" id="3235">
-<td><a id="l3235" class='ln'>3235</a></td><td><span class="kw">void</span> <a id="3235c6" class="tk">PMSM_Controller_initialize</a>(<a id="3235c33" class="tk">RT_MODEL</a> <a id="3235c42" class="tk">*</a><span class="kw">const</span> <a id="3235c49" class="tk">rtM</a>)</td></tr>
+<td><a id="l3235" class='ln'>3235</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;Root&gt;/PMSM_Controller' */</span></td></tr>
 <tr name="3236" id="3236">
-<td><a id="l3236" class='ln'>3236</a></td><td><span class="br">{</span></td></tr>
+<td><a id="l3236" class='ln'>3236</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S20&gt;/Raw_Motor_Speed_Estimation' */</span></td></tr>
 <tr name="3237" id="3237">
-<td><a id="l3237" class='ln'>3237</a></td><td>  <a id="3237c3" class="tk">DW</a> <a id="3237c6" class="tk">*</a><a id="3237c7" class="tk">rtDW</a> = <a id="3237c14" class="tk">rtM</a>-&gt;<a id="3237c19" class="tk">dwork</a>;</td></tr>
+<td><a id="l3237" class='ln'>3237</a></td><td>  <span class="ct">/* InitializeConditions for UnitDelay: '&lt;S29&gt;/UnitDelay2' */</span></td></tr>
 <tr name="3238" id="3238">
-<td><a id="l3238" class='ln'>3238</a></td><td>  <a id="3238c3" class="tk">PrevZCX</a> <a id="3238c11" class="tk">*</a><a id="3238c12" class="tk">rtPrevZCX</a> = <a id="3238c24" class="tk">rtM</a>-&gt;<a id="3238c29" class="tk">prevZCSigState</a>;</td></tr>
+<td><a id="l3238" class='ln'>3238</a></td><td>  <a id="3238c3" class="tk">rtDW</a>-&gt;<a id="3238c9" class="tk">UnitDelay2_DSTATE</a> = 1000000U;</td></tr>
 <tr name="3239" id="3239">
-<td><a id="l3239" class='ln'>3239</a></td><td>  <a id="3239c3" class="tk">ExtY</a> <a id="3239c8" class="tk">*</a><a id="3239c9" class="tk">rtY</a> = (<a id="3239c16" class="tk">ExtY</a> <a id="3239c21" class="tk">*</a>) <a id="3239c24" class="tk">rtM</a>-&gt;<a id="3239c29" class="tk">outputs</a>;</td></tr>
+<td><a id="l3239" class='ln'>3239</a></td><td></td></tr>
 <tr name="3240" id="3240">
-<td><a id="l3240" class='ln'>3240</a></td><td>  <a id="3240c3" class="tk">rtPrevZCX</a>-&gt;<a id="3240c14" class="tk">ResettableDelay_Reset_ZCE_a</a> = <a id="3240c44" class="tk">POS_ZCSIG</a>;</td></tr>
+<td><a id="l3240" class='ln'>3240</a></td><td>  <span class="ct">/* SystemInitialize for SignalConversion generated from: '&lt;S29&gt;/delta_count' incorporates:</span></td></tr>
 <tr name="3241" id="3241">
-<td><a id="l3241" class='ln'>3241</a></td><td>  <a id="3241c3" class="tk">rtPrevZCX</a>-&gt;<a id="3241c14" class="tk">ResettableDelay_Reset_ZCE_o</a> = <a id="3241c44" class="tk">POS_ZCSIG</a>;</td></tr>
+<td><a id="l3241" class='ln'>3241</a></td><td><span class="ct">   *  Outport: '&lt;S29&gt;/delta_count'</span></td></tr>
 <tr name="3242" id="3242">
-<td><a id="l3242" class='ln'>3242</a></td><td>  <a id="3242c3" class="tk">rtPrevZCX</a>-&gt;<a id="3242c14" class="tk">PI_backCalc_fixdt1</a>.<a id="3242c33" class="tk">ResettableDelay_Reset_ZCE</a> = <a id="3242c61" class="tk">POS_ZCSIG</a>;</td></tr>
+<td><a id="l3242" class='ln'>3242</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="3243" id="3243">
-<td><a id="l3243" class='ln'>3243</a></td><td>  <a id="3243c3" class="tk">rtPrevZCX</a>-&gt;<a id="3243c14" class="tk">PI_backCalc_fixdt_o3</a>.<a id="3243c35" class="tk">ResettableDelay_Reset_ZCE</a> = <a id="3243c63" class="tk">POS_ZCSIG</a>;</td></tr>
+<td><a id="l3243" class='ln'>3243</a></td><td>  <a id="3243c3" class="tk">rtDW</a>-&gt;<a id="3243c9" class="tk">OutportBufferFordelta_count</a> = 1000000U;</td></tr>
 <tr name="3244" id="3244">
-<td><a id="l3244" class='ln'>3244</a></td><td>  <a id="3244c3" class="tk">rtPrevZCX</a>-&gt;<a id="3244c14" class="tk">PI_Speed</a>.<a id="3244c23" class="tk">ResettableDelay_Reset_ZCE_f</a> = <a id="3244c53" class="tk">POS_ZCSIG</a>;</td></tr>
+<td><a id="l3244" class='ln'>3244</a></td><td></td></tr>
 <tr name="3245" id="3245">
-<td><a id="l3245" class='ln'>3245</a></td><td></td></tr>
+<td><a id="l3245" class='ln'>3245</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S20&gt;/Raw_Motor_Speed_Estimation' */</span></td></tr>
 <tr name="3246" id="3246">
-<td><a id="l3246" class='ln'>3246</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;Root&gt;/PMSM_Controller' */</span></td></tr>
+<td><a id="l3246" class='ln'>3246</a></td><td></td></tr>
 <tr name="3247" id="3247">
-<td><a id="l3247" class='ln'>3247</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S14&gt;/Raw_Motor_Speed_Estimation' */</span></td></tr>
+<td><a id="l3247" class='ln'>3247</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S44&gt;/Do_Calc' */</span></td></tr>
 <tr name="3248" id="3248">
-<td><a id="l3248" class='ln'>3248</a></td><td>  <span class="ct">/* InitializeConditions for UnitDelay: '&lt;S20&gt;/UnitDelay2' */</span></td></tr>
+<td><a id="l3248" class='ln'>3248</a></td><td>  <span class="ct">/* Start for If: '&lt;S65&gt;/If' */</span></td></tr>
 <tr name="3249" id="3249">
-<td><a id="l3249" class='ln'>3249</a></td><td>  <a id="3249c3" class="tk">rtDW</a>-&gt;<a id="3249c9" class="tk">UnitDelay2_DSTATE</a> = <a id="3249c29" class="tk">rtP</a>.<a id="3249c33" class="tk">n_hall_count_ps</a>;</td></tr>
+<td><a id="l3249" class='ln'>3249</a></td><td>  <a id="3249c3" class="tk">rtDW</a>-&gt;<a id="3249c9" class="tk">If_ActiveSubsystem_k</a> = <a id="3249c32" class="tk">-</a>1;</td></tr>
 <tr name="3250" id="3250">
 <td><a id="l3250" class='ln'>3250</a></td><td></td></tr>
 <tr name="3251" id="3251">
-<td><a id="l3251" class='ln'>3251</a></td><td>  <span class="ct">/* SystemInitialize for Outport: '&lt;S20&gt;/z_counter' incorporates:</span></td></tr>
+<td><a id="l3251" class='ln'>3251</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S70&gt;/Resettable Delay' */</span></td></tr>
 <tr name="3252" id="3252">
-<td><a id="l3252" class='ln'>3252</a></td><td><span class="ct">   *  Inport: '&lt;S20&gt;/z_counterRawPrev'</span></td></tr>
+<td><a id="l3252" class='ln'>3252</a></td><td>  <a id="3252c3" class="tk">rtDW</a>-&gt;<a id="3252c9" class="tk">icLoad</a> = 1U;</td></tr>
 <tr name="3253" id="3253">
-<td><a id="l3253" class='ln'>3253</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l3253" class='ln'>3253</a></td><td></td></tr>
 <tr name="3254" id="3254">
-<td><a id="l3254" class='ln'>3254</a></td><td>  <a id="3254c3" class="tk">rtDW</a>-&gt;<a id="3254c9" class="tk">z_counterRawPrev</a> = <a id="3254c28" class="tk">rtP</a>.<a id="3254c32" class="tk">n_hall_count_ps</a>;</td></tr>
+<td><a id="l3254" class='ln'>3254</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S65&gt;/speed_mode' */</span></td></tr>
 <tr name="3255" id="3255">
-<td><a id="l3255" class='ln'>3255</a></td><td></td></tr>
+<td><a id="l3255" class='ln'>3255</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="3256" id="3256">
-<td><a id="l3256" class='ln'>3256</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S14&gt;/Raw_Motor_Speed_Estimation' */</span></td></tr>
+<td><a id="l3256" class='ln'>3256</a></td><td>  <a id="3256c3" class="tk">PI_backCalc_fixdt_Init</a>(<a id="3256c26" class="tk">&amp;</a><a id="3256c27" class="tk">rtDW</a>-&gt;<a id="3256c33" class="tk">PI_Speed</a>);</td></tr>
 <tr name="3257" id="3257">
 <td><a id="l3257" class='ln'>3257</a></td><td></td></tr>
 <tr name="3258" id="3258">
-<td><a id="l3258" class='ln'>3258</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S53&gt;/Do_Calc' */</span></td></tr>
+<td><a id="l3258" class='ln'>3258</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="3259" id="3259">
-<td><a id="l3259" class='ln'>3259</a></td><td>  <span class="ct">/* Start for If: '&lt;S73&gt;/If' */</span></td></tr>
+<td><a id="l3259" class='ln'>3259</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S65&gt;/speed_mode' */</span></td></tr>
 <tr name="3260" id="3260">
-<td><a id="l3260" class='ln'>3260</a></td><td>  <a id="3260c3" class="tk">rtDW</a>-&gt;<a id="3260c9" class="tk">If_ActiveSubsystem_h</a> = <a id="3260c32" class="tk">-</a>1;</td></tr>
+<td><a id="l3260" class='ln'>3260</a></td><td></td></tr>
 <tr name="3261" id="3261">
-<td><a id="l3261" class='ln'>3261</a></td><td></td></tr>
+<td><a id="l3261" class='ln'>3261</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S65&gt;/torque_mode' */</span></td></tr>
 <tr name="3262" id="3262">
-<td><a id="l3262" class='ln'>3262</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S78&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l3262" class='ln'>3262</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S80&gt;/Delay' */</span></td></tr>
 <tr name="3263" id="3263">
-<td><a id="l3263" class='ln'>3263</a></td><td>  <a id="3263c3" class="tk">rtDW</a>-&gt;<a id="3263c9" class="tk">icLoad</a> = 1U;</td></tr>
+<td><a id="l3263" class='ln'>3263</a></td><td>  <a id="3263c3" class="tk">rtDW</a>-&gt;<a id="3263c9" class="tk">icLoad_i</a> = 1U;</td></tr>
 <tr name="3264" id="3264">
 <td><a id="l3264" class='ln'>3264</a></td><td></td></tr>
 <tr name="3265" id="3265">
-<td><a id="l3265" class='ln'>3265</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S73&gt;/speed_mode' */</span></td></tr>
+<td><a id="l3265" class='ln'>3265</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S65&gt;/torque_mode' */</span></td></tr>
 <tr name="3266" id="3266">
-<td><a id="l3266" class='ln'>3266</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l3266" class='ln'>3266</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S44&gt;/Do_Calc' */</span></td></tr>
 <tr name="3267" id="3267">
-<td><a id="l3267" class='ln'>3267</a></td><td>  <a id="3267c3" class="tk">PI_backCalc_fixdt_Init</a>(<a id="3267c26" class="tk">&amp;</a><a id="3267c27" class="tk">rtDW</a>-&gt;<a id="3267c33" class="tk">PI_Speed</a>);</td></tr>
+<td><a id="l3267" class='ln'>3267</a></td><td></td></tr>
 <tr name="3268" id="3268">
-<td><a id="l3268" class='ln'>3268</a></td><td></td></tr>
+<td><a id="l3268" class='ln'>3268</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S45&gt;/CurrentLoop' */</span></td></tr>
 <tr name="3269" id="3269">
-<td><a id="l3269" class='ln'>3269</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l3269" class='ln'>3269</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;S85&gt;/PI_backCalc_fixdt' */</span></td></tr>
 <tr name="3270" id="3270">
-<td><a id="l3270" class='ln'>3270</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S73&gt;/speed_mode' */</span></td></tr>
+<td><a id="l3270" class='ln'>3270</a></td><td>  <a id="3270c3" class="tk">PI_backCalc_fixdt_g_Init</a>(<a id="3270c28" class="tk">&amp;</a><a id="3270c29" class="tk">rtDW</a>-&gt;<a id="3270c35" class="tk">PI_backCalc_fixdt_ig</a>);</td></tr>
 <tr name="3271" id="3271">
 <td><a id="l3271" class='ln'>3271</a></td><td></td></tr>
 <tr name="3272" id="3272">
-<td><a id="l3272" class='ln'>3272</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S73&gt;/torque_mode' */</span></td></tr>
+<td><a id="l3272" class='ln'>3272</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S85&gt;/PI_backCalc_fixdt' */</span></td></tr>
 <tr name="3273" id="3273">
-<td><a id="l3273" class='ln'>3273</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S88&gt;/Delay' */</span></td></tr>
+<td><a id="l3273" class='ln'>3273</a></td><td></td></tr>
 <tr name="3274" id="3274">
-<td><a id="l3274" class='ln'>3274</a></td><td>  <a id="3274c3" class="tk">rtDW</a>-&gt;<a id="3274c9" class="tk">icLoad_p</a> = 1U;</td></tr>
+<td><a id="l3274" class='ln'>3274</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;S85&gt;/PI_backCalc_fixdt1' */</span></td></tr>
 <tr name="3275" id="3275">
-<td><a id="l3275" class='ln'>3275</a></td><td></td></tr>
+<td><a id="l3275" class='ln'>3275</a></td><td>  <a id="3275c3" class="tk">PI_backCalc_fixdt_g_Init</a>(<a id="3275c28" class="tk">&amp;</a><a id="3275c29" class="tk">rtDW</a>-&gt;<a id="3275c35" class="tk">PI_backCalc_fixdt1</a>);</td></tr>
 <tr name="3276" id="3276">
-<td><a id="l3276" class='ln'>3276</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;S88&gt;/PI_TrqSpdLim' */</span></td></tr>
+<td><a id="l3276" class='ln'>3276</a></td><td></td></tr>
 <tr name="3277" id="3277">
-<td><a id="l3277" class='ln'>3277</a></td><td>  <span class="ct">/* InitializeConditions for Delay: '&lt;S93&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l3277" class='ln'>3277</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S85&gt;/PI_backCalc_fixdt1' */</span></td></tr>
 <tr name="3278" id="3278">
-<td><a id="l3278" class='ln'>3278</a></td><td>  <a id="3278c3" class="tk">rtDW</a>-&gt;<a id="3278c9" class="tk">icLoad_k</a> = 1U;</td></tr>
+<td><a id="l3278" class='ln'>3278</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S45&gt;/CurrentLoop' */</span></td></tr>
 <tr name="3279" id="3279">
-<td><a id="l3279" class='ln'>3279</a></td><td></td></tr>
+<td><a id="l3279" class='ln'>3279</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;Root&gt;/PMSM_Controller' */</span></td></tr>
 <tr name="3280" id="3280">
-<td><a id="l3280" class='ln'>3280</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S88&gt;/PI_TrqSpdLim' */</span></td></tr>
+<td><a id="l3280" class='ln'>3280</a></td><td><span class="br">}</span></td></tr>
 <tr name="3281" id="3281">
-<td><a id="l3281" class='ln'>3281</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S73&gt;/torque_mode' */</span></td></tr>
+<td><a id="l3281" class='ln'>3281</a></td><td></td></tr>
 <tr name="3282" id="3282">
-<td><a id="l3282" class='ln'>3282</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S53&gt;/Do_Calc' */</span></td></tr>
+<td><a id="l3282" class='ln'>3282</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="3283" id="3283">
-<td><a id="l3283" class='ln'>3283</a></td><td></td></tr>
+<td><a id="l3283" class='ln'>3283</a></td><td><span class="ct"> * File trailer for generated code.</span></td></tr>
 <tr name="3284" id="3284">
-<td><a id="l3284" class='ln'>3284</a></td><td>  <span class="ct">/* SystemInitialize for IfAction SubSystem: '&lt;S54&gt;/CurrentLoop' */</span></td></tr>
+<td><a id="l3284" class='ln'>3284</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="3285" id="3285">
-<td><a id="l3285" class='ln'>3285</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;S95&gt;/PI_backCalc_fixdt' */</span></td></tr>
+<td><a id="l3285" class='ln'>3285</a></td><td><span class="ct"> * [EOF]</span></td></tr>
 <tr name="3286" id="3286">
-<td><a id="l3286" class='ln'>3286</a></td><td>  <a id="3286c3" class="tk">PI_backCalc_fixdt_p_Init</a>(<a id="3286c28" class="tk">&amp;</a><a id="3286c29" class="tk">rtDW</a>-&gt;<a id="3286c35" class="tk">PI_backCalc_fixdt_o3</a>);</td></tr>
+<td><a id="l3286" class='ln'>3286</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="3287" id="3287">
 <td><a id="l3287" class='ln'>3287</a></td><td></td></tr>
-<tr name="3288" id="3288">
-<td><a id="l3288" class='ln'>3288</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S95&gt;/PI_backCalc_fixdt' */</span></td></tr>
-<tr name="3289" id="3289">
-<td><a id="l3289" class='ln'>3289</a></td><td></td></tr>
-<tr name="3290" id="3290">
-<td><a id="l3290" class='ln'>3290</a></td><td>  <span class="ct">/* SystemInitialize for Atomic SubSystem: '&lt;S95&gt;/PI_backCalc_fixdt1' */</span></td></tr>
-<tr name="3291" id="3291">
-<td><a id="l3291" class='ln'>3291</a></td><td>  <a id="3291c3" class="tk">PI_backCalc_fixdt_p_Init</a>(<a id="3291c28" class="tk">&amp;</a><a id="3291c29" class="tk">rtDW</a>-&gt;<a id="3291c35" class="tk">PI_backCalc_fixdt1</a>);</td></tr>
-<tr name="3292" id="3292">
-<td><a id="l3292" class='ln'>3292</a></td><td></td></tr>
-<tr name="3293" id="3293">
-<td><a id="l3293" class='ln'>3293</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S95&gt;/PI_backCalc_fixdt1' */</span></td></tr>
-<tr name="3294" id="3294">
-<td><a id="l3294" class='ln'>3294</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;S54&gt;/CurrentLoop' */</span></td></tr>
-<tr name="3295" id="3295">
-<td><a id="l3295" class='ln'>3295</a></td><td>  <span class="ct">/* End of SystemInitialize for SubSystem: '&lt;Root&gt;/PMSM_Controller' */</span></td></tr>
-<tr name="3296" id="3296">
-<td><a id="l3296" class='ln'>3296</a></td><td></td></tr>
-<tr name="3297" id="3297">
-<td><a id="l3297" class='ln'>3297</a></td><td>  <span class="ct">/* SystemInitialize for Outport: '&lt;Root&gt;/f_MotAngle' incorporates:</span></td></tr>
-<tr name="3298" id="3298">
-<td><a id="l3298" class='ln'>3298</a></td><td><span class="ct">   *  Merge: '&lt;S3&gt;/Merge'</span></td></tr>
-<tr name="3299" id="3299">
-<td><a id="l3299" class='ln'>3299</a></td><td><span class="ct">   */</span></td></tr>
-<tr name="3300" id="3300">
-<td><a id="l3300" class='ln'>3300</a></td><td>  <a id="3300c3" class="tk">rtY</a>-&gt;<a id="3300c8" class="tk">f_MotAngle</a> = <a id="3300c21" class="tk">rtDW</a>-&gt;<a id="3300c27" class="tk">Merge_i</a>;</td></tr>
-<tr name="3301" id="3301">
-<td><a id="l3301" class='ln'>3301</a></td><td><span class="br">}</span></td></tr>
-<tr name="3302" id="3302">
-<td><a id="l3302" class='ln'>3302</a></td><td></td></tr>
-<tr name="3303" id="3303">
-<td><a id="l3303" class='ln'>3303</a></td><td><span class="ct">/*</span></td></tr>
-<tr name="3304" id="3304">
-<td><a id="l3304" class='ln'>3304</a></td><td><span class="ct"> * File trailer for generated code.</span></td></tr>
-<tr name="3305" id="3305">
-<td><a id="l3305" class='ln'>3305</a></td><td><span class="ct"> *</span></td></tr>
-<tr name="3306" id="3306">
-<td><a id="l3306" class='ln'>3306</a></td><td><span class="ct"> * [EOF]</span></td></tr>
-<tr name="3307" id="3307">
-<td><a id="l3307" class='ln'>3307</a></td><td><span class="ct"> */</span></td></tr>
-<tr name="3308" id="3308">
-<td><a id="l3308" class='ln'>3308</a></td><td></td></tr>
 </table>
 </pre>
 </body>

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_codegen_rpt.html

@@ -1,6 +1,6 @@
 <html>
 <head>
-<meta http-equiv="X-UA-Compatible" content="IE=edge" ><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><link rel="stylesheet" type="text/css" href="rtwreport.css" /><script language="JavaScript" type="text/javascript" src="rtwhilite.js"></script><script language="JavaScript" type="text/javascript" src="rtwshrink.js"></script><script language="JavaScript" type="text/javascript">var reportModel = "MotorController_FOC:434"; </script><script type="text/javascript">var TargetLang = "C"; </script><script language="JavaScript" type="text/javascript" src="define.js"></script><script language="JavaScript" type="text/javascript" src="traceInfo_flag.js"></script><title>
+<meta http-equiv="X-UA-Compatible" content="IE=edge" ><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><link rel="stylesheet" type="text/css" href="rtwreport.css" /><script language="JavaScript" type="text/javascript" src="rtwhilite.js"></script><script language="JavaScript" type="text/javascript" src="rtwshrink.js"></script><script language="JavaScript" type="text/javascript">var reportModel = "MotorController_FOC_hall:13508"; </script><script type="text/javascript">var TargetLang = "C"; </script><script language="JavaScript" type="text/javascript" src="define.js"></script><script language="JavaScript" type="text/javascript" src="traceInfo_flag.js"></script><title>
 PMSM_Controller Code Generation Report
 </title>
 

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_data_c.html

@@ -21,11 +21,11 @@
 <tr name="5" id="5">
 <td><a id="l5" class='ln'>5</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="6" id="6">
-<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1460</span></td></tr>
+<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1529</span></td></tr>
 <tr name="7" id="7">
 <td><a id="l7" class='ln'>7</a></td><td><span class="ct"> * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020</span></td></tr>
 <tr name="8" id="8">
-<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Sat May 28 14:25:47 2022</span></td></tr>
+<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Tue Aug  2 19:43:20 2022</span></td></tr>
 <tr name="9" id="9">
 <td><a id="l9" class='ln'>9</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="10" id="10">
@@ -53,477 +53,435 @@
 <tr name="21" id="21">
 <td><a id="l21" class='ln'>21</a></td><td><a id="21c1" class="tk">P</a> <a id="21c3" class="tk">rtP</a> = <span class="br">{</span></td></tr>
 <tr name="22" id="22">
-<td><a id="l22" class='ln'>22</a></td><td>  <span class="ct">/* Variable: n_hall_count_ps</span></td></tr>
+<td><a id="l22" class='ln'>22</a></td><td>  <span class="ct">/* Variable: cf_Fw_Kb</span></td></tr>
 <tr name="23" id="23">
-<td><a id="l23" class='ln'>23</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
+<td><a id="l23" class='ln'>23</a></td><td><span class="ct">   * Referenced by: '&lt;S66&gt;/Constant5'</span></td></tr>
 <tr name="24" id="24">
-<td><a id="l24" class='ln'>24</a></td><td><span class="ct">   *   '&lt;S14&gt;/z_maxCntRst'</span></td></tr>
+<td><a id="l24" class='ln'>24</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="25" id="25">
-<td><a id="l25" class='ln'>25</a></td><td><span class="ct">   *   '&lt;S20&gt;/z_counter'</span></td></tr>
+<td><a id="l25" class='ln'>25</a></td><td>  102,</td></tr>
 <tr name="26" id="26">
-<td><a id="l26" class='ln'>26</a></td><td><span class="ct">   *   '&lt;S20&gt;/UnitDelay2'</span></td></tr>
+<td><a id="l26" class='ln'>26</a></td><td></td></tr>
 <tr name="27" id="27">
-<td><a id="l27" class='ln'>27</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l27" class='ln'>27</a></td><td>  <span class="ct">/* Variable: cf_Fw_Ki</span></td></tr>
 <tr name="28" id="28">
-<td><a id="l28" class='ln'>28</a></td><td>  1000000U,</td></tr>
+<td><a id="l28" class='ln'>28</a></td><td><span class="ct">   * Referenced by: '&lt;S66&gt;/Constant2'</span></td></tr>
 <tr name="29" id="29">
-<td><a id="l29" class='ln'>29</a></td><td></td></tr>
+<td><a id="l29" class='ln'>29</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="30" id="30">
-<td><a id="l30" class='ln'>30</a></td><td>  <span class="ct">/* Variable: n_polePairs</span></td></tr>
+<td><a id="l30" class='ln'>30</a></td><td>  512,</td></tr>
 <tr name="31" id="31">
-<td><a id="l31" class='ln'>31</a></td><td><span class="ct">   * Referenced by: '&lt;S20&gt;/cf_speedCoef1'</span></td></tr>
+<td><a id="l31" class='ln'>31</a></td><td></td></tr>
 <tr name="32" id="32">
-<td><a id="l32" class='ln'>32</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l32" class='ln'>32</a></td><td>  <span class="ct">/* Variable: cf_idKp</span></td></tr>
 <tr name="33" id="33">
-<td><a id="l33" class='ln'>33</a></td><td>  4U,</td></tr>
+<td><a id="l33" class='ln'>33</a></td><td><span class="ct">   * Referenced by: '&lt;S85&gt;/Constant3'</span></td></tr>
 <tr name="34" id="34">
-<td><a id="l34" class='ln'>34</a></td><td></td></tr>
+<td><a id="l34" class='ln'>34</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="35" id="35">
-<td><a id="l35" class='ln'>35</a></td><td>  <span class="ct">/* Variable: cf_Fw_Kb</span></td></tr>
+<td><a id="l35" class='ln'>35</a></td><td>  17877,</td></tr>
 <tr name="36" id="36">
-<td><a id="l36" class='ln'>36</a></td><td><span class="ct">   * Referenced by: '&lt;S74&gt;/Constant5'</span></td></tr>
+<td><a id="l36" class='ln'>36</a></td><td></td></tr>
 <tr name="37" id="37">
-<td><a id="l37" class='ln'>37</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l37" class='ln'>37</a></td><td>  <span class="ct">/* Variable: cf_iqKp</span></td></tr>
 <tr name="38" id="38">
-<td><a id="l38" class='ln'>38</a></td><td>  102,</td></tr>
+<td><a id="l38" class='ln'>38</a></td><td><span class="ct">   * Referenced by: '&lt;S85&gt;/Constant7'</span></td></tr>
 <tr name="39" id="39">
-<td><a id="l39" class='ln'>39</a></td><td></td></tr>
+<td><a id="l39" class='ln'>39</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="40" id="40">
-<td><a id="l40" class='ln'>40</a></td><td>  <span class="ct">/* Variable: cf_Fw_Ki</span></td></tr>
+<td><a id="l40" class='ln'>40</a></td><td>  19765,</td></tr>
 <tr name="41" id="41">
-<td><a id="l41" class='ln'>41</a></td><td><span class="ct">   * Referenced by: '&lt;S74&gt;/Constant2'</span></td></tr>
+<td><a id="l41" class='ln'>41</a></td><td></td></tr>
 <tr name="42" id="42">
-<td><a id="l42" class='ln'>42</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l42" class='ln'>42</a></td><td>  <span class="ct">/* Variable: cf_nKp</span></td></tr>
 <tr name="43" id="43">
-<td><a id="l43" class='ln'>43</a></td><td>  512,</td></tr>
+<td><a id="l43" class='ln'>43</a></td><td><span class="ct">   * Referenced by: '&lt;S79&gt;/Constant4'</span></td></tr>
 <tr name="44" id="44">
-<td><a id="l44" class='ln'>44</a></td><td></td></tr>
+<td><a id="l44" class='ln'>44</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="45" id="45">
-<td><a id="l45" class='ln'>45</a></td><td>  <span class="ct">/* Variable: cf_TrqLimKb</span></td></tr>
+<td><a id="l45" class='ln'>45</a></td><td>  154,</td></tr>
 <tr name="46" id="46">
-<td><a id="l46" class='ln'>46</a></td><td><span class="ct">   * Referenced by: '&lt;S88&gt;/Constant2'</span></td></tr>
+<td><a id="l46" class='ln'>46</a></td><td></td></tr>
 <tr name="47" id="47">
-<td><a id="l47" class='ln'>47</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l47" class='ln'>47</a></td><td>  <span class="ct">/* Variable: V_modulation</span></td></tr>
 <tr name="48" id="48">
-<td><a id="l48" class='ln'>48</a></td><td>  1024,</td></tr>
+<td><a id="l48" class='ln'>48</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
 <tr name="49" id="49">
-<td><a id="l49" class='ln'>49</a></td><td></td></tr>
+<td><a id="l49" class='ln'>49</a></td><td><span class="ct">   *   '&lt;S42&gt;/Constant'</span></td></tr>
 <tr name="50" id="50">
-<td><a id="l50" class='ln'>50</a></td><td>  <span class="ct">/* Variable: cf_TrqLimKi</span></td></tr>
+<td><a id="l50" class='ln'>50</a></td><td><span class="ct">   *   '&lt;S85&gt;/Constant2'</span></td></tr>
 <tr name="51" id="51">
-<td><a id="l51" class='ln'>51</a></td><td><span class="ct">   * Referenced by: '&lt;S88&gt;/Constant1'</span></td></tr>
+<td><a id="l51" class='ln'>51</a></td><td><span class="ct">   *   '&lt;S66&gt;/Constant3'</span></td></tr>
 <tr name="52" id="52">
 <td><a id="l52" class='ln'>52</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="53" id="53">
-<td><a id="l53" class='ln'>53</a></td><td>  9,</td></tr>
+<td><a id="l53" class='ln'>53</a></td><td>  15565,</td></tr>
 <tr name="54" id="54">
 <td><a id="l54" class='ln'>54</a></td><td></td></tr>
 <tr name="55" id="55">
-<td><a id="l55" class='ln'>55</a></td><td>  <span class="ct">/* Variable: cf_TrqLimKp</span></td></tr>
+<td><a id="l55" class='ln'>55</a></td><td>  <span class="ct">/* Variable: cf_idKb</span></td></tr>
 <tr name="56" id="56">
-<td><a id="l56" class='ln'>56</a></td><td><span class="ct">   * Referenced by: '&lt;S88&gt;/Constant4'</span></td></tr>
+<td><a id="l56" class='ln'>56</a></td><td><span class="ct">   * Referenced by: '&lt;S85&gt;/Constant6'</span></td></tr>
 <tr name="57" id="57">
 <td><a id="l57" class='ln'>57</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="58" id="58">
-<td><a id="l58" class='ln'>58</a></td><td>  154,</td></tr>
+<td><a id="l58" class='ln'>58</a></td><td>  81,</td></tr>
 <tr name="59" id="59">
 <td><a id="l59" class='ln'>59</a></td><td></td></tr>
 <tr name="60" id="60">
-<td><a id="l60" class='ln'>60</a></td><td>  <span class="ct">/* Variable: cf_idKp</span></td></tr>
+<td><a id="l60" class='ln'>60</a></td><td>  <span class="ct">/* Variable: cf_idKi</span></td></tr>
 <tr name="61" id="61">
-<td><a id="l61" class='ln'>61</a></td><td><span class="ct">   * Referenced by: '&lt;S95&gt;/Constant3'</span></td></tr>
+<td><a id="l61" class='ln'>61</a></td><td><span class="ct">   * Referenced by: '&lt;S85&gt;/Constant4'</span></td></tr>
 <tr name="62" id="62">
 <td><a id="l62" class='ln'>62</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="63" id="63">
-<td><a id="l63" class='ln'>63</a></td><td>  17877,</td></tr>
+<td><a id="l63" class='ln'>63</a></td><td>  81,</td></tr>
 <tr name="64" id="64">
 <td><a id="l64" class='ln'>64</a></td><td></td></tr>
 <tr name="65" id="65">
-<td><a id="l65" class='ln'>65</a></td><td>  <span class="ct">/* Variable: cf_iqKp</span></td></tr>
+<td><a id="l65" class='ln'>65</a></td><td>  <span class="ct">/* Variable: cf_iqKb</span></td></tr>
 <tr name="66" id="66">
-<td><a id="l66" class='ln'>66</a></td><td><span class="ct">   * Referenced by: '&lt;S95&gt;/Constant7'</span></td></tr>
+<td><a id="l66" class='ln'>66</a></td><td><span class="ct">   * Referenced by: '&lt;S85&gt;/Constant1'</span></td></tr>
 <tr name="67" id="67">
 <td><a id="l67" class='ln'>67</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="68" id="68">
-<td><a id="l68" class='ln'>68</a></td><td>  19765,</td></tr>
+<td><a id="l68" class='ln'>68</a></td><td>  73,</td></tr>
 <tr name="69" id="69">
 <td><a id="l69" class='ln'>69</a></td><td></td></tr>
 <tr name="70" id="70">
-<td><a id="l70" class='ln'>70</a></td><td>  <span class="ct">/* Variable: cf_nKp</span></td></tr>
+<td><a id="l70" class='ln'>70</a></td><td>  <span class="ct">/* Variable: cf_iqKi</span></td></tr>
 <tr name="71" id="71">
-<td><a id="l71" class='ln'>71</a></td><td><span class="ct">   * Referenced by: '&lt;S87&gt;/Constant4'</span></td></tr>
+<td><a id="l71" class='ln'>71</a></td><td><span class="ct">   * Referenced by: '&lt;S85&gt;/Constant8'</span></td></tr>
 <tr name="72" id="72">
 <td><a id="l72" class='ln'>72</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="73" id="73">
-<td><a id="l73" class='ln'>73</a></td><td>  154,</td></tr>
+<td><a id="l73" class='ln'>73</a></td><td>  73,</td></tr>
 <tr name="74" id="74">
 <td><a id="l74" class='ln'>74</a></td><td></td></tr>
 <tr name="75" id="75">
-<td><a id="l75" class='ln'>75</a></td><td>  <span class="ct">/* Variable: V_modulation</span></td></tr>
+<td><a id="l75" class='ln'>75</a></td><td>  <span class="ct">/* Variable: cf_nKb</span></td></tr>
 <tr name="76" id="76">
-<td><a id="l76" class='ln'>76</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
+<td><a id="l76" class='ln'>76</a></td><td><span class="ct">   * Referenced by: '&lt;S79&gt;/Constant11'</span></td></tr>
 <tr name="77" id="77">
-<td><a id="l77" class='ln'>77</a></td><td><span class="ct">   *   '&lt;S51&gt;/Constant'</span></td></tr>
+<td><a id="l77" class='ln'>77</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="78" id="78">
-<td><a id="l78" class='ln'>78</a></td><td><span class="ct">   *   '&lt;S95&gt;/Constant2'</span></td></tr>
+<td><a id="l78" class='ln'>78</a></td><td>  147,</td></tr>
 <tr name="79" id="79">
-<td><a id="l79" class='ln'>79</a></td><td><span class="ct">   *   '&lt;S74&gt;/Constant3'</span></td></tr>
+<td><a id="l79" class='ln'>79</a></td><td></td></tr>
 <tr name="80" id="80">
-<td><a id="l80" class='ln'>80</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l80" class='ln'>80</a></td><td>  <span class="ct">/* Variable: cf_nKi</span></td></tr>
 <tr name="81" id="81">
-<td><a id="l81" class='ln'>81</a></td><td>  15565,</td></tr>
+<td><a id="l81" class='ln'>81</a></td><td><span class="ct">   * Referenced by: '&lt;S79&gt;/Constant1'</span></td></tr>
 <tr name="82" id="82">
-<td><a id="l82" class='ln'>82</a></td><td></td></tr>
+<td><a id="l82" class='ln'>82</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="83" id="83">
-<td><a id="l83" class='ln'>83</a></td><td>  <span class="ct">/* Variable: cf_idKb</span></td></tr>
+<td><a id="l83" class='ln'>83</a></td><td>  147,</td></tr>
 <tr name="84" id="84">
-<td><a id="l84" class='ln'>84</a></td><td><span class="ct">   * Referenced by: '&lt;S95&gt;/Constant6'</span></td></tr>
+<td><a id="l84" class='ln'>84</a></td><td></td></tr>
 <tr name="85" id="85">
-<td><a id="l85" class='ln'>85</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l85" class='ln'>85</a></td><td>  <span class="ct">/* Variable: f_adc_curr_ceof</span></td></tr>
 <tr name="86" id="86">
-<td><a id="l86" class='ln'>86</a></td><td>  81,</td></tr>
+<td><a id="l86" class='ln'>86</a></td><td><span class="ct">   * Referenced by: '&lt;S43&gt;/Constant'</span></td></tr>
 <tr name="87" id="87">
-<td><a id="l87" class='ln'>87</a></td><td></td></tr>
+<td><a id="l87" class='ln'>87</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="88" id="88">
-<td><a id="l88" class='ln'>88</a></td><td>  <span class="ct">/* Variable: cf_idKi</span></td></tr>
+<td><a id="l88" class='ln'>88</a></td><td>  1543,</td></tr>
 <tr name="89" id="89">
-<td><a id="l89" class='ln'>89</a></td><td><span class="ct">   * Referenced by: '&lt;S95&gt;/Constant4'</span></td></tr>
+<td><a id="l89" class='ln'>89</a></td><td></td></tr>
 <tr name="90" id="90">
-<td><a id="l90" class='ln'>90</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l90" class='ln'>90</a></td><td>  <span class="ct">/* Variable: cf_lastIqGain</span></td></tr>
 <tr name="91" id="91">
-<td><a id="l91" class='ln'>91</a></td><td>  81,</td></tr>
+<td><a id="l91" class='ln'>91</a></td><td><span class="ct">   * Referenced by: '&lt;S62&gt;/Gain'</span></td></tr>
 <tr name="92" id="92">
-<td><a id="l92" class='ln'>92</a></td><td></td></tr>
+<td><a id="l92" class='ln'>92</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="93" id="93">
-<td><a id="l93" class='ln'>93</a></td><td>  <span class="ct">/* Variable: cf_iqKb</span></td></tr>
+<td><a id="l93" class='ln'>93</a></td><td>  16384,</td></tr>
 <tr name="94" id="94">
-<td><a id="l94" class='ln'>94</a></td><td><span class="ct">   * Referenced by: '&lt;S95&gt;/Constant1'</span></td></tr>
+<td><a id="l94" class='ln'>94</a></td><td></td></tr>
 <tr name="95" id="95">
-<td><a id="l95" class='ln'>95</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l95" class='ln'>95</a></td><td>  <span class="ct">/* Variable: i_hall_offset</span></td></tr>
 <tr name="96" id="96">
-<td><a id="l96" class='ln'>96</a></td><td>  73,</td></tr>
+<td><a id="l96" class='ln'>96</a></td><td><span class="ct">   * Referenced by: '&lt;S22&gt;/Constant2'</span></td></tr>
 <tr name="97" id="97">
-<td><a id="l97" class='ln'>97</a></td><td></td></tr>
+<td><a id="l97" class='ln'>97</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="98" id="98">
-<td><a id="l98" class='ln'>98</a></td><td>  <span class="ct">/* Variable: cf_iqKi</span></td></tr>
+<td><a id="l98" class='ln'>98</a></td><td>  <a id="98c3" class="tk">-</a>480,</td></tr>
 <tr name="99" id="99">
-<td><a id="l99" class='ln'>99</a></td><td><span class="ct">   * Referenced by: '&lt;S95&gt;/Constant8'</span></td></tr>
+<td><a id="l99" class='ln'>99</a></td><td></td></tr>
 <tr name="100" id="100">
-<td><a id="l100" class='ln'>100</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l100" class='ln'>100</a></td><td>  <span class="ct">/* Variable: i_dqMax</span></td></tr>
 <tr name="101" id="101">
-<td><a id="l101" class='ln'>101</a></td><td>  73,</td></tr>
+<td><a id="l101" class='ln'>101</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
 <tr name="102" id="102">
-<td><a id="l102" class='ln'>102</a></td><td></td></tr>
+<td><a id="l102" class='ln'>102</a></td><td><span class="ct">   *   '&lt;S68&gt;/Constant1'</span></td></tr>
 <tr name="103" id="103">
-<td><a id="l103" class='ln'>103</a></td><td>  <span class="ct">/* Variable: cf_nKb</span></td></tr>
+<td><a id="l103" class='ln'>103</a></td><td><span class="ct">   *   '&lt;S68&gt;/Constant2'</span></td></tr>
 <tr name="104" id="104">
-<td><a id="l104" class='ln'>104</a></td><td><span class="ct">   * Referenced by: '&lt;S87&gt;/Constant11'</span></td></tr>
+<td><a id="l104" class='ln'>104</a></td><td><span class="ct">   *   '&lt;S68&gt;/Constant3'</span></td></tr>
 <tr name="105" id="105">
-<td><a id="l105" class='ln'>105</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l105" class='ln'>105</a></td><td><span class="ct">   *   '&lt;S68&gt;/Constant5'</span></td></tr>
 <tr name="106" id="106">
-<td><a id="l106" class='ln'>106</a></td><td>  147,</td></tr>
+<td><a id="l106" class='ln'>106</a></td><td><span class="ct">   *   '&lt;S79&gt;/Constant6'</span></td></tr>
 <tr name="107" id="107">
-<td><a id="l107" class='ln'>107</a></td><td></td></tr>
+<td><a id="l107" class='ln'>107</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="108" id="108">
-<td><a id="l108" class='ln'>108</a></td><td>  <span class="ct">/* Variable: cf_nKi</span></td></tr>
+<td><a id="l108" class='ln'>108</a></td><td>  4800,</td></tr>
 <tr name="109" id="109">
-<td><a id="l109" class='ln'>109</a></td><td><span class="ct">   * Referenced by: '&lt;S87&gt;/Constant1'</span></td></tr>
+<td><a id="l109" class='ln'>109</a></td><td></td></tr>
 <tr name="110" id="110">
-<td><a id="l110" class='ln'>110</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l110" class='ln'>110</a></td><td>  <span class="ct">/* Variable: id_fieldWeakMax</span></td></tr>
 <tr name="111" id="111">
-<td><a id="l111" class='ln'>111</a></td><td>  147,</td></tr>
+<td><a id="l111" class='ln'>111</a></td><td><span class="ct">   * Referenced by: '&lt;S66&gt;/Constant6'</span></td></tr>
 <tr name="112" id="112">
-<td><a id="l112" class='ln'>112</a></td><td></td></tr>
+<td><a id="l112" class='ln'>112</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="113" id="113">
-<td><a id="l113" class='ln'>113</a></td><td>  <span class="ct">/* Variable: f_adc_curr_ceof</span></td></tr>
+<td><a id="l113" class='ln'>113</a></td><td>  <a id="113c3" class="tk">-</a>1600,</td></tr>
 <tr name="114" id="114">
-<td><a id="l114" class='ln'>114</a></td><td><span class="ct">   * Referenced by: '&lt;S52&gt;/Constant'</span></td></tr>
+<td><a id="l114" class='ln'>114</a></td><td></td></tr>
 <tr name="115" id="115">
-<td><a id="l115" class='ln'>115</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l115" class='ln'>115</a></td><td>  <span class="ct">/* Variable: dz_OpenStepVol</span></td></tr>
 <tr name="116" id="116">
-<td><a id="l116" class='ln'>116</a></td><td>  1543,</td></tr>
+<td><a id="l116" class='ln'>116</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
 <tr name="117" id="117">
-<td><a id="l117" class='ln'>117</a></td><td></td></tr>
+<td><a id="l117" class='ln'>117</a></td><td><span class="ct">   *   '&lt;S111&gt;/Constant1'</span></td></tr>
 <tr name="118" id="118">
-<td><a id="l118" class='ln'>118</a></td><td>  <span class="ct">/* Variable: cf_lastIqGain</span></td></tr>
+<td><a id="l118" class='ln'>118</a></td><td><span class="ct">   *   '&lt;S111&gt;/Constant5'</span></td></tr>
 <tr name="119" id="119">
-<td><a id="l119" class='ln'>119</a></td><td><span class="ct">   * Referenced by: '&lt;S70&gt;/Gain'</span></td></tr>
+<td><a id="l119" class='ln'>119</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="120" id="120">
-<td><a id="l120" class='ln'>120</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l120" class='ln'>120</a></td><td>  1280,</td></tr>
 <tr name="121" id="121">
-<td><a id="l121" class='ln'>121</a></td><td>  16384,</td></tr>
+<td><a id="l121" class='ln'>121</a></td><td></td></tr>
 <tr name="122" id="122">
-<td><a id="l122" class='ln'>122</a></td><td></td></tr>
+<td><a id="l122" class='ln'>122</a></td><td>  <span class="ct">/* Variable: f_lpf_idq</span></td></tr>
 <tr name="123" id="123">
-<td><a id="l123" class='ln'>123</a></td><td>  <span class="ct">/* Variable: i_hall_offset</span></td></tr>
+<td><a id="l123" class='ln'>123</a></td><td><span class="ct">   * Referenced by: '&lt;S39&gt;/Constant'</span></td></tr>
 <tr name="124" id="124">
-<td><a id="l124" class='ln'>124</a></td><td><span class="ct">   * Referenced by: '&lt;S15&gt;/Constant2'</span></td></tr>
+<td><a id="l124" class='ln'>124</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="125" id="125">
-<td><a id="l125" class='ln'>125</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l125" class='ln'>125</a></td><td>  26214U,</td></tr>
 <tr name="126" id="126">
-<td><a id="l126" class='ln'>126</a></td><td>  <a id="126c3" class="tk">-</a>480,</td></tr>
+<td><a id="l126" class='ln'>126</a></td><td></td></tr>
 <tr name="127" id="127">
-<td><a id="l127" class='ln'>127</a></td><td></td></tr>
+<td><a id="l127" class='ln'>127</a></td><td>  <span class="ct">/* Variable: f_lpf_vdq</span></td></tr>
 <tr name="128" id="128">
-<td><a id="l128" class='ln'>128</a></td><td>  <span class="ct">/* Variable: i_dqMax</span></td></tr>
+<td><a id="l128" class='ln'>128</a></td><td><span class="ct">   * Referenced by: '&lt;S68&gt;/Constant'</span></td></tr>
 <tr name="129" id="129">
-<td><a id="l129" class='ln'>129</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
+<td><a id="l129" class='ln'>129</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="130" id="130">
-<td><a id="l130" class='ln'>130</a></td><td><span class="ct">   *   '&lt;S76&gt;/Constant1'</span></td></tr>
+<td><a id="l130" class='ln'>130</a></td><td>  655U,</td></tr>
 <tr name="131" id="131">
-<td><a id="l131" class='ln'>131</a></td><td><span class="ct">   *   '&lt;S76&gt;/Constant2'</span></td></tr>
+<td><a id="l131" class='ln'>131</a></td><td></td></tr>
 <tr name="132" id="132">
-<td><a id="l132" class='ln'>132</a></td><td><span class="ct">   *   '&lt;S76&gt;/Constant3'</span></td></tr>
+<td><a id="l132" class='ln'>132</a></td><td>  <span class="ct">/* Variable: i_pwm_count</span></td></tr>
 <tr name="133" id="133">
-<td><a id="l133" class='ln'>133</a></td><td><span class="ct">   *   '&lt;S76&gt;/Constant5'</span></td></tr>
+<td><a id="l133" class='ln'>133</a></td><td><span class="ct">   * Referenced by: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="134" id="134">
-<td><a id="l134" class='ln'>134</a></td><td><span class="ct">   *   '&lt;S87&gt;/Constant6'</span></td></tr>
+<td><a id="l134" class='ln'>134</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="135" id="135">
-<td><a id="l135" class='ln'>135</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l135" class='ln'>135</a></td><td>  3000U,</td></tr>
 <tr name="136" id="136">
-<td><a id="l136" class='ln'>136</a></td><td>  4800,</td></tr>
+<td><a id="l136" class='ln'>136</a></td><td></td></tr>
 <tr name="137" id="137">
-<td><a id="l137" class='ln'>137</a></td><td></td></tr>
+<td><a id="l137" class='ln'>137</a></td><td>  <span class="ct">/* Variable: n_polePairs</span></td></tr>
 <tr name="138" id="138">
-<td><a id="l138" class='ln'>138</a></td><td>  <span class="ct">/* Variable: id_fieldWeakMax</span></td></tr>
+<td><a id="l138" class='ln'>138</a></td><td><span class="ct">   * Referenced by: '&lt;S29&gt;/polePairs'</span></td></tr>
 <tr name="139" id="139">
-<td><a id="l139" class='ln'>139</a></td><td><span class="ct">   * Referenced by: '&lt;S74&gt;/Constant6'</span></td></tr>
+<td><a id="l139" class='ln'>139</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="140" id="140">
-<td><a id="l140" class='ln'>140</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l140" class='ln'>140</a></td><td>  4U</td></tr>
 <tr name="141" id="141">
-<td><a id="l141" class='ln'>141</a></td><td>  <a id="141c3" class="tk">-</a>1600,</td></tr>
+<td><a id="l141" class='ln'>141</a></td><td><span class="br">}</span>;</td></tr>
 <tr name="142" id="142">
 <td><a id="l142" class='ln'>142</a></td><td></td></tr>
 <tr name="143" id="143">
-<td><a id="l143" class='ln'>143</a></td><td>  <span class="ct">/* Variable: dz_OpenStepVol</span></td></tr>
+<td><a id="l143" class='ln'>143</a></td><td><span class="ct">/* Constant parameters (default storage) */</span></td></tr>
 <tr name="144" id="144">
-<td><a id="l144" class='ln'>144</a></td><td><span class="ct">   * Referenced by: '&lt;S29&gt;/Constant5'</span></td></tr>
+<td><a id="l144" class='ln'>144</a></td><td><span class="kw">const</span> <a id="144c7" class="tk">ConstP</a> <a id="144c14" class="tk">rtConstP</a> = <span class="br">{</span></td></tr>
 <tr name="145" id="145">
-<td><a id="l145" class='ln'>145</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l145" class='ln'>145</a></td><td>  <span class="ct">/* Pooled Parameter (Expression: r_sin_M1)</span></td></tr>
 <tr name="146" id="146">
-<td><a id="l146" class='ln'>146</a></td><td>  1280,</td></tr>
+<td><a id="l146" class='ln'>146</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
 <tr name="147" id="147">
-<td><a id="l147" class='ln'>147</a></td><td></td></tr>
+<td><a id="l147" class='ln'>147</a></td><td><span class="ct">   *   '&lt;S49&gt;/r_sin_M1'</span></td></tr>
 <tr name="148" id="148">
-<td><a id="l148" class='ln'>148</a></td><td>  <span class="ct">/* Variable: f_lpf_idq</span></td></tr>
+<td><a id="l148" class='ln'>148</a></td><td><span class="ct">   *   '&lt;S74&gt;/r_sin_M1'</span></td></tr>
 <tr name="149" id="149">
-<td><a id="l149" class='ln'>149</a></td><td><span class="ct">   * Referenced by: '&lt;S48&gt;/Constant'</span></td></tr>
+<td><a id="l149" class='ln'>149</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="150" id="150">
-<td><a id="l150" class='ln'>150</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l150" class='ln'>150</a></td><td>  <span class="br">{</span> 0, 286, 572, 857, 1143, 1428, 1713, 1997, 2280, 2563, 2845, 3126, 3406, 3686,</td></tr>
 <tr name="151" id="151">
-<td><a id="l151" class='ln'>151</a></td><td>  26214U,</td></tr>
+<td><a id="l151" class='ln'>151</a></td><td>    3964, 4240, 4516, 4790, 5063, 5334, 5604, 5872, 6138, 6402, 6664, 6924, 7182,</td></tr>
 <tr name="152" id="152">
-<td><a id="l152" class='ln'>152</a></td><td></td></tr>
+<td><a id="l152" class='ln'>152</a></td><td>    7438, 7692, 7943, 8192, 8438, 8682, 8923, 9162, 9397, 9630, 9860, 10087,</td></tr>
 <tr name="153" id="153">
-<td><a id="l153" class='ln'>153</a></td><td>  <span class="ct">/* Variable: f_lpf_vdq</span></td></tr>
+<td><a id="l153" class='ln'>153</a></td><td>    10311, 10531, 10749, 10963, 11174, 11381, 11585, 11786, 11982, 12176, 12365,</td></tr>
 <tr name="154" id="154">
-<td><a id="l154" class='ln'>154</a></td><td><span class="ct">   * Referenced by: '&lt;S76&gt;/Constant'</span></td></tr>
+<td><a id="l154" class='ln'>154</a></td><td>    12551, 12733, 12911, 13085, 13255, 13421, 13583, 13741, 13894, 14044, 14189,</td></tr>
 <tr name="155" id="155">
-<td><a id="l155" class='ln'>155</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l155" class='ln'>155</a></td><td>    14330, 14466, 14598, 14726, 14849, 14968, 15082, 15191, 15296, 15396, 15491,</td></tr>
 <tr name="156" id="156">
-<td><a id="l156" class='ln'>156</a></td><td>  655U,</td></tr>
+<td><a id="l156" class='ln'>156</a></td><td>    15582, 15668, 15749, 15826, 15897, 15964, 16026, 16083, 16135, 16182, 16225,</td></tr>
 <tr name="157" id="157">
-<td><a id="l157" class='ln'>157</a></td><td></td></tr>
+<td><a id="l157" class='ln'>157</a></td><td>    16262, 16294, 16322, 16344, 16362, 16374, 16382, 16384, 16382, 16374, 16362,</td></tr>
 <tr name="158" id="158">
-<td><a id="l158" class='ln'>158</a></td><td>  <span class="ct">/* Variable: i_pwm_count</span></td></tr>
+<td><a id="l158" class='ln'>158</a></td><td>    16344, 16322, 16294, 16262, 16225, 16182, 16135, 16083, 16026, 15964, 15897,</td></tr>
 <tr name="159" id="159">
-<td><a id="l159" class='ln'>159</a></td><td><span class="ct">   * Referenced by: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l159" class='ln'>159</a></td><td>    15826, 15749, 15668, 15582, 15491, 15396, 15296, 15191, 15082, 14968, 14849,</td></tr>
 <tr name="160" id="160">
-<td><a id="l160" class='ln'>160</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l160" class='ln'>160</a></td><td>    14726, 14598, 14466, 14330, 14189, 14044, 13894, 13741, 13583, 13421, 13255,</td></tr>
 <tr name="161" id="161">
-<td><a id="l161" class='ln'>161</a></td><td>  3000U</td></tr>
+<td><a id="l161" class='ln'>161</a></td><td>    13085, 12911, 12733, 12551, 12365, 12176, 11982, 11786, 11585, 11381, 11174,</td></tr>
 <tr name="162" id="162">
-<td><a id="l162" class='ln'>162</a></td><td><span class="br">}</span>;</td></tr>
+<td><a id="l162" class='ln'>162</a></td><td>    10963, 10749, 10531, 10311, 10087, 9860, 9630, 9397, 9162, 8923, 8682, 8438,</td></tr>
 <tr name="163" id="163">
-<td><a id="l163" class='ln'>163</a></td><td></td></tr>
+<td><a id="l163" class='ln'>163</a></td><td>    8192, 7943, 7692, 7438, 7182, 6924, 6664, 6402, 6138, 5872, 5604, 5334, 5063,</td></tr>
 <tr name="164" id="164">
-<td><a id="l164" class='ln'>164</a></td><td><span class="ct">/* Constant parameters (default storage) */</span></td></tr>
+<td><a id="l164" class='ln'>164</a></td><td>    4790, 4516, 4240, 3964, 3686, 3406, 3126, 2845, 2563, 2280, 1997, 1713, 1428,</td></tr>
 <tr name="165" id="165">
-<td><a id="l165" class='ln'>165</a></td><td><span class="kw">const</span> <a id="165c7" class="tk">ConstP</a> <a id="165c14" class="tk">rtConstP</a> = <span class="br">{</span></td></tr>
+<td><a id="l165" class='ln'>165</a></td><td>    1143, 857, 572, 286, 0, <a id="165c29" class="tk">-</a>286, <a id="165c35" class="tk">-</a>572, <a id="165c41" class="tk">-</a>857, <a id="165c47" class="tk">-</a>1143, <a id="165c54" class="tk">-</a>1428, <a id="165c61" class="tk">-</a>1713, <a id="165c68" class="tk">-</a>1997, <a id="165c75" class="tk">-</a>2280,</td></tr>
 <tr name="166" id="166">
-<td><a id="l166" class='ln'>166</a></td><td>  <span class="ct">/* Pooled Parameter (Expression: r_sin_M1)</span></td></tr>
+<td><a id="l166" class='ln'>166</a></td><td>    <a id="166c5" class="tk">-</a>2563, <a id="166c12" class="tk">-</a>2845, <a id="166c19" class="tk">-</a>3126, <a id="166c26" class="tk">-</a>3406, <a id="166c33" class="tk">-</a>3686, <a id="166c40" class="tk">-</a>3964, <a id="166c47" class="tk">-</a>4240, <a id="166c54" class="tk">-</a>4516, <a id="166c61" class="tk">-</a>4790, <a id="166c68" class="tk">-</a>5063, <a id="166c75" class="tk">-</a>5334,</td></tr>
 <tr name="167" id="167">
-<td><a id="l167" class='ln'>167</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
+<td><a id="l167" class='ln'>167</a></td><td>    <a id="167c5" class="tk">-</a>5604, <a id="167c12" class="tk">-</a>5872, <a id="167c19" class="tk">-</a>6138, <a id="167c26" class="tk">-</a>6402, <a id="167c33" class="tk">-</a>6664, <a id="167c40" class="tk">-</a>6924, <a id="167c47" class="tk">-</a>7182, <a id="167c54" class="tk">-</a>7438, <a id="167c61" class="tk">-</a>7692, <a id="167c68" class="tk">-</a>7943, <a id="167c75" class="tk">-</a>8192,</td></tr>
 <tr name="168" id="168">
-<td><a id="l168" class='ln'>168</a></td><td><span class="ct">   *   '&lt;S58&gt;/r_sin_M1'</span></td></tr>
+<td><a id="l168" class='ln'>168</a></td><td>    <a id="168c5" class="tk">-</a>8438, <a id="168c12" class="tk">-</a>8682, <a id="168c19" class="tk">-</a>8923, <a id="168c26" class="tk">-</a>9162, <a id="168c33" class="tk">-</a>9397, <a id="168c40" class="tk">-</a>9630, <a id="168c47" class="tk">-</a>9860, <a id="168c54" class="tk">-</a>10087, <a id="168c62" class="tk">-</a>10311, <a id="168c70" class="tk">-</a>10531,</td></tr>
 <tr name="169" id="169">
-<td><a id="l169" class='ln'>169</a></td><td><span class="ct">   *   '&lt;S82&gt;/r_sin_M1'</span></td></tr>
+<td><a id="l169" class='ln'>169</a></td><td>    <a id="169c5" class="tk">-</a>10749, <a id="169c13" class="tk">-</a>10963, <a id="169c21" class="tk">-</a>11174, <a id="169c29" class="tk">-</a>11381, <a id="169c37" class="tk">-</a>11585, <a id="169c45" class="tk">-</a>11786, <a id="169c53" class="tk">-</a>11982, <a id="169c61" class="tk">-</a>12176, <a id="169c69" class="tk">-</a>12365,</td></tr>
 <tr name="170" id="170">
-<td><a id="l170" class='ln'>170</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l170" class='ln'>170</a></td><td>    <a id="170c5" class="tk">-</a>12551, <a id="170c13" class="tk">-</a>12733, <a id="170c21" class="tk">-</a>12911, <a id="170c29" class="tk">-</a>13085, <a id="170c37" class="tk">-</a>13255, <a id="170c45" class="tk">-</a>13421, <a id="170c53" class="tk">-</a>13583, <a id="170c61" class="tk">-</a>13741, <a id="170c69" class="tk">-</a>13894,</td></tr>
 <tr name="171" id="171">
-<td><a id="l171" class='ln'>171</a></td><td>  <span class="br">{</span> 0, 286, 572, 857, 1143, 1428, 1713, 1997, 2280, 2563, 2845, 3126, 3406, 3686,</td></tr>
+<td><a id="l171" class='ln'>171</a></td><td>    <a id="171c5" class="tk">-</a>14044, <a id="171c13" class="tk">-</a>14189, <a id="171c21" class="tk">-</a>14330, <a id="171c29" class="tk">-</a>14466, <a id="171c37" class="tk">-</a>14598, <a id="171c45" class="tk">-</a>14726, <a id="171c53" class="tk">-</a>14849, <a id="171c61" class="tk">-</a>14968, <a id="171c69" class="tk">-</a>15082,</td></tr>
 <tr name="172" id="172">
-<td><a id="l172" class='ln'>172</a></td><td>    3964, 4240, 4516, 4790, 5063, 5334, 5604, 5872, 6138, 6402, 6664, 6924, 7182,</td></tr>
+<td><a id="l172" class='ln'>172</a></td><td>    <a id="172c5" class="tk">-</a>15191, <a id="172c13" class="tk">-</a>15296, <a id="172c21" class="tk">-</a>15396, <a id="172c29" class="tk">-</a>15491, <a id="172c37" class="tk">-</a>15582, <a id="172c45" class="tk">-</a>15668, <a id="172c53" class="tk">-</a>15749, <a id="172c61" class="tk">-</a>15826, <a id="172c69" class="tk">-</a>15897,</td></tr>
 <tr name="173" id="173">
-<td><a id="l173" class='ln'>173</a></td><td>    7438, 7692, 7943, 8192, 8438, 8682, 8923, 9162, 9397, 9630, 9860, 10087,</td></tr>
+<td><a id="l173" class='ln'>173</a></td><td>    <a id="173c5" class="tk">-</a>15964, <a id="173c13" class="tk">-</a>16026, <a id="173c21" class="tk">-</a>16083, <a id="173c29" class="tk">-</a>16135, <a id="173c37" class="tk">-</a>16182, <a id="173c45" class="tk">-</a>16225, <a id="173c53" class="tk">-</a>16262, <a id="173c61" class="tk">-</a>16294, <a id="173c69" class="tk">-</a>16322,</td></tr>
 <tr name="174" id="174">
-<td><a id="l174" class='ln'>174</a></td><td>    10311, 10531, 10749, 10963, 11174, 11381, 11585, 11786, 11982, 12176, 12365,</td></tr>
+<td><a id="l174" class='ln'>174</a></td><td>    <a id="174c5" class="tk">-</a>16344, <a id="174c13" class="tk">-</a>16362, <a id="174c21" class="tk">-</a>16374, <a id="174c29" class="tk">-</a>16382, <a id="174c37" class="tk">-</a>16384, <a id="174c45" class="tk">-</a>16382, <a id="174c53" class="tk">-</a>16374, <a id="174c61" class="tk">-</a>16362, <a id="174c69" class="tk">-</a>16344,</td></tr>
 <tr name="175" id="175">
-<td><a id="l175" class='ln'>175</a></td><td>    12551, 12733, 12911, 13085, 13255, 13421, 13583, 13741, 13894, 14044, 14189,</td></tr>
+<td><a id="l175" class='ln'>175</a></td><td>    <a id="175c5" class="tk">-</a>16322, <a id="175c13" class="tk">-</a>16294, <a id="175c21" class="tk">-</a>16262, <a id="175c29" class="tk">-</a>16225, <a id="175c37" class="tk">-</a>16182, <a id="175c45" class="tk">-</a>16135, <a id="175c53" class="tk">-</a>16083, <a id="175c61" class="tk">-</a>16026, <a id="175c69" class="tk">-</a>15964,</td></tr>
 <tr name="176" id="176">
-<td><a id="l176" class='ln'>176</a></td><td>    14330, 14466, 14598, 14726, 14849, 14968, 15082, 15191, 15296, 15396, 15491,</td></tr>
+<td><a id="l176" class='ln'>176</a></td><td>    <a id="176c5" class="tk">-</a>15897, <a id="176c13" class="tk">-</a>15826, <a id="176c21" class="tk">-</a>15749, <a id="176c29" class="tk">-</a>15668, <a id="176c37" class="tk">-</a>15582, <a id="176c45" class="tk">-</a>15491, <a id="176c53" class="tk">-</a>15396, <a id="176c61" class="tk">-</a>15296, <a id="176c69" class="tk">-</a>15191,</td></tr>
 <tr name="177" id="177">
-<td><a id="l177" class='ln'>177</a></td><td>    15582, 15668, 15749, 15826, 15897, 15964, 16026, 16083, 16135, 16182, 16225,</td></tr>
+<td><a id="l177" class='ln'>177</a></td><td>    <a id="177c5" class="tk">-</a>15082, <a id="177c13" class="tk">-</a>14968, <a id="177c21" class="tk">-</a>14849, <a id="177c29" class="tk">-</a>14726, <a id="177c37" class="tk">-</a>14598, <a id="177c45" class="tk">-</a>14466, <a id="177c53" class="tk">-</a>14330, <a id="177c61" class="tk">-</a>14189, <a id="177c69" class="tk">-</a>14044,</td></tr>
 <tr name="178" id="178">
-<td><a id="l178" class='ln'>178</a></td><td>    16262, 16294, 16322, 16344, 16362, 16374, 16382, 16384, 16382, 16374, 16362,</td></tr>
+<td><a id="l178" class='ln'>178</a></td><td>    <a id="178c5" class="tk">-</a>13894, <a id="178c13" class="tk">-</a>13741, <a id="178c21" class="tk">-</a>13583, <a id="178c29" class="tk">-</a>13421, <a id="178c37" class="tk">-</a>13255, <a id="178c45" class="tk">-</a>13085, <a id="178c53" class="tk">-</a>12911, <a id="178c61" class="tk">-</a>12733, <a id="178c69" class="tk">-</a>12551,</td></tr>
 <tr name="179" id="179">
-<td><a id="l179" class='ln'>179</a></td><td>    16344, 16322, 16294, 16262, 16225, 16182, 16135, 16083, 16026, 15964, 15897,</td></tr>
+<td><a id="l179" class='ln'>179</a></td><td>    <a id="179c5" class="tk">-</a>12365, <a id="179c13" class="tk">-</a>12176, <a id="179c21" class="tk">-</a>11982, <a id="179c29" class="tk">-</a>11786, <a id="179c37" class="tk">-</a>11585, <a id="179c45" class="tk">-</a>11381, <a id="179c53" class="tk">-</a>11174, <a id="179c61" class="tk">-</a>10963, <a id="179c69" class="tk">-</a>10749,</td></tr>
 <tr name="180" id="180">
-<td><a id="l180" class='ln'>180</a></td><td>    15826, 15749, 15668, 15582, 15491, 15396, 15296, 15191, 15082, 14968, 14849,</td></tr>
+<td><a id="l180" class='ln'>180</a></td><td>    <a id="180c5" class="tk">-</a>10531, <a id="180c13" class="tk">-</a>10311, <a id="180c21" class="tk">-</a>10087, <a id="180c29" class="tk">-</a>9860, <a id="180c36" class="tk">-</a>9630, <a id="180c43" class="tk">-</a>9397, <a id="180c50" class="tk">-</a>9162, <a id="180c57" class="tk">-</a>8923, <a id="180c64" class="tk">-</a>8682, <a id="180c71" class="tk">-</a>8438,</td></tr>
 <tr name="181" id="181">
-<td><a id="l181" class='ln'>181</a></td><td>    14726, 14598, 14466, 14330, 14189, 14044, 13894, 13741, 13583, 13421, 13255,</td></tr>
+<td><a id="l181" class='ln'>181</a></td><td>    <a id="181c5" class="tk">-</a>8192, <a id="181c12" class="tk">-</a>7943, <a id="181c19" class="tk">-</a>7692, <a id="181c26" class="tk">-</a>7438, <a id="181c33" class="tk">-</a>7182, <a id="181c40" class="tk">-</a>6924, <a id="181c47" class="tk">-</a>6664, <a id="181c54" class="tk">-</a>6402, <a id="181c61" class="tk">-</a>6138, <a id="181c68" class="tk">-</a>5872, <a id="181c75" class="tk">-</a>5604,</td></tr>
 <tr name="182" id="182">
-<td><a id="l182" class='ln'>182</a></td><td>    13085, 12911, 12733, 12551, 12365, 12176, 11982, 11786, 11585, 11381, 11174,</td></tr>
+<td><a id="l182" class='ln'>182</a></td><td>    <a id="182c5" class="tk">-</a>5334, <a id="182c12" class="tk">-</a>5063, <a id="182c19" class="tk">-</a>4790, <a id="182c26" class="tk">-</a>4516, <a id="182c33" class="tk">-</a>4240, <a id="182c40" class="tk">-</a>3964, <a id="182c47" class="tk">-</a>3686, <a id="182c54" class="tk">-</a>3406, <a id="182c61" class="tk">-</a>3126, <a id="182c68" class="tk">-</a>2845, <a id="182c75" class="tk">-</a>2563,</td></tr>
 <tr name="183" id="183">
-<td><a id="l183" class='ln'>183</a></td><td>    10963, 10749, 10531, 10311, 10087, 9860, 9630, 9397, 9162, 8923, 8682, 8438,</td></tr>
+<td><a id="l183" class='ln'>183</a></td><td>    <a id="183c5" class="tk">-</a>2280, <a id="183c12" class="tk">-</a>1997, <a id="183c19" class="tk">-</a>1713, <a id="183c26" class="tk">-</a>1428, <a id="183c33" class="tk">-</a>1143, <a id="183c40" class="tk">-</a>857, <a id="183c46" class="tk">-</a>572, <a id="183c52" class="tk">-</a>286, 0 <span class="br">}</span>,</td></tr>
 <tr name="184" id="184">
-<td><a id="l184" class='ln'>184</a></td><td>    8192, 7943, 7692, 7438, 7182, 6924, 6664, 6402, 6138, 5872, 5604, 5334, 5063,</td></tr>
+<td><a id="l184" class='ln'>184</a></td><td></td></tr>
 <tr name="185" id="185">
-<td><a id="l185" class='ln'>185</a></td><td>    4790, 4516, 4240, 3964, 3686, 3406, 3126, 2845, 2563, 2280, 1997, 1713, 1428,</td></tr>
+<td><a id="l185" class='ln'>185</a></td><td>  <span class="ct">/* Pooled Parameter (Expression: r_cos_M1)</span></td></tr>
 <tr name="186" id="186">
-<td><a id="l186" class='ln'>186</a></td><td>    1143, 857, 572, 286, 0, <a id="186c29" class="tk">-</a>286, <a id="186c35" class="tk">-</a>572, <a id="186c41" class="tk">-</a>857, <a id="186c47" class="tk">-</a>1143, <a id="186c54" class="tk">-</a>1428, <a id="186c61" class="tk">-</a>1713, <a id="186c68" class="tk">-</a>1997, <a id="186c75" class="tk">-</a>2280,</td></tr>
+<td><a id="l186" class='ln'>186</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
 <tr name="187" id="187">
-<td><a id="l187" class='ln'>187</a></td><td>    <a id="187c5" class="tk">-</a>2563, <a id="187c12" class="tk">-</a>2845, <a id="187c19" class="tk">-</a>3126, <a id="187c26" class="tk">-</a>3406, <a id="187c33" class="tk">-</a>3686, <a id="187c40" class="tk">-</a>3964, <a id="187c47" class="tk">-</a>4240, <a id="187c54" class="tk">-</a>4516, <a id="187c61" class="tk">-</a>4790, <a id="187c68" class="tk">-</a>5063, <a id="187c75" class="tk">-</a>5334,</td></tr>
+<td><a id="l187" class='ln'>187</a></td><td><span class="ct">   *   '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="188" id="188">
-<td><a id="l188" class='ln'>188</a></td><td>    <a id="188c5" class="tk">-</a>5604, <a id="188c12" class="tk">-</a>5872, <a id="188c19" class="tk">-</a>6138, <a id="188c26" class="tk">-</a>6402, <a id="188c33" class="tk">-</a>6664, <a id="188c40" class="tk">-</a>6924, <a id="188c47" class="tk">-</a>7182, <a id="188c54" class="tk">-</a>7438, <a id="188c61" class="tk">-</a>7692, <a id="188c68" class="tk">-</a>7943, <a id="188c75" class="tk">-</a>8192,</td></tr>
+<td><a id="l188" class='ln'>188</a></td><td><span class="ct">   *   '&lt;S74&gt;/r_cos_M1'</span></td></tr>
 <tr name="189" id="189">
-<td><a id="l189" class='ln'>189</a></td><td>    <a id="189c5" class="tk">-</a>8438, <a id="189c12" class="tk">-</a>8682, <a id="189c19" class="tk">-</a>8923, <a id="189c26" class="tk">-</a>9162, <a id="189c33" class="tk">-</a>9397, <a id="189c40" class="tk">-</a>9630, <a id="189c47" class="tk">-</a>9860, <a id="189c54" class="tk">-</a>10087, <a id="189c62" class="tk">-</a>10311, <a id="189c70" class="tk">-</a>10531,</td></tr>
+<td><a id="l189" class='ln'>189</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="190" id="190">
-<td><a id="l190" class='ln'>190</a></td><td>    <a id="190c5" class="tk">-</a>10749, <a id="190c13" class="tk">-</a>10963, <a id="190c21" class="tk">-</a>11174, <a id="190c29" class="tk">-</a>11381, <a id="190c37" class="tk">-</a>11585, <a id="190c45" class="tk">-</a>11786, <a id="190c53" class="tk">-</a>11982, <a id="190c61" class="tk">-</a>12176, <a id="190c69" class="tk">-</a>12365,</td></tr>
+<td><a id="l190" class='ln'>190</a></td><td>  <span class="br">{</span> 16384, 16382, 16374, 16362, 16344, 16322, 16294, 16262, 16225, 16182, 16135,</td></tr>
 <tr name="191" id="191">
-<td><a id="l191" class='ln'>191</a></td><td>    <a id="191c5" class="tk">-</a>12551, <a id="191c13" class="tk">-</a>12733, <a id="191c21" class="tk">-</a>12911, <a id="191c29" class="tk">-</a>13085, <a id="191c37" class="tk">-</a>13255, <a id="191c45" class="tk">-</a>13421, <a id="191c53" class="tk">-</a>13583, <a id="191c61" class="tk">-</a>13741, <a id="191c69" class="tk">-</a>13894,</td></tr>
+<td><a id="l191" class='ln'>191</a></td><td>    16083, 16026, 15964, 15897, 15826, 15749, 15668, 15582, 15491, 15396, 15296,</td></tr>
 <tr name="192" id="192">
-<td><a id="l192" class='ln'>192</a></td><td>    <a id="192c5" class="tk">-</a>14044, <a id="192c13" class="tk">-</a>14189, <a id="192c21" class="tk">-</a>14330, <a id="192c29" class="tk">-</a>14466, <a id="192c37" class="tk">-</a>14598, <a id="192c45" class="tk">-</a>14726, <a id="192c53" class="tk">-</a>14849, <a id="192c61" class="tk">-</a>14968, <a id="192c69" class="tk">-</a>15082,</td></tr>
+<td><a id="l192" class='ln'>192</a></td><td>    15191, 15082, 14968, 14849, 14726, 14598, 14466, 14330, 14189, 14044, 13894,</td></tr>
 <tr name="193" id="193">
-<td><a id="l193" class='ln'>193</a></td><td>    <a id="193c5" class="tk">-</a>15191, <a id="193c13" class="tk">-</a>15296, <a id="193c21" class="tk">-</a>15396, <a id="193c29" class="tk">-</a>15491, <a id="193c37" class="tk">-</a>15582, <a id="193c45" class="tk">-</a>15668, <a id="193c53" class="tk">-</a>15749, <a id="193c61" class="tk">-</a>15826, <a id="193c69" class="tk">-</a>15897,</td></tr>
+<td><a id="l193" class='ln'>193</a></td><td>    13741, 13583, 13421, 13255, 13085, 12911, 12733, 12551, 12365, 12176, 11982,</td></tr>
 <tr name="194" id="194">
-<td><a id="l194" class='ln'>194</a></td><td>    <a id="194c5" class="tk">-</a>15964, <a id="194c13" class="tk">-</a>16026, <a id="194c21" class="tk">-</a>16083, <a id="194c29" class="tk">-</a>16135, <a id="194c37" class="tk">-</a>16182, <a id="194c45" class="tk">-</a>16225, <a id="194c53" class="tk">-</a>16262, <a id="194c61" class="tk">-</a>16294, <a id="194c69" class="tk">-</a>16322,</td></tr>
+<td><a id="l194" class='ln'>194</a></td><td>    11786, 11585, 11381, 11174, 10963, 10749, 10531, 10311, 10087, 9860, 9630,</td></tr>
 <tr name="195" id="195">
-<td><a id="l195" class='ln'>195</a></td><td>    <a id="195c5" class="tk">-</a>16344, <a id="195c13" class="tk">-</a>16362, <a id="195c21" class="tk">-</a>16374, <a id="195c29" class="tk">-</a>16382, <a id="195c37" class="tk">-</a>16384, <a id="195c45" class="tk">-</a>16382, <a id="195c53" class="tk">-</a>16374, <a id="195c61" class="tk">-</a>16362, <a id="195c69" class="tk">-</a>16344,</td></tr>
+<td><a id="l195" class='ln'>195</a></td><td>    9397, 9162, 8923, 8682, 8438, 8192, 7943, 7692, 7438, 7182, 6924, 6664, 6402,</td></tr>
 <tr name="196" id="196">
-<td><a id="l196" class='ln'>196</a></td><td>    <a id="196c5" class="tk">-</a>16322, <a id="196c13" class="tk">-</a>16294, <a id="196c21" class="tk">-</a>16262, <a id="196c29" class="tk">-</a>16225, <a id="196c37" class="tk">-</a>16182, <a id="196c45" class="tk">-</a>16135, <a id="196c53" class="tk">-</a>16083, <a id="196c61" class="tk">-</a>16026, <a id="196c69" class="tk">-</a>15964,</td></tr>
+<td><a id="l196" class='ln'>196</a></td><td>    6138, 5872, 5604, 5334, 5063, 4790, 4516, 4240, 3964, 3686, 3406, 3126, 2845,</td></tr>
 <tr name="197" id="197">
-<td><a id="l197" class='ln'>197</a></td><td>    <a id="197c5" class="tk">-</a>15897, <a id="197c13" class="tk">-</a>15826, <a id="197c21" class="tk">-</a>15749, <a id="197c29" class="tk">-</a>15668, <a id="197c37" class="tk">-</a>15582, <a id="197c45" class="tk">-</a>15491, <a id="197c53" class="tk">-</a>15396, <a id="197c61" class="tk">-</a>15296, <a id="197c69" class="tk">-</a>15191,</td></tr>
+<td><a id="l197" class='ln'>197</a></td><td>    2563, 2280, 1997, 1713, 1428, 1143, 857, 572, 286, 0, <a id="197c59" class="tk">-</a>286, <a id="197c65" class="tk">-</a>572, <a id="197c71" class="tk">-</a>857,</td></tr>
 <tr name="198" id="198">
-<td><a id="l198" class='ln'>198</a></td><td>    <a id="198c5" class="tk">-</a>15082, <a id="198c13" class="tk">-</a>14968, <a id="198c21" class="tk">-</a>14849, <a id="198c29" class="tk">-</a>14726, <a id="198c37" class="tk">-</a>14598, <a id="198c45" class="tk">-</a>14466, <a id="198c53" class="tk">-</a>14330, <a id="198c61" class="tk">-</a>14189, <a id="198c69" class="tk">-</a>14044,</td></tr>
+<td><a id="l198" class='ln'>198</a></td><td>    <a id="198c5" class="tk">-</a>1143, <a id="198c12" class="tk">-</a>1428, <a id="198c19" class="tk">-</a>1713, <a id="198c26" class="tk">-</a>1997, <a id="198c33" class="tk">-</a>2280, <a id="198c40" class="tk">-</a>2563, <a id="198c47" class="tk">-</a>2845, <a id="198c54" class="tk">-</a>3126, <a id="198c61" class="tk">-</a>3406, <a id="198c68" class="tk">-</a>3686, <a id="198c75" class="tk">-</a>3964,</td></tr>
 <tr name="199" id="199">
-<td><a id="l199" class='ln'>199</a></td><td>    <a id="199c5" class="tk">-</a>13894, <a id="199c13" class="tk">-</a>13741, <a id="199c21" class="tk">-</a>13583, <a id="199c29" class="tk">-</a>13421, <a id="199c37" class="tk">-</a>13255, <a id="199c45" class="tk">-</a>13085, <a id="199c53" class="tk">-</a>12911, <a id="199c61" class="tk">-</a>12733, <a id="199c69" class="tk">-</a>12551,</td></tr>
+<td><a id="l199" class='ln'>199</a></td><td>    <a id="199c5" class="tk">-</a>4240, <a id="199c12" class="tk">-</a>4516, <a id="199c19" class="tk">-</a>4790, <a id="199c26" class="tk">-</a>5063, <a id="199c33" class="tk">-</a>5334, <a id="199c40" class="tk">-</a>5604, <a id="199c47" class="tk">-</a>5872, <a id="199c54" class="tk">-</a>6138, <a id="199c61" class="tk">-</a>6402, <a id="199c68" class="tk">-</a>6664, <a id="199c75" class="tk">-</a>6924,</td></tr>
 <tr name="200" id="200">
-<td><a id="l200" class='ln'>200</a></td><td>    <a id="200c5" class="tk">-</a>12365, <a id="200c13" class="tk">-</a>12176, <a id="200c21" class="tk">-</a>11982, <a id="200c29" class="tk">-</a>11786, <a id="200c37" class="tk">-</a>11585, <a id="200c45" class="tk">-</a>11381, <a id="200c53" class="tk">-</a>11174, <a id="200c61" class="tk">-</a>10963, <a id="200c69" class="tk">-</a>10749,</td></tr>
+<td><a id="l200" class='ln'>200</a></td><td>    <a id="200c5" class="tk">-</a>7182, <a id="200c12" class="tk">-</a>7438, <a id="200c19" class="tk">-</a>7692, <a id="200c26" class="tk">-</a>7943, <a id="200c33" class="tk">-</a>8192, <a id="200c40" class="tk">-</a>8438, <a id="200c47" class="tk">-</a>8682, <a id="200c54" class="tk">-</a>8923, <a id="200c61" class="tk">-</a>9162, <a id="200c68" class="tk">-</a>9397, <a id="200c75" class="tk">-</a>9630,</td></tr>
 <tr name="201" id="201">
-<td><a id="l201" class='ln'>201</a></td><td>    <a id="201c5" class="tk">-</a>10531, <a id="201c13" class="tk">-</a>10311, <a id="201c21" class="tk">-</a>10087, <a id="201c29" class="tk">-</a>9860, <a id="201c36" class="tk">-</a>9630, <a id="201c43" class="tk">-</a>9397, <a id="201c50" class="tk">-</a>9162, <a id="201c57" class="tk">-</a>8923, <a id="201c64" class="tk">-</a>8682, <a id="201c71" class="tk">-</a>8438,</td></tr>
+<td><a id="l201" class='ln'>201</a></td><td>    <a id="201c5" class="tk">-</a>9860, <a id="201c12" class="tk">-</a>10087, <a id="201c20" class="tk">-</a>10311, <a id="201c28" class="tk">-</a>10531, <a id="201c36" class="tk">-</a>10749, <a id="201c44" class="tk">-</a>10963, <a id="201c52" class="tk">-</a>11174, <a id="201c60" class="tk">-</a>11381, <a id="201c68" class="tk">-</a>11585,</td></tr>
 <tr name="202" id="202">
-<td><a id="l202" class='ln'>202</a></td><td>    <a id="202c5" class="tk">-</a>8192, <a id="202c12" class="tk">-</a>7943, <a id="202c19" class="tk">-</a>7692, <a id="202c26" class="tk">-</a>7438, <a id="202c33" class="tk">-</a>7182, <a id="202c40" class="tk">-</a>6924, <a id="202c47" class="tk">-</a>6664, <a id="202c54" class="tk">-</a>6402, <a id="202c61" class="tk">-</a>6138, <a id="202c68" class="tk">-</a>5872, <a id="202c75" class="tk">-</a>5604,</td></tr>
+<td><a id="l202" class='ln'>202</a></td><td>    <a id="202c5" class="tk">-</a>11786, <a id="202c13" class="tk">-</a>11982, <a id="202c21" class="tk">-</a>12176, <a id="202c29" class="tk">-</a>12365, <a id="202c37" class="tk">-</a>12551, <a id="202c45" class="tk">-</a>12733, <a id="202c53" class="tk">-</a>12911, <a id="202c61" class="tk">-</a>13085, <a id="202c69" class="tk">-</a>13255,</td></tr>
 <tr name="203" id="203">
-<td><a id="l203" class='ln'>203</a></td><td>    <a id="203c5" class="tk">-</a>5334, <a id="203c12" class="tk">-</a>5063, <a id="203c19" class="tk">-</a>4790, <a id="203c26" class="tk">-</a>4516, <a id="203c33" class="tk">-</a>4240, <a id="203c40" class="tk">-</a>3964, <a id="203c47" class="tk">-</a>3686, <a id="203c54" class="tk">-</a>3406, <a id="203c61" class="tk">-</a>3126, <a id="203c68" class="tk">-</a>2845, <a id="203c75" class="tk">-</a>2563,</td></tr>
+<td><a id="l203" class='ln'>203</a></td><td>    <a id="203c5" class="tk">-</a>13421, <a id="203c13" class="tk">-</a>13583, <a id="203c21" class="tk">-</a>13741, <a id="203c29" class="tk">-</a>13894, <a id="203c37" class="tk">-</a>14044, <a id="203c45" class="tk">-</a>14189, <a id="203c53" class="tk">-</a>14330, <a id="203c61" class="tk">-</a>14466, <a id="203c69" class="tk">-</a>14598,</td></tr>
 <tr name="204" id="204">
-<td><a id="l204" class='ln'>204</a></td><td>    <a id="204c5" class="tk">-</a>2280, <a id="204c12" class="tk">-</a>1997, <a id="204c19" class="tk">-</a>1713, <a id="204c26" class="tk">-</a>1428, <a id="204c33" class="tk">-</a>1143, <a id="204c40" class="tk">-</a>857, <a id="204c46" class="tk">-</a>572, <a id="204c52" class="tk">-</a>286, 0 <span class="br">}</span>,</td></tr>
+<td><a id="l204" class='ln'>204</a></td><td>    <a id="204c5" class="tk">-</a>14726, <a id="204c13" class="tk">-</a>14849, <a id="204c21" class="tk">-</a>14968, <a id="204c29" class="tk">-</a>15082, <a id="204c37" class="tk">-</a>15191, <a id="204c45" class="tk">-</a>15296, <a id="204c53" class="tk">-</a>15396, <a id="204c61" class="tk">-</a>15491, <a id="204c69" class="tk">-</a>15582,</td></tr>
 <tr name="205" id="205">
-<td><a id="l205" class='ln'>205</a></td><td></td></tr>
+<td><a id="l205" class='ln'>205</a></td><td>    <a id="205c5" class="tk">-</a>15668, <a id="205c13" class="tk">-</a>15749, <a id="205c21" class="tk">-</a>15826, <a id="205c29" class="tk">-</a>15897, <a id="205c37" class="tk">-</a>15964, <a id="205c45" class="tk">-</a>16026, <a id="205c53" class="tk">-</a>16083, <a id="205c61" class="tk">-</a>16135, <a id="205c69" class="tk">-</a>16182,</td></tr>
 <tr name="206" id="206">
-<td><a id="l206" class='ln'>206</a></td><td>  <span class="ct">/* Pooled Parameter (Expression: r_cos_M1)</span></td></tr>
+<td><a id="l206" class='ln'>206</a></td><td>    <a id="206c5" class="tk">-</a>16225, <a id="206c13" class="tk">-</a>16262, <a id="206c21" class="tk">-</a>16294, <a id="206c29" class="tk">-</a>16322, <a id="206c37" class="tk">-</a>16344, <a id="206c45" class="tk">-</a>16362, <a id="206c53" class="tk">-</a>16374, <a id="206c61" class="tk">-</a>16382, <a id="206c69" class="tk">-</a>16384,</td></tr>
 <tr name="207" id="207">
-<td><a id="l207" class='ln'>207</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
+<td><a id="l207" class='ln'>207</a></td><td>    <a id="207c5" class="tk">-</a>16382, <a id="207c13" class="tk">-</a>16374, <a id="207c21" class="tk">-</a>16362, <a id="207c29" class="tk">-</a>16344, <a id="207c37" class="tk">-</a>16322, <a id="207c45" class="tk">-</a>16294, <a id="207c53" class="tk">-</a>16262, <a id="207c61" class="tk">-</a>16225, <a id="207c69" class="tk">-</a>16182,</td></tr>
 <tr name="208" id="208">
-<td><a id="l208" class='ln'>208</a></td><td><span class="ct">   *   '&lt;S58&gt;/r_cos_M1'</span></td></tr>
+<td><a id="l208" class='ln'>208</a></td><td>    <a id="208c5" class="tk">-</a>16135, <a id="208c13" class="tk">-</a>16083, <a id="208c21" class="tk">-</a>16026, <a id="208c29" class="tk">-</a>15964, <a id="208c37" class="tk">-</a>15897, <a id="208c45" class="tk">-</a>15826, <a id="208c53" class="tk">-</a>15749, <a id="208c61" class="tk">-</a>15668, <a id="208c69" class="tk">-</a>15582,</td></tr>
 <tr name="209" id="209">
-<td><a id="l209" class='ln'>209</a></td><td><span class="ct">   *   '&lt;S82&gt;/r_cos_M1'</span></td></tr>
+<td><a id="l209" class='ln'>209</a></td><td>    <a id="209c5" class="tk">-</a>15491, <a id="209c13" class="tk">-</a>15396, <a id="209c21" class="tk">-</a>15296, <a id="209c29" class="tk">-</a>15191, <a id="209c37" class="tk">-</a>15082, <a id="209c45" class="tk">-</a>14968, <a id="209c53" class="tk">-</a>14849, <a id="209c61" class="tk">-</a>14726, <a id="209c69" class="tk">-</a>14598,</td></tr>
 <tr name="210" id="210">
-<td><a id="l210" class='ln'>210</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l210" class='ln'>210</a></td><td>    <a id="210c5" class="tk">-</a>14466, <a id="210c13" class="tk">-</a>14330, <a id="210c21" class="tk">-</a>14189, <a id="210c29" class="tk">-</a>14044, <a id="210c37" class="tk">-</a>13894, <a id="210c45" class="tk">-</a>13741, <a id="210c53" class="tk">-</a>13583, <a id="210c61" class="tk">-</a>13421, <a id="210c69" class="tk">-</a>13255,</td></tr>
 <tr name="211" id="211">
-<td><a id="l211" class='ln'>211</a></td><td>  <span class="br">{</span> 16384, 16382, 16374, 16362, 16344, 16322, 16294, 16262, 16225, 16182, 16135,</td></tr>
+<td><a id="l211" class='ln'>211</a></td><td>    <a id="211c5" class="tk">-</a>13085, <a id="211c13" class="tk">-</a>12911, <a id="211c21" class="tk">-</a>12733, <a id="211c29" class="tk">-</a>12551, <a id="211c37" class="tk">-</a>12365, <a id="211c45" class="tk">-</a>12176, <a id="211c53" class="tk">-</a>11982, <a id="211c61" class="tk">-</a>11786, <a id="211c69" class="tk">-</a>11585,</td></tr>
 <tr name="212" id="212">
-<td><a id="l212" class='ln'>212</a></td><td>    16083, 16026, 15964, 15897, 15826, 15749, 15668, 15582, 15491, 15396, 15296,</td></tr>
+<td><a id="l212" class='ln'>212</a></td><td>    <a id="212c5" class="tk">-</a>11381, <a id="212c13" class="tk">-</a>11174, <a id="212c21" class="tk">-</a>10963, <a id="212c29" class="tk">-</a>10749, <a id="212c37" class="tk">-</a>10531, <a id="212c45" class="tk">-</a>10311, <a id="212c53" class="tk">-</a>10087, <a id="212c61" class="tk">-</a>9860, <a id="212c68" class="tk">-</a>9630, <a id="212c75" class="tk">-</a>9397,</td></tr>
 <tr name="213" id="213">
-<td><a id="l213" class='ln'>213</a></td><td>    15191, 15082, 14968, 14849, 14726, 14598, 14466, 14330, 14189, 14044, 13894,</td></tr>
+<td><a id="l213" class='ln'>213</a></td><td>    <a id="213c5" class="tk">-</a>9162, <a id="213c12" class="tk">-</a>8923, <a id="213c19" class="tk">-</a>8682, <a id="213c26" class="tk">-</a>8438, <a id="213c33" class="tk">-</a>8192, <a id="213c40" class="tk">-</a>7943, <a id="213c47" class="tk">-</a>7692, <a id="213c54" class="tk">-</a>7438, <a id="213c61" class="tk">-</a>7182, <a id="213c68" class="tk">-</a>6924, <a id="213c75" class="tk">-</a>6664,</td></tr>
 <tr name="214" id="214">
-<td><a id="l214" class='ln'>214</a></td><td>    13741, 13583, 13421, 13255, 13085, 12911, 12733, 12551, 12365, 12176, 11982,</td></tr>
+<td><a id="l214" class='ln'>214</a></td><td>    <a id="214c5" class="tk">-</a>6402, <a id="214c12" class="tk">-</a>6138, <a id="214c19" class="tk">-</a>5872, <a id="214c26" class="tk">-</a>5604, <a id="214c33" class="tk">-</a>5334, <a id="214c40" class="tk">-</a>5063, <a id="214c47" class="tk">-</a>4790, <a id="214c54" class="tk">-</a>4516, <a id="214c61" class="tk">-</a>4240, <a id="214c68" class="tk">-</a>3964, <a id="214c75" class="tk">-</a>3686,</td></tr>
 <tr name="215" id="215">
-<td><a id="l215" class='ln'>215</a></td><td>    11786, 11585, 11381, 11174, 10963, 10749, 10531, 10311, 10087, 9860, 9630,</td></tr>
+<td><a id="l215" class='ln'>215</a></td><td>    <a id="215c5" class="tk">-</a>3406, <a id="215c12" class="tk">-</a>3126, <a id="215c19" class="tk">-</a>2845, <a id="215c26" class="tk">-</a>2563, <a id="215c33" class="tk">-</a>2280, <a id="215c40" class="tk">-</a>1997, <a id="215c47" class="tk">-</a>1713, <a id="215c54" class="tk">-</a>1428, <a id="215c61" class="tk">-</a>1143, <a id="215c68" class="tk">-</a>857, <a id="215c74" class="tk">-</a>572,</td></tr>
 <tr name="216" id="216">
-<td><a id="l216" class='ln'>216</a></td><td>    9397, 9162, 8923, 8682, 8438, 8192, 7943, 7692, 7438, 7182, 6924, 6664, 6402,</td></tr>
+<td><a id="l216" class='ln'>216</a></td><td>    <a id="216c5" class="tk">-</a>286, 0, 286, 572, 857, 1143, 1428, 1713, 1997, 2280, 2563, 2845, 3126, 3406,</td></tr>
 <tr name="217" id="217">
-<td><a id="l217" class='ln'>217</a></td><td>    6138, 5872, 5604, 5334, 5063, 4790, 4516, 4240, 3964, 3686, 3406, 3126, 2845,</td></tr>
+<td><a id="l217" class='ln'>217</a></td><td>    3686, 3964, 4240, 4516, 4790, 5063, 5334, 5604, 5872, 6138, 6402, 6664, 6924,</td></tr>
 <tr name="218" id="218">
-<td><a id="l218" class='ln'>218</a></td><td>    2563, 2280, 1997, 1713, 1428, 1143, 857, 572, 286, 0, <a id="218c59" class="tk">-</a>286, <a id="218c65" class="tk">-</a>572, <a id="218c71" class="tk">-</a>857,</td></tr>
+<td><a id="l218" class='ln'>218</a></td><td>    7182, 7438, 7692, 7943, 8192, 8438, 8682, 8923, 9162, 9397, 9630, 9860,</td></tr>
 <tr name="219" id="219">
-<td><a id="l219" class='ln'>219</a></td><td>    <a id="219c5" class="tk">-</a>1143, <a id="219c12" class="tk">-</a>1428, <a id="219c19" class="tk">-</a>1713, <a id="219c26" class="tk">-</a>1997, <a id="219c33" class="tk">-</a>2280, <a id="219c40" class="tk">-</a>2563, <a id="219c47" class="tk">-</a>2845, <a id="219c54" class="tk">-</a>3126, <a id="219c61" class="tk">-</a>3406, <a id="219c68" class="tk">-</a>3686, <a id="219c75" class="tk">-</a>3964,</td></tr>
+<td><a id="l219" class='ln'>219</a></td><td>    10087, 10311, 10531, 10749, 10963, 11174, 11381, 11585, 11786, 11982, 12176,</td></tr>
 <tr name="220" id="220">
-<td><a id="l220" class='ln'>220</a></td><td>    <a id="220c5" class="tk">-</a>4240, <a id="220c12" class="tk">-</a>4516, <a id="220c19" class="tk">-</a>4790, <a id="220c26" class="tk">-</a>5063, <a id="220c33" class="tk">-</a>5334, <a id="220c40" class="tk">-</a>5604, <a id="220c47" class="tk">-</a>5872, <a id="220c54" class="tk">-</a>6138, <a id="220c61" class="tk">-</a>6402, <a id="220c68" class="tk">-</a>6664, <a id="220c75" class="tk">-</a>6924,</td></tr>
+<td><a id="l220" class='ln'>220</a></td><td>    12365, 12551, 12733, 12911, 13085, 13255, 13421, 13583, 13741, 13894, 14044,</td></tr>
 <tr name="221" id="221">
-<td><a id="l221" class='ln'>221</a></td><td>    <a id="221c5" class="tk">-</a>7182, <a id="221c12" class="tk">-</a>7438, <a id="221c19" class="tk">-</a>7692, <a id="221c26" class="tk">-</a>7943, <a id="221c33" class="tk">-</a>8192, <a id="221c40" class="tk">-</a>8438, <a id="221c47" class="tk">-</a>8682, <a id="221c54" class="tk">-</a>8923, <a id="221c61" class="tk">-</a>9162, <a id="221c68" class="tk">-</a>9397, <a id="221c75" class="tk">-</a>9630,</td></tr>
+<td><a id="l221" class='ln'>221</a></td><td>    14189, 14330, 14466, 14598, 14726, 14849, 14968, 15082, 15191, 15296, 15396,</td></tr>
 <tr name="222" id="222">
-<td><a id="l222" class='ln'>222</a></td><td>    <a id="222c5" class="tk">-</a>9860, <a id="222c12" class="tk">-</a>10087, <a id="222c20" class="tk">-</a>10311, <a id="222c28" class="tk">-</a>10531, <a id="222c36" class="tk">-</a>10749, <a id="222c44" class="tk">-</a>10963, <a id="222c52" class="tk">-</a>11174, <a id="222c60" class="tk">-</a>11381, <a id="222c68" class="tk">-</a>11585,</td></tr>
+<td><a id="l222" class='ln'>222</a></td><td>    15491, 15582, 15668, 15749, 15826, 15897, 15964, 16026, 16083, 16135, 16182,</td></tr>
 <tr name="223" id="223">
-<td><a id="l223" class='ln'>223</a></td><td>    <a id="223c5" class="tk">-</a>11786, <a id="223c13" class="tk">-</a>11982, <a id="223c21" class="tk">-</a>12176, <a id="223c29" class="tk">-</a>12365, <a id="223c37" class="tk">-</a>12551, <a id="223c45" class="tk">-</a>12733, <a id="223c53" class="tk">-</a>12911, <a id="223c61" class="tk">-</a>13085, <a id="223c69" class="tk">-</a>13255,</td></tr>
+<td><a id="l223" class='ln'>223</a></td><td>    16225, 16262, 16294, 16322, 16344, 16362, 16374, 16382, 16384 <span class="br">}</span>,</td></tr>
 <tr name="224" id="224">
-<td><a id="l224" class='ln'>224</a></td><td>    <a id="224c5" class="tk">-</a>13421, <a id="224c13" class="tk">-</a>13583, <a id="224c21" class="tk">-</a>13741, <a id="224c29" class="tk">-</a>13894, <a id="224c37" class="tk">-</a>14044, <a id="224c45" class="tk">-</a>14189, <a id="224c53" class="tk">-</a>14330, <a id="224c61" class="tk">-</a>14466, <a id="224c69" class="tk">-</a>14598,</td></tr>
+<td><a id="l224" class='ln'>224</a></td><td></td></tr>
 <tr name="225" id="225">
-<td><a id="l225" class='ln'>225</a></td><td>    <a id="225c5" class="tk">-</a>14726, <a id="225c13" class="tk">-</a>14849, <a id="225c21" class="tk">-</a>14968, <a id="225c29" class="tk">-</a>15082, <a id="225c37" class="tk">-</a>15191, <a id="225c45" class="tk">-</a>15296, <a id="225c53" class="tk">-</a>15396, <a id="225c61" class="tk">-</a>15491, <a id="225c69" class="tk">-</a>15582,</td></tr>
+<td><a id="l225" class='ln'>225</a></td><td>  <span class="ct">/* Computed Parameter: vec_hallToPos_Value</span></td></tr>
 <tr name="226" id="226">
-<td><a id="l226" class='ln'>226</a></td><td>    <a id="226c5" class="tk">-</a>15668, <a id="226c13" class="tk">-</a>15749, <a id="226c21" class="tk">-</a>15826, <a id="226c29" class="tk">-</a>15897, <a id="226c37" class="tk">-</a>15964, <a id="226c45" class="tk">-</a>16026, <a id="226c53" class="tk">-</a>16083, <a id="226c61" class="tk">-</a>16135, <a id="226c69" class="tk">-</a>16182,</td></tr>
+<td><a id="l226" class='ln'>226</a></td><td><span class="ct">   * Referenced by: '&lt;S19&gt;/vec_hallToPos'</span></td></tr>
 <tr name="227" id="227">
-<td><a id="l227" class='ln'>227</a></td><td>    <a id="227c5" class="tk">-</a>16225, <a id="227c13" class="tk">-</a>16262, <a id="227c21" class="tk">-</a>16294, <a id="227c29" class="tk">-</a>16322, <a id="227c37" class="tk">-</a>16344, <a id="227c45" class="tk">-</a>16362, <a id="227c53" class="tk">-</a>16374, <a id="227c61" class="tk">-</a>16382, <a id="227c69" class="tk">-</a>16384,</td></tr>
+<td><a id="l227" class='ln'>227</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="228" id="228">
-<td><a id="l228" class='ln'>228</a></td><td>    <a id="228c5" class="tk">-</a>16382, <a id="228c13" class="tk">-</a>16374, <a id="228c21" class="tk">-</a>16362, <a id="228c29" class="tk">-</a>16344, <a id="228c37" class="tk">-</a>16322, <a id="228c45" class="tk">-</a>16294, <a id="228c53" class="tk">-</a>16262, <a id="228c61" class="tk">-</a>16225, <a id="228c69" class="tk">-</a>16182,</td></tr>
+<td><a id="l228" class='ln'>228</a></td><td>  <span class="br">{</span> 7, 5, 1, 0, 3, 4, 2, 7 <span class="br">}</span></td></tr>
 <tr name="229" id="229">
-<td><a id="l229" class='ln'>229</a></td><td>    <a id="229c5" class="tk">-</a>16135, <a id="229c13" class="tk">-</a>16083, <a id="229c21" class="tk">-</a>16026, <a id="229c29" class="tk">-</a>15964, <a id="229c37" class="tk">-</a>15897, <a id="229c45" class="tk">-</a>15826, <a id="229c53" class="tk">-</a>15749, <a id="229c61" class="tk">-</a>15668, <a id="229c69" class="tk">-</a>15582,</td></tr>
+<td><a id="l229" class='ln'>229</a></td><td><span class="br">}</span>;</td></tr>
 <tr name="230" id="230">
-<td><a id="l230" class='ln'>230</a></td><td>    <a id="230c5" class="tk">-</a>15491, <a id="230c13" class="tk">-</a>15396, <a id="230c21" class="tk">-</a>15296, <a id="230c29" class="tk">-</a>15191, <a id="230c37" class="tk">-</a>15082, <a id="230c45" class="tk">-</a>14968, <a id="230c53" class="tk">-</a>14849, <a id="230c61" class="tk">-</a>14726, <a id="230c69" class="tk">-</a>14598,</td></tr>
+<td><a id="l230" class='ln'>230</a></td><td></td></tr>
 <tr name="231" id="231">
-<td><a id="l231" class='ln'>231</a></td><td>    <a id="231c5" class="tk">-</a>14466, <a id="231c13" class="tk">-</a>14330, <a id="231c21" class="tk">-</a>14189, <a id="231c29" class="tk">-</a>14044, <a id="231c37" class="tk">-</a>13894, <a id="231c45" class="tk">-</a>13741, <a id="231c53" class="tk">-</a>13583, <a id="231c61" class="tk">-</a>13421, <a id="231c69" class="tk">-</a>13255,</td></tr>
+<td><a id="l231" class='ln'>231</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="232" id="232">
-<td><a id="l232" class='ln'>232</a></td><td>    <a id="232c5" class="tk">-</a>13085, <a id="232c13" class="tk">-</a>12911, <a id="232c21" class="tk">-</a>12733, <a id="232c29" class="tk">-</a>12551, <a id="232c37" class="tk">-</a>12365, <a id="232c45" class="tk">-</a>12176, <a id="232c53" class="tk">-</a>11982, <a id="232c61" class="tk">-</a>11786, <a id="232c69" class="tk">-</a>11585,</td></tr>
+<td><a id="l232" class='ln'>232</a></td><td><span class="ct"> * File trailer for generated code.</span></td></tr>
 <tr name="233" id="233">
-<td><a id="l233" class='ln'>233</a></td><td>    <a id="233c5" class="tk">-</a>11381, <a id="233c13" class="tk">-</a>11174, <a id="233c21" class="tk">-</a>10963, <a id="233c29" class="tk">-</a>10749, <a id="233c37" class="tk">-</a>10531, <a id="233c45" class="tk">-</a>10311, <a id="233c53" class="tk">-</a>10087, <a id="233c61" class="tk">-</a>9860, <a id="233c68" class="tk">-</a>9630, <a id="233c75" class="tk">-</a>9397,</td></tr>
+<td><a id="l233" class='ln'>233</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="234" id="234">
-<td><a id="l234" class='ln'>234</a></td><td>    <a id="234c5" class="tk">-</a>9162, <a id="234c12" class="tk">-</a>8923, <a id="234c19" class="tk">-</a>8682, <a id="234c26" class="tk">-</a>8438, <a id="234c33" class="tk">-</a>8192, <a id="234c40" class="tk">-</a>7943, <a id="234c47" class="tk">-</a>7692, <a id="234c54" class="tk">-</a>7438, <a id="234c61" class="tk">-</a>7182, <a id="234c68" class="tk">-</a>6924, <a id="234c75" class="tk">-</a>6664,</td></tr>
+<td><a id="l234" class='ln'>234</a></td><td><span class="ct"> * [EOF]</span></td></tr>
 <tr name="235" id="235">
-<td><a id="l235" class='ln'>235</a></td><td>    <a id="235c5" class="tk">-</a>6402, <a id="235c12" class="tk">-</a>6138, <a id="235c19" class="tk">-</a>5872, <a id="235c26" class="tk">-</a>5604, <a id="235c33" class="tk">-</a>5334, <a id="235c40" class="tk">-</a>5063, <a id="235c47" class="tk">-</a>4790, <a id="235c54" class="tk">-</a>4516, <a id="235c61" class="tk">-</a>4240, <a id="235c68" class="tk">-</a>3964, <a id="235c75" class="tk">-</a>3686,</td></tr>
+<td><a id="l235" class='ln'>235</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="236" id="236">
-<td><a id="l236" class='ln'>236</a></td><td>    <a id="236c5" class="tk">-</a>3406, <a id="236c12" class="tk">-</a>3126, <a id="236c19" class="tk">-</a>2845, <a id="236c26" class="tk">-</a>2563, <a id="236c33" class="tk">-</a>2280, <a id="236c40" class="tk">-</a>1997, <a id="236c47" class="tk">-</a>1713, <a id="236c54" class="tk">-</a>1428, <a id="236c61" class="tk">-</a>1143, <a id="236c68" class="tk">-</a>857, <a id="236c74" class="tk">-</a>572,</td></tr>
-<tr name="237" id="237">
-<td><a id="l237" class='ln'>237</a></td><td>    <a id="237c5" class="tk">-</a>286, 0, 286, 572, 857, 1143, 1428, 1713, 1997, 2280, 2563, 2845, 3126, 3406,</td></tr>
-<tr name="238" id="238">
-<td><a id="l238" class='ln'>238</a></td><td>    3686, 3964, 4240, 4516, 4790, 5063, 5334, 5604, 5872, 6138, 6402, 6664, 6924,</td></tr>
-<tr name="239" id="239">
-<td><a id="l239" class='ln'>239</a></td><td>    7182, 7438, 7692, 7943, 8192, 8438, 8682, 8923, 9162, 9397, 9630, 9860,</td></tr>
-<tr name="240" id="240">
-<td><a id="l240" class='ln'>240</a></td><td>    10087, 10311, 10531, 10749, 10963, 11174, 11381, 11585, 11786, 11982, 12176,</td></tr>
-<tr name="241" id="241">
-<td><a id="l241" class='ln'>241</a></td><td>    12365, 12551, 12733, 12911, 13085, 13255, 13421, 13583, 13741, 13894, 14044,</td></tr>
-<tr name="242" id="242">
-<td><a id="l242" class='ln'>242</a></td><td>    14189, 14330, 14466, 14598, 14726, 14849, 14968, 15082, 15191, 15296, 15396,</td></tr>
-<tr name="243" id="243">
-<td><a id="l243" class='ln'>243</a></td><td>    15491, 15582, 15668, 15749, 15826, 15897, 15964, 16026, 16083, 16135, 16182,</td></tr>
-<tr name="244" id="244">
-<td><a id="l244" class='ln'>244</a></td><td>    16225, 16262, 16294, 16322, 16344, 16362, 16374, 16382, 16384 <span class="br">}</span>,</td></tr>
-<tr name="245" id="245">
-<td><a id="l245" class='ln'>245</a></td><td></td></tr>
-<tr name="246" id="246">
-<td><a id="l246" class='ln'>246</a></td><td>  <span class="ct">/* Computed Parameter: vec_hallToPos_Value</span></td></tr>
-<tr name="247" id="247">
-<td><a id="l247" class='ln'>247</a></td><td><span class="ct">   * Referenced by: '&lt;S11&gt;/vec_hallToPos'</span></td></tr>
-<tr name="248" id="248">
-<td><a id="l248" class='ln'>248</a></td><td><span class="ct">   */</span></td></tr>
-<tr name="249" id="249">
-<td><a id="l249" class='ln'>249</a></td><td>  <span class="br">{</span> 7, 5, 1, 0, 3, 4, 2, 7 <span class="br">}</span></td></tr>
-<tr name="250" id="250">
-<td><a id="l250" class='ln'>250</a></td><td><span class="br">}</span>;</td></tr>
-<tr name="251" id="251">
-<td><a id="l251" class='ln'>251</a></td><td></td></tr>
-<tr name="252" id="252">
-<td><a id="l252" class='ln'>252</a></td><td><span class="ct">/*</span></td></tr>
-<tr name="253" id="253">
-<td><a id="l253" class='ln'>253</a></td><td><span class="ct"> * File trailer for generated code.</span></td></tr>
-<tr name="254" id="254">
-<td><a id="l254" class='ln'>254</a></td><td><span class="ct"> *</span></td></tr>
-<tr name="255" id="255">
-<td><a id="l255" class='ln'>255</a></td><td><span class="ct"> * [EOF]</span></td></tr>
-<tr name="256" id="256">
-<td><a id="l256" class='ln'>256</a></td><td><span class="ct"> */</span></td></tr>
-<tr name="257" id="257">
-<td><a id="l257" class='ln'>257</a></td><td></td></tr>
+<td><a id="l236" class='ln'>236</a></td><td></td></tr>
 </table>
 </pre>
 </body>

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_h.html

@@ -21,11 +21,11 @@
 <tr name="5" id="5">
 <td><a id="l5" class='ln'>5</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="6" id="6">
-<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1460</span></td></tr>
+<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1529</span></td></tr>
 <tr name="7" id="7">
 <td><a id="l7" class='ln'>7</a></td><td><span class="ct"> * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020</span></td></tr>
 <tr name="8" id="8">
-<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Sat May 28 14:25:47 2022</span></td></tr>
+<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Tue Aug  2 19:43:20 2022</span></td></tr>
 <tr name="9" id="9">
 <td><a id="l9" class='ln'>9</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="10" id="10">
@@ -93,61 +93,61 @@
 <tr name="41" id="41">
 <td><a id="l41" class='ln'>41</a></td><td></td></tr>
 <tr name="42" id="42">
-<td><a id="l42" class='ln'>42</a></td><td><span class="ct">/* Block signals and states (default storage) for system '&lt;S48&gt;/Low_Pass_Filter' */</span></td></tr>
+<td><a id="l42" class='ln'>42</a></td><td><span class="ct">/* Block signals and states (default storage) for system '&lt;S39&gt;/Low_Pass_Filter' */</span></td></tr>
 <tr name="43" id="43">
 <td><a id="l43" class='ln'>43</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="44" id="44">
-<td><a id="l44" class='ln'>44</a></td><td>  <a id="44c3" class="tk">int32_T</a> <a id="44c11" class="tk">UnitDelay1_DSTATE</a>[2];        <span class="ct">/* '&lt;S56&gt;/UnitDelay1' */</span></td></tr>
+<td><a id="l44" class='ln'>44</a></td><td>  <a id="44c3" class="tk">int32_T</a> <a id="44c11" class="tk">UnitDelay1_DSTATE</a>[2];        <span class="ct">/* '&lt;S47&gt;/UnitDelay1' */</span></td></tr>
 <tr name="45" id="45">
 <td><a id="l45" class='ln'>45</a></td><td><span class="br">}</span> <a id="45c3" class="tk">DW_Low_Pass_Filter</a>;</td></tr>
 <tr name="46" id="46">
 <td><a id="l46" class='ln'>46</a></td><td></td></tr>
 <tr name="47" id="47">
-<td><a id="l47" class='ln'>47</a></td><td><span class="ct">/* Block signals and states (default storage) for system '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l47" class='ln'>47</a></td><td><span class="ct">/* Block signals and states (default storage) for system '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="48" id="48">
 <td><a id="l48" class='ln'>48</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="49" id="49">
-<td><a id="l49" class='ln'>49</a></td><td>  <a id="49c3" class="tk">int32_T</a> <a id="49c11" class="tk">UnitDelay_DSTATE</a>;            <span class="ct">/* '&lt;S89&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l49" class='ln'>49</a></td><td>  <a id="49c3" class="tk">int32_T</a> <a id="49c11" class="tk">UnitDelay_DSTATE</a>;            <span class="ct">/* '&lt;S81&gt;/UnitDelay' */</span></td></tr>
 <tr name="50" id="50">
-<td><a id="l50" class='ln'>50</a></td><td>  <a id="50c3" class="tk">int32_T</a> <a id="50c11" class="tk">ResettableDelay_DSTATE</a>;      <span class="ct">/* '&lt;S90&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l50" class='ln'>50</a></td><td>  <a id="50c3" class="tk">int32_T</a> <a id="50c11" class="tk">ResettableDelay_DSTATE</a>;      <span class="ct">/* '&lt;S82&gt;/Resettable Delay' */</span></td></tr>
 <tr name="51" id="51">
-<td><a id="l51" class='ln'>51</a></td><td>  <a id="51c3" class="tk">uint8_T</a> <a id="51c11" class="tk">icLoad</a>;                      <span class="ct">/* '&lt;S90&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l51" class='ln'>51</a></td><td>  <a id="51c3" class="tk">uint8_T</a> <a id="51c11" class="tk">icLoad</a>;                      <span class="ct">/* '&lt;S82&gt;/Resettable Delay' */</span></td></tr>
 <tr name="52" id="52">
 <td><a id="l52" class='ln'>52</a></td><td><span class="br">}</span> <a id="52c3" class="tk">DW_PI_backCalc_fixdt</a>;</td></tr>
 <tr name="53" id="53">
 <td><a id="l53" class='ln'>53</a></td><td></td></tr>
 <tr name="54" id="54">
-<td><a id="l54" class='ln'>54</a></td><td><span class="ct">/* Zero-crossing (trigger) state for system '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l54" class='ln'>54</a></td><td><span class="ct">/* Zero-crossing (trigger) state for system '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="55" id="55">
 <td><a id="l55" class='ln'>55</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="56" id="56">
-<td><a id="l56" class='ln'>56</a></td><td>  <a id="56c3" class="tk">ZCSigState</a> <a id="56c14" class="tk">ResettableDelay_Reset_ZCE_f</a>;<span class="ct">/* '&lt;S90&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l56" class='ln'>56</a></td><td>  <a id="56c3" class="tk">ZCSigState</a> <a id="56c14" class="tk">ResettableDelay_Reset_ZCE_fm</a>;<span class="ct">/* '&lt;S82&gt;/Resettable Delay' */</span></td></tr>
 <tr name="57" id="57">
 <td><a id="l57" class='ln'>57</a></td><td><span class="br">}</span> <a id="57c3" class="tk">ZCE_PI_backCalc_fixdt</a>;</td></tr>
 <tr name="58" id="58">
 <td><a id="l58" class='ln'>58</a></td><td></td></tr>
 <tr name="59" id="59">
-<td><a id="l59" class='ln'>59</a></td><td><span class="ct">/* Block signals and states (default storage) for system '&lt;S95&gt;/PI_backCalc_fixdt' */</span></td></tr>
+<td><a id="l59" class='ln'>59</a></td><td><span class="ct">/* Block signals and states (default storage) for system '&lt;S85&gt;/PI_backCalc_fixdt' */</span></td></tr>
 <tr name="60" id="60">
 <td><a id="l60" class='ln'>60</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="61" id="61">
-<td><a id="l61" class='ln'>61</a></td><td>  <a id="61c3" class="tk">int32_T</a> <a id="61c11" class="tk">UnitDelay_DSTATE</a>;            <span class="ct">/* '&lt;S100&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l61" class='ln'>61</a></td><td>  <a id="61c3" class="tk">int32_T</a> <a id="61c11" class="tk">UnitDelay_DSTATE</a>;            <span class="ct">/* '&lt;S90&gt;/UnitDelay' */</span></td></tr>
 <tr name="62" id="62">
-<td><a id="l62" class='ln'>62</a></td><td>  <a id="62c3" class="tk">int32_T</a> <a id="62c11" class="tk">ResettableDelay_DSTATE</a>;      <span class="ct">/* '&lt;S102&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l62" class='ln'>62</a></td><td>  <a id="62c3" class="tk">int32_T</a> <a id="62c11" class="tk">ResettableDelay_DSTATE</a>;      <span class="ct">/* '&lt;S92&gt;/Resettable Delay' */</span></td></tr>
 <tr name="63" id="63">
-<td><a id="l63" class='ln'>63</a></td><td>  <a id="63c3" class="tk">uint8_T</a> <a id="63c11" class="tk">icLoad</a>;                      <span class="ct">/* '&lt;S102&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l63" class='ln'>63</a></td><td>  <a id="63c3" class="tk">uint8_T</a> <a id="63c11" class="tk">icLoad</a>;                      <span class="ct">/* '&lt;S92&gt;/Resettable Delay' */</span></td></tr>
 <tr name="64" id="64">
-<td><a id="l64" class='ln'>64</a></td><td><span class="br">}</span> <a id="64c3" class="tk">DW_PI_backCalc_fixdt_i</a>;</td></tr>
+<td><a id="l64" class='ln'>64</a></td><td><span class="br">}</span> <a id="64c3" class="tk">DW_PI_backCalc_fixdt_j</a>;</td></tr>
 <tr name="65" id="65">
 <td><a id="l65" class='ln'>65</a></td><td></td></tr>
 <tr name="66" id="66">
-<td><a id="l66" class='ln'>66</a></td><td><span class="ct">/* Zero-crossing (trigger) state for system '&lt;S95&gt;/PI_backCalc_fixdt' */</span></td></tr>
+<td><a id="l66" class='ln'>66</a></td><td><span class="ct">/* Zero-crossing (trigger) state for system '&lt;S85&gt;/PI_backCalc_fixdt' */</span></td></tr>
 <tr name="67" id="67">
 <td><a id="l67" class='ln'>67</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="68" id="68">
-<td><a id="l68" class='ln'>68</a></td><td>  <a id="68c3" class="tk">ZCSigState</a> <a id="68c14" class="tk">ResettableDelay_Reset_ZCE</a>;<span class="ct">/* '&lt;S102&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l68" class='ln'>68</a></td><td>  <a id="68c3" class="tk">ZCSigState</a> <a id="68c14" class="tk">ResettableDelay_Reset_ZCE</a>;<span class="ct">/* '&lt;S92&gt;/Resettable Delay' */</span></td></tr>
 <tr name="69" id="69">
-<td><a id="l69" class='ln'>69</a></td><td><span class="br">}</span> <a id="69c3" class="tk">ZCE_PI_backCalc_fixdt_e</a>;</td></tr>
+<td><a id="l69" class='ln'>69</a></td><td><span class="br">}</span> <a id="69c3" class="tk">ZCE_PI_backCalc_fixdt_n</a>;</td></tr>
 <tr name="70" id="70">
 <td><a id="l70" class='ln'>70</a></td><td></td></tr>
 <tr name="71" id="71">
@@ -155,973 +155,941 @@
 <tr name="72" id="72">
 <td><a id="l72" class='ln'>72</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="73" id="73">
-<td><a id="l73" class='ln'>73</a></td><td>  <a id="73c3" class="tk">DW_PI_backCalc_fixdt_i</a> <a id="73c26" class="tk">PI_backCalc_fixdt1</a>;<span class="ct">/* '&lt;S95&gt;/PI_backCalc_fixdt1' */</span></td></tr>
+<td><a id="l73" class='ln'>73</a></td><td>  <a id="73c3" class="tk">DW_PI_backCalc_fixdt_j</a> <a id="73c26" class="tk">PI_backCalc_fixdt1</a>;<span class="ct">/* '&lt;S85&gt;/PI_backCalc_fixdt1' */</span></td></tr>
 <tr name="74" id="74">
-<td><a id="l74" class='ln'>74</a></td><td>  <a id="74c3" class="tk">DW_PI_backCalc_fixdt_i</a> <a id="74c26" class="tk">PI_backCalc_fixdt_o3</a>;<span class="ct">/* '&lt;S95&gt;/PI_backCalc_fixdt' */</span></td></tr>
+<td><a id="l74" class='ln'>74</a></td><td>  <a id="74c3" class="tk">DW_PI_backCalc_fixdt_j</a> <a id="74c26" class="tk">PI_backCalc_fixdt_ig</a>;<span class="ct">/* '&lt;S85&gt;/PI_backCalc_fixdt' */</span></td></tr>
 <tr name="75" id="75">
-<td><a id="l75" class='ln'>75</a></td><td>  <a id="75c3" class="tk">DW_PI_backCalc_fixdt</a> <a id="75c24" class="tk">PI_Speed</a>;       <span class="ct">/* '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l75" class='ln'>75</a></td><td>  <a id="75c3" class="tk">DW_PI_backCalc_fixdt</a> <a id="75c24" class="tk">PI_Speed</a>;       <span class="ct">/* '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="76" id="76">
-<td><a id="l76" class='ln'>76</a></td><td>  <a id="76c3" class="tk">DW_Low_Pass_Filter</a> <a id="76c22" class="tk">Low_Pass_Filter_h</a>;<span class="ct">/* '&lt;S76&gt;/Low_Pass_Filter' */</span></td></tr>
+<td><a id="l76" class='ln'>76</a></td><td>  <a id="76c3" class="tk">DW_Low_Pass_Filter</a> <a id="76c22" class="tk">Low_Pass_Filter_e</a>;<span class="ct">/* '&lt;S68&gt;/Low_Pass_Filter' */</span></td></tr>
 <tr name="77" id="77">
-<td><a id="l77" class='ln'>77</a></td><td>  <a id="77c3" class="tk">DW_Low_Pass_Filter</a> <a id="77c22" class="tk">Low_Pass_Filter_d</a>;<span class="ct">/* '&lt;S48&gt;/Low_Pass_Filter' */</span></td></tr>
+<td><a id="l77" class='ln'>77</a></td><td>  <a id="77c3" class="tk">DW_Low_Pass_Filter</a> <a id="77c22" class="tk">Low_Pass_Filter_l</a>;<span class="ct">/* '&lt;S39&gt;/Low_Pass_Filter' */</span></td></tr>
 <tr name="78" id="78">
-<td><a id="l78" class='ln'>78</a></td><td>  <a id="78c3" class="tk">int32_T</a> <a id="78c11" class="tk">Merge1</a>;                      <span class="ct">/* '&lt;S26&gt;/Merge1' */</span></td></tr>
+<td><a id="l78" class='ln'>78</a></td><td>  <a id="78c3" class="tk">int32_T</a> <a id="78c11" class="tk">Divide11</a>;                    <span class="ct">/* '&lt;S29&gt;/Divide11' */</span></td></tr>
 <tr name="79" id="79">
-<td><a id="l79" class='ln'>79</a></td><td>  <a id="79c3" class="tk">int32_T</a> <a id="79c11" class="tk">Divide11</a>;                    <span class="ct">/* '&lt;S20&gt;/Divide11' */</span></td></tr>
+<td><a id="l79" class='ln'>79</a></td><td>  <a id="79c3" class="tk">int32_T</a> <a id="79c11" class="tk">UnitDelay_DSTATE_l</a>;          <span class="ct">/* '&lt;S69&gt;/Unit Delay' */</span></td></tr>
 <tr name="80" id="80">
-<td><a id="l80" class='ln'>80</a></td><td>  <a id="80c3" class="tk">int32_T</a> <a id="80c11" class="tk">UnitDelay_DSTATE</a>;            <span class="ct">/* '&lt;S77&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l80" class='ln'>80</a></td><td>  <a id="80c3" class="tk">int32_T</a> <a id="80c11" class="tk">ResettableDelay_DSTATE</a>;      <span class="ct">/* '&lt;S70&gt;/Resettable Delay' */</span></td></tr>
 <tr name="81" id="81">
-<td><a id="l81" class='ln'>81</a></td><td>  <a id="81c3" class="tk">int32_T</a> <a id="81c11" class="tk">ResettableDelay_DSTATE</a>;      <span class="ct">/* '&lt;S78&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l81" class='ln'>81</a></td><td>  <a id="81c3" class="tk">uint32_T</a> <a id="81c12" class="tk">OutportBufferFordelta_count</a>;</td></tr>
 <tr name="82" id="82">
-<td><a id="l82" class='ln'>82</a></td><td>  <a id="82c3" class="tk">int32_T</a> <a id="82c11" class="tk">UnitDelay_DSTATE_n</a>;          <span class="ct">/* '&lt;S92&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l82" class='ln'>82</a></td><td>  <a id="82c3" class="tk">uint32_T</a> <a id="82c12" class="tk">i_count</a>;                    <span class="ct">/* '&lt;S16&gt;/i_count' */</span></td></tr>
 <tr name="83" id="83">
-<td><a id="l83" class='ln'>83</a></td><td>  <a id="83c3" class="tk">int32_T</a> <a id="83c11" class="tk">ResettableDelay_DSTATE_c</a>;    <span class="ct">/* '&lt;S93&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l83" class='ln'>83</a></td><td>  <a id="83c3" class="tk">uint32_T</a> <a id="83c12" class="tk">Switch4</a>;                    <span class="ct">/* '&lt;S29&gt;/Switch4' */</span></td></tr>
 <tr name="84" id="84">
-<td><a id="l84" class='ln'>84</a></td><td>  <a id="84c3" class="tk">uint32_T</a> <a id="84c12" class="tk">z_counterRawPrev</a>;           <span class="ct">/* '&lt;S20&gt;/z_counterRawPrev' */</span></td></tr>
+<td><a id="l84" class='ln'>84</a></td><td>  <a id="84c3" class="tk">uint32_T</a> <a id="84c12" class="tk">UnitDelay1_DSTATE</a>;          <span class="ct">/* '&lt;S38&gt;/UnitDelay1' */</span></td></tr>
 <tr name="85" id="85">
-<td><a id="l85" class='ln'>85</a></td><td>  <a id="85c3" class="tk">uint32_T</a> <a id="85c12" class="tk">UnitDelay3_DSTATE</a>;          <span class="ct">/* '&lt;S14&gt;/UnitDelay3' */</span></td></tr>
+<td><a id="l85" class='ln'>85</a></td><td>  <a id="85c3" class="tk">uint32_T</a> <a id="85c12" class="tk">UnitDelay_DSTATE</a>;           <span class="ct">/* '&lt;S29&gt;/Unit Delay' */</span></td></tr>
 <tr name="86" id="86">
-<td><a id="l86" class='ln'>86</a></td><td>  <a id="86c3" class="tk">uint32_T</a> <a id="86c12" class="tk">UnitDelay1_DSTATE</a>;          <span class="ct">/* '&lt;S7&gt;/UnitDelay1' */</span></td></tr>
+<td><a id="l86" class='ln'>86</a></td><td>  <a id="86c3" class="tk">uint32_T</a> <a id="86c12" class="tk">UnitDelay2_DSTATE</a>;          <span class="ct">/* '&lt;S29&gt;/UnitDelay2' */</span></td></tr>
 <tr name="87" id="87">
-<td><a id="l87" class='ln'>87</a></td><td>  <a id="87c3" class="tk">uint32_T</a> <a id="87c12" class="tk">UnitDelay2_DSTATE</a>;          <span class="ct">/* '&lt;S20&gt;/UnitDelay2' */</span></td></tr>
+<td><a id="l87" class='ln'>87</a></td><td>  <a id="87c3" class="tk">uint32_T</a> <a id="87c12" class="tk">UnitDelay3_DSTATE</a>;          <span class="ct">/* '&lt;S29&gt;/UnitDelay3' */</span></td></tr>
 <tr name="88" id="88">
-<td><a id="l88" class='ln'>88</a></td><td>  <a id="88c3" class="tk">uint32_T</a> <a id="88c12" class="tk">UnitDelay3_DSTATE_l</a>;        <span class="ct">/* '&lt;S20&gt;/UnitDelay3' */</span></td></tr>
+<td><a id="l88" class='ln'>88</a></td><td>  <a id="88c3" class="tk">uint32_T</a> <a id="88c12" class="tk">UnitDelay5_DSTATE</a>;          <span class="ct">/* '&lt;S29&gt;/UnitDelay5' */</span></td></tr>
 <tr name="89" id="89">
-<td><a id="l89" class='ln'>89</a></td><td>  <a id="89c3" class="tk">uint32_T</a> <a id="89c12" class="tk">UnitDelay5_DSTATE</a>;          <span class="ct">/* '&lt;S20&gt;/UnitDelay5' */</span></td></tr>
+<td><a id="l89" class='ln'>89</a></td><td>  <a id="89c3" class="tk">uint32_T</a> <a id="89c12" class="tk">UnitDelay4_DSTATE</a>;          <span class="ct">/* '&lt;S20&gt;/UnitDelay4' */</span></td></tr>
 <tr name="90" id="90">
-<td><a id="l90" class='ln'>90</a></td><td>  <a id="90c3" class="tk">uint32_T</a> <a id="90c12" class="tk">UnitDelay4_DSTATE</a>;          <span class="ct">/* '&lt;S14&gt;/UnitDelay4' */</span></td></tr>
+<td><a id="l90" class='ln'>90</a></td><td>  <a id="90c3" class="tk">uint32_T</a> <a id="90c12" class="tk">UnitDelay4_DSTATE_o</a>;        <span class="ct">/* '&lt;S29&gt;/UnitDelay4' */</span></td></tr>
 <tr name="91" id="91">
-<td><a id="l91" class='ln'>91</a></td><td>  <a id="91c3" class="tk">int16_T</a> <a id="91c11" class="tk">Merge</a>[2];                    <span class="ct">/* '&lt;S26&gt;/Merge' */</span></td></tr>
+<td><a id="l91" class='ln'>91</a></td><td>  <a id="91c3" class="tk">int16_T</a> <a id="91c11" class="tk">Switch</a>[2];                   <span class="ct">/* '&lt;S111&gt;/Switch' */</span></td></tr>
 <tr name="92" id="92">
-<td><a id="l92" class='ln'>92</a></td><td>  <a id="92c3" class="tk">int16_T</a> <a id="92c11" class="tk">Merge_c</a>[2];                  <span class="ct">/* '&lt;S75&gt;/Merge' */</span></td></tr>
+<td><a id="l92" class='ln'>92</a></td><td>  <a id="92c3" class="tk">int16_T</a> <a id="92c11" class="tk">Merge_i</a>[2];                  <span class="ct">/* '&lt;S67&gt;/Merge' */</span></td></tr>
 <tr name="93" id="93">
-<td><a id="l93" class='ln'>93</a></td><td>  <a id="93c3" class="tk">int16_T</a> <a id="93c11" class="tk">UnitDelay1_DSTATE_f</a>[2];      <span class="ct">/* '&lt;S6&gt;/UnitDelay1' */</span></td></tr>
+<td><a id="l93" class='ln'>93</a></td><td>  <a id="93c3" class="tk">int16_T</a> <a id="93c11" class="tk">UnitDelay_DSTATE_k</a>[2];       <span class="ct">/* '&lt;S1&gt;/Unit Delay' */</span></td></tr>
 <tr name="94" id="94">
-<td><a id="l94" class='ln'>94</a></td><td>  <a id="94c3" class="tk">int16_T</a> <a id="94c11" class="tk">Divide</a>;                      <span class="ct">/* '&lt;S33&gt;/Divide' */</span></td></tr>
+<td><a id="l94" class='ln'>94</a></td><td>  <a id="94c3" class="tk">int16_T</a> <a id="94c11" class="tk">UnitDelay1_DSTATE_o</a>[2];      <span class="ct">/* '&lt;S35&gt;/UnitDelay1' */</span></td></tr>
 <tr name="95" id="95">
-<td><a id="l95" class='ln'>95</a></td><td>  <a id="95c3" class="tk">int16_T</a> <a id="95c11" class="tk">Max</a>;                         <span class="ct">/* '&lt;S116&gt;/Max' */</span></td></tr>
+<td><a id="l95" class='ln'>95</a></td><td>  <a id="95c3" class="tk">int16_T</a> <a id="95c11" class="tk">UnitDelay_DSTATE_e</a>[2];       <span class="ct">/* '&lt;S4&gt;/Unit Delay' */</span></td></tr>
 <tr name="96" id="96">
-<td><a id="l96" class='ln'>96</a></td><td>  <a id="96c3" class="tk">int16_T</a> <a id="96c11" class="tk">Max1</a>;                        <span class="ct">/* '&lt;S116&gt;/Max1' */</span></td></tr>
+<td><a id="l96" class='ln'>96</a></td><td>  <a id="96c3" class="tk">int16_T</a> <a id="96c11" class="tk">Divide</a>;                      <span class="ct">/* '&lt;S120&gt;/Divide' */</span></td></tr>
 <tr name="97" id="97">
-<td><a id="l97" class='ln'>97</a></td><td>  <a id="97c3" class="tk">int16_T</a> <a id="97c11" class="tk">Max_g</a>;                       <span class="ct">/* '&lt;S109&gt;/Max' */</span></td></tr>
+<td><a id="l97" class='ln'>97</a></td><td>  <a id="97c3" class="tk">int16_T</a> <a id="97c11" class="tk">Divide_o</a>;                    <span class="ct">/* '&lt;S116&gt;/Divide' */</span></td></tr>
 <tr name="98" id="98">
-<td><a id="l98" class='ln'>98</a></td><td>  <a id="98c3" class="tk">int16_T</a> <a id="98c11" class="tk">Max1_j</a>;                      <span class="ct">/* '&lt;S109&gt;/Max1' */</span></td></tr>
+<td><a id="l98" class='ln'>98</a></td><td>  <a id="98c3" class="tk">int16_T</a> <a id="98c11" class="tk">Max</a>;                         <span class="ct">/* '&lt;S120&gt;/Max' */</span></td></tr>
 <tr name="99" id="99">
-<td><a id="l99" class='ln'>99</a></td><td>  <a id="99c3" class="tk">int16_T</a> <a id="99c11" class="tk">Merge_f</a>;                     <span class="ct">/* '&lt;S73&gt;/Merge' */</span></td></tr>
+<td><a id="l99" class='ln'>99</a></td><td>  <a id="99c3" class="tk">int16_T</a> <a id="99c11" class="tk">Max1</a>;                        <span class="ct">/* '&lt;S120&gt;/Max1' */</span></td></tr>
 <tr name="100" id="100">
-<td><a id="l100" class='ln'>100</a></td><td>  <a id="100c3" class="tk">int16_T</a> <a id="100c11" class="tk">Switch</a>;                      <span class="ct">/* '&lt;S76&gt;/Switch' */</span></td></tr>
+<td><a id="l100" class='ln'>100</a></td><td>  <a id="100c3" class="tk">int16_T</a> <a id="100c11" class="tk">Max_l</a>;                       <span class="ct">/* '&lt;S116&gt;/Max' */</span></td></tr>
 <tr name="101" id="101">
-<td><a id="l101" class='ln'>101</a></td><td>  <a id="101c3" class="tk">int16_T</a> <a id="101c11" class="tk">Switch2</a>;                     <span class="ct">/* '&lt;S84&gt;/Switch2' */</span></td></tr>
+<td><a id="l101" class='ln'>101</a></td><td>  <a id="101c3" class="tk">int16_T</a> <a id="101c11" class="tk">Max1_j</a>;                      <span class="ct">/* '&lt;S116&gt;/Max1' */</span></td></tr>
 <tr name="102" id="102">
-<td><a id="l102" class='ln'>102</a></td><td>  <a id="102c3" class="tk">int16_T</a> <a id="102c11" class="tk">r_currTgt</a>;                   <span class="ct">/* '&lt;S30&gt;/r_currTgt' */</span></td></tr>
+<td><a id="l102" class='ln'>102</a></td><td>  <a id="102c3" class="tk">int16_T</a> <a id="102c11" class="tk">Max_p</a>;                       <span class="ct">/* '&lt;S106&gt;/Max' */</span></td></tr>
 <tr name="103" id="103">
-<td><a id="l103" class='ln'>103</a></td><td>  <a id="103c3" class="tk">int16_T</a> <a id="103c11" class="tk">Max_p</a>;                       <span class="ct">/* '&lt;S33&gt;/Max' */</span></td></tr>
+<td><a id="l103" class='ln'>103</a></td><td>  <a id="103c3" class="tk">int16_T</a> <a id="103c11" class="tk">Max1_i</a>;                      <span class="ct">/* '&lt;S106&gt;/Max1' */</span></td></tr>
 <tr name="104" id="104">
-<td><a id="l104" class='ln'>104</a></td><td>  <a id="104c3" class="tk">int16_T</a> <a id="104c11" class="tk">Max1_g</a>;                      <span class="ct">/* '&lt;S33&gt;/Max1' */</span></td></tr>
+<td><a id="l104" class='ln'>104</a></td><td>  <a id="104c3" class="tk">int16_T</a> <a id="104c11" class="tk">Max_i</a>;                       <span class="ct">/* '&lt;S99&gt;/Max' */</span></td></tr>
 <tr name="105" id="105">
-<td><a id="l105" class='ln'>105</a></td><td>  <a id="105c3" class="tk">int16_T</a> <a id="105c11" class="tk">Merge_i</a>;                     <span class="ct">/* '&lt;S3&gt;/Merge' */</span></td></tr>
+<td><a id="l105" class='ln'>105</a></td><td>  <a id="105c3" class="tk">int16_T</a> <a id="105c11" class="tk">Max1_e</a>;                      <span class="ct">/* '&lt;S99&gt;/Max1' */</span></td></tr>
 <tr name="106" id="106">
-<td><a id="l106" class='ln'>106</a></td><td>  <a id="106c3" class="tk">int16_T</a> <a id="106c11" class="tk">Divide_l</a>;                    <span class="ct">/* '&lt;S116&gt;/Divide' */</span></td></tr>
+<td><a id="l106" class='ln'>106</a></td><td>  <a id="106c3" class="tk">int16_T</a> <a id="106c11" class="tk">Merge</a>;                       <span class="ct">/* '&lt;S65&gt;/Merge' */</span></td></tr>
 <tr name="107" id="107">
-<td><a id="l107" class='ln'>107</a></td><td>  <a id="107c3" class="tk">int16_T</a> <a id="107c11" class="tk">Divide_n</a>;                    <span class="ct">/* '&lt;S109&gt;/Divide' */</span></td></tr>
+<td><a id="l107" class='ln'>107</a></td><td>  <a id="107c3" class="tk">int16_T</a> <a id="107c11" class="tk">Switch_p</a>;                    <span class="ct">/* '&lt;S68&gt;/Switch' */</span></td></tr>
 <tr name="108" id="108">
-<td><a id="l108" class='ln'>108</a></td><td>  <a id="108c3" class="tk">int16_T</a> <a id="108c11" class="tk">UnitDelay_DSTATE_h</a>;          <span class="ct">/* '&lt;S106&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l108" class='ln'>108</a></td><td>  <a id="108c3" class="tk">int16_T</a> <a id="108c11" class="tk">Switch2</a>;                     <span class="ct">/* '&lt;S76&gt;/Switch2' */</span></td></tr>
 <tr name="109" id="109">
-<td><a id="l109" class='ln'>109</a></td><td>  <a id="109c3" class="tk">int16_T</a> <a id="109c11" class="tk">UnitDelay1_DSTATE_i</a>;         <span class="ct">/* '&lt;S97&gt;/Unit Delay1' */</span></td></tr>
+<td><a id="l109" class='ln'>109</a></td><td>  <a id="109c3" class="tk">int16_T</a> <a id="109c11" class="tk">Divide_g</a>;                    <span class="ct">/* '&lt;S106&gt;/Divide' */</span></td></tr>
 <tr name="110" id="110">
-<td><a id="l110" class='ln'>110</a></td><td>  <a id="110c3" class="tk">int16_T</a> <a id="110c11" class="tk">UnitDelay_DSTATE_b</a>;          <span class="ct">/* '&lt;S112&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l110" class='ln'>110</a></td><td>  <a id="110c3" class="tk">int16_T</a> <a id="110c11" class="tk">Divide_d</a>;                    <span class="ct">/* '&lt;S99&gt;/Divide' */</span></td></tr>
 <tr name="111" id="111">
-<td><a id="l111" class='ln'>111</a></td><td>  <a id="111c3" class="tk">int16_T</a> <a id="111c11" class="tk">UnitDelay_DSTATE_g</a>;          <span class="ct">/* '&lt;S108&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l111" class='ln'>111</a></td><td>  <a id="111c3" class="tk">int16_T</a> <a id="111c11" class="tk">UnitDelay_DSTATE_l5</a>;         <span class="ct">/* '&lt;S96&gt;/UnitDelay' */</span></td></tr>
 <tr name="112" id="112">
-<td><a id="l112" class='ln'>112</a></td><td>  <a id="112c3" class="tk">int16_T</a> <a id="112c11" class="tk">UnitDelay_DSTATE_o</a>;          <span class="ct">/* '&lt;S113&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l112" class='ln'>112</a></td><td>  <a id="112c3" class="tk">int16_T</a> <a id="112c11" class="tk">UnitDelay1_DSTATE_j</a>;         <span class="ct">/* '&lt;S87&gt;/Unit Delay1' */</span></td></tr>
 <tr name="113" id="113">
-<td><a id="l113" class='ln'>113</a></td><td>  <a id="113c3" class="tk">int16_T</a> <a id="113c11" class="tk">UnitDelay1_DSTATE_b</a>;         <span class="ct">/* '&lt;S98&gt;/Unit Delay1' */</span></td></tr>
+<td><a id="l113" class='ln'>113</a></td><td>  <a id="113c3" class="tk">int16_T</a> <a id="113c11" class="tk">UnitDelay_DSTATE_g</a>;          <span class="ct">/* '&lt;S102&gt;/UnitDelay' */</span></td></tr>
 <tr name="114" id="114">
-<td><a id="l114" class='ln'>114</a></td><td>  <a id="114c3" class="tk">int16_T</a> <a id="114c11" class="tk">UnitDelay_DSTATE_d</a>;          <span class="ct">/* '&lt;S119&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l114" class='ln'>114</a></td><td>  <a id="114c3" class="tk">int16_T</a> <a id="114c11" class="tk">UnitDelay_DSTATE_b</a>;          <span class="ct">/* '&lt;S98&gt;/Unit Delay' */</span></td></tr>
 <tr name="115" id="115">
-<td><a id="l115" class='ln'>115</a></td><td>  <a id="115c3" class="tk">int16_T</a> <a id="115c11" class="tk">UnitDelay_DSTATE_a</a>;          <span class="ct">/* '&lt;S115&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l115" class='ln'>115</a></td><td>  <a id="115c3" class="tk">int16_T</a> <a id="115c11" class="tk">UnitDelay_DSTATE_er</a>;         <span class="ct">/* '&lt;S103&gt;/UnitDelay' */</span></td></tr>
 <tr name="116" id="116">
-<td><a id="l116" class='ln'>116</a></td><td>  <a id="116c3" class="tk">int16_T</a> <a id="116c11" class="tk">UnitDelay1_DSTATE_g</a>;         <span class="ct">/* '&lt;S70&gt;/Unit Delay1' */</span></td></tr>
+<td><a id="l116" class='ln'>116</a></td><td>  <a id="116c3" class="tk">int16_T</a> <a id="116c11" class="tk">UnitDelay1_DSTATE_p</a>;         <span class="ct">/* '&lt;S88&gt;/Unit Delay1' */</span></td></tr>
 <tr name="117" id="117">
-<td><a id="l117" class='ln'>117</a></td><td>  <a id="117c3" class="tk">int16_T</a> <a id="117c11" class="tk">Delay_DSTATE</a>;                <span class="ct">/* '&lt;S88&gt;/Delay' */</span></td></tr>
+<td><a id="l117" class='ln'>117</a></td><td>  <a id="117c3" class="tk">int16_T</a> <a id="117c11" class="tk">UnitDelay_DSTATE_o</a>;          <span class="ct">/* '&lt;S109&gt;/UnitDelay' */</span></td></tr>
 <tr name="118" id="118">
-<td><a id="l118" class='ln'>118</a></td><td>  <a id="118c3" class="tk">int16_T</a> <a id="118c11" class="tk">UnitDelay_DSTATE_l</a>;          <span class="ct">/* '&lt;S87&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l118" class='ln'>118</a></td><td>  <a id="118c3" class="tk">int16_T</a> <a id="118c11" class="tk">UnitDelay_DSTATE_d</a>;          <span class="ct">/* '&lt;S105&gt;/Unit Delay' */</span></td></tr>
 <tr name="119" id="119">
-<td><a id="l119" class='ln'>119</a></td><td>  <a id="119c3" class="tk">int16_T</a> <a id="119c11" class="tk">UnitDelay_DSTATE_e</a>;          <span class="ct">/* '&lt;S31&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l119" class='ln'>119</a></td><td>  <a id="119c3" class="tk">int16_T</a> <a id="119c11" class="tk">UnitDelay_DSTATE_lz</a>;         <span class="ct">/* '&lt;S112&gt;/UnitDelay' */</span></td></tr>
 <tr name="120" id="120">
-<td><a id="l120" class='ln'>120</a></td><td>  <a id="120c3" class="tk">int16_T</a> <a id="120c11" class="tk">UnitDelay_DSTATE_fv</a>;         <span class="ct">/* '&lt;S36&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l120" class='ln'>120</a></td><td>  <a id="120c3" class="tk">int16_T</a> <a id="120c11" class="tk">UnitDelay_DSTATE_j</a>;          <span class="ct">/* '&lt;S119&gt;/UnitDelay' */</span></td></tr>
 <tr name="121" id="121">
-<td><a id="l121" class='ln'>121</a></td><td>  <a id="121c3" class="tk">int16_T</a> <a id="121c11" class="tk">UnitDelay_DSTATE_i</a>;          <span class="ct">/* '&lt;S32&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l121" class='ln'>121</a></td><td>  <a id="121c3" class="tk">int16_T</a> <a id="121c11" class="tk">UnitDelay_DSTATE_h</a>;          <span class="ct">/* '&lt;S113&gt;/Unit Delay' */</span></td></tr>
 <tr name="122" id="122">
-<td><a id="l122" class='ln'>122</a></td><td>  <a id="122c3" class="tk">uint16_T</a> <a id="122c12" class="tk">UnitDelay_DSTATE_f</a>;         <span class="ct">/* '&lt;S45&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l122" class='ln'>122</a></td><td>  <a id="122c3" class="tk">int16_T</a> <a id="122c11" class="tk">UnitDelay_DSTATE_n</a>;          <span class="ct">/* '&lt;S114&gt;/UnitDelay' */</span></td></tr>
 <tr name="123" id="123">
-<td><a id="l123" class='ln'>123</a></td><td>  <a id="123c3" class="tk">uint16_T</a> <a id="123c12" class="tk">UnitDelay_DSTATE_p</a>;         <span class="ct">/* '&lt;S47&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l123" class='ln'>123</a></td><td>  <a id="123c3" class="tk">int16_T</a> <a id="123c11" class="tk">UnitDelay_DSTATE_ox</a>;         <span class="ct">/* '&lt;S123&gt;/UnitDelay' */</span></td></tr>
 <tr name="124" id="124">
-<td><a id="l124" class='ln'>124</a></td><td>  <a id="124c3" class="tk">uint16_T</a> <a id="124c12" class="tk">UnitDelay2_DSTATE_f</a>;        <span class="ct">/* '&lt;S19&gt;/UnitDelay2' */</span></td></tr>
+<td><a id="l124" class='ln'>124</a></td><td>  <a id="124c3" class="tk">int16_T</a> <a id="124c11" class="tk">UnitDelay_DSTATE_gt</a>;         <span class="ct">/* '&lt;S115&gt;/Unit Delay' */</span></td></tr>
 <tr name="125" id="125">
-<td><a id="l125" class='ln'>125</a></td><td>  <a id="125c3" class="tk">uint16_T</a> <a id="125c12" class="tk">UnitDelay3_DSTATE_lh</a>;       <span class="ct">/* '&lt;S19&gt;/UnitDelay3' */</span></td></tr>
+<td><a id="l125" class='ln'>125</a></td><td>  <a id="125c3" class="tk">int16_T</a> <a id="125c11" class="tk">UnitDelay1_DSTATE_jp</a>;        <span class="ct">/* '&lt;S62&gt;/Unit Delay1' */</span></td></tr>
 <tr name="126" id="126">
-<td><a id="l126" class='ln'>126</a></td><td>  <a id="126c3" class="tk">uint16_T</a> <a id="126c12" class="tk">UnitDelay5_DSTATE_f</a>;        <span class="ct">/* '&lt;S19&gt;/UnitDelay5' */</span></td></tr>
+<td><a id="l126" class='ln'>126</a></td><td>  <a id="126c3" class="tk">int16_T</a> <a id="126c11" class="tk">Delay_DSTATE</a>;                <span class="ct">/* '&lt;S80&gt;/Delay' */</span></td></tr>
 <tr name="127" id="127">
-<td><a id="l127" class='ln'>127</a></td><td>  <a id="127c3" class="tk">uint16_T</a> <a id="127c12" class="tk">UnitDelay1_DSTATE_c</a>;        <span class="ct">/* '&lt;S74&gt;/Unit Delay1' */</span></td></tr>
+<td><a id="l127" class='ln'>127</a></td><td>  <a id="127c3" class="tk">int16_T</a> <a id="127c11" class="tk">UnitDelay_DSTATE_di</a>;         <span class="ct">/* '&lt;S79&gt;/Unit Delay' */</span></td></tr>
 <tr name="128" id="128">
-<td><a id="l128" class='ln'>128</a></td><td>  <a id="128c3" class="tk">int8_T</a> <a id="128c10" class="tk">Switch2_i</a>;                    <span class="ct">/* '&lt;S8&gt;/Switch2' */</span></td></tr>
+<td><a id="l128" class='ln'>128</a></td><td>  <a id="128c3" class="tk">uint16_T</a> <a id="128c12" class="tk">UnitDelay2_DSTATE_o</a>;        <span class="ct">/* '&lt;S28&gt;/UnitDelay2' */</span></td></tr>
 <tr name="129" id="129">
-<td><a id="l129" class='ln'>129</a></td><td>  <a id="129c3" class="tk">int8_T</a> <a id="129c10" class="tk">UnitDelay2_DSTATE_j</a>;          <span class="ct">/* '&lt;S8&gt;/UnitDelay2' */</span></td></tr>
+<td><a id="l129" class='ln'>129</a></td><td>  <a id="129c3" class="tk">uint16_T</a> <a id="129c12" class="tk">UnitDelay3_DSTATE_p</a>;        <span class="ct">/* '&lt;S28&gt;/UnitDelay3' */</span></td></tr>
 <tr name="130" id="130">
-<td><a id="l130" class='ln'>130</a></td><td>  <a id="130c3" class="tk">int8_T</a> <a id="130c10" class="tk">If_ActiveSubsystem_h</a>;         <span class="ct">/* '&lt;S73&gt;/If' */</span></td></tr>
+<td><a id="l130" class='ln'>130</a></td><td>  <a id="130c3" class="tk">uint16_T</a> <a id="130c12" class="tk">UnitDelay5_DSTATE_m</a>;        <span class="ct">/* '&lt;S28&gt;/UnitDelay5' */</span></td></tr>
 <tr name="131" id="131">
-<td><a id="l131" class='ln'>131</a></td><td>  <a id="131c3" class="tk">uint8_T</a> <a id="131c11" class="tk">UnitDelay_DSTATE_j</a>;          <span class="ct">/* '&lt;S37&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l131" class='ln'>131</a></td><td>  <a id="131c3" class="tk">uint16_T</a> <a id="131c12" class="tk">UnitDelay_DSTATE_i</a>;         <span class="ct">/* '&lt;S13&gt;/UnitDelay' */</span></td></tr>
 <tr name="132" id="132">
-<td><a id="l132" class='ln'>132</a></td><td>  <a id="132c3" class="tk">uint8_T</a> <a id="132c11" class="tk">Delay_DSTATE_d</a>;              <span class="ct">/* '&lt;S9&gt;/Delay' */</span></td></tr>
+<td><a id="l132" class='ln'>132</a></td><td>  <a id="132c3" class="tk">uint16_T</a> <a id="132c12" class="tk">UnitDelay_DSTATE_m</a>;         <span class="ct">/* '&lt;S15&gt;/UnitDelay' */</span></td></tr>
 <tr name="133" id="133">
-<td><a id="l133" class='ln'>133</a></td><td>  <a id="133c3" class="tk">uint8_T</a> <a id="133c11" class="tk">Delay1_DSTATE</a>;               <span class="ct">/* '&lt;S9&gt;/Delay1' */</span></td></tr>
+<td><a id="l133" class='ln'>133</a></td><td>  <a id="133c3" class="tk">uint16_T</a> <a id="133c12" class="tk">UnitDelay1_DSTATE_pl</a>;       <span class="ct">/* '&lt;S66&gt;/Unit Delay1' */</span></td></tr>
 <tr name="134" id="134">
-<td><a id="l134" class='ln'>134</a></td><td>  <a id="134c3" class="tk">uint8_T</a> <a id="134c11" class="tk">Delay2_DSTATE</a>;               <span class="ct">/* '&lt;S9&gt;/Delay2' */</span></td></tr>
+<td><a id="l134" class='ln'>134</a></td><td>  <a id="134c3" class="tk">int8_T</a> <a id="134c10" class="tk">UnitDelay3</a>;                   <span class="ct">/* '&lt;S16&gt;/UnitDelay3' */</span></td></tr>
 <tr name="135" id="135">
-<td><a id="l135" class='ln'>135</a></td><td>  <a id="135c3" class="tk">uint8_T</a> <a id="135c11" class="tk">UnitDelay_DSTATE_bm</a>;         <span class="ct">/* '&lt;S54&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l135" class='ln'>135</a></td><td>  <a id="135c3" class="tk">int8_T</a> <a id="135c10" class="tk">Switch2_o</a>;                    <span class="ct">/* '&lt;S16&gt;/Switch2' */</span></td></tr>
 <tr name="136" id="136">
-<td><a id="l136" class='ln'>136</a></td><td>  <a id="136c3" class="tk">uint8_T</a> <a id="136c11" class="tk">UnitDelay_DSTATE_p2</a>;         <span class="ct">/* '&lt;S70&gt;/Unit Delay' */</span></td></tr>
+<td><a id="l136" class='ln'>136</a></td><td>  <a id="136c3" class="tk">int8_T</a> <a id="136c10" class="tk">UnitDelay2_DSTATE_i</a>;          <span class="ct">/* '&lt;S16&gt;/UnitDelay2' */</span></td></tr>
 <tr name="137" id="137">
-<td><a id="l137" class='ln'>137</a></td><td>  <a id="137c3" class="tk">uint8_T</a> <a id="137c11" class="tk">icLoad</a>;                      <span class="ct">/* '&lt;S78&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l137" class='ln'>137</a></td><td>  <a id="137c3" class="tk">int8_T</a> <a id="137c10" class="tk">If_ActiveSubsystem_k</a>;         <span class="ct">/* '&lt;S65&gt;/If' */</span></td></tr>
 <tr name="138" id="138">
-<td><a id="l138" class='ln'>138</a></td><td>  <a id="138c3" class="tk">uint8_T</a> <a id="138c11" class="tk">icLoad_p</a>;                    <span class="ct">/* '&lt;S88&gt;/Delay' */</span></td></tr>
+<td><a id="l138" class='ln'>138</a></td><td>  <a id="138c3" class="tk">uint8_T</a> <a id="138c11" class="tk">Delay_DSTATE_p</a>;              <span class="ct">/* '&lt;S17&gt;/Delay' */</span></td></tr>
 <tr name="139" id="139">
-<td><a id="l139" class='ln'>139</a></td><td>  <a id="139c3" class="tk">uint8_T</a> <a id="139c11" class="tk">icLoad_k</a>;                    <span class="ct">/* '&lt;S93&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l139" class='ln'>139</a></td><td>  <a id="139c3" class="tk">uint8_T</a> <a id="139c11" class="tk">Delay1_DSTATE</a>;               <span class="ct">/* '&lt;S17&gt;/Delay1' */</span></td></tr>
 <tr name="140" id="140">
-<td><a id="l140" class='ln'>140</a></td><td>  <a id="140c3" class="tk">uint8_T</a> <a id="140c11" class="tk">is_active_c5_PMSM_Controller</a>;<span class="ct">/* '&lt;S4&gt;/Control_Mode_Manager' */</span></td></tr>
+<td><a id="l140" class='ln'>140</a></td><td>  <a id="140c3" class="tk">uint8_T</a> <a id="140c11" class="tk">Delay2_DSTATE</a>;               <span class="ct">/* '&lt;S17&gt;/Delay2' */</span></td></tr>
 <tr name="141" id="141">
-<td><a id="l141" class='ln'>141</a></td><td>  <a id="141c3" class="tk">uint8_T</a> <a id="141c11" class="tk">is_c5_PMSM_Controller</a>;       <span class="ct">/* '&lt;S4&gt;/Control_Mode_Manager' */</span></td></tr>
+<td><a id="l141" class='ln'>141</a></td><td>  <a id="141c3" class="tk">uint8_T</a> <a id="141c11" class="tk">UnitDelay_DSTATE_p</a>;          <span class="ct">/* '&lt;S5&gt;/UnitDelay' */</span></td></tr>
 <tr name="142" id="142">
-<td><a id="l142" class='ln'>142</a></td><td>  <a id="142c3" class="tk">uint8_T</a> <a id="142c11" class="tk">is_ACTIVE</a>;                   <span class="ct">/* '&lt;S4&gt;/Control_Mode_Manager' */</span></td></tr>
+<td><a id="l142" class='ln'>142</a></td><td>  <a id="142c3" class="tk">uint8_T</a> <a id="142c11" class="tk">UnitDelay_DSTATE_h3</a>;         <span class="ct">/* '&lt;S45&gt;/Unit Delay' */</span></td></tr>
 <tr name="143" id="143">
-<td><a id="l143" class='ln'>143</a></td><td>  <a id="143c3" class="tk">boolean_T</a> <a id="143c13" class="tk">Compare</a>;                   <span class="ct">/* '&lt;S21&gt;/Compare' */</span></td></tr>
+<td><a id="l143" class='ln'>143</a></td><td>  <a id="143c3" class="tk">uint8_T</a> <a id="143c11" class="tk">UnitDelay_DSTATE_lv</a>;         <span class="ct">/* '&lt;S62&gt;/Unit Delay' */</span></td></tr>
 <tr name="144" id="144">
-<td><a id="l144" class='ln'>144</a></td><td>  <a id="144c3" class="tk">boolean_T</a> <a id="144c13" class="tk">UnitDelay_DSTATE_k</a>;        <span class="ct">/* '&lt;S38&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l144" class='ln'>144</a></td><td>  <a id="144c3" class="tk">uint8_T</a> <a id="144c11" class="tk">UnitDelay1_DSTATE_k</a>;         <span class="ct">/* '&lt;S29&gt;/Unit Delay1' */</span></td></tr>
 <tr name="145" id="145">
-<td><a id="l145" class='ln'>145</a></td><td>  <a id="145c3" class="tk">boolean_T</a> <a id="145c13" class="tk">UnitDelay_DSTATE_nx</a>;       <span class="ct">/* '&lt;S42&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l145" class='ln'>145</a></td><td>  <a id="145c3" class="tk">uint8_T</a> <a id="145c11" class="tk">is_active_c11_PMSM_Controller</a>;<span class="ct">/* '&lt;S36&gt;/Control_Mode_Manager' */</span></td></tr>
 <tr name="146" id="146">
-<td><a id="l146" class='ln'>146</a></td><td>  <a id="146c3" class="tk">boolean_T</a> <a id="146c13" class="tk">UnitDelay_DSTATE_bv</a>;       <span class="ct">/* '&lt;S39&gt;/UnitDelay' */</span></td></tr>
+<td><a id="l146" class='ln'>146</a></td><td>  <a id="146c3" class="tk">uint8_T</a> <a id="146c11" class="tk">is_c11_PMSM_Controller</a>;      <span class="ct">/* '&lt;S36&gt;/Control_Mode_Manager' */</span></td></tr>
 <tr name="147" id="147">
-<td><a id="l147" class='ln'>147</a></td><td>  <a id="147c3" class="tk">boolean_T</a> <a id="147c13" class="tk">UnitDelay1_DSTATE_iv</a>;      <span class="ct">/* '&lt;S20&gt;/UnitDelay1' */</span></td></tr>
+<td><a id="l147" class='ln'>147</a></td><td>  <a id="147c3" class="tk">uint8_T</a> <a id="147c11" class="tk">is_ACTIVE</a>;                   <span class="ct">/* '&lt;S36&gt;/Control_Mode_Manager' */</span></td></tr>
 <tr name="148" id="148">
-<td><a id="l148" class='ln'>148</a></td><td>  <a id="148c3" class="tk">boolean_T</a> <a id="148c13" class="tk">n_SpeedCtrl_Mode</a>;          <span class="ct">/* '&lt;S25&gt;/n_SpeedCtrl' */</span></td></tr>
+<td><a id="l148" class='ln'>148</a></td><td>  <a id="148c3" class="tk">uint8_T</a> <a id="148c11" class="tk">icLoad</a>;                      <span class="ct">/* '&lt;S70&gt;/Resettable Delay' */</span></td></tr>
 <tr name="149" id="149">
-<td><a id="l149" class='ln'>149</a></td><td>  <a id="149c3" class="tk">boolean_T</a> <a id="149c13" class="tk">n_commDeacv_Mode</a>;          <span class="ct">/* '&lt;S19&gt;/n_commDeacv' */</span></td></tr>
+<td><a id="l149" class='ln'>149</a></td><td>  <a id="149c3" class="tk">uint8_T</a> <a id="149c11" class="tk">icLoad_i</a>;                    <span class="ct">/* '&lt;S80&gt;/Delay' */</span></td></tr>
 <tr name="150" id="150">
-<td><a id="l150" class='ln'>150</a></td><td><span class="br">}</span> <a id="150c3" class="tk">DW</a>;</td></tr>
+<td><a id="l150" class='ln'>150</a></td><td>  <a id="150c3" class="tk">boolean_T</a> <a id="150c13" class="tk">UnitDelay_DSTATE_gv</a>;       <span class="ct">/* '&lt;S6&gt;/UnitDelay' */</span></td></tr>
 <tr name="151" id="151">
-<td><a id="l151" class='ln'>151</a></td><td></td></tr>
+<td><a id="l151" class='ln'>151</a></td><td>  <a id="151c3" class="tk">boolean_T</a> <a id="151c13" class="tk">UnitDelay_DSTATE_oy</a>;       <span class="ct">/* '&lt;S10&gt;/UnitDelay' */</span></td></tr>
 <tr name="152" id="152">
-<td><a id="l152" class='ln'>152</a></td><td><span class="ct">/* Zero-crossing (trigger) state */</span></td></tr>
+<td><a id="l152" class='ln'>152</a></td><td>  <a id="152c3" class="tk">boolean_T</a> <a id="152c13" class="tk">UnitDelay_DSTATE_f</a>;        <span class="ct">/* '&lt;S7&gt;/UnitDelay' */</span></td></tr>
 <tr name="153" id="153">
-<td><a id="l153" class='ln'>153</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
+<td><a id="l153" class='ln'>153</a></td><td>  <a id="153c3" class="tk">boolean_T</a> <a id="153c13" class="tk">UnitDelay1_DSTATE_m</a>;       <span class="ct">/* '&lt;S29&gt;/UnitDelay1' */</span></td></tr>
 <tr name="154" id="154">
-<td><a id="l154" class='ln'>154</a></td><td>  <a id="154c3" class="tk">ZCE_PI_backCalc_fixdt_e</a> <a id="154c27" class="tk">PI_backCalc_fixdt1</a>;<span class="ct">/* '&lt;S95&gt;/PI_backCalc_fixdt1' */</span></td></tr>
+<td><a id="l154" class='ln'>154</a></td><td>  <a id="154c3" class="tk">boolean_T</a> <a id="154c13" class="tk">n_SpeedCtrl_Mode</a>;          <span class="ct">/* '&lt;S36&gt;/n_SpeedCtrl' */</span></td></tr>
 <tr name="155" id="155">
-<td><a id="l155" class='ln'>155</a></td><td>  <a id="155c3" class="tk">ZCE_PI_backCalc_fixdt_e</a> <a id="155c27" class="tk">PI_backCalc_fixdt_o3</a>;<span class="ct">/* '&lt;S95&gt;/PI_backCalc_fixdt' */</span></td></tr>
+<td><a id="l155" class='ln'>155</a></td><td>  <a id="155c3" class="tk">boolean_T</a> <a id="155c13" class="tk">dz_cntTrnsDet_Mode</a>;        <span class="ct">/* '&lt;S29&gt;/dz_cntTrnsDet' */</span></td></tr>
 <tr name="156" id="156">
-<td><a id="l156" class='ln'>156</a></td><td>  <a id="156c3" class="tk">ZCSigState</a> <a id="156c14" class="tk">ResettableDelay_Reset_ZCE_o</a>;<span class="ct">/* '&lt;S78&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l156" class='ln'>156</a></td><td>  <a id="156c3" class="tk">boolean_T</a> <a id="156c13" class="tk">n_commDeacv_Mode</a>;          <span class="ct">/* '&lt;S28&gt;/n_commDeacv' */</span></td></tr>
 <tr name="157" id="157">
-<td><a id="l157" class='ln'>157</a></td><td>  <a id="157c3" class="tk">ZCSigState</a> <a id="157c14" class="tk">ResettableDelay_Reset_ZCE_a</a>;<span class="ct">/* '&lt;S93&gt;/Resettable Delay' */</span></td></tr>
+<td><a id="l157" class='ln'>157</a></td><td><span class="br">}</span> <a id="157c3" class="tk">DW</a>;</td></tr>
 <tr name="158" id="158">
-<td><a id="l158" class='ln'>158</a></td><td>  <a id="158c3" class="tk">ZCE_PI_backCalc_fixdt</a> <a id="158c25" class="tk">PI_Speed</a>;      <span class="ct">/* '&lt;S87&gt;/PI_Speed' */</span></td></tr>
+<td><a id="l158" class='ln'>158</a></td><td></td></tr>
 <tr name="159" id="159">
-<td><a id="l159" class='ln'>159</a></td><td><span class="br">}</span> <a id="159c3" class="tk">PrevZCX</a>;</td></tr>
+<td><a id="l159" class='ln'>159</a></td><td><span class="ct">/* Zero-crossing (trigger) state */</span></td></tr>
 <tr name="160" id="160">
-<td><a id="l160" class='ln'>160</a></td><td></td></tr>
+<td><a id="l160" class='ln'>160</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="161" id="161">
-<td><a id="l161" class='ln'>161</a></td><td><span class="ct">/* Constant parameters (default storage) */</span></td></tr>
+<td><a id="l161" class='ln'>161</a></td><td>  <a id="161c3" class="tk">ZCE_PI_backCalc_fixdt_n</a> <a id="161c27" class="tk">PI_backCalc_fixdt1</a>;<span class="ct">/* '&lt;S85&gt;/PI_backCalc_fixdt1' */</span></td></tr>
 <tr name="162" id="162">
-<td><a id="l162" class='ln'>162</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
+<td><a id="l162" class='ln'>162</a></td><td>  <a id="162c3" class="tk">ZCE_PI_backCalc_fixdt_n</a> <a id="162c27" class="tk">PI_backCalc_fixdt_ig</a>;<span class="ct">/* '&lt;S85&gt;/PI_backCalc_fixdt' */</span></td></tr>
 <tr name="163" id="163">
-<td><a id="l163" class='ln'>163</a></td><td>  <span class="ct">/* Pooled Parameter (Expression: r_sin_M1)</span></td></tr>
+<td><a id="l163" class='ln'>163</a></td><td>  <a id="163c3" class="tk">ZCSigState</a> <a id="163c14" class="tk">ResettableDelay_Reset_ZCE_f</a>;<span class="ct">/* '&lt;S70&gt;/Resettable Delay' */</span></td></tr>
 <tr name="164" id="164">
-<td><a id="l164" class='ln'>164</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
+<td><a id="l164" class='ln'>164</a></td><td>  <a id="164c3" class="tk">ZCE_PI_backCalc_fixdt</a> <a id="164c25" class="tk">PI_Speed</a>;      <span class="ct">/* '&lt;S79&gt;/PI_Speed' */</span></td></tr>
 <tr name="165" id="165">
-<td><a id="l165" class='ln'>165</a></td><td><span class="ct">   *   '&lt;S58&gt;/r_sin_M1'</span></td></tr>
+<td><a id="l165" class='ln'>165</a></td><td><span class="br">}</span> <a id="165c3" class="tk">PrevZCX</a>;</td></tr>
 <tr name="166" id="166">
-<td><a id="l166" class='ln'>166</a></td><td><span class="ct">   *   '&lt;S82&gt;/r_sin_M1'</span></td></tr>
+<td><a id="l166" class='ln'>166</a></td><td></td></tr>
 <tr name="167" id="167">
-<td><a id="l167" class='ln'>167</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l167" class='ln'>167</a></td><td><span class="ct">/* Constant parameters (default storage) */</span></td></tr>
 <tr name="168" id="168">
-<td><a id="l168" class='ln'>168</a></td><td>  <a id="168c3" class="tk">int16_T</a> <a id="168c11" class="tk">pooled8</a>[361];</td></tr>
+<td><a id="l168" class='ln'>168</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="169" id="169">
-<td><a id="l169" class='ln'>169</a></td><td></td></tr>
+<td><a id="l169" class='ln'>169</a></td><td>  <span class="ct">/* Pooled Parameter (Expression: r_sin_M1)</span></td></tr>
 <tr name="170" id="170">
-<td><a id="l170" class='ln'>170</a></td><td>  <span class="ct">/* Pooled Parameter (Expression: r_cos_M1)</span></td></tr>
+<td><a id="l170" class='ln'>170</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
 <tr name="171" id="171">
-<td><a id="l171" class='ln'>171</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
+<td><a id="l171" class='ln'>171</a></td><td><span class="ct">   *   '&lt;S49&gt;/r_sin_M1'</span></td></tr>
 <tr name="172" id="172">
-<td><a id="l172" class='ln'>172</a></td><td><span class="ct">   *   '&lt;S58&gt;/r_cos_M1'</span></td></tr>
+<td><a id="l172" class='ln'>172</a></td><td><span class="ct">   *   '&lt;S74&gt;/r_sin_M1'</span></td></tr>
 <tr name="173" id="173">
-<td><a id="l173" class='ln'>173</a></td><td><span class="ct">   *   '&lt;S82&gt;/r_cos_M1'</span></td></tr>
+<td><a id="l173" class='ln'>173</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="174" id="174">
-<td><a id="l174" class='ln'>174</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l174" class='ln'>174</a></td><td>  <a id="174c3" class="tk">int16_T</a> <a id="174c11" class="tk">pooled12</a>[361];</td></tr>
 <tr name="175" id="175">
-<td><a id="l175" class='ln'>175</a></td><td>  <a id="175c3" class="tk">int16_T</a> <a id="175c11" class="tk">pooled9</a>[361];</td></tr>
+<td><a id="l175" class='ln'>175</a></td><td></td></tr>
 <tr name="176" id="176">
-<td><a id="l176" class='ln'>176</a></td><td></td></tr>
+<td><a id="l176" class='ln'>176</a></td><td>  <span class="ct">/* Pooled Parameter (Expression: r_cos_M1)</span></td></tr>
 <tr name="177" id="177">
-<td><a id="l177" class='ln'>177</a></td><td>  <span class="ct">/* Computed Parameter: vec_hallToPos_Value</span></td></tr>
+<td><a id="l177" class='ln'>177</a></td><td><span class="ct">   * Referenced by:</span></td></tr>
 <tr name="178" id="178">
-<td><a id="l178" class='ln'>178</a></td><td><span class="ct">   * Referenced by: '&lt;S11&gt;/vec_hallToPos'</span></td></tr>
+<td><a id="l178" class='ln'>178</a></td><td><span class="ct">   *   '&lt;S49&gt;/r_cos_M1'</span></td></tr>
 <tr name="179" id="179">
-<td><a id="l179" class='ln'>179</a></td><td><span class="ct">   */</span></td></tr>
+<td><a id="l179" class='ln'>179</a></td><td><span class="ct">   *   '&lt;S74&gt;/r_cos_M1'</span></td></tr>
 <tr name="180" id="180">
-<td><a id="l180" class='ln'>180</a></td><td>  <a id="180c3" class="tk">int8_T</a> <a id="180c10" class="tk">vec_hallToPos_Value</a>[8];</td></tr>
+<td><a id="l180" class='ln'>180</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="181" id="181">
-<td><a id="l181" class='ln'>181</a></td><td><span class="br">}</span> <a id="181c3" class="tk">ConstP</a>;</td></tr>
+<td><a id="l181" class='ln'>181</a></td><td>  <a id="181c3" class="tk">int16_T</a> <a id="181c11" class="tk">pooled13</a>[361];</td></tr>
 <tr name="182" id="182">
 <td><a id="l182" class='ln'>182</a></td><td></td></tr>
 <tr name="183" id="183">
-<td><a id="l183" class='ln'>183</a></td><td><span class="ct">/* External inputs (root inport signals with default storage) */</span></td></tr>
+<td><a id="l183" class='ln'>183</a></td><td>  <span class="ct">/* Computed Parameter: vec_hallToPos_Value</span></td></tr>
 <tr name="184" id="184">
-<td><a id="l184" class='ln'>184</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
+<td><a id="l184" class='ln'>184</a></td><td><span class="ct">   * Referenced by: '&lt;S19&gt;/vec_hallToPos'</span></td></tr>
 <tr name="185" id="185">
-<td><a id="l185" class='ln'>185</a></td><td>  <a id="185c3" class="tk">int16_T</a> <a id="185c11" class="tk">adc_Pha</a>;                     <span class="ct">/* '&lt;Root&gt;/adc_Pha' */</span></td></tr>
+<td><a id="l185" class='ln'>185</a></td><td><span class="ct">   */</span></td></tr>
 <tr name="186" id="186">
-<td><a id="l186" class='ln'>186</a></td><td>  <a id="186c3" class="tk">int16_T</a> <a id="186c11" class="tk">adc_Phb</a>;                     <span class="ct">/* '&lt;Root&gt;/adc_Phb' */</span></td></tr>
+<td><a id="l186" class='ln'>186</a></td><td>  <a id="186c3" class="tk">int8_T</a> <a id="186c10" class="tk">vec_hallToPos_Value</a>[8];</td></tr>
 <tr name="187" id="187">
-<td><a id="l187" class='ln'>187</a></td><td>  <a id="187c3" class="tk">int32_T</a> <a id="187c11" class="tk">spd_Target</a>;                  <span class="ct">/* '&lt;Root&gt;/spd_Target' */</span></td></tr>
+<td><a id="l187" class='ln'>187</a></td><td><span class="br">}</span> <a id="187c3" class="tk">ConstP</a>;</td></tr>
 <tr name="188" id="188">
-<td><a id="l188" class='ln'>188</a></td><td>  <a id="188c3" class="tk">int16_T</a> <a id="188c11" class="tk">idq_Target</a>;                  <span class="ct">/* '&lt;Root&gt;/idq_Target' */</span></td></tr>
+<td><a id="l188" class='ln'>188</a></td><td></td></tr>
 <tr name="189" id="189">
-<td><a id="l189" class='ln'>189</a></td><td>  <a id="189c3" class="tk">uint8_T</a> <a id="189c11" class="tk">hall_A</a>;                      <span class="ct">/* '&lt;Root&gt;/hall_A' */</span></td></tr>
+<td><a id="l189" class='ln'>189</a></td><td><span class="ct">/* External inputs (root inport signals with default storage) */</span></td></tr>
 <tr name="190" id="190">
-<td><a id="l190" class='ln'>190</a></td><td>  <a id="190c3" class="tk">uint8_T</a> <a id="190c11" class="tk">hall_B</a>;                      <span class="ct">/* '&lt;Root&gt;/hall_B' */</span></td></tr>
+<td><a id="l190" class='ln'>190</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="191" id="191">
-<td><a id="l191" class='ln'>191</a></td><td>  <a id="191c3" class="tk">uint8_T</a> <a id="191c11" class="tk">hall_C</a>;                      <span class="ct">/* '&lt;Root&gt;/hall_C' */</span></td></tr>
+<td><a id="l191" class='ln'>191</a></td><td>  <a id="191c3" class="tk">int16_T</a> <a id="191c11" class="tk">adc_Phase</a>[3];                <span class="ct">/* '&lt;Root&gt;/adc_Phase' */</span></td></tr>
 <tr name="192" id="192">
-<td><a id="l192" class='ln'>192</a></td><td>  <a id="192c3" class="tk">uint32_T</a> <a id="192c12" class="tk">us_Count</a>;                   <span class="ct">/* '&lt;Root&gt;/us_Count' */</span></td></tr>
+<td><a id="l192" class='ln'>192</a></td><td>  <a id="192c3" class="tk">uint8_T</a> <a id="192c11" class="tk">hall_abc</a>[3];                 <span class="ct">/* '&lt;Root&gt;/hall_abc' */</span></td></tr>
 <tr name="193" id="193">
-<td><a id="l193" class='ln'>193</a></td><td>  <a id="193c3" class="tk">boolean_T</a> <a id="193c13" class="tk">b_motEna</a>;                  <span class="ct">/* '&lt;Root&gt;/b_motEna' */</span></td></tr>
+<td><a id="l193" class='ln'>193</a></td><td>  <a id="193c3" class="tk">int32_T</a> <a id="193c11" class="tk">spd_Target</a>;                  <span class="ct">/* '&lt;Root&gt;/spd_Target' */</span></td></tr>
 <tr name="194" id="194">
-<td><a id="l194" class='ln'>194</a></td><td>  <a id="194c3" class="tk">boolean_T</a> <a id="194c13" class="tk">b_cruiseEna</a>;               <span class="ct">/* '&lt;Root&gt;/b_cruiseEna' */</span></td></tr>
+<td><a id="l194" class='ln'>194</a></td><td>  <a id="194c3" class="tk">int16_T</a> <a id="194c11" class="tk">idq_Target</a>;                  <span class="ct">/* '&lt;Root&gt;/idq_Target' */</span></td></tr>
 <tr name="195" id="195">
-<td><a id="l195" class='ln'>195</a></td><td>  <a id="195c3" class="tk">uint8_T</a> <a id="195c11" class="tk">n_ctrlModReq</a>;                <span class="ct">/* '&lt;Root&gt;/n_ctrlModReq' */</span></td></tr>
+<td><a id="l195" class='ln'>195</a></td><td>  <a id="195c3" class="tk">int16_T</a> <a id="195c11" class="tk">vdq_Target</a>[2];               <span class="ct">/* '&lt;Root&gt;/vdq_Target' */</span></td></tr>
 <tr name="196" id="196">
-<td><a id="l196" class='ln'>196</a></td><td>  <a id="196c3" class="tk">int16_T</a> <a id="196c11" class="tk">iDC_Limit</a>;                   <span class="ct">/* '&lt;Root&gt;/iDC_Limit' */</span></td></tr>
+<td><a id="l196" class='ln'>196</a></td><td>  <a id="196c3" class="tk">int16_T</a> <a id="196c11" class="tk">idq_Limit</a>;                   <span class="ct">/* '&lt;Root&gt;/idq_Limit' */</span></td></tr>
 <tr name="197" id="197">
-<td><a id="l197" class='ln'>197</a></td><td>  <a id="197c3" class="tk">int32_T</a> <a id="197c11" class="tk">spd_Limit</a>;                   <span class="ct">/* '&lt;Root&gt;/spd_Limit' */</span></td></tr>
+<td><a id="l197" class='ln'>197</a></td><td>  <a id="197c3" class="tk">boolean_T</a> <a id="197c13" class="tk">b_motEna</a>;                  <span class="ct">/* '&lt;Root&gt;/b_motEna' */</span></td></tr>
 <tr name="198" id="198">
-<td><a id="l198" class='ln'>198</a></td><td>  <a id="198c3" class="tk">int16_T</a> <a id="198c11" class="tk">vDC</a>;                         <span class="ct">/* '&lt;Root&gt;/vDC' */</span></td></tr>
+<td><a id="l198" class='ln'>198</a></td><td>  <a id="198c3" class="tk">boolean_T</a> <a id="198c13" class="tk">b_cruiseEna</a>;               <span class="ct">/* '&lt;Root&gt;/b_cruiseEna' */</span></td></tr>
 <tr name="199" id="199">
-<td><a id="l199" class='ln'>199</a></td><td>  <a id="199c3" class="tk">uint16_T</a> <a id="199c12" class="tk">FOC_Flags</a>;                  <span class="ct">/* '&lt;Root&gt;/FOC_Flags' */</span></td></tr>
+<td><a id="l199" class='ln'>199</a></td><td>  <a id="199c3" class="tk">uint8_T</a> <a id="199c11" class="tk">n_ctrlMod</a>;                   <span class="ct">/* '&lt;Root&gt;/n_ctrlMod' */</span></td></tr>
 <tr name="200" id="200">
-<td><a id="l200" class='ln'>200</a></td><td>  <a id="200c3" class="tk">int16_T</a> <a id="200c11" class="tk">vdq_Open</a>[2];                 <span class="ct">/* '&lt;Root&gt;/vdq_Open' */</span></td></tr>
+<td><a id="l200" class='ln'>200</a></td><td>  <a id="200c3" class="tk">int16_T</a> <a id="200c11" class="tk">iDC_Limit</a>;                   <span class="ct">/* '&lt;Root&gt;/iDC_Limit' */</span></td></tr>
 <tr name="201" id="201">
-<td><a id="l201" class='ln'>201</a></td><td>  <a id="201c3" class="tk">int16_T</a> <a id="201c11" class="tk">theta_Open</a>;                  <span class="ct">/* '&lt;Root&gt;/theta_Open' */</span></td></tr>
+<td><a id="l201" class='ln'>201</a></td><td>  <a id="201c3" class="tk">int32_T</a> <a id="201c11" class="tk">spd_Limit</a>;                   <span class="ct">/* '&lt;Root&gt;/spd_Limit' */</span></td></tr>
 <tr name="202" id="202">
-<td><a id="l202" class='ln'>202</a></td><td><span class="br">}</span> <a id="202c3" class="tk">ExtU</a>;</td></tr>
+<td><a id="l202" class='ln'>202</a></td><td>  <a id="202c3" class="tk">int16_T</a> <a id="202c11" class="tk">vDC</a>;                         <span class="ct">/* '&lt;Root&gt;/vDC' */</span></td></tr>
 <tr name="203" id="203">
-<td><a id="l203" class='ln'>203</a></td><td></td></tr>
+<td><a id="l203" class='ln'>203</a></td><td>  <a id="203c3" class="tk">uint32_T</a> <a id="203c12" class="tk">sys_ticks</a>;                  <span class="ct">/* '&lt;Root&gt;/sys_ticks' */</span></td></tr>
 <tr name="204" id="204">
-<td><a id="l204" class='ln'>204</a></td><td><span class="ct">/* External outputs (root outports fed by signals with default storage) */</span></td></tr>
+<td><a id="l204" class='ln'>204</a></td><td>  <a id="204c3" class="tk">int16_T</a> <a id="204c11" class="tk">set_Angle</a>;                   <span class="ct">/* '&lt;Root&gt;/set_Angle' */</span></td></tr>
 <tr name="205" id="205">
-<td><a id="l205" class='ln'>205</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
+<td><a id="l205" class='ln'>205</a></td><td><span class="br">}</span> <a id="205c3" class="tk">ExtU</a>;</td></tr>
 <tr name="206" id="206">
-<td><a id="l206" class='ln'>206</a></td><td>  <a id="206c3" class="tk">int16_T</a> <a id="206c11" class="tk">pwm_Duty</a>[3];                 <span class="ct">/* '&lt;Root&gt;/pwm_Duty' */</span></td></tr>
+<td><a id="l206" class='ln'>206</a></td><td></td></tr>
 <tr name="207" id="207">
-<td><a id="l207" class='ln'>207</a></td><td>  <a id="207c3" class="tk">uint8_T</a> <a id="207c11" class="tk">n_Sector</a>;                    <span class="ct">/* '&lt;Root&gt;/n_Sector' */</span></td></tr>
+<td><a id="l207" class='ln'>207</a></td><td><span class="ct">/* External outputs (root outports fed by signals with default storage) */</span></td></tr>
 <tr name="208" id="208">
-<td><a id="l208" class='ln'>208</a></td><td>  <a id="208c3" class="tk">uint8_T</a> <a id="208c11" class="tk">n_MotError</a>;                  <span class="ct">/* '&lt;Root&gt;/n_MotError' */</span></td></tr>
+<td><a id="l208" class='ln'>208</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <span class="br">{</span></td></tr>
 <tr name="209" id="209">
-<td><a id="l209" class='ln'>209</a></td><td>  <a id="209c3" class="tk">int16_T</a> <a id="209c11" class="tk">f_Vdq</a>[2];                    <span class="ct">/* '&lt;Root&gt;/f_Vdq' */</span></td></tr>
+<td><a id="l209" class='ln'>209</a></td><td>  <a id="209c3" class="tk">int16_T</a> <a id="209c11" class="tk">n_Duty</a>[3];                   <span class="ct">/* '&lt;Root&gt;/n_Duty' */</span></td></tr>
 <tr name="210" id="210">
-<td><a id="l210" class='ln'>210</a></td><td>  <a id="210c3" class="tk">int16_T</a> <a id="210c11" class="tk">f_Idq</a>[2];                    <span class="ct">/* '&lt;Root&gt;/f_Idq' */</span></td></tr>
+<td><a id="l210" class='ln'>210</a></td><td>  <a id="210c3" class="tk">uint8_T</a> <a id="210c11" class="tk">n_Sector</a>;                    <span class="ct">/* '&lt;Root&gt;/n_Sector' */</span></td></tr>
 <tr name="211" id="211">
-<td><a id="l211" class='ln'>211</a></td><td>  <a id="211c3" class="tk">int16_T</a> <a id="211c11" class="tk">f_MotAngle</a>;                  <span class="ct">/* '&lt;Root&gt;/f_MotAngle' */</span></td></tr>
+<td><a id="l211" class='ln'>211</a></td><td>  <a id="211c3" class="tk">uint8_T</a> <a id="211c11" class="tk">n_MotError</a>;                  <span class="ct">/* '&lt;Root&gt;/n_MotError' */</span></td></tr>
 <tr name="212" id="212">
-<td><a id="l212" class='ln'>212</a></td><td>  <a id="212c3" class="tk">int32_T</a> <a id="212c11" class="tk">f_MotRPM</a>;                    <span class="ct">/* '&lt;Root&gt;/f_MotRPM' */</span></td></tr>
+<td><a id="l212" class='ln'>212</a></td><td>  <a id="212c3" class="tk">int16_T</a> <a id="212c11" class="tk">f_Vdq</a>[2];                    <span class="ct">/* '&lt;Root&gt;/f_Vdq' */</span></td></tr>
 <tr name="213" id="213">
-<td><a id="l213" class='ln'>213</a></td><td>  <a id="213c3" class="tk">int16_T</a> <a id="213c11" class="tk">f_hallAngle</a>;                 <span class="ct">/* '&lt;Root&gt;/f_hallAngle' */</span></td></tr>
+<td><a id="l213" class='ln'>213</a></td><td>  <a id="213c3" class="tk">int16_T</a> <a id="213c11" class="tk">f_Idq</a>[2];                    <span class="ct">/* '&lt;Root&gt;/f_Idq' */</span></td></tr>
 <tr name="214" id="214">
-<td><a id="l214" class='ln'>214</a></td><td>  <a id="214c3" class="tk">uint8_T</a> <a id="214c11" class="tk">n_hallStat</a>;                  <span class="ct">/* '&lt;Root&gt;/n_hallStat' */</span></td></tr>
+<td><a id="l214" class='ln'>214</a></td><td>  <a id="214c3" class="tk">int16_T</a> <a id="214c11" class="tk">f_MotAngle</a>;                  <span class="ct">/* '&lt;Root&gt;/f_MotAngle' */</span></td></tr>
 <tr name="215" id="215">
-<td><a id="l215" class='ln'>215</a></td><td>  <a id="215c3" class="tk">uint8_T</a> <a id="215c11" class="tk">n_runingMode</a>;                <span class="ct">/* '&lt;Root&gt;/n_runingMode' */</span></td></tr>
+<td><a id="l215" class='ln'>215</a></td><td>  <a id="215c3" class="tk">int32_T</a> <a id="215c11" class="tk">f_MotRPM</a>;                    <span class="ct">/* '&lt;Root&gt;/f_MotRPM' */</span></td></tr>
 <tr name="216" id="216">
-<td><a id="l216" class='ln'>216</a></td><td><span class="br">}</span> <a id="216c3" class="tk">ExtY</a>;</td></tr>
+<td><a id="l216" class='ln'>216</a></td><td>  <a id="216c3" class="tk">uint8_T</a> <a id="216c11" class="tk">n_hallStat</a>;                  <span class="ct">/* '&lt;Root&gt;/n_hallStat' */</span></td></tr>
 <tr name="217" id="217">
-<td><a id="l217" class='ln'>217</a></td><td></td></tr>
+<td><a id="l217" class='ln'>217</a></td><td>  <a id="217c3" class="tk">uint8_T</a> <a id="217c11" class="tk">n_FocMode</a>;                   <span class="ct">/* '&lt;Root&gt;/n_FocMode' */</span></td></tr>
 <tr name="218" id="218">
-<td><a id="l218" class='ln'>218</a></td><td><span class="ct">/* Parameters (default storage) */</span></td></tr>
+<td><a id="l218" class='ln'>218</a></td><td>  <a id="218c3" class="tk">boolean_T</a> <a id="218c13" class="tk">b_advCtrl</a>;                 <span class="ct">/* '&lt;Root&gt;/b_advCtrl' */</span></td></tr>
 <tr name="219" id="219">
-<td><a id="l219" class='ln'>219</a></td><td><span class="kw">struct</span> <a id="219c8" class="tk">P_</a> <span class="br">{</span></td></tr>
+<td><a id="l219" class='ln'>219</a></td><td><span class="br">}</span> <a id="219c3" class="tk">ExtY</a>;</td></tr>
 <tr name="220" id="220">
-<td><a id="l220" class='ln'>220</a></td><td>  <a id="220c3" class="tk">uint32_T</a> <a id="220c12" class="tk">n_hall_count_ps</a>;            <span class="ct">/* Variable: n_hall_count_ps</span></td></tr>
+<td><a id="l220" class='ln'>220</a></td><td></td></tr>
 <tr name="221" id="221">
-<td><a id="l221" class='ln'>221</a></td><td><span class="ct">                                        * Referenced by:</span></td></tr>
+<td><a id="l221" class='ln'>221</a></td><td><span class="ct">/* Parameters (default storage) */</span></td></tr>
 <tr name="222" id="222">
-<td><a id="l222" class='ln'>222</a></td><td><span class="ct">                                        *   '&lt;S14&gt;/z_maxCntRst'</span></td></tr>
+<td><a id="l222" class='ln'>222</a></td><td><span class="kw">struct</span> <a id="222c8" class="tk">P_</a> <span class="br">{</span></td></tr>
 <tr name="223" id="223">
-<td><a id="l223" class='ln'>223</a></td><td><span class="ct">                                        *   '&lt;S20&gt;/z_counter'</span></td></tr>
+<td><a id="l223" class='ln'>223</a></td><td>  <a id="223c3" class="tk">int16_T</a> <a id="223c11" class="tk">cf_Fw_Kb</a>;                    <span class="ct">/* Variable: cf_Fw_Kb</span></td></tr>
 <tr name="224" id="224">
-<td><a id="l224" class='ln'>224</a></td><td><span class="ct">                                        *   '&lt;S20&gt;/UnitDelay2'</span></td></tr>
+<td><a id="l224" class='ln'>224</a></td><td><span class="ct">                                        * Referenced by: '&lt;S66&gt;/Constant5'</span></td></tr>
 <tr name="225" id="225">
 <td><a id="l225" class='ln'>225</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="226" id="226">
-<td><a id="l226" class='ln'>226</a></td><td>  <a id="226c3" class="tk">uint32_T</a> <a id="226c12" class="tk">n_polePairs</a>;                <span class="ct">/* Variable: n_polePairs</span></td></tr>
+<td><a id="l226" class='ln'>226</a></td><td>  <a id="226c3" class="tk">int16_T</a> <a id="226c11" class="tk">cf_Fw_Ki</a>;                    <span class="ct">/* Variable: cf_Fw_Ki</span></td></tr>
 <tr name="227" id="227">
-<td><a id="l227" class='ln'>227</a></td><td><span class="ct">                                        * Referenced by: '&lt;S20&gt;/cf_speedCoef1'</span></td></tr>
+<td><a id="l227" class='ln'>227</a></td><td><span class="ct">                                        * Referenced by: '&lt;S66&gt;/Constant2'</span></td></tr>
 <tr name="228" id="228">
 <td><a id="l228" class='ln'>228</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="229" id="229">
-<td><a id="l229" class='ln'>229</a></td><td>  <a id="229c3" class="tk">int16_T</a> <a id="229c11" class="tk">cf_Fw_Kb</a>;                    <span class="ct">/* Variable: cf_Fw_Kb</span></td></tr>
+<td><a id="l229" class='ln'>229</a></td><td>  <a id="229c3" class="tk">int16_T</a> <a id="229c11" class="tk">cf_idKp</a>;                     <span class="ct">/* Variable: cf_idKp</span></td></tr>
 <tr name="230" id="230">
-<td><a id="l230" class='ln'>230</a></td><td><span class="ct">                                        * Referenced by: '&lt;S74&gt;/Constant5'</span></td></tr>
+<td><a id="l230" class='ln'>230</a></td><td><span class="ct">                                        * Referenced by: '&lt;S85&gt;/Constant3'</span></td></tr>
 <tr name="231" id="231">
 <td><a id="l231" class='ln'>231</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="232" id="232">
-<td><a id="l232" class='ln'>232</a></td><td>  <a id="232c3" class="tk">int16_T</a> <a id="232c11" class="tk">cf_Fw_Ki</a>;                    <span class="ct">/* Variable: cf_Fw_Ki</span></td></tr>
+<td><a id="l232" class='ln'>232</a></td><td>  <a id="232c3" class="tk">int16_T</a> <a id="232c11" class="tk">cf_iqKp</a>;                     <span class="ct">/* Variable: cf_iqKp</span></td></tr>
 <tr name="233" id="233">
-<td><a id="l233" class='ln'>233</a></td><td><span class="ct">                                        * Referenced by: '&lt;S74&gt;/Constant2'</span></td></tr>
+<td><a id="l233" class='ln'>233</a></td><td><span class="ct">                                        * Referenced by: '&lt;S85&gt;/Constant7'</span></td></tr>
 <tr name="234" id="234">
 <td><a id="l234" class='ln'>234</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="235" id="235">
-<td><a id="l235" class='ln'>235</a></td><td>  <a id="235c3" class="tk">int16_T</a> <a id="235c11" class="tk">cf_TrqLimKb</a>;                 <span class="ct">/* Variable: cf_TrqLimKb</span></td></tr>
+<td><a id="l235" class='ln'>235</a></td><td>  <a id="235c3" class="tk">int16_T</a> <a id="235c11" class="tk">cf_nKp</a>;                      <span class="ct">/* Variable: cf_nKp</span></td></tr>
 <tr name="236" id="236">
-<td><a id="l236" class='ln'>236</a></td><td><span class="ct">                                        * Referenced by: '&lt;S88&gt;/Constant2'</span></td></tr>
+<td><a id="l236" class='ln'>236</a></td><td><span class="ct">                                        * Referenced by: '&lt;S79&gt;/Constant4'</span></td></tr>
 <tr name="237" id="237">
 <td><a id="l237" class='ln'>237</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="238" id="238">
-<td><a id="l238" class='ln'>238</a></td><td>  <a id="238c3" class="tk">int16_T</a> <a id="238c11" class="tk">cf_TrqLimKi</a>;                 <span class="ct">/* Variable: cf_TrqLimKi</span></td></tr>
+<td><a id="l238" class='ln'>238</a></td><td>  <a id="238c3" class="tk">int16_T</a> <a id="238c11" class="tk">V_modulation</a>;                <span class="ct">/* Variable: V_modulation</span></td></tr>
 <tr name="239" id="239">
-<td><a id="l239" class='ln'>239</a></td><td><span class="ct">                                        * Referenced by: '&lt;S88&gt;/Constant1'</span></td></tr>
+<td><a id="l239" class='ln'>239</a></td><td><span class="ct">                                        * Referenced by:</span></td></tr>
 <tr name="240" id="240">
-<td><a id="l240" class='ln'>240</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l240" class='ln'>240</a></td><td><span class="ct">                                        *   '&lt;S42&gt;/Constant'</span></td></tr>
 <tr name="241" id="241">
-<td><a id="l241" class='ln'>241</a></td><td>  <a id="241c3" class="tk">int16_T</a> <a id="241c11" class="tk">cf_TrqLimKp</a>;                 <span class="ct">/* Variable: cf_TrqLimKp</span></td></tr>
+<td><a id="l241" class='ln'>241</a></td><td><span class="ct">                                        *   '&lt;S85&gt;/Constant2'</span></td></tr>
 <tr name="242" id="242">
-<td><a id="l242" class='ln'>242</a></td><td><span class="ct">                                        * Referenced by: '&lt;S88&gt;/Constant4'</span></td></tr>
+<td><a id="l242" class='ln'>242</a></td><td><span class="ct">                                        *   '&lt;S66&gt;/Constant3'</span></td></tr>
 <tr name="243" id="243">
 <td><a id="l243" class='ln'>243</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="244" id="244">
-<td><a id="l244" class='ln'>244</a></td><td>  <a id="244c3" class="tk">int16_T</a> <a id="244c11" class="tk">cf_idKp</a>;                     <span class="ct">/* Variable: cf_idKp</span></td></tr>
+<td><a id="l244" class='ln'>244</a></td><td>  <a id="244c3" class="tk">int16_T</a> <a id="244c11" class="tk">cf_idKb</a>;                     <span class="ct">/* Variable: cf_idKb</span></td></tr>
 <tr name="245" id="245">
-<td><a id="l245" class='ln'>245</a></td><td><span class="ct">                                        * Referenced by: '&lt;S95&gt;/Constant3'</span></td></tr>
+<td><a id="l245" class='ln'>245</a></td><td><span class="ct">                                        * Referenced by: '&lt;S85&gt;/Constant6'</span></td></tr>
 <tr name="246" id="246">
 <td><a id="l246" class='ln'>246</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="247" id="247">
-<td><a id="l247" class='ln'>247</a></td><td>  <a id="247c3" class="tk">int16_T</a> <a id="247c11" class="tk">cf_iqKp</a>;                     <span class="ct">/* Variable: cf_iqKp</span></td></tr>
+<td><a id="l247" class='ln'>247</a></td><td>  <a id="247c3" class="tk">int16_T</a> <a id="247c11" class="tk">cf_idKi</a>;                     <span class="ct">/* Variable: cf_idKi</span></td></tr>
 <tr name="248" id="248">
-<td><a id="l248" class='ln'>248</a></td><td><span class="ct">                                        * Referenced by: '&lt;S95&gt;/Constant7'</span></td></tr>
+<td><a id="l248" class='ln'>248</a></td><td><span class="ct">                                        * Referenced by: '&lt;S85&gt;/Constant4'</span></td></tr>
 <tr name="249" id="249">
 <td><a id="l249" class='ln'>249</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="250" id="250">
-<td><a id="l250" class='ln'>250</a></td><td>  <a id="250c3" class="tk">int16_T</a> <a id="250c11" class="tk">cf_nKp</a>;                      <span class="ct">/* Variable: cf_nKp</span></td></tr>
+<td><a id="l250" class='ln'>250</a></td><td>  <a id="250c3" class="tk">int16_T</a> <a id="250c11" class="tk">cf_iqKb</a>;                     <span class="ct">/* Variable: cf_iqKb</span></td></tr>
 <tr name="251" id="251">
-<td><a id="l251" class='ln'>251</a></td><td><span class="ct">                                        * Referenced by: '&lt;S87&gt;/Constant4'</span></td></tr>
+<td><a id="l251" class='ln'>251</a></td><td><span class="ct">                                        * Referenced by: '&lt;S85&gt;/Constant1'</span></td></tr>
 <tr name="252" id="252">
 <td><a id="l252" class='ln'>252</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="253" id="253">
-<td><a id="l253" class='ln'>253</a></td><td>  <a id="253c3" class="tk">int16_T</a> <a id="253c11" class="tk">V_modulation</a>;                <span class="ct">/* Variable: V_modulation</span></td></tr>
+<td><a id="l253" class='ln'>253</a></td><td>  <a id="253c3" class="tk">int16_T</a> <a id="253c11" class="tk">cf_iqKi</a>;                     <span class="ct">/* Variable: cf_iqKi</span></td></tr>
 <tr name="254" id="254">
-<td><a id="l254" class='ln'>254</a></td><td><span class="ct">                                        * Referenced by:</span></td></tr>
+<td><a id="l254" class='ln'>254</a></td><td><span class="ct">                                        * Referenced by: '&lt;S85&gt;/Constant8'</span></td></tr>
 <tr name="255" id="255">
-<td><a id="l255" class='ln'>255</a></td><td><span class="ct">                                        *   '&lt;S51&gt;/Constant'</span></td></tr>
+<td><a id="l255" class='ln'>255</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="256" id="256">
-<td><a id="l256" class='ln'>256</a></td><td><span class="ct">                                        *   '&lt;S95&gt;/Constant2'</span></td></tr>
+<td><a id="l256" class='ln'>256</a></td><td>  <a id="256c3" class="tk">int16_T</a> <a id="256c11" class="tk">cf_nKb</a>;                      <span class="ct">/* Variable: cf_nKb</span></td></tr>
 <tr name="257" id="257">
-<td><a id="l257" class='ln'>257</a></td><td><span class="ct">                                        *   '&lt;S74&gt;/Constant3'</span></td></tr>
+<td><a id="l257" class='ln'>257</a></td><td><span class="ct">                                        * Referenced by: '&lt;S79&gt;/Constant11'</span></td></tr>
 <tr name="258" id="258">
 <td><a id="l258" class='ln'>258</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="259" id="259">
-<td><a id="l259" class='ln'>259</a></td><td>  <a id="259c3" class="tk">int16_T</a> <a id="259c11" class="tk">cf_idKb</a>;                     <span class="ct">/* Variable: cf_idKb</span></td></tr>
+<td><a id="l259" class='ln'>259</a></td><td>  <a id="259c3" class="tk">int16_T</a> <a id="259c11" class="tk">cf_nKi</a>;                      <span class="ct">/* Variable: cf_nKi</span></td></tr>
 <tr name="260" id="260">
-<td><a id="l260" class='ln'>260</a></td><td><span class="ct">                                        * Referenced by: '&lt;S95&gt;/Constant6'</span></td></tr>
+<td><a id="l260" class='ln'>260</a></td><td><span class="ct">                                        * Referenced by: '&lt;S79&gt;/Constant1'</span></td></tr>
 <tr name="261" id="261">
 <td><a id="l261" class='ln'>261</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="262" id="262">
-<td><a id="l262" class='ln'>262</a></td><td>  <a id="262c3" class="tk">int16_T</a> <a id="262c11" class="tk">cf_idKi</a>;                     <span class="ct">/* Variable: cf_idKi</span></td></tr>
+<td><a id="l262" class='ln'>262</a></td><td>  <a id="262c3" class="tk">int16_T</a> <a id="262c11" class="tk">f_adc_curr_ceof</a>;             <span class="ct">/* Variable: f_adc_curr_ceof</span></td></tr>
 <tr name="263" id="263">
-<td><a id="l263" class='ln'>263</a></td><td><span class="ct">                                        * Referenced by: '&lt;S95&gt;/Constant4'</span></td></tr>
+<td><a id="l263" class='ln'>263</a></td><td><span class="ct">                                        * Referenced by: '&lt;S43&gt;/Constant'</span></td></tr>
 <tr name="264" id="264">
 <td><a id="l264" class='ln'>264</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="265" id="265">
-<td><a id="l265" class='ln'>265</a></td><td>  <a id="265c3" class="tk">int16_T</a> <a id="265c11" class="tk">cf_iqKb</a>;                     <span class="ct">/* Variable: cf_iqKb</span></td></tr>
+<td><a id="l265" class='ln'>265</a></td><td>  <a id="265c3" class="tk">int16_T</a> <a id="265c11" class="tk">cf_lastIqGain</a>;               <span class="ct">/* Variable: cf_lastIqGain</span></td></tr>
 <tr name="266" id="266">
-<td><a id="l266" class='ln'>266</a></td><td><span class="ct">                                        * Referenced by: '&lt;S95&gt;/Constant1'</span></td></tr>
+<td><a id="l266" class='ln'>266</a></td><td><span class="ct">                                        * Referenced by: '&lt;S62&gt;/Gain'</span></td></tr>
 <tr name="267" id="267">
 <td><a id="l267" class='ln'>267</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="268" id="268">
-<td><a id="l268" class='ln'>268</a></td><td>  <a id="268c3" class="tk">int16_T</a> <a id="268c11" class="tk">cf_iqKi</a>;                     <span class="ct">/* Variable: cf_iqKi</span></td></tr>
+<td><a id="l268" class='ln'>268</a></td><td>  <a id="268c3" class="tk">int16_T</a> <a id="268c11" class="tk">i_hall_offset</a>;               <span class="ct">/* Variable: i_hall_offset</span></td></tr>
 <tr name="269" id="269">
-<td><a id="l269" class='ln'>269</a></td><td><span class="ct">                                        * Referenced by: '&lt;S95&gt;/Constant8'</span></td></tr>
+<td><a id="l269" class='ln'>269</a></td><td><span class="ct">                                        * Referenced by: '&lt;S22&gt;/Constant2'</span></td></tr>
 <tr name="270" id="270">
 <td><a id="l270" class='ln'>270</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="271" id="271">
-<td><a id="l271" class='ln'>271</a></td><td>  <a id="271c3" class="tk">int16_T</a> <a id="271c11" class="tk">cf_nKb</a>;                      <span class="ct">/* Variable: cf_nKb</span></td></tr>
+<td><a id="l271" class='ln'>271</a></td><td>  <a id="271c3" class="tk">int16_T</a> <a id="271c11" class="tk">i_dqMax</a>;                     <span class="ct">/* Variable: i_dqMax</span></td></tr>
 <tr name="272" id="272">
-<td><a id="l272" class='ln'>272</a></td><td><span class="ct">                                        * Referenced by: '&lt;S87&gt;/Constant11'</span></td></tr>
+<td><a id="l272" class='ln'>272</a></td><td><span class="ct">                                        * Referenced by:</span></td></tr>
 <tr name="273" id="273">
-<td><a id="l273" class='ln'>273</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l273" class='ln'>273</a></td><td><span class="ct">                                        *   '&lt;S68&gt;/Constant1'</span></td></tr>
 <tr name="274" id="274">
-<td><a id="l274" class='ln'>274</a></td><td>  <a id="274c3" class="tk">int16_T</a> <a id="274c11" class="tk">cf_nKi</a>;                      <span class="ct">/* Variable: cf_nKi</span></td></tr>
+<td><a id="l274" class='ln'>274</a></td><td><span class="ct">                                        *   '&lt;S68&gt;/Constant2'</span></td></tr>
 <tr name="275" id="275">
-<td><a id="l275" class='ln'>275</a></td><td><span class="ct">                                        * Referenced by: '&lt;S87&gt;/Constant1'</span></td></tr>
+<td><a id="l275" class='ln'>275</a></td><td><span class="ct">                                        *   '&lt;S68&gt;/Constant3'</span></td></tr>
 <tr name="276" id="276">
-<td><a id="l276" class='ln'>276</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l276" class='ln'>276</a></td><td><span class="ct">                                        *   '&lt;S68&gt;/Constant5'</span></td></tr>
 <tr name="277" id="277">
-<td><a id="l277" class='ln'>277</a></td><td>  <a id="277c3" class="tk">int16_T</a> <a id="277c11" class="tk">f_adc_curr_ceof</a>;             <span class="ct">/* Variable: f_adc_curr_ceof</span></td></tr>
+<td><a id="l277" class='ln'>277</a></td><td><span class="ct">                                        *   '&lt;S79&gt;/Constant6'</span></td></tr>
 <tr name="278" id="278">
-<td><a id="l278" class='ln'>278</a></td><td><span class="ct">                                        * Referenced by: '&lt;S52&gt;/Constant'</span></td></tr>
+<td><a id="l278" class='ln'>278</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="279" id="279">
-<td><a id="l279" class='ln'>279</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l279" class='ln'>279</a></td><td>  <a id="279c3" class="tk">int16_T</a> <a id="279c11" class="tk">id_fieldWeakMax</a>;             <span class="ct">/* Variable: id_fieldWeakMax</span></td></tr>
 <tr name="280" id="280">
-<td><a id="l280" class='ln'>280</a></td><td>  <a id="280c3" class="tk">int16_T</a> <a id="280c11" class="tk">cf_lastIqGain</a>;               <span class="ct">/* Variable: cf_lastIqGain</span></td></tr>
+<td><a id="l280" class='ln'>280</a></td><td><span class="ct">                                        * Referenced by: '&lt;S66&gt;/Constant6'</span></td></tr>
 <tr name="281" id="281">
-<td><a id="l281" class='ln'>281</a></td><td><span class="ct">                                        * Referenced by: '&lt;S70&gt;/Gain'</span></td></tr>
+<td><a id="l281" class='ln'>281</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="282" id="282">
-<td><a id="l282" class='ln'>282</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l282" class='ln'>282</a></td><td>  <a id="282c3" class="tk">int16_T</a> <a id="282c11" class="tk">dz_OpenStepVol</a>;              <span class="ct">/* Variable: dz_OpenStepVol</span></td></tr>
 <tr name="283" id="283">
-<td><a id="l283" class='ln'>283</a></td><td>  <a id="283c3" class="tk">int16_T</a> <a id="283c11" class="tk">i_hall_offset</a>;               <span class="ct">/* Variable: i_hall_offset</span></td></tr>
+<td><a id="l283" class='ln'>283</a></td><td><span class="ct">                                        * Referenced by:</span></td></tr>
 <tr name="284" id="284">
-<td><a id="l284" class='ln'>284</a></td><td><span class="ct">                                        * Referenced by: '&lt;S15&gt;/Constant2'</span></td></tr>
+<td><a id="l284" class='ln'>284</a></td><td><span class="ct">                                        *   '&lt;S111&gt;/Constant1'</span></td></tr>
 <tr name="285" id="285">
-<td><a id="l285" class='ln'>285</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l285" class='ln'>285</a></td><td><span class="ct">                                        *   '&lt;S111&gt;/Constant5'</span></td></tr>
 <tr name="286" id="286">
-<td><a id="l286" class='ln'>286</a></td><td>  <a id="286c3" class="tk">int16_T</a> <a id="286c11" class="tk">i_dqMax</a>;                     <span class="ct">/* Variable: i_dqMax</span></td></tr>
+<td><a id="l286" class='ln'>286</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="287" id="287">
-<td><a id="l287" class='ln'>287</a></td><td><span class="ct">                                        * Referenced by:</span></td></tr>
+<td><a id="l287" class='ln'>287</a></td><td>  <a id="287c3" class="tk">uint16_T</a> <a id="287c12" class="tk">f_lpf_idq</a>;                  <span class="ct">/* Variable: f_lpf_idq</span></td></tr>
 <tr name="288" id="288">
-<td><a id="l288" class='ln'>288</a></td><td><span class="ct">                                        *   '&lt;S76&gt;/Constant1'</span></td></tr>
+<td><a id="l288" class='ln'>288</a></td><td><span class="ct">                                        * Referenced by: '&lt;S39&gt;/Constant'</span></td></tr>
 <tr name="289" id="289">
-<td><a id="l289" class='ln'>289</a></td><td><span class="ct">                                        *   '&lt;S76&gt;/Constant2'</span></td></tr>
+<td><a id="l289" class='ln'>289</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="290" id="290">
-<td><a id="l290" class='ln'>290</a></td><td><span class="ct">                                        *   '&lt;S76&gt;/Constant3'</span></td></tr>
+<td><a id="l290" class='ln'>290</a></td><td>  <a id="290c3" class="tk">uint16_T</a> <a id="290c12" class="tk">f_lpf_vdq</a>;                  <span class="ct">/* Variable: f_lpf_vdq</span></td></tr>
 <tr name="291" id="291">
-<td><a id="l291" class='ln'>291</a></td><td><span class="ct">                                        *   '&lt;S76&gt;/Constant5'</span></td></tr>
+<td><a id="l291" class='ln'>291</a></td><td><span class="ct">                                        * Referenced by: '&lt;S68&gt;/Constant'</span></td></tr>
 <tr name="292" id="292">
-<td><a id="l292" class='ln'>292</a></td><td><span class="ct">                                        *   '&lt;S87&gt;/Constant6'</span></td></tr>
+<td><a id="l292" class='ln'>292</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="293" id="293">
-<td><a id="l293" class='ln'>293</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l293" class='ln'>293</a></td><td>  <a id="293c3" class="tk">uint16_T</a> <a id="293c12" class="tk">i_pwm_count</a>;                <span class="ct">/* Variable: i_pwm_count</span></td></tr>
 <tr name="294" id="294">
-<td><a id="l294" class='ln'>294</a></td><td>  <a id="294c3" class="tk">int16_T</a> <a id="294c11" class="tk">id_fieldWeakMax</a>;             <span class="ct">/* Variable: id_fieldWeakMax</span></td></tr>
+<td><a id="l294" class='ln'>294</a></td><td><span class="ct">                                        * Referenced by: '&lt;S53&gt;/Constant1'</span></td></tr>
 <tr name="295" id="295">
-<td><a id="l295" class='ln'>295</a></td><td><span class="ct">                                        * Referenced by: '&lt;S74&gt;/Constant6'</span></td></tr>
+<td><a id="l295" class='ln'>295</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="296" id="296">
-<td><a id="l296" class='ln'>296</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l296" class='ln'>296</a></td><td>  <a id="296c3" class="tk">uint8_T</a> <a id="296c11" class="tk">n_polePairs</a>;                 <span class="ct">/* Variable: n_polePairs</span></td></tr>
 <tr name="297" id="297">
-<td><a id="l297" class='ln'>297</a></td><td>  <a id="297c3" class="tk">int16_T</a> <a id="297c11" class="tk">dz_OpenStepVol</a>;              <span class="ct">/* Variable: dz_OpenStepVol</span></td></tr>
+<td><a id="l297" class='ln'>297</a></td><td><span class="ct">                                        * Referenced by: '&lt;S29&gt;/polePairs'</span></td></tr>
 <tr name="298" id="298">
-<td><a id="l298" class='ln'>298</a></td><td><span class="ct">                                        * Referenced by: '&lt;S29&gt;/Constant5'</span></td></tr>
+<td><a id="l298" class='ln'>298</a></td><td><span class="ct">                                        */</span></td></tr>
 <tr name="299" id="299">
-<td><a id="l299" class='ln'>299</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l299" class='ln'>299</a></td><td><span class="br">}</span>;</td></tr>
 <tr name="300" id="300">
-<td><a id="l300" class='ln'>300</a></td><td>  <a id="300c3" class="tk">uint16_T</a> <a id="300c12" class="tk">f_lpf_idq</a>;                  <span class="ct">/* Variable: f_lpf_idq</span></td></tr>
+<td><a id="l300" class='ln'>300</a></td><td></td></tr>
 <tr name="301" id="301">
-<td><a id="l301" class='ln'>301</a></td><td><span class="ct">                                        * Referenced by: '&lt;S48&gt;/Constant'</span></td></tr>
+<td><a id="l301" class='ln'>301</a></td><td><span class="ct">/* Parameters (default storage) */</span></td></tr>
 <tr name="302" id="302">
-<td><a id="l302" class='ln'>302</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l302" class='ln'>302</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <a id="302c16" class="tk">P_</a> <a id="302c19" class="tk">P</a>;</td></tr>
 <tr name="303" id="303">
-<td><a id="l303" class='ln'>303</a></td><td>  <a id="303c3" class="tk">uint16_T</a> <a id="303c12" class="tk">f_lpf_vdq</a>;                  <span class="ct">/* Variable: f_lpf_vdq</span></td></tr>
+<td><a id="l303" class='ln'>303</a></td><td></td></tr>
 <tr name="304" id="304">
-<td><a id="l304" class='ln'>304</a></td><td><span class="ct">                                        * Referenced by: '&lt;S76&gt;/Constant'</span></td></tr>
+<td><a id="l304" class='ln'>304</a></td><td><span class="ct">/* Real-time Model Data Structure */</span></td></tr>
 <tr name="305" id="305">
-<td><a id="l305" class='ln'>305</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l305" class='ln'>305</a></td><td><span class="kw">struct</span> <a id="305c8" class="tk">tag_RTM</a> <span class="br">{</span></td></tr>
 <tr name="306" id="306">
-<td><a id="l306" class='ln'>306</a></td><td>  <a id="306c3" class="tk">uint16_T</a> <a id="306c12" class="tk">i_pwm_count</a>;                <span class="ct">/* Variable: i_pwm_count</span></td></tr>
+<td><a id="l306" class='ln'>306</a></td><td>  <span class="kw">const</span> <a id="306c9" class="tk">char_T</a> <a id="306c16" class="tk">*</a> <span class="kw">volatile</span> <a id="306c27" class="tk">errorStatus</a>;</td></tr>
 <tr name="307" id="307">
-<td><a id="l307" class='ln'>307</a></td><td><span class="ct">                                        * Referenced by: '&lt;S61&gt;/Constant1'</span></td></tr>
+<td><a id="l307" class='ln'>307</a></td><td>  <a id="307c3" class="tk">PrevZCX</a> <a id="307c11" class="tk">*</a><a id="307c12" class="tk">prevZCSigState</a>;</td></tr>
 <tr name="308" id="308">
-<td><a id="l308" class='ln'>308</a></td><td><span class="ct">                                        */</span></td></tr>
+<td><a id="l308" class='ln'>308</a></td><td>  <a id="308c3" class="tk">ExtU</a> <a id="308c8" class="tk">*</a><a id="308c9" class="tk">inputs</a>;</td></tr>
 <tr name="309" id="309">
-<td><a id="l309" class='ln'>309</a></td><td><span class="br">}</span>;</td></tr>
+<td><a id="l309" class='ln'>309</a></td><td>  <a id="309c3" class="tk">ExtY</a> <a id="309c8" class="tk">*</a><a id="309c9" class="tk">outputs</a>;</td></tr>
 <tr name="310" id="310">
-<td><a id="l310" class='ln'>310</a></td><td></td></tr>
+<td><a id="l310" class='ln'>310</a></td><td>  <a id="310c3" class="tk">DW</a> <a id="310c6" class="tk">*</a><a id="310c7" class="tk">dwork</a>;</td></tr>
 <tr name="311" id="311">
-<td><a id="l311" class='ln'>311</a></td><td><span class="ct">/* Parameters (default storage) */</span></td></tr>
+<td><a id="l311" class='ln'>311</a></td><td><span class="br">}</span>;</td></tr>
 <tr name="312" id="312">
-<td><a id="l312" class='ln'>312</a></td><td><span class="kw">typedef</span> <span class="kw">struct</span> <a id="312c16" class="tk">P_</a> <a id="312c19" class="tk">P</a>;</td></tr>
+<td><a id="l312" class='ln'>312</a></td><td></td></tr>
 <tr name="313" id="313">
-<td><a id="l313" class='ln'>313</a></td><td></td></tr>
+<td><a id="l313" class='ln'>313</a></td><td><span class="ct">/* Block parameters (default storage) */</span></td></tr>
 <tr name="314" id="314">
-<td><a id="l314" class='ln'>314</a></td><td><span class="ct">/* Real-time Model Data Structure */</span></td></tr>
+<td><a id="l314" class='ln'>314</a></td><td><span class="kw">extern</span> <a id="314c8" class="tk">P</a> <a id="314c10" class="tk">rtP</a>;</td></tr>
 <tr name="315" id="315">
-<td><a id="l315" class='ln'>315</a></td><td><span class="kw">struct</span> <a id="315c8" class="tk">tag_RTM</a> <span class="br">{</span></td></tr>
+<td><a id="l315" class='ln'>315</a></td><td></td></tr>
 <tr name="316" id="316">
-<td><a id="l316" class='ln'>316</a></td><td>  <span class="kw">const</span> <a id="316c9" class="tk">char_T</a> <a id="316c16" class="tk">*</a> <span class="kw">volatile</span> <a id="316c27" class="tk">errorStatus</a>;</td></tr>
+<td><a id="l316" class='ln'>316</a></td><td><span class="ct">/* Constant parameters (default storage) */</span></td></tr>
 <tr name="317" id="317">
-<td><a id="l317" class='ln'>317</a></td><td>  <a id="317c3" class="tk">PrevZCX</a> <a id="317c11" class="tk">*</a><a id="317c12" class="tk">prevZCSigState</a>;</td></tr>
+<td><a id="l317" class='ln'>317</a></td><td><span class="kw">extern</span> <span class="kw">const</span> <a id="317c14" class="tk">ConstP</a> <a id="317c21" class="tk">rtConstP</a>;</td></tr>
 <tr name="318" id="318">
-<td><a id="l318" class='ln'>318</a></td><td>  <a id="318c3" class="tk">ExtU</a> <a id="318c8" class="tk">*</a><a id="318c9" class="tk">inputs</a>;</td></tr>
+<td><a id="l318" class='ln'>318</a></td><td></td></tr>
 <tr name="319" id="319">
-<td><a id="l319" class='ln'>319</a></td><td>  <a id="319c3" class="tk">ExtY</a> <a id="319c8" class="tk">*</a><a id="319c9" class="tk">outputs</a>;</td></tr>
+<td><a id="l319" class='ln'>319</a></td><td><span class="ct">/* Model entry point functions */</span></td></tr>
 <tr name="320" id="320">
-<td><a id="l320" class='ln'>320</a></td><td>  <a id="320c3" class="tk">DW</a> <a id="320c6" class="tk">*</a><a id="320c7" class="tk">dwork</a>;</td></tr>
+<td><a id="l320" class='ln'>320</a></td><td><span class="kw">extern</span> <span class="kw">void</span> <a id="320c13" class="tk">PMSM_Controller_initialize</a>(<a id="320c40" class="tk">RT_MODEL</a> <a id="320c49" class="tk">*</a><span class="kw">const</span> <a id="320c56" class="tk">rtM</a>);</td></tr>
 <tr name="321" id="321">
-<td><a id="l321" class='ln'>321</a></td><td><span class="br">}</span>;</td></tr>
+<td><a id="l321" class='ln'>321</a></td><td><span class="kw">extern</span> <span class="kw">void</span> <a id="321c13" class="tk">PMSM_Controller_step</a>(<a id="321c34" class="tk">RT_MODEL</a> <a id="321c43" class="tk">*</a><span class="kw">const</span> <a id="321c50" class="tk">rtM</a>);</td></tr>
 <tr name="322" id="322">
 <td><a id="l322" class='ln'>322</a></td><td></td></tr>
 <tr name="323" id="323">
-<td><a id="l323" class='ln'>323</a></td><td><span class="ct">/* Block parameters (default storage) */</span></td></tr>
+<td><a id="l323" class='ln'>323</a></td><td><span class="ct">/*-</span></td></tr>
 <tr name="324" id="324">
-<td><a id="l324" class='ln'>324</a></td><td><span class="kw">extern</span> <a id="324c8" class="tk">P</a> <a id="324c10" class="tk">rtP</a>;</td></tr>
+<td><a id="l324" class='ln'>324</a></td><td><span class="ct"> * These blocks were eliminated from the model due to optimizations:</span></td></tr>
 <tr name="325" id="325">
-<td><a id="l325" class='ln'>325</a></td><td></td></tr>
+<td><a id="l325" class='ln'>325</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="326" id="326">
-<td><a id="l326" class='ln'>326</a></td><td><span class="ct">/* Constant parameters (default storage) */</span></td></tr>
+<td><a id="l326" class='ln'>326</a></td><td><span class="ct"> * Block '&lt;S19&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="327" id="327">
-<td><a id="l327" class='ln'>327</a></td><td><span class="kw">extern</span> <span class="kw">const</span> <a id="327c14" class="tk">ConstP</a> <a id="327c21" class="tk">rtConstP</a>;</td></tr>
+<td><a id="l327" class='ln'>327</a></td><td><span class="ct"> * Block '&lt;S3&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="328" id="328">
-<td><a id="l328" class='ln'>328</a></td><td></td></tr>
+<td><a id="l328" class='ln'>328</a></td><td><span class="ct"> * Block '&lt;S20&gt;/Logical Operator4' : Unused code path elimination</span></td></tr>
 <tr name="329" id="329">
-<td><a id="l329" class='ln'>329</a></td><td><span class="ct">/* Model entry point functions */</span></td></tr>
+<td><a id="l329" class='ln'>329</a></td><td><span class="ct"> * Block '&lt;S29&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="330" id="330">
-<td><a id="l330" class='ln'>330</a></td><td><span class="kw">extern</span> <span class="kw">void</span> <a id="330c13" class="tk">PMSM_Controller_initialize</a>(<a id="330c40" class="tk">RT_MODEL</a> <a id="330c49" class="tk">*</a><span class="kw">const</span> <a id="330c56" class="tk">rtM</a>);</td></tr>
+<td><a id="l330" class='ln'>330</a></td><td><span class="ct"> * Block '&lt;S20&gt;/Scope1' : Unused code path elimination</span></td></tr>
 <tr name="331" id="331">
-<td><a id="l331" class='ln'>331</a></td><td><span class="kw">extern</span> <span class="kw">void</span> <a id="331c13" class="tk">PMSM_Controller_step</a>(<a id="331c34" class="tk">RT_MODEL</a> <a id="331c43" class="tk">*</a><span class="kw">const</span> <a id="331c50" class="tk">rtM</a>);</td></tr>
+<td><a id="l331" class='ln'>331</a></td><td><span class="ct"> * Block '&lt;S20&gt;/Scope2' : Unused code path elimination</span></td></tr>
 <tr name="332" id="332">
-<td><a id="l332" class='ln'>332</a></td><td></td></tr>
+<td><a id="l332" class='ln'>332</a></td><td><span class="ct"> * Block '&lt;S46&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="333" id="333">
-<td><a id="l333" class='ln'>333</a></td><td><span class="ct">/*-</span></td></tr>
+<td><a id="l333" class='ln'>333</a></td><td><span class="ct"> * Block '&lt;S39&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="334" id="334">
-<td><a id="l334" class='ln'>334</a></td><td><span class="ct"> * These blocks were eliminated from the model due to optimizations:</span></td></tr>
+<td><a id="l334" class='ln'>334</a></td><td><span class="ct"> * Block '&lt;S49&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="335" id="335">
-<td><a id="l335" class='ln'>335</a></td><td><span class="ct"> *</span></td></tr>
+<td><a id="l335" class='ln'>335</a></td><td><span class="ct"> * Block '&lt;S40&gt;/Constant1' : Unused code path elimination</span></td></tr>
 <tr name="336" id="336">
-<td><a id="l336" class='ln'>336</a></td><td><span class="ct"> * Block '&lt;S2&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l336" class='ln'>336</a></td><td><span class="ct"> * Block '&lt;S40&gt;/Min' : Unused code path elimination</span></td></tr>
 <tr name="337" id="337">
-<td><a id="l337" class='ln'>337</a></td><td><span class="ct"> * Block '&lt;S8&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l337" class='ln'>337</a></td><td><span class="ct"> * Block '&lt;S50&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="338" id="338">
-<td><a id="l338" class='ln'>338</a></td><td><span class="ct"> * Block '&lt;S10&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l338" class='ln'>338</a></td><td><span class="ct"> * Block '&lt;S50&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="339" id="339">
-<td><a id="l339" class='ln'>339</a></td><td><span class="ct"> * Block '&lt;S11&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l339" class='ln'>339</a></td><td><span class="ct"> * Block '&lt;S51&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="340" id="340">
-<td><a id="l340" class='ln'>340</a></td><td><span class="ct"> * Block '&lt;S3&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l340" class='ln'>340</a></td><td><span class="ct"> * Block '&lt;S51&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="341" id="341">
-<td><a id="l341" class='ln'>341</a></td><td><span class="ct"> * Block '&lt;S14&gt;/Logical Operator4' : Unused code path elimination</span></td></tr>
+<td><a id="l341" class='ln'>341</a></td><td><span class="ct"> * Block '&lt;S52&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="342" id="342">
-<td><a id="l342" class='ln'>342</a></td><td><span class="ct"> * Block '&lt;S20&gt;/Abs2' : Unused code path elimination</span></td></tr>
+<td><a id="l342" class='ln'>342</a></td><td><span class="ct"> * Block '&lt;S61&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="343" id="343">
-<td><a id="l343" class='ln'>343</a></td><td><span class="ct"> * Block '&lt;S20&gt;/Add' : Unused code path elimination</span></td></tr>
+<td><a id="l343" class='ln'>343</a></td><td><span class="ct"> * Block '&lt;S42&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="344" id="344">
-<td><a id="l344" class='ln'>344</a></td><td><span class="ct"> * Block '&lt;S22&gt;/Compare' : Unused code path elimination</span></td></tr>
+<td><a id="l344" class='ln'>344</a></td><td><span class="ct"> * Block '&lt;S71&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="345" id="345">
-<td><a id="l345" class='ln'>345</a></td><td><span class="ct"> * Block '&lt;S22&gt;/Constant' : Unused code path elimination</span></td></tr>
+<td><a id="l345" class='ln'>345</a></td><td><span class="ct"> * Block '&lt;S71&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="346" id="346">
-<td><a id="l346" class='ln'>346</a></td><td><span class="ct"> * Block '&lt;S20&gt;/Sum7' : Unused code path elimination</span></td></tr>
+<td><a id="l346" class='ln'>346</a></td><td><span class="ct"> * Block '&lt;S74&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="347" id="347">
-<td><a id="l347" class='ln'>347</a></td><td><span class="ct"> * Block '&lt;S20&gt;/UnitDelay4' : Unused code path elimination</span></td></tr>
+<td><a id="l347" class='ln'>347</a></td><td><span class="ct"> * Block '&lt;S76&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="348" id="348">
-<td><a id="l348" class='ln'>348</a></td><td><span class="ct"> * Block '&lt;S20&gt;/UnitDelay6' : Unused code path elimination</span></td></tr>
+<td><a id="l348" class='ln'>348</a></td><td><span class="ct"> * Block '&lt;S76&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="349" id="349">
-<td><a id="l349" class='ln'>349</a></td><td><span class="ct"> * Block '&lt;S20&gt;/UnitDelay7' : Unused code path elimination</span></td></tr>
+<td><a id="l349" class='ln'>349</a></td><td><span class="ct"> * Block '&lt;S77&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="350" id="350">
-<td><a id="l350" class='ln'>350</a></td><td><span class="ct"> * Block '&lt;S20&gt;/UnitDelay8' : Unused code path elimination</span></td></tr>
+<td><a id="l350" class='ln'>350</a></td><td><span class="ct"> * Block '&lt;S77&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="351" id="351">
-<td><a id="l351" class='ln'>351</a></td><td><span class="ct"> * Block '&lt;S20&gt;/dz_cntTrnsDet' : Unused code path elimination</span></td></tr>
+<td><a id="l351" class='ln'>351</a></td><td><span class="ct"> * Block '&lt;S83&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="352" id="352">
-<td><a id="l352" class='ln'>352</a></td><td><span class="ct"> * Block '&lt;S14&gt;/Scope1' : Unused code path elimination</span></td></tr>
+<td><a id="l352" class='ln'>352</a></td><td><span class="ct"> * Block '&lt;S83&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="353" id="353">
-<td><a id="l353" class='ln'>353</a></td><td><span class="ct"> * Block '&lt;S14&gt;/Scope2' : Unused code path elimination</span></td></tr>
+<td><a id="l353" class='ln'>353</a></td><td><span class="ct"> * Block '&lt;S84&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="354" id="354">
-<td><a id="l354" class='ln'>354</a></td><td><span class="ct"> * Block '&lt;S4&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l354" class='ln'>354</a></td><td><span class="ct"> * Block '&lt;S84&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="355" id="355">
-<td><a id="l355" class='ln'>355</a></td><td><span class="ct"> * Block '&lt;S26&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l355" class='ln'>355</a></td><td><span class="ct"> * Block '&lt;S93&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="356" id="356">
-<td><a id="l356" class='ln'>356</a></td><td><span class="ct"> * Block '&lt;S34&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l356" class='ln'>356</a></td><td><span class="ct"> * Block '&lt;S93&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="357" id="357">
-<td><a id="l357" class='ln'>357</a></td><td><span class="ct"> * Block '&lt;S34&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l357" class='ln'>357</a></td><td><span class="ct"> * Block '&lt;S95&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="358" id="358">
-<td><a id="l358" class='ln'>358</a></td><td><span class="ct"> * Block '&lt;S1&gt;/Scope2' : Unused code path elimination</span></td></tr>
+<td><a id="l358" class='ln'>358</a></td><td><span class="ct"> * Block '&lt;S95&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="359" id="359">
-<td><a id="l359" class='ln'>359</a></td><td><span class="ct"> * Block '&lt;S55&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l359" class='ln'>359</a></td><td><span class="ct"> * Block '&lt;S45&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="360" id="360">
-<td><a id="l360" class='ln'>360</a></td><td><span class="ct"> * Block '&lt;S48&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l360" class='ln'>360</a></td><td><span class="ct"> * Block '&lt;S100&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="361" id="361">
-<td><a id="l361" class='ln'>361</a></td><td><span class="ct"> * Block '&lt;S58&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l361" class='ln'>361</a></td><td><span class="ct"> * Block '&lt;S100&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="362" id="362">
-<td><a id="l362" class='ln'>362</a></td><td><span class="ct"> * Block '&lt;S59&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l362" class='ln'>362</a></td><td><span class="ct"> * Block '&lt;S107&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="363" id="363">
-<td><a id="l363" class='ln'>363</a></td><td><span class="ct"> * Block '&lt;S59&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l363" class='ln'>363</a></td><td><span class="ct"> * Block '&lt;S107&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="364" id="364">
-<td><a id="l364" class='ln'>364</a></td><td><span class="ct"> * Block '&lt;S60&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l364" class='ln'>364</a></td><td><span class="ct"> * Block '&lt;S4&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="365" id="365">
-<td><a id="l365" class='ln'>365</a></td><td><span class="ct"> * Block '&lt;S69&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l365" class='ln'>365</a></td><td><span class="ct"> * Block '&lt;S37&gt;/Scope' : Unused code path elimination</span></td></tr>
 <tr name="366" id="366">
-<td><a id="l366" class='ln'>366</a></td><td><span class="ct"> * Block '&lt;S6&gt;/Scope12' : Unused code path elimination</span></td></tr>
+<td><a id="l366" class='ln'>366</a></td><td><span class="ct"> * Block '&lt;S117&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="367" id="367">
-<td><a id="l367" class='ln'>367</a></td><td><span class="ct"> * Block '&lt;S51&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l367" class='ln'>367</a></td><td><span class="ct"> * Block '&lt;S117&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="368" id="368">
-<td><a id="l368" class='ln'>368</a></td><td><span class="ct"> * Block '&lt;S79&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l368" class='ln'>368</a></td><td><span class="ct"> * Block '&lt;S121&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
 <tr name="369" id="369">
-<td><a id="l369" class='ln'>369</a></td><td><span class="ct"> * Block '&lt;S79&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l369" class='ln'>369</a></td><td><span class="ct"> * Block '&lt;S121&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
 <tr name="370" id="370">
-<td><a id="l370" class='ln'>370</a></td><td><span class="ct"> * Block '&lt;S82&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l370" class='ln'>370</a></td><td><span class="ct"> * Block '&lt;S1&gt;/Data Type Conversion4' : Eliminate redundant data type conversion</span></td></tr>
 <tr name="371" id="371">
-<td><a id="l371" class='ln'>371</a></td><td><span class="ct"> * Block '&lt;S84&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l371" class='ln'>371</a></td><td><span class="ct"> * Block '&lt;S1&gt;/Data Type Conversion6' : Eliminate redundant data type conversion</span></td></tr>
 <tr name="372" id="372">
-<td><a id="l372" class='ln'>372</a></td><td><span class="ct"> * Block '&lt;S84&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l372" class='ln'>372</a></td><td><span class="ct"> * Block '&lt;S1&gt;/Data Type Conversion7' : Eliminate redundant data type conversion</span></td></tr>
 <tr name="373" id="373">
-<td><a id="l373" class='ln'>373</a></td><td><span class="ct"> * Block '&lt;S85&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l373" class='ln'>373</a></td><td><span class="ct"> * Block '&lt;S70&gt;/Data Type Conversion1' : Eliminate redundant data type conversion</span></td></tr>
 <tr name="374" id="374">
-<td><a id="l374" class='ln'>374</a></td><td><span class="ct"> * Block '&lt;S85&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l374" class='ln'>374</a></td><td><span class="ct"> * Block '&lt;S72&gt;/Data Type Conversion' : Eliminate redundant data type conversion</span></td></tr>
 <tr name="375" id="375">
-<td><a id="l375" class='ln'>375</a></td><td><span class="ct"> * Block '&lt;S91&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l375" class='ln'>375</a></td><td><span class="ct"> * Block '&lt;S36&gt;/Data Type Conversion' : Eliminate redundant data type conversion</span></td></tr>
 <tr name="376" id="376">
-<td><a id="l376" class='ln'>376</a></td><td><span class="ct"> * Block '&lt;S91&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l376" class='ln'>376</a></td><td><span class="ct"> * Block '&lt;S66&gt;/Constant1' : Unused code path elimination</span></td></tr>
 <tr name="377" id="377">
-<td><a id="l377" class='ln'>377</a></td><td><span class="ct"> * Block '&lt;S94&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l377" class='ln'>377</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Add' : Unused code path elimination</span></td></tr>
 <tr name="378" id="378">
-<td><a id="l378" class='ln'>378</a></td><td><span class="ct"> * Block '&lt;S94&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l378" class='ln'>378</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Constant1' : Unused code path elimination</span></td></tr>
 <tr name="379" id="379">
-<td><a id="l379" class='ln'>379</a></td><td><span class="ct"> * Block '&lt;S103&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l379" class='ln'>379</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Constant3' : Unused code path elimination</span></td></tr>
 <tr name="380" id="380">
-<td><a id="l380" class='ln'>380</a></td><td><span class="ct"> * Block '&lt;S103&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l380" class='ln'>380</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Constant4' : Unused code path elimination</span></td></tr>
 <tr name="381" id="381">
-<td><a id="l381" class='ln'>381</a></td><td><span class="ct"> * Block '&lt;S105&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l381" class='ln'>381</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Constant5' : Unused code path elimination</span></td></tr>
 <tr name="382" id="382">
-<td><a id="l382" class='ln'>382</a></td><td><span class="ct"> * Block '&lt;S105&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l382" class='ln'>382</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Constant6' : Unused code path elimination</span></td></tr>
 <tr name="383" id="383">
-<td><a id="l383" class='ln'>383</a></td><td><span class="ct"> * Block '&lt;S54&gt;/Scope' : Unused code path elimination</span></td></tr>
+<td><a id="l383" class='ln'>383</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Divide' : Unused code path elimination</span></td></tr>
 <tr name="384" id="384">
-<td><a id="l384" class='ln'>384</a></td><td><span class="ct"> * Block '&lt;S110&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l384" class='ln'>384</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Divide1' : Unused code path elimination</span></td></tr>
 <tr name="385" id="385">
-<td><a id="l385" class='ln'>385</a></td><td><span class="ct"> * Block '&lt;S110&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l385" class='ln'>385</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Divide2' : Unused code path elimination</span></td></tr>
 <tr name="386" id="386">
-<td><a id="l386" class='ln'>386</a></td><td><span class="ct"> * Block '&lt;S117&gt;/Data Type Duplicate' : Unused code path elimination</span></td></tr>
+<td><a id="l386" class='ln'>386</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Divide4' : Unused code path elimination</span></td></tr>
 <tr name="387" id="387">
-<td><a id="l387" class='ln'>387</a></td><td><span class="ct"> * Block '&lt;S117&gt;/Data Type Propagation' : Unused code path elimination</span></td></tr>
+<td><a id="l387" class='ln'>387</a></td><td><span class="ct"> * Block '&lt;S89&gt;/Gain' : Unused code path elimination</span></td></tr>
 <tr name="388" id="388">
-<td><a id="l388" class='ln'>388</a></td><td><span class="ct"> * Block '&lt;S10&gt;/Manual Switch' : Eliminated due to constant selection input</span></td></tr>
+<td><a id="l388" class='ln'>388</a></td><td><span class="ct"> * Block '&lt;S85&gt;/Gain' : Unused code path elimination</span></td></tr>
 <tr name="389" id="389">
-<td><a id="l389" class='ln'>389</a></td><td><span class="ct"> * Block '&lt;S26&gt;/Data Type Conversion' : Eliminate redundant data type conversion</span></td></tr>
+<td><a id="l389" class='ln'>389</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="390" id="390">
-<td><a id="l390" class='ln'>390</a></td><td><span class="ct"> * Block '&lt;S6&gt;/Data Type Conversion' : Eliminate redundant data type conversion</span></td></tr>
+<td><a id="l390" class='ln'>390</a></td><td></td></tr>
 <tr name="391" id="391">
-<td><a id="l391" class='ln'>391</a></td><td><span class="ct"> * Block '&lt;S78&gt;/Data Type Conversion1' : Eliminate redundant data type conversion</span></td></tr>
+<td><a id="l391" class='ln'>391</a></td><td><span class="ct">/*-</span></td></tr>
 <tr name="392" id="392">
-<td><a id="l392" class='ln'>392</a></td><td><span class="ct"> * Block '&lt;S80&gt;/Data Type Conversion' : Eliminate redundant data type conversion</span></td></tr>
+<td><a id="l392" class='ln'>392</a></td><td><span class="ct"> * The generated code includes comments that allow you to trace directly</span></td></tr>
 <tr name="393" id="393">
-<td><a id="l393" class='ln'>393</a></td><td><span class="ct"> * Block '&lt;S10&gt;/Constant' : Unused code path elimination</span></td></tr>
+<td><a id="l393" class='ln'>393</a></td><td><span class="ct"> * back to the appropriate location in the model.  The basic format</span></td></tr>
 <tr name="394" id="394">
-<td><a id="l394" class='ln'>394</a></td><td><span class="ct"> * Block '&lt;S20&gt;/Divide14' : Unused code path elimination</span></td></tr>
+<td><a id="l394" class='ln'>394</a></td><td><span class="ct"> * is &lt;system&gt;/block_name, where system is the system number (uniquely</span></td></tr>
 <tr name="395" id="395">
-<td><a id="l395" class='ln'>395</a></td><td><span class="ct"> * Block '&lt;S20&gt;/smooth' : Unused code path elimination</span></td></tr>
+<td><a id="l395" class='ln'>395</a></td><td><span class="ct"> * assigned by Simulink) and block_name is the name of the block.</span></td></tr>
 <tr name="396" id="396">
-<td><a id="l396" class='ln'>396</a></td><td><span class="ct"> * Block '&lt;S74&gt;/Constant1' : Unused code path elimination</span></td></tr>
+<td><a id="l396" class='ln'>396</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="397" id="397">
-<td><a id="l397" class='ln'>397</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Add' : Unused code path elimination</span></td></tr>
+<td><a id="l397" class='ln'>397</a></td><td><span class="ct"> * Note that this particular code originates from a subsystem build,</span></td></tr>
 <tr name="398" id="398">
-<td><a id="l398" class='ln'>398</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Constant1' : Unused code path elimination</span></td></tr>
+<td><a id="l398" class='ln'>398</a></td><td><span class="ct"> * and has its own system numbers different from the parent model.</span></td></tr>
 <tr name="399" id="399">
-<td><a id="l399" class='ln'>399</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Constant3' : Unused code path elimination</span></td></tr>
+<td><a id="l399" class='ln'>399</a></td><td><span class="ct"> * Refer to the system hierarchy for this subsystem below, and use the</span></td></tr>
 <tr name="400" id="400">
-<td><a id="l400" class='ln'>400</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Constant4' : Unused code path elimination</span></td></tr>
+<td><a id="l400" class='ln'>400</a></td><td><span class="ct"> * MATLAB hilite_system command to trace the generated code back</span></td></tr>
 <tr name="401" id="401">
-<td><a id="l401" class='ln'>401</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Constant5' : Unused code path elimination</span></td></tr>
+<td><a id="l401" class='ln'>401</a></td><td><span class="ct"> * to the parent model.  For example,</span></td></tr>
 <tr name="402" id="402">
-<td><a id="l402" class='ln'>402</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Constant6' : Unused code path elimination</span></td></tr>
+<td><a id="l402" class='ln'>402</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="403" id="403">
-<td><a id="l403" class='ln'>403</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Divide' : Unused code path elimination</span></td></tr>
+<td><a id="l403" class='ln'>403</a></td><td><span class="ct"> * hilite_system('MotorController_FOC_hall/PMSM_Controller')    - opens subsystem MotorController_FOC_hall/PMSM_Controller</span></td></tr>
 <tr name="404" id="404">
-<td><a id="l404" class='ln'>404</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Divide1' : Unused code path elimination</span></td></tr>
+<td><a id="l404" class='ln'>404</a></td><td><span class="ct"> * hilite_system('MotorController_FOC_hall/PMSM_Controller/Kp') - opens and selects block Kp</span></td></tr>
 <tr name="405" id="405">
-<td><a id="l405" class='ln'>405</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Divide2' : Unused code path elimination</span></td></tr>
+<td><a id="l405" class='ln'>405</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="406" id="406">
-<td><a id="l406" class='ln'>406</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Divide4' : Unused code path elimination</span></td></tr>
+<td><a id="l406" class='ln'>406</a></td><td><span class="ct"> * Here is the system hierarchy for this model</span></td></tr>
 <tr name="407" id="407">
-<td><a id="l407" class='ln'>407</a></td><td><span class="ct"> * Block '&lt;S99&gt;/Gain' : Unused code path elimination</span></td></tr>
+<td><a id="l407" class='ln'>407</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="408" id="408">
-<td><a id="l408" class='ln'>408</a></td><td><span class="ct"> * Block '&lt;S95&gt;/Gain' : Unused code path elimination</span></td></tr>
+<td><a id="l408" class='ln'>408</a></td><td><span class="ct"> * '&lt;Root&gt;' : 'MotorController_FOC_hall'</span></td></tr>
 <tr name="409" id="409">
-<td><a id="l409" class='ln'>409</a></td><td><span class="ct"> */</span></td></tr>
+<td><a id="l409" class='ln'>409</a></td><td><span class="ct"> * '&lt;S1&gt;'   : 'MotorController_FOC_hall/PMSM_Controller'</span></td></tr>
 <tr name="410" id="410">
-<td><a id="l410" class='ln'>410</a></td><td></td></tr>
+<td><a id="l410" class='ln'>410</a></td><td><span class="ct"> * '&lt;S2&gt;'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics'</span></td></tr>
 <tr name="411" id="411">
-<td><a id="l411" class='ln'>411</a></td><td><span class="ct">/*-</span></td></tr>
+<td><a id="l411" class='ln'>411</a></td><td><span class="ct"> * '&lt;S3&gt;'   : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation'</span></td></tr>
 <tr name="412" id="412">
-<td><a id="l412" class='ln'>412</a></td><td><span class="ct"> * The generated code includes comments that allow you to trace directly</span></td></tr>
+<td><a id="l412" class='ln'>412</a></td><td><span class="ct"> * '&lt;S4&gt;'   : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC'</span></td></tr>
 <tr name="413" id="413">
-<td><a id="l413" class='ln'>413</a></td><td><span class="ct"> * back to the appropriate location in the model.  The basic format</span></td></tr>
+<td><a id="l413" class='ln'>413</a></td><td><span class="ct"> * '&lt;S5&gt;'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled'</span></td></tr>
 <tr name="414" id="414">
-<td><a id="l414" class='ln'>414</a></td><td><span class="ct"> * is &lt;system&gt;/block_name, where system is the system number (uniquely</span></td></tr>
+<td><a id="l414" class='ln'>414</a></td><td><span class="ct"> * '&lt;S6&gt;'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter'</span></td></tr>
 <tr name="415" id="415">
-<td><a id="l415" class='ln'>415</a></td><td><span class="ct"> * assigned by Simulink) and block_name is the name of the block.</span></td></tr>
+<td><a id="l415" class='ln'>415</a></td><td><span class="ct"> * '&lt;S7&gt;'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Edge'</span></td></tr>
 <tr name="416" id="416">
-<td><a id="l416" class='ln'>416</a></td><td><span class="ct"> *</span></td></tr>
+<td><a id="l416" class='ln'>416</a></td><td><span class="ct"> * '&lt;S8&gt;'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Default'</span></td></tr>
 <tr name="417" id="417">
-<td><a id="l417" class='ln'>417</a></td><td><span class="ct"> * Note that this particular code originates from a subsystem build,</span></td></tr>
+<td><a id="l417" class='ln'>417</a></td><td><span class="ct"> * '&lt;S9&gt;'   : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification'</span></td></tr>
 <tr name="418" id="418">
-<td><a id="l418" class='ln'>418</a></td><td><span class="ct"> * and has its own system numbers different from the parent model.</span></td></tr>
+<td><a id="l418" class='ln'>418</a></td><td><span class="ct"> * '&lt;S10&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Edge'</span></td></tr>
 <tr name="419" id="419">
-<td><a id="l419" class='ln'>419</a></td><td><span class="ct"> * Refer to the system hierarchy for this subsystem below, and use the</span></td></tr>
+<td><a id="l419" class='ln'>419</a></td><td><span class="ct"> * '&lt;S11&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification'</span></td></tr>
 <tr name="420" id="420">
-<td><a id="l420" class='ln'>420</a></td><td><span class="ct"> * MATLAB hilite_system command to trace the generated code back</span></td></tr>
+<td><a id="l420" class='ln'>420</a></td><td><span class="ct"> * '&lt;S12&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter'</span></td></tr>
 <tr name="421" id="421">
-<td><a id="l421" class='ln'>421</a></td><td><span class="ct"> * to the parent model.  For example,</span></td></tr>
+<td><a id="l421" class='ln'>421</a></td><td><span class="ct"> * '&lt;S13&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter/rst_Delay1'</span></td></tr>
 <tr name="422" id="422">
-<td><a id="l422" class='ln'>422</a></td><td><span class="ct"> *</span></td></tr>
+<td><a id="l422" class='ln'>422</a></td><td><span class="ct"> * '&lt;S14&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter'</span></td></tr>
 <tr name="423" id="423">
-<td><a id="l423" class='ln'>423</a></td><td><span class="ct"> * hilite_system('MotorController_FOC/PMSM_Controller')    - opens subsystem MotorController_FOC/PMSM_Controller</span></td></tr>
+<td><a id="l423" class='ln'>423</a></td><td><span class="ct"> * '&lt;S15&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter/rst_Delay1'</span></td></tr>
 <tr name="424" id="424">
-<td><a id="l424" class='ln'>424</a></td><td><span class="ct"> * hilite_system('MotorController_FOC/PMSM_Controller/Kp') - opens and selects block Kp</span></td></tr>
+<td><a id="l424" class='ln'>424</a></td><td><span class="ct"> * '&lt;S16&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Direction_Detection'</span></td></tr>
 <tr name="425" id="425">
-<td><a id="l425" class='ln'>425</a></td><td><span class="ct"> *</span></td></tr>
+<td><a id="l425" class='ln'>425</a></td><td><span class="ct"> * '&lt;S17&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Edge_Detect'</span></td></tr>
 <tr name="426" id="426">
-<td><a id="l426" class='ln'>426</a></td><td><span class="ct"> * Here is the system hierarchy for this model</span></td></tr>
+<td><a id="l426" class='ln'>426</a></td><td><span class="ct"> * '&lt;S18&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation'</span></td></tr>
 <tr name="427" id="427">
-<td><a id="l427" class='ln'>427</a></td><td><span class="ct"> *</span></td></tr>
+<td><a id="l427" class='ln'>427</a></td><td><span class="ct"> * '&lt;S19&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Hall_Angle_Raw'</span></td></tr>
 <tr name="428" id="428">
-<td><a id="l428" class='ln'>428</a></td><td><span class="ct"> * '&lt;Root&gt;' : 'MotorController_FOC'</span></td></tr>
+<td><a id="l428" class='ln'>428</a></td><td><span class="ct"> * '&lt;S20&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation'</span></td></tr>
 <tr name="429" id="429">
-<td><a id="l429" class='ln'>429</a></td><td><span class="ct"> * '&lt;S1&gt;'   : 'MotorController_FOC/PMSM_Controller'</span></td></tr>
+<td><a id="l429" class='ln'>429</a></td><td><span class="ct"> * '&lt;S21&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta'</span></td></tr>
 <tr name="430" id="430">
-<td><a id="l430" class='ln'>430</a></td><td><span class="ct"> * '&lt;S2&gt;'   : 'MotorController_FOC/PMSM_Controller/1ms_Scheduler'</span></td></tr>
+<td><a id="l430" class='ln'>430</a></td><td><span class="ct"> * '&lt;S22&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad'</span></td></tr>
 <tr name="431" id="431">
-<td><a id="l431" class='ln'>431</a></td><td><span class="ct"> * '&lt;S3&gt;'   : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation'</span></td></tr>
+<td><a id="l431" class='ln'>431</a></td><td><span class="ct"> * '&lt;S23&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta/normal'</span></td></tr>
 <tr name="432" id="432">
-<td><a id="l432" class='ln'>432</a></td><td><span class="ct"> * '&lt;S4&gt;'   : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager'</span></td></tr>
+<td><a id="l432" class='ln'>432</a></td><td><span class="ct"> * '&lt;S24&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta/wrapper'</span></td></tr>
 <tr name="433" id="433">
-<td><a id="l433" class='ln'>433</a></td><td><span class="ct"> * '&lt;S5&gt;'   : 'MotorController_FOC/PMSM_Controller/Diagnostics'</span></td></tr>
+<td><a id="l433" class='ln'>433</a></td><td><span class="ct"> * '&lt;S25&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem'</span></td></tr>
 <tr name="434" id="434">
-<td><a id="l434" class='ln'>434</a></td><td><span class="ct"> * '&lt;S6&gt;'   : 'MotorController_FOC/PMSM_Controller/controller'</span></td></tr>
+<td><a id="l434" class='ln'>434</a></td><td><span class="ct"> * '&lt;S26&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem1'</span></td></tr>
 <tr name="435" id="435">
-<td><a id="l435" class='ln'>435</a></td><td><span class="ct"> * '&lt;S7&gt;'   : 'MotorController_FOC/PMSM_Controller/1ms_Scheduler/counter'</span></td></tr>
+<td><a id="l435" class='ln'>435</a></td><td><span class="ct"> * '&lt;S27&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem2'</span></td></tr>
 <tr name="436" id="436">
-<td><a id="l436" class='ln'>436</a></td><td><span class="ct"> * '&lt;S8&gt;'   : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Direction_Detection'</span></td></tr>
+<td><a id="l436" class='ln'>436</a></td><td><span class="ct"> * '&lt;S28&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/AdvCtrlDetect'</span></td></tr>
 <tr name="437" id="437">
-<td><a id="l437" class='ln'>437</a></td><td><span class="ct"> * '&lt;S9&gt;'   : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Edge_Detect'</span></td></tr>
+<td><a id="l437" class='ln'>437</a></td><td><span class="ct"> * '&lt;S29&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation'</span></td></tr>
 <tr name="438" id="438">
-<td><a id="l438" class='ln'>438</a></td><td><span class="ct"> * '&lt;S10&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation'</span></td></tr>
+<td><a id="l438" class='ln'>438</a></td><td><span class="ct"> * '&lt;S30&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/AdvCtrlDetect/Compare To Constant'</span></td></tr>
 <tr name="439" id="439">
-<td><a id="l439" class='ln'>439</a></td><td><span class="ct"> * '&lt;S11&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Hall_Angle_Raw'</span></td></tr>
+<td><a id="l439" class='ln'>439</a></td><td><span class="ct"> * '&lt;S31&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta'</span></td></tr>
 <tr name="440" id="440">
-<td><a id="l440" class='ln'>440</a></td><td><span class="ct"> * '&lt;S12&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/If Action Subsystem'</span></td></tr>
+<td><a id="l440" class='ln'>440</a></td><td><span class="ct"> * '&lt;S32&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta/normal'</span></td></tr>
 <tr name="441" id="441">
-<td><a id="l441" class='ln'>441</a></td><td><span class="ct"> * '&lt;S13&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/If Action Subsystem1'</span></td></tr>
+<td><a id="l441" class='ln'>441</a></td><td><span class="ct"> * '&lt;S33&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta/wrapper'</span></td></tr>
 <tr name="442" id="442">
-<td><a id="l442" class='ln'>442</a></td><td><span class="ct"> * '&lt;S14&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation'</span></td></tr>
+<td><a id="l442" class='ln'>442</a></td><td><span class="ct"> * '&lt;S34&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Call_Schduler'</span></td></tr>
 <tr name="443" id="443">
-<td><a id="l443" class='ln'>443</a></td><td><span class="ct"> * '&lt;S15&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation/degree_rad'</span></td></tr>
+<td><a id="l443" class='ln'>443</a></td><td><span class="ct"> * '&lt;S35&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core'</span></td></tr>
 <tr name="444" id="444">
-<td><a id="l444" class='ln'>444</a></td><td><span class="ct"> * '&lt;S16&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem'</span></td></tr>
+<td><a id="l444" class='ln'>444</a></td><td><span class="ct"> * '&lt;S36&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Ctrl_Mode_Transition'</span></td></tr>
 <tr name="445" id="445">
-<td><a id="l445" class='ln'>445</a></td><td><span class="ct"> * '&lt;S17&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem1'</span></td></tr>
+<td><a id="l445" class='ln'>445</a></td><td><span class="ct"> * '&lt;S37&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale'</span></td></tr>
 <tr name="446" id="446">
-<td><a id="l446" class='ln'>446</a></td><td><span class="ct"> * '&lt;S18&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem2'</span></td></tr>
+<td><a id="l446" class='ln'>446</a></td><td><span class="ct"> * '&lt;S38&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Call_Schduler/counter'</span></td></tr>
 <tr name="447" id="447">
-<td><a id="l447" class='ln'>447</a></td><td><span class="ct"> * '&lt;S19&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation/AdvCtrlDetect'</span></td></tr>
+<td><a id="l447" class='ln'>447</a></td><td><span class="ct"> * '&lt;S39&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park'</span></td></tr>
 <tr name="448" id="448">
-<td><a id="l448" class='ln'>448</a></td><td><span class="ct"> * '&lt;S20&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation'</span></td></tr>
+<td><a id="l448" class='ln'>448</a></td><td><span class="ct"> * '&lt;S40&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation'</span></td></tr>
 <tr name="449" id="449">
-<td><a id="l449" class='ln'>449</a></td><td><span class="ct"> * '&lt;S21&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation/AdvCtrlDetect/Compare To Constant'</span></td></tr>
+<td><a id="l449" class='ln'>449</a></td><td><span class="ct"> * '&lt;S41&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM'</span></td></tr>
 <tr name="450" id="450">
-<td><a id="l450" class='ln'>450</a></td><td><span class="ct"> * '&lt;S22&gt;'  : 'MotorController_FOC/PMSM_Controller/Angle_Speed_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Compare To Constant'</span></td></tr>
+<td><a id="l450" class='ln'>450</a></td><td><span class="ct"> * '&lt;S42&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/circle_limiter'</span></td></tr>
 <tr name="451" id="451">
-<td><a id="l451" class='ln'>451</a></td><td><span class="ct"> * '&lt;S23&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/Control_Mode_Manager'</span></td></tr>
+<td><a id="l451" class='ln'>451</a></td><td><span class="ct"> * '&lt;S43&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/current_sample'</span></td></tr>
 <tr name="452" id="452">
-<td><a id="l452" class='ln'>452</a></td><td><span class="ct"> * '&lt;S24&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/Limitition'</span></td></tr>
+<td><a id="l452" class='ln'>452</a></td><td><span class="ct"> * '&lt;S44&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc'</span></td></tr>
 <tr name="453" id="453">
-<td><a id="l453" class='ln'>453</a></td><td><span class="ct"> * '&lt;S25&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/Mode_Transition_Calculation'</span></td></tr>
+<td><a id="l453" class='ln'>453</a></td><td><span class="ct"> * '&lt;S45&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc'</span></td></tr>
 <tr name="454" id="454">
-<td><a id="l454" class='ln'>454</a></td><td><span class="ct"> * '&lt;S26&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale'</span></td></tr>
+<td><a id="l454" class='ln'>454</a></td><td><span class="ct"> * '&lt;S46&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Clarke'</span></td></tr>
 <tr name="455" id="455">
-<td><a id="l455" class='ln'>455</a></td><td><span class="ct"> * '&lt;S27&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/If Action Subsystem'</span></td></tr>
+<td><a id="l455" class='ln'>455</a></td><td><span class="ct"> * '&lt;S47&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Low_Pass_Filter'</span></td></tr>
 <tr name="456" id="456">
-<td><a id="l456" class='ln'>456</a></td><td><span class="ct"> * '&lt;S28&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/If Action Subsystem1'</span></td></tr>
+<td><a id="l456" class='ln'>456</a></td><td><span class="ct"> * '&lt;S48&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Park'</span></td></tr>
 <tr name="457" id="457">
-<td><a id="l457" class='ln'>457</a></td><td><span class="ct"> * '&lt;S29&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode'</span></td></tr>
+<td><a id="l457" class='ln'>457</a></td><td><span class="ct"> * '&lt;S49&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Sine_Cosine_Approximation'</span></td></tr>
 <tr name="458" id="458">
-<td><a id="l458" class='ln'>458</a></td><td><span class="ct"> * '&lt;S30&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/torque_mode'</span></td></tr>
+<td><a id="l458" class='ln'>458</a></td><td><span class="ct"> * '&lt;S50&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation/Saturation Dynamic'</span></td></tr>
 <tr name="459" id="459">
-<td><a id="l459" class='ln'>459</a></td><td><span class="ct"> * '&lt;S31&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Edge'</span></td></tr>
+<td><a id="l459" class='ln'>459</a></td><td><span class="ct"> * '&lt;S51&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation/Saturation Dynamic1'</span></td></tr>
 <tr name="460" id="460">
-<td><a id="l460" class='ln'>460</a></td><td><span class="ct"> * '&lt;S32&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control'</span></td></tr>
+<td><a id="l460" class='ln'>460</a></td><td><span class="ct"> * '&lt;S52&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/Park_Transform_Inverse'</span></td></tr>
 <tr name="461" id="461">
-<td><a id="l461" class='ln'>461</a></td><td><span class="ct"> * '&lt;S33&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control/RateInit'</span></td></tr>
+<td><a id="l461" class='ln'>461</a></td><td><span class="ct"> * '&lt;S53&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM'</span></td></tr>
 <tr name="462" id="462">
-<td><a id="l462" class='ln'>462</a></td><td><span class="ct"> * '&lt;S34&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control/Saturation Dynamic'</span></td></tr>
+<td><a id="l462" class='ln'>462</a></td><td><span class="ct"> * '&lt;S54&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen'</span></td></tr>
 <tr name="463" id="463">
-<td><a id="l463" class='ln'>463</a></td><td><span class="ct"> * '&lt;S35&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control/StepAdd'</span></td></tr>
+<td><a id="l463" class='ln'>463</a></td><td><span class="ct"> * '&lt;S55&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/sector_select'</span></td></tr>
 <tr name="464" id="464">
-<td><a id="l464" class='ln'>464</a></td><td><span class="ct"> * '&lt;S36&gt;'  : 'MotorController_FOC/PMSM_Controller/Control_Mode_Manager/target_scale/open_mode/Rate_Control/StepAdd/delayUnit'</span></td></tr>
+<td><a id="l464" class='ln'>464</a></td><td><span class="ct"> * '&lt;S56&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector1'</span></td></tr>
 <tr name="465" id="465">
-<td><a id="l465" class='ln'>465</a></td><td><span class="ct"> * '&lt;S37&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled'</span></td></tr>
+<td><a id="l465" class='ln'>465</a></td><td><span class="ct"> * '&lt;S57&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector2'</span></td></tr>
 <tr name="466" id="466">
-<td><a id="l466" class='ln'>466</a></td><td><span class="ct"> * '&lt;S38&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter'</span></td></tr>
+<td><a id="l466" class='ln'>466</a></td><td><span class="ct"> * '&lt;S58&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector3'</span></td></tr>
 <tr name="467" id="467">
-<td><a id="l467" class='ln'>467</a></td><td><span class="ct"> * '&lt;S39&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Edge'</span></td></tr>
+<td><a id="l467" class='ln'>467</a></td><td><span class="ct"> * '&lt;S59&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector4'</span></td></tr>
 <tr name="468" id="468">
-<td><a id="l468" class='ln'>468</a></td><td><span class="ct"> * '&lt;S40&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Default'</span></td></tr>
+<td><a id="l468" class='ln'>468</a></td><td><span class="ct"> * '&lt;S60&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector5'</span></td></tr>
 <tr name="469" id="469">
-<td><a id="l469" class='ln'>469</a></td><td><span class="ct"> * '&lt;S41&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification'</span></td></tr>
+<td><a id="l469" class='ln'>469</a></td><td><span class="ct"> * '&lt;S61&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector6'</span></td></tr>
 <tr name="470" id="470">
-<td><a id="l470" class='ln'>470</a></td><td><span class="ct"> * '&lt;S42&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Edge'</span></td></tr>
+<td><a id="l470" class='ln'>470</a></td><td><span class="ct"> * '&lt;S62&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc'</span></td></tr>
 <tr name="471" id="471">
-<td><a id="l471" class='ln'>471</a></td><td><span class="ct"> * '&lt;S43&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification'</span></td></tr>
+<td><a id="l471" class='ln'>471</a></td><td><span class="ct"> * '&lt;S63&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/pid_schdule'</span></td></tr>
 <tr name="472" id="472">
-<td><a id="l472" class='ln'>472</a></td><td><span class="ct"> * '&lt;S44&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter'</span></td></tr>
+<td><a id="l472" class='ln'>472</a></td><td><span class="ct"> * '&lt;S64&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign'</span></td></tr>
 <tr name="473" id="473">
-<td><a id="l473" class='ln'>473</a></td><td><span class="ct"> * '&lt;S45&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter/rst_Delay1'</span></td></tr>
+<td><a id="l473" class='ln'>473</a></td><td><span class="ct"> * '&lt;S65&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get'</span></td></tr>
 <tr name="474" id="474">
-<td><a id="l474" class='ln'>474</a></td><td><span class="ct"> * '&lt;S46&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter'</span></td></tr>
+<td><a id="l474" class='ln'>474</a></td><td><span class="ct"> * '&lt;S66&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc'</span></td></tr>
 <tr name="475" id="475">
-<td><a id="l475" class='ln'>475</a></td><td><span class="ct"> * '&lt;S47&gt;'  : 'MotorController_FOC/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter/rst_Delay1'</span></td></tr>
+<td><a id="l475" class='ln'>475</a></td><td><span class="ct"> * '&lt;S67&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc'</span></td></tr>
 <tr name="476" id="476">
-<td><a id="l476" class='ln'>476</a></td><td><span class="ct"> * '&lt;S48&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward'</span></td></tr>
+<td><a id="l476" class='ln'>476</a></td><td><span class="ct"> * '&lt;S68&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter'</span></td></tr>
 <tr name="477" id="477">
-<td><a id="l477" class='ln'>477</a></td><td><span class="ct"> * '&lt;S49&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/Motor_Limitations_Enabled'</span></td></tr>
+<td><a id="l477" class='ln'>477</a></td><td><span class="ct"> * '&lt;S69&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl'</span></td></tr>
 <tr name="478" id="478">
-<td><a id="l478" class='ln'>478</a></td><td><span class="ct"> * '&lt;S50&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM'</span></td></tr>
+<td><a id="l478" class='ln'>478</a></td><td><span class="ct"> * '&lt;S70&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Intergrator_z'</span></td></tr>
 <tr name="479" id="479">
-<td><a id="l479" class='ln'>479</a></td><td><span class="ct"> * '&lt;S51&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/circle_limiter'</span></td></tr>
+<td><a id="l479" class='ln'>479</a></td><td><span class="ct"> * '&lt;S71&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Saturation Dynamic'</span></td></tr>
 <tr name="480" id="480">
-<td><a id="l480" class='ln'>480</a></td><td><span class="ct"> * '&lt;S52&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/current_sample'</span></td></tr>
+<td><a id="l480" class='ln'>480</a></td><td><span class="ct"> * '&lt;S72&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Calc'</span></td></tr>
 <tr name="481" id="481">
-<td><a id="l481" class='ln'>481</a></td><td><span class="ct"> * '&lt;S53&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc'</span></td></tr>
+<td><a id="l481" class='ln'>481</a></td><td><span class="ct"> * '&lt;S73&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali'</span></td></tr>
 <tr name="482" id="482">
-<td><a id="l482" class='ln'>482</a></td><td><span class="ct"> * '&lt;S54&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc'</span></td></tr>
+<td><a id="l482" class='ln'>482</a></td><td><span class="ct"> * '&lt;S74&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali/Sine_Cosine_Approximation'</span></td></tr>
 <tr name="483" id="483">
-<td><a id="l483" class='ln'>483</a></td><td><span class="ct"> * '&lt;S55&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward/Clarke'</span></td></tr>
+<td><a id="l483" class='ln'>483</a></td><td><span class="ct"> * '&lt;S75&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Low_Pass_Filter'</span></td></tr>
 <tr name="484" id="484">
-<td><a id="l484" class='ln'>484</a></td><td><span class="ct"> * '&lt;S56&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward/Low_Pass_Filter'</span></td></tr>
+<td><a id="l484" class='ln'>484</a></td><td><span class="ct"> * '&lt;S76&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic1'</span></td></tr>
 <tr name="485" id="485">
-<td><a id="l485" class='ln'>485</a></td><td><span class="ct"> * '&lt;S57&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward/Park'</span></td></tr>
+<td><a id="l485" class='ln'>485</a></td><td><span class="ct"> * '&lt;S77&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic3'</span></td></tr>
 <tr name="486" id="486">
-<td><a id="l486" class='ln'>486</a></td><td><span class="ct"> * '&lt;S58&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/Clarke_Park_Transform_Forward/Sine_Cosine_Approximation'</span></td></tr>
+<td><a id="l486" class='ln'>486</a></td><td><span class="ct"> * '&lt;S78&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/sqrtSum'</span></td></tr>
 <tr name="487" id="487">
-<td><a id="l487" class='ln'>487</a></td><td><span class="ct"> * '&lt;S59&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/Motor_Limitations_Enabled/Saturation Dynamic'</span></td></tr>
+<td><a id="l487" class='ln'>487</a></td><td><span class="ct"> * '&lt;S79&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode'</span></td></tr>
 <tr name="488" id="488">
-<td><a id="l488" class='ln'>488</a></td><td><span class="ct"> * '&lt;S60&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/Park_Transform_Inverse'</span></td></tr>
+<td><a id="l488" class='ln'>488</a></td><td><span class="ct"> * '&lt;S80&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/torque_mode'</span></td></tr>
 <tr name="489" id="489">
-<td><a id="l489" class='ln'>489</a></td><td><span class="ct"> * '&lt;S61&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM'</span></td></tr>
+<td><a id="l489" class='ln'>489</a></td><td><span class="ct"> * '&lt;S81&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed'</span></td></tr>
 <tr name="490" id="490">
-<td><a id="l490" class='ln'>490</a></td><td><span class="ct"> * '&lt;S62&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen'</span></td></tr>
+<td><a id="l490" class='ln'>490</a></td><td><span class="ct"> * '&lt;S82&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Rst_Integrator'</span></td></tr>
 <tr name="491" id="491">
-<td><a id="l491" class='ln'>491</a></td><td><span class="ct"> * '&lt;S63&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/sector_select'</span></td></tr>
+<td><a id="l491" class='ln'>491</a></td><td><span class="ct"> * '&lt;S83&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Saturation Dynamic1'</span></td></tr>
 <tr name="492" id="492">
-<td><a id="l492" class='ln'>492</a></td><td><span class="ct"> * '&lt;S64&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector1'</span></td></tr>
+<td><a id="l492" class='ln'>492</a></td><td><span class="ct"> * '&lt;S84&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/torque_mode/Saturation Dynamic1'</span></td></tr>
 <tr name="493" id="493">
-<td><a id="l493" class='ln'>493</a></td><td><span class="ct"> * '&lt;S65&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector2'</span></td></tr>
+<td><a id="l493" class='ln'>493</a></td><td><span class="ct"> * '&lt;S85&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop'</span></td></tr>
 <tr name="494" id="494">
-<td><a id="l494" class='ln'>494</a></td><td><span class="ct"> * '&lt;S66&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector3'</span></td></tr>
+<td><a id="l494" class='ln'>494</a></td><td><span class="ct"> * '&lt;S86&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/OpenLoop'</span></td></tr>
 <tr name="495" id="495">
-<td><a id="l495" class='ln'>495</a></td><td><span class="ct"> * '&lt;S67&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector4'</span></td></tr>
+<td><a id="l495" class='ln'>495</a></td><td><span class="ct"> * '&lt;S87&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep'</span></td></tr>
 <tr name="496" id="496">
-<td><a id="l496" class='ln'>496</a></td><td><span class="ct"> * '&lt;S68&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector5'</span></td></tr>
+<td><a id="l496" class='ln'>496</a></td><td><span class="ct"> * '&lt;S88&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep'</span></td></tr>
 <tr name="497" id="497">
-<td><a id="l497" class='ln'>497</a></td><td><span class="ct"> * '&lt;S69&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/SVM/SVPWM/duty_gen/sector6'</span></td></tr>
+<td><a id="l497" class='ln'>497</a></td><td><span class="ct"> * '&lt;S89&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/FeedForward'</span></td></tr>
 <tr name="498" id="498">
-<td><a id="l498" class='ln'>498</a></td><td><span class="ct"> * '&lt;S70&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc'</span></td></tr>
+<td><a id="l498" class='ln'>498</a></td><td><span class="ct"> * '&lt;S90&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt'</span></td></tr>
 <tr name="499" id="499">
-<td><a id="l499" class='ln'>499</a></td><td><span class="ct"> * '&lt;S71&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/pid_schdule'</span></td></tr>
+<td><a id="l499" class='ln'>499</a></td><td><span class="ct"> * '&lt;S91&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1'</span></td></tr>
 <tr name="500" id="500">
-<td><a id="l500" class='ln'>500</a></td><td><span class="ct"> * '&lt;S72&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign'</span></td></tr>
+<td><a id="l500" class='ln'>500</a></td><td><span class="ct"> * '&lt;S92&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Rst_Integrator'</span></td></tr>
 <tr name="501" id="501">
-<td><a id="l501" class='ln'>501</a></td><td><span class="ct"> * '&lt;S73&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get'</span></td></tr>
+<td><a id="l501" class='ln'>501</a></td><td><span class="ct"> * '&lt;S93&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Saturation Dynamic1'</span></td></tr>
 <tr name="502" id="502">
-<td><a id="l502" class='ln'>502</a></td><td><span class="ct"> * '&lt;S74&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/FW_Calc'</span></td></tr>
+<td><a id="l502" class='ln'>502</a></td><td><span class="ct"> * '&lt;S94&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Rst_Integrator'</span></td></tr>
 <tr name="503" id="503">
-<td><a id="l503" class='ln'>503</a></td><td><span class="ct"> * '&lt;S75&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc'</span></td></tr>
+<td><a id="l503" class='ln'>503</a></td><td><span class="ct"> * '&lt;S95&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Saturation Dynamic1'</span></td></tr>
 <tr name="504" id="504">
-<td><a id="l504" class='ln'>504</a></td><td><span class="ct"> * '&lt;S76&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter'</span></td></tr>
+<td><a id="l504" class='ln'>504</a></td><td><span class="ct"> * '&lt;S96&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Edge'</span></td></tr>
 <tr name="505" id="505">
-<td><a id="l505" class='ln'>505</a></td><td><span class="ct"> * '&lt;S77&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl'</span></td></tr>
+<td><a id="l505" class='ln'>505</a></td><td><span class="ct"> * '&lt;S97&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Enabled Subsystem'</span></td></tr>
 <tr name="506" id="506">
-<td><a id="l506" class='ln'>506</a></td><td><span class="ct"> * '&lt;S78&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Intergrator_z'</span></td></tr>
+<td><a id="l506" class='ln'>506</a></td><td><span class="ct"> * '&lt;S98&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control'</span></td></tr>
 <tr name="507" id="507">
-<td><a id="l507" class='ln'>507</a></td><td><span class="ct"> * '&lt;S79&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Saturation Dynamic'</span></td></tr>
+<td><a id="l507" class='ln'>507</a></td><td><span class="ct"> * '&lt;S99&gt;'  : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/RateInit'</span></td></tr>
 <tr name="508" id="508">
-<td><a id="l508" class='ln'>508</a></td><td><span class="ct"> * '&lt;S80&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Calc'</span></td></tr>
+<td><a id="l508" class='ln'>508</a></td><td><span class="ct"> * '&lt;S100&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/Saturation Dynamic'</span></td></tr>
 <tr name="509" id="509">
-<td><a id="l509" class='ln'>509</a></td><td><span class="ct"> * '&lt;S81&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali'</span></td></tr>
+<td><a id="l509" class='ln'>509</a></td><td><span class="ct"> * '&lt;S101&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/StepAdd'</span></td></tr>
 <tr name="510" id="510">
-<td><a id="l510" class='ln'>510</a></td><td><span class="ct"> * '&lt;S82&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali/Sine_Cosine_Approximation'</span></td></tr>
+<td><a id="l510" class='ln'>510</a></td><td><span class="ct"> * '&lt;S102&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/StepAdd/delayUnit'</span></td></tr>
 <tr name="511" id="511">
-<td><a id="l511" class='ln'>511</a></td><td><span class="ct"> * '&lt;S83&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Low_Pass_Filter'</span></td></tr>
+<td><a id="l511" class='ln'>511</a></td><td><span class="ct"> * '&lt;S103&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Edge'</span></td></tr>
 <tr name="512" id="512">
-<td><a id="l512" class='ln'>512</a></td><td><span class="ct"> * '&lt;S84&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic1'</span></td></tr>
+<td><a id="l512" class='ln'>512</a></td><td><span class="ct"> * '&lt;S104&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Enabled Subsystem'</span></td></tr>
 <tr name="513" id="513">
-<td><a id="l513" class='ln'>513</a></td><td><span class="ct"> * '&lt;S85&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic3'</span></td></tr>
+<td><a id="l513" class='ln'>513</a></td><td><span class="ct"> * '&lt;S105&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control'</span></td></tr>
 <tr name="514" id="514">
-<td><a id="l514" class='ln'>514</a></td><td><span class="ct"> * '&lt;S86&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/sqrtSum'</span></td></tr>
+<td><a id="l514" class='ln'>514</a></td><td><span class="ct"> * '&lt;S106&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/RateInit'</span></td></tr>
 <tr name="515" id="515">
-<td><a id="l515" class='ln'>515</a></td><td><span class="ct"> * '&lt;S87&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/speed_mode'</span></td></tr>
+<td><a id="l515" class='ln'>515</a></td><td><span class="ct"> * '&lt;S107&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/Saturation Dynamic'</span></td></tr>
 <tr name="516" id="516">
-<td><a id="l516" class='ln'>516</a></td><td><span class="ct"> * '&lt;S88&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/torque_mode'</span></td></tr>
+<td><a id="l516" class='ln'>516</a></td><td><span class="ct"> * '&lt;S108&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/StepAdd'</span></td></tr>
 <tr name="517" id="517">
-<td><a id="l517" class='ln'>517</a></td><td><span class="ct"> * '&lt;S89&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed'</span></td></tr>
+<td><a id="l517" class='ln'>517</a></td><td><span class="ct"> * '&lt;S109&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/StepAdd/delayUnit'</span></td></tr>
 <tr name="518" id="518">
-<td><a id="l518" class='ln'>518</a></td><td><span class="ct"> * '&lt;S90&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Rst_Integrator'</span></td></tr>
+<td><a id="l518" class='ln'>518</a></td><td><span class="ct"> * '&lt;S110&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Ctrl_Mode_Transition/Control_Mode_Manager'</span></td></tr>
 <tr name="519" id="519">
-<td><a id="l519" class='ln'>519</a></td><td><span class="ct"> * '&lt;S91&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Saturation Dynamic1'</span></td></tr>
+<td><a id="l519" class='ln'>519</a></td><td><span class="ct"> * '&lt;S111&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode'</span></td></tr>
 <tr name="520" id="520">
-<td><a id="l520" class='ln'>520</a></td><td><span class="ct"> * '&lt;S92&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/torque_mode/PI_TrqSpdLim'</span></td></tr>
+<td><a id="l520" class='ln'>520</a></td><td><span class="ct"> * '&lt;S112&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_dege'</span></td></tr>
 <tr name="521" id="521">
-<td><a id="l521" class='ln'>521</a></td><td><span class="ct"> * '&lt;S93&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/torque_mode/PI_TrqSpdLim/Rst_Integrator'</span></td></tr>
+<td><a id="l521" class='ln'>521</a></td><td><span class="ct"> * '&lt;S113&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl'</span></td></tr>
 <tr name="522" id="522">
-<td><a id="l522" class='ln'>522</a></td><td><span class="ct"> * '&lt;S94&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/idq_Calc/Do_Calc/idq_Get/torque_mode/PI_TrqSpdLim/Saturation Dynamic'</span></td></tr>
+<td><a id="l522" class='ln'>522</a></td><td><span class="ct"> * '&lt;S114&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_edge'</span></td></tr>
 <tr name="523" id="523">
-<td><a id="l523" class='ln'>523</a></td><td><span class="ct"> * '&lt;S95&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop'</span></td></tr>
+<td><a id="l523" class='ln'>523</a></td><td><span class="ct"> * '&lt;S115&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl'</span></td></tr>
 <tr name="524" id="524">
-<td><a id="l524" class='ln'>524</a></td><td><span class="ct"> * '&lt;S96&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/OpenLoop'</span></td></tr>
+<td><a id="l524" class='ln'>524</a></td><td><span class="ct"> * '&lt;S116&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/RateInit'</span></td></tr>
 <tr name="525" id="525">
-<td><a id="l525" class='ln'>525</a></td><td><span class="ct"> * '&lt;S97&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep'</span></td></tr>
+<td><a id="l525" class='ln'>525</a></td><td><span class="ct"> * '&lt;S117&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/Saturation Dynamic'</span></td></tr>
 <tr name="526" id="526">
-<td><a id="l526" class='ln'>526</a></td><td><span class="ct"> * '&lt;S98&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep'</span></td></tr>
+<td><a id="l526" class='ln'>526</a></td><td><span class="ct"> * '&lt;S118&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/StepAdd'</span></td></tr>
 <tr name="527" id="527">
-<td><a id="l527" class='ln'>527</a></td><td><span class="ct"> * '&lt;S99&gt;'  : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/FeedForward'</span></td></tr>
+<td><a id="l527" class='ln'>527</a></td><td><span class="ct"> * '&lt;S119&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/StepAdd/delayUnit'</span></td></tr>
 <tr name="528" id="528">
-<td><a id="l528" class='ln'>528</a></td><td><span class="ct"> * '&lt;S100&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt'</span></td></tr>
+<td><a id="l528" class='ln'>528</a></td><td><span class="ct"> * '&lt;S120&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/RateInit'</span></td></tr>
 <tr name="529" id="529">
-<td><a id="l529" class='ln'>529</a></td><td><span class="ct"> * '&lt;S101&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1'</span></td></tr>
+<td><a id="l529" class='ln'>529</a></td><td><span class="ct"> * '&lt;S121&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/Saturation Dynamic'</span></td></tr>
 <tr name="530" id="530">
-<td><a id="l530" class='ln'>530</a></td><td><span class="ct"> * '&lt;S102&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Rst_Integrator'</span></td></tr>
+<td><a id="l530" class='ln'>530</a></td><td><span class="ct"> * '&lt;S122&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/StepAdd'</span></td></tr>
 <tr name="531" id="531">
-<td><a id="l531" class='ln'>531</a></td><td><span class="ct"> * '&lt;S103&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Saturation Dynamic1'</span></td></tr>
+<td><a id="l531" class='ln'>531</a></td><td><span class="ct"> * '&lt;S123&gt;' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/StepAdd/delayUnit'</span></td></tr>
 <tr name="532" id="532">
-<td><a id="l532" class='ln'>532</a></td><td><span class="ct"> * '&lt;S104&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Rst_Integrator'</span></td></tr>
+<td><a id="l532" class='ln'>532</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="533" id="533">
-<td><a id="l533" class='ln'>533</a></td><td><span class="ct"> * '&lt;S105&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Saturation Dynamic1'</span></td></tr>
+<td><a id="l533" class='ln'>533</a></td><td><span class="pp">#endif</span>                                 <span class="ct">/* RTW_HEADER_PMSM_Controller_h_ */</span></td></tr>
 <tr name="534" id="534">
-<td><a id="l534" class='ln'>534</a></td><td><span class="ct"> * '&lt;S106&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Edge'</span></td></tr>
+<td><a id="l534" class='ln'>534</a></td><td></td></tr>
 <tr name="535" id="535">
-<td><a id="l535" class='ln'>535</a></td><td><span class="ct"> * '&lt;S107&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Enabled Subsystem'</span></td></tr>
+<td><a id="l535" class='ln'>535</a></td><td><span class="ct">/*</span></td></tr>
 <tr name="536" id="536">
-<td><a id="l536" class='ln'>536</a></td><td><span class="ct"> * '&lt;S108&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control'</span></td></tr>
+<td><a id="l536" class='ln'>536</a></td><td><span class="ct"> * File trailer for generated code.</span></td></tr>
 <tr name="537" id="537">
-<td><a id="l537" class='ln'>537</a></td><td><span class="ct"> * '&lt;S109&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control/RateInit'</span></td></tr>
+<td><a id="l537" class='ln'>537</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="538" id="538">
-<td><a id="l538" class='ln'>538</a></td><td><span class="ct"> * '&lt;S110&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control/Saturation Dynamic'</span></td></tr>
+<td><a id="l538" class='ln'>538</a></td><td><span class="ct"> * [EOF]</span></td></tr>
 <tr name="539" id="539">
-<td><a id="l539" class='ln'>539</a></td><td><span class="ct"> * '&lt;S111&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control/StepAdd'</span></td></tr>
+<td><a id="l539" class='ln'>539</a></td><td><span class="ct"> */</span></td></tr>
 <tr name="540" id="540">
-<td><a id="l540" class='ln'>540</a></td><td><span class="ct"> * '&lt;S112&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/idStep/Rate_Control/StepAdd/delayUnit'</span></td></tr>
-<tr name="541" id="541">
-<td><a id="l541" class='ln'>541</a></td><td><span class="ct"> * '&lt;S113&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Edge'</span></td></tr>
-<tr name="542" id="542">
-<td><a id="l542" class='ln'>542</a></td><td><span class="ct"> * '&lt;S114&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Enabled Subsystem'</span></td></tr>
-<tr name="543" id="543">
-<td><a id="l543" class='ln'>543</a></td><td><span class="ct"> * '&lt;S115&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control'</span></td></tr>
-<tr name="544" id="544">
-<td><a id="l544" class='ln'>544</a></td><td><span class="ct"> * '&lt;S116&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control/RateInit'</span></td></tr>
-<tr name="545" id="545">
-<td><a id="l545" class='ln'>545</a></td><td><span class="ct"> * '&lt;S117&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control/Saturation Dynamic'</span></td></tr>
-<tr name="546" id="546">
-<td><a id="l546" class='ln'>546</a></td><td><span class="ct"> * '&lt;S118&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control/StepAdd'</span></td></tr>
-<tr name="547" id="547">
-<td><a id="l547" class='ln'>547</a></td><td><span class="ct"> * '&lt;S119&gt;' : 'MotorController_FOC/PMSM_Controller/controller/vdq_Calc/iqStep/Rate_Control/StepAdd/delayUnit'</span></td></tr>
-<tr name="548" id="548">
-<td><a id="l548" class='ln'>548</a></td><td><span class="ct"> */</span></td></tr>
-<tr name="549" id="549">
-<td><a id="l549" class='ln'>549</a></td><td><span class="pp">#endif</span>                                 <span class="ct">/* RTW_HEADER_PMSM_Controller_h_ */</span></td></tr>
-<tr name="550" id="550">
-<td><a id="l550" class='ln'>550</a></td><td></td></tr>
-<tr name="551" id="551">
-<td><a id="l551" class='ln'>551</a></td><td><span class="ct">/*</span></td></tr>
-<tr name="552" id="552">
-<td><a id="l552" class='ln'>552</a></td><td><span class="ct"> * File trailer for generated code.</span></td></tr>
-<tr name="553" id="553">
-<td><a id="l553" class='ln'>553</a></td><td><span class="ct"> *</span></td></tr>
-<tr name="554" id="554">
-<td><a id="l554" class='ln'>554</a></td><td><span class="ct"> * [EOF]</span></td></tr>
-<tr name="555" id="555">
-<td><a id="l555" class='ln'>555</a></td><td><span class="ct"> */</span></td></tr>
-<tr name="556" id="556">
-<td><a id="l556" class='ln'>556</a></td><td></td></tr>
+<td><a id="l540" class='ln'>540</a></td><td></td></tr>
 </table>
 </pre>
 </body>

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_interface.html

@@ -309,7 +309,7 @@ Dimension
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 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/adc_Pha
+&lt;S3&gt;/adc_Phase
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 <i>
@@ -324,13 +324,13 @@ int16_T
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+[3]
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+&lt;S3&gt;/hall_abc
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 <i>
@@ -339,19 +339,19 @@ Defined externally
 
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+uint8_T
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+[3]
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+&lt;S3&gt;/spd_Target
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@@ -376,7 +376,7 @@ FractionLength: 4
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-&lt;S4&gt;/idq_Target
+&lt;S3&gt;/idq_Target
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@@ -401,49 +401,7 @@ FractionLength: 5
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-&lt;S4&gt;/hall_A
-</td>
-<td width="23%" align="left" valign="top">
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-
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-1
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-
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-<td width="38%" align="left" valign="top">
-&lt;S4&gt;/hall_B
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-<i>
-Defined externally
-</i>
-
-</td>
-<td width="19%" align="left" valign="top">
-uint8_T
-</td>
-<td width="9%" align="left" valign="top">
-&#160;
-</td>
-<td width="9%" align="right" valign="top">
-1
-</td>
-
-</tr>
-<tr class="even">
-<td width="38%" align="left" valign="top">
-&lt;S4&gt;/hall_C
+&lt;S3&gt;/vdq_Target
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -452,19 +410,23 @@ Defined externally
 
 </td>
 <td width="19%" align="left" valign="top">
-uint8_T
+int16_T
 </td>
 <td width="9%" align="left" valign="top">
-&#160;
+<span title="  DataTypeMode: Fixed-point: binary point scaling
+    Signedness: Signed
+    WordLength: 16
+FractionLength: 5
+">sfix16_En5</span>
 </td>
 <td width="9%" align="right" valign="top">
-1
+[2]
 </td>
 
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/us_Count
+&lt;S3&gt;/idq_Limit
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -473,10 +435,14 @@ Defined externally
 
 </td>
 <td width="19%" align="left" valign="top">
-uint32_T
+int16_T
 </td>
 <td width="9%" align="left" valign="top">
-&#160;
+<span title="  DataTypeMode: Fixed-point: binary point scaling
+    Signedness: Signed
+    WordLength: 16
+FractionLength: 5
+">sfix16_En5</span>
 </td>
 <td width="9%" align="right" valign="top">
 1
@@ -485,7 +451,7 @@ uint32_T
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/b_motEna
+&lt;S3&gt;/b_motEna
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -506,7 +472,7 @@ boolean_T
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/b_cruiseEna
+&lt;S3&gt;/b_cruiseEna
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -527,7 +493,7 @@ boolean_T
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/n_ctrlModReq
+&lt;S3&gt;/n_ctrlMod
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -548,7 +514,7 @@ uint8_T
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/iDC_Limit
+&lt;S3&gt;/iDC_Limit
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -573,7 +539,7 @@ FractionLength: 5
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/spd_Limit
+&lt;S3&gt;/spd_Limit
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -598,7 +564,7 @@ FractionLength: 4
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/vDC
+&lt;S3&gt;/vDC
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -623,7 +589,7 @@ FractionLength: 5
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/FOC_Flags
+&lt;S3&gt;/sys_ticks
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -632,7 +598,7 @@ Defined externally
 
 </td>
 <td width="19%" align="left" valign="top">
-uint16_T
+uint32_T
 </td>
 <td width="9%" align="left" valign="top">
 &#160;
@@ -644,32 +610,7 @@ uint16_T
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/vdq_Open
-</td>
-<td width="23%" align="left" valign="top">
-<i>
-Defined externally
-</i>
-
-</td>
-<td width="19%" align="left" valign="top">
-int16_T
-</td>
-<td width="9%" align="left" valign="top">
-<span title="  DataTypeMode: Fixed-point: binary point scaling
-    Signedness: Signed
-    WordLength: 16
-FractionLength: 5
-">sfix16_En5</span>
-</td>
-<td width="9%" align="right" valign="top">
-[2]
-</td>
-
-</tr>
-<tr class="even">
-<td width="38%" align="left" valign="top">
-&lt;S4&gt;/theta_Open
+&lt;S3&gt;/set_Angle
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -736,7 +677,7 @@ Dimension
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/pwm_Duty
+&lt;S3&gt;/n_Duty
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -757,7 +698,7 @@ int16_T
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/n_Sector
+&lt;S3&gt;/n_Sector
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -778,7 +719,7 @@ uint8_T
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/n_MotError
+&lt;S3&gt;/n_MotError
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -799,7 +740,7 @@ uint8_T
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/f_Vdq
+&lt;S3&gt;/f_Vdq
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -824,7 +765,7 @@ FractionLength: 5
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/f_Idq
+&lt;S3&gt;/f_Idq
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -849,7 +790,7 @@ FractionLength: 5
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/f_MotAngle
+&lt;S3&gt;/f_MotAngle
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -874,7 +815,7 @@ FractionLength: 4
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/f_MotRPM
+&lt;S3&gt;/f_MotRPM
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -899,7 +840,7 @@ FractionLength: 4
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/f_hallAngle
+&lt;S3&gt;/n_hallStat
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -908,14 +849,10 @@ Defined externally
 
 </td>
 <td width="19%" align="left" valign="top">
-int16_T
+uint8_T
 </td>
 <td width="9%" align="left" valign="top">
-<span title="  DataTypeMode: Fixed-point: binary point scaling
-    Signedness: Signed
-    WordLength: 16
-FractionLength: 4
-">sfix16_En4</span>
+&#160;
 </td>
 <td width="9%" align="right" valign="top">
 1
@@ -924,7 +861,7 @@ FractionLength: 4
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/n_hallStat
+&lt;S3&gt;/n_FocMode
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -945,7 +882,7 @@ uint8_T
 </tr>
 <tr class="odd">
 <td width="38%" align="left" valign="top">
-&lt;S4&gt;/n_runingMode
+&lt;S3&gt;/b_advCtrl
 </td>
 <td width="23%" align="left" valign="top">
 <i>
@@ -954,7 +891,7 @@ Defined externally
 
 </td>
 <td width="19%" align="left" valign="top">
-uint8_T
+boolean_T
 </td>
 <td width="9%" align="left" valign="top">
 &#160;
@@ -1005,42 +942,6 @@ Dimension
 
 </th>
 
-</tr>
-<tr class="even">
-<td width="38%" align="left" valign="top">
-n_hall_count_ps
-</td>
-<td width="23%" align="left" valign="top">
-rtP.n_hall_count_ps
-</td>
-<td width="19%" align="left" valign="top">
-uint32_T
-</td>
-<td width="9%" align="left" valign="top">
-&#160;
-</td>
-<td width="9%" align="right" valign="top">
-1
-</td>
-
-</tr>
-<tr class="odd">
-<td width="38%" align="left" valign="top">
-n_polePairs
-</td>
-<td width="23%" align="left" valign="top">
-rtP.n_polePairs
-</td>
-<td width="19%" align="left" valign="top">
-uint32_T
-</td>
-<td width="9%" align="left" valign="top">
-&#160;
-</td>
-<td width="9%" align="right" valign="top">
-1
-</td>
-
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
@@ -1088,72 +989,6 @@ FractionLength: 10
 </tr>
 <tr class="even">
 <td width="38%" align="left" valign="top">
-cf_TrqLimKb
-</td>
-<td width="23%" align="left" valign="top">
-rtP.cf_TrqLimKb
-</td>
-<td width="19%" align="left" valign="top">
-int16_T
-</td>
-<td width="9%" align="left" valign="top">
-<span title="  DataTypeMode: Fixed-point: binary point scaling
-    Signedness: Signed
-    WordLength: 16
-FractionLength: 10
-">sfix16_En10</span>
-</td>
-<td width="9%" align="right" valign="top">
-1
-</td>
-
-</tr>
-<tr class="odd">
-<td width="38%" align="left" valign="top">
-cf_TrqLimKi
-</td>
-<td width="23%" align="left" valign="top">
-rtP.cf_TrqLimKi
-</td>
-<td width="19%" align="left" valign="top">
-int16_T
-</td>
-<td width="9%" align="left" valign="top">
-<span title="  DataTypeMode: Fixed-point: binary point scaling
-    Signedness: Signed
-    WordLength: 16
-FractionLength: 10
-">sfix16_En10</span>
-</td>
-<td width="9%" align="right" valign="top">
-1
-</td>
-
-</tr>
-<tr class="even">
-<td width="38%" align="left" valign="top">
-cf_TrqLimKp
-</td>
-<td width="23%" align="left" valign="top">
-rtP.cf_TrqLimKp
-</td>
-<td width="19%" align="left" valign="top">
-int16_T
-</td>
-<td width="9%" align="left" valign="top">
-<span title="  DataTypeMode: Fixed-point: binary point scaling
-    Signedness: Signed
-    WordLength: 16
-FractionLength: 10
-">sfix16_En10</span>
-</td>
-<td width="9%" align="right" valign="top">
-1
-</td>
-
-</tr>
-<tr class="odd">
-<td width="38%" align="left" valign="top">
 cf_idKp
 </td>
 <td width="23%" align="left" valign="top">
@@ -1174,7 +1009,7 @@ FractionLength: 10
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 cf_iqKp
 </td>
@@ -1196,7 +1031,7 @@ FractionLength: 10
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 cf_nKp
 </td>
@@ -1218,7 +1053,7 @@ FractionLength: 10
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 V_modulation
 </td>
@@ -1240,7 +1075,7 @@ FractionLength: 14
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 cf_idKb
 </td>
@@ -1262,7 +1097,7 @@ FractionLength: 14
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 cf_idKi
 </td>
@@ -1284,7 +1119,7 @@ FractionLength: 14
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 cf_iqKb
 </td>
@@ -1306,7 +1141,7 @@ FractionLength: 14
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 cf_iqKi
 </td>
@@ -1328,7 +1163,7 @@ FractionLength: 14
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 cf_nKb
 </td>
@@ -1350,7 +1185,7 @@ FractionLength: 14
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 cf_nKi
 </td>
@@ -1372,7 +1207,7 @@ FractionLength: 14
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 f_adc_curr_ceof
 </td>
@@ -1394,7 +1229,7 @@ FractionLength: 14
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 cf_lastIqGain
 </td>
@@ -1416,7 +1251,7 @@ FractionLength: 15
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 i_hall_offset
 </td>
@@ -1438,7 +1273,7 @@ FractionLength: 4
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 i_dqMax
 </td>
@@ -1460,7 +1295,7 @@ FractionLength: 5
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 id_fieldWeakMax
 </td>
@@ -1482,7 +1317,7 @@ FractionLength: 5
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 dz_OpenStepVol
 </td>
@@ -1504,7 +1339,7 @@ FractionLength: 7
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 f_lpf_idq
 </td>
@@ -1526,7 +1361,7 @@ FractionLength: 16
 </td>
 
 </tr>
-<tr class="even">
+<tr class="odd">
 <td width="38%" align="left" valign="top">
 f_lpf_vdq
 </td>
@@ -1548,7 +1383,7 @@ FractionLength: 16
 </td>
 
 </tr>
-<tr class="odd">
+<tr class="even">
 <td width="38%" align="left" valign="top">
 i_pwm_count
 </td>
@@ -1565,6 +1400,24 @@ uint16_T
 1
 </td>
 
+</tr>
+<tr class="odd">
+<td width="38%" align="left" valign="top">
+n_polePairs
+</td>
+<td width="23%" align="left" valign="top">
+rtP.n_polePairs
+</td>
+<td width="19%" align="left" valign="top">
+uint8_T
+</td>
+<td width="9%" align="left" valign="top">
+&#160;
+</td>
+<td width="9%" align="right" valign="top">
+1
+</td>
+
 </tr>
 
 </table>

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_metrics.html

@@ -1,6 +1,6 @@
 <html>
 <head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><link rel="stylesheet" type="text/css" href="rtwreport.css" /><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><script language="JavaScript" type="text/javascript" src="rtwshrink.js"></script><title>
+<meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><link rel="stylesheet" type="text/css" href="rtwreport.css" /><title>
 Static Code Metrics Report
 </title>
 
@@ -10,1873 +10,9 @@ Static Code Metrics Report
 Static Code Metrics Report
 </h1>
 <div>
-<p>
-The static code metrics report provides statistics of the generated code. Metrics are estimated from static analysis of the generated code using the C data types specified in the 'Device details' section of the <b>Configuration Parameter > Hardware Implementation</b> pane: <b>char</b> 8, <b>short</b> 16, <b>int</b> 32, <b>long</b> 32, <b>float</b> 32, <b>double</b> 64, <b>pointer</b> 32 bits. If your model contains a Variant block, the Static Code Metrics Report does not contain data for the inactive variant. Actual object code metrics might differ due to target specific compiler and platform settings. Consult the <b>Code Generation Advisor</b><a name="MATLAB_link" style="text-decoration: none" href="matlab:helpview([docroot '/toolbox/ecoder/helptargets.map'], 'code_gen_advisor')">
-<img src="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAABAAAAAQCAYAAAAf8/9hAAADhElEQVQ4T2WTe0yTBxTFz/fRIn2AqS1LC4gplIcFYYkTxjTpiMQRJo50KhYmexkkIWwsTMtIFCWMAZuFoc7nXNiWbLhibdMtA4oL7hFskI7KoxOGLbRCulEeK5Ty9WsXMRDn7p8355zc3PwOgaenuI8pkW7MO7RtY9GuaJbEF4DfMO62tA+4WieVSbqn5cSTi6jGUdnp3YK6otSwDEYQSbioAB4JeEwCbq8vcM00a6i/7aqaUib2rfnWA5LPjR/WFkRejOEFsz8d9UE37oGXpkHSfoTSfsjj2XhbyoZpyuPKuzzy+sSp7fpHIasBz9SNZPSWxHSFhQZzXjYsYnZuGY3Pc5AVtQEEAvjJ6oGy8y9s3hSCm/lCmBxLrqzSK5mLunIzgVMBsiV71lCWzsuUdbhx1+rG4CE+ojlBqNRPgiQInM6JhGOeQkLjKOTPhaPtoBAV6kG96npNHiFssGSOlscZ9HaKVKj/xr4YEtr9IpzpcuB9zTSw4kfbUTEO7hBgZ/09/Gal0XMsHtGbyBXpca2MeK3dfukreWSxXDcDjdmNcCYFRSwTavM8Hs74IYsNwY2jEix5KGw/2Q/nAgOlOSKcK4hGuqqvgWi+47pVtoOXmXbJjrt2D+CngYVlgKKRFcdCe2k8Vrw0Xm0w4baNApgbkJMchu+PJaLgG4uGqP3F2VG1M3zPC83j6P1zEQjCqpnj88JckwIBJwh7ThpxZ8IH8EMBD41XUrm4WSHFgdYhNfFSq/XDH4u2VB1pteFzgxPgkAAVQDjLj5GPnsXX3ZMov/YAEPEAkgRcS6iWR6A6X4yEyh9OENwTvyfdq9hqnHZ62Rm1w0Aw4/EVHi8U29iw2BdhmiEAbsjqQ9nLbgydSYdjhZ7bVViXvcpBic5x5UJuxBHltzY0ahwAi4FYAQMDtakwjs1jd/0wAkwmMLOAprckKM8TI/fjzi/1LVdLHpN4vD/iuzfjevYnciXV1634RGeHj6Jw/g0xzA8WcFYzAb6AhWpFDMr2idHSM2F5t7KpEL3N/esoc9/pSP6sUNp2OC1KOjblQdvPDzF43wWCCCBtKx/5skiI+CFQ3bIOKeu+eM/XXdO1jvJaMdjF7aLsFOEHZXtTFC9u4QrW9jSArvvz003qX7Wd2u4LMKoG/lem/9Q0V5WUtJknSxCyRQE/yOGpf5x/jNmMsM31Y+ys90ntv6Qkblq/pPiXAAAAAElFTkSuQmCC" title="Open Code Generation Advisor help" style="border:none;cursor:pointer;max-width:100%;" alt="help.png">
-
-</img>
-
-</a>
- for options to improve code efficiency.
-</p>
-
-</div>
-<div>
-<h3>
-Table of Contents
-</h3>
-<ol>
-<li>
-<a href="#sec_file_info" onclick="rtwTableExpand(window.document, window.document.getElementById('rtwIdCodeMetrics_table_001_control'), 'rtwIdCodeMetrics_table_001')">
-File Information
-</a>
-
-</li>
-<li>
-<a href="#sec_globalvar_info" onclick="rtwTableExpand(window.document, window.document.getElementById('rtwIdCodeMetrics_table_002_control'), 'rtwIdCodeMetrics_table_002')">
-Global Variables
-</a>
-
-</li>
-<li>
-<a href="#sec_fcn_info" onclick="rtwTableExpand(window.document, window.document.getElementById('rtwIdCodeMetrics_table_016_control'), 'rtwIdCodeMetrics_table_016')">
-Function Information
-</a>
-
-</li>
-
-</ol>
 
 </div>
-<h3 name="sec_File_Information" id="sec_file_info">
-1. File Information <span title="Click to shrink or expand section" style="cursor:pointer;font-weight:normal;" id="rtwIdCodeMetrics_table_001_control" onclick ="if (rtwTableShrink) rtwTableShrink(window.document, this, 'rtwIdCodeMetrics_table_001', false)"><span class="shrink-button">[<u>hide</u>]</span></span>
-</h3>
-<table width="100%" name="rtwIdCodeMetrics_table_001" id="rtwIdCodeMetrics_table_001" border="0">
-<tr>
-<td align="left" valign="top">
-<table width="100%" border="0">
-<tr>
-<td align="left" valign="top">
-<p>
-<span name="button_fileInfo_summary_table" id="button_fileInfo_summary_table" title="Click to shrink or expand tree" style="cursor:pointer;font-family:monospace;font-weight:normal;" onclick ="if (rtwTableShrink) rtwTableShrink(window.document, this, 'fileInfo_summary_table', true)"><span class="shrink-button">[-]</span></span> Summary (excludes ert_main.c)
-</p>
-<table width="50%" cellpadding="0" name="fileInfo_summary_table" id="fileInfo_summary_table" border="0">
-<tr>
-<td width="4%" align="left" valign="top">
-<span style="white-space:nowrap" title="Number of source files excluding ert_main.c.">Number of .c files</span>
-</td>
-<td width="4%" align="left" valign="top">
-:
-</td>
-<td width="4%" align="right" valign="top">
-2
-</td>
-<td width="86%" align="right" valign="top">
-&#160;
-</td>
-
-</tr>
-<tr>
-<td width="4%" align="left" valign="top">
-<span style="white-space:nowrap" title="Number of header files.">Number of .h files</span>
-</td>
-<td width="4%" align="left" valign="top">
-:
-</td>
-<td width="4%" align="right" valign="top">
-3
-</td>
-<td width="86%" align="right" valign="top">
-&#160;
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-
-</tr>
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-<tr><td align="left" width="33.33%"><span style="white-space:nowrap">&#160;&#160;&#160;&#160;&#160;&#160;&#160;<span style="font-family:monospace">&#160;&#160;</span>&#160; dz_OpenStepVol</span></td>
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-<td align="right" width="22.22%">1<span style="font-family:Courier">&#160;</span></td>
-<td align="right" width="22.22%">1<span style="font-family:Courier">&#160;</span></td>
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-
-</tr>
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2"  style="background-color: #ffffff" >
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-<td align="right" width="22.22%">2</td>
-<td align="right" width="22.22%">1<span style="font-family:Courier">&#160;</span></td>
-<td align="right" width="22.22%">1<span style="font-family:Courier">&#160;</span></td>
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-
-</tr>
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-<td align="left" valign="top">
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-<td align="right" width="22.22%">1<span style="font-family:Courier">&#160;</span></td>
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-
-</tr>
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2"  style="background-color: #ffffff" >
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-<td align="right" width="22.22%">2</td>
-<td align="right" width="22.22%">18<span style="font-family:Courier">&#160;</span></td>
-<td align="right" width="22.22%">18<span style="font-family:Courier">&#160;</span></td>
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-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2" border="0">
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-<td width="33%" align="left" valign="top" style="border-style: none">
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-<td width="22%" align="right" valign="top" style="border-style: none">
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-<td width="22%" align="right" valign="top" style="border-style: none">
- 
-</td>
-
-</tr>
-
-</table>
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-</td>
-
-</tr>
-
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-
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-
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-<span style="white-space:nowrap" title="Cyclomatic complexity">Complexity</span>
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-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-<tr>
-<td align="left" valign="top">
-<table style="border-style: none" width="100%" cellpadding="0" cellspacing="0" name="" id="" border="0">
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-<td align="left" valign="top">
-<table width="100%" cellpadding="2" border="0">
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-<span style="white-space:nowrap"><span name="button_3" id="button_3" title="Click to shrink or expand tree" style="cursor:pointer;font-family:monospace;font-weight:normal;" onclick ="if (rtwTableShrink) rtwTableShrink(window.document, this, '3', true)"><span class="shrink-button">[+]</span></span>&#160;<b><a href="PMSM_Controller_c.html#fcn_PMSM_Controller_step" title="PMSM_Controller_step" class="code2code">
-PMSM_Controller_step
-</a>
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-<td width="12%" align="right" valign="top" style="border-style: none">
-158
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-<td width="12%" align="right" valign="top" style="border-style: none">
-134
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-<td width="12%" align="right" valign="top" style="border-style: none">
-923
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-<td width="12%" align="right" valign="top" style="border-style: none">
-2,652
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-<td width="12%" align="right" valign="top" style="border-style: none">
-155
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
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-<tr>
-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
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-PI_backCalc_fixdt_o
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-<td width="12%" align="right" valign="top" style="border-style: none">
-24
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-<td width="12%" align="right" valign="top" style="border-style: none">
-24
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-57
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-<td width="12%" align="right" valign="top" style="border-style: none">
-116
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-<td width="12%" align="right" valign="top" style="border-style: none">
-13
-</td>
-
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-
-</table>
-
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-
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-
-</table>
-
-</td>
-
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-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
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-PI_backCalc_fixdt
-</a>
-</span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-20
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-20
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-62
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-120
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-15
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-<tr>
-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2" border="0">
-<tr style="background-color: #eeeeff">
-<td width="37%" align="left" valign="top" style="border-style: none">
-<span style="white-space:nowrap">&#160;&#160;&#160;&#160;&#160;&#160;&#160;<span style="font-family:monospace">&#160;&#160;</span>&#160;&#160;<a href="PMSM_Controller_c.html#fcn_rt_sqrt_Us32En6_Ys16En_1bhh77n4" title="rt_sqrt_Us32En6_Ys16En_1bhh77n4" class="code2code">
-rt_sqrt_Us32En6_Ys16En_1bhh77n4
-</a>
-</span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-18
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-18
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-20
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-27
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-4
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-<tr>
-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2" border="0">
-<tr style="background-color: #ffffff">
-<td width="37%" align="left" valign="top" style="border-style: none">
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-rt_sqrt_Uu16En14_Yu16E_WMwW1mku
-</a>
-</span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-14
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-14
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-20
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-27
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-4
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-<tr>
-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2" border="0">
-<tr style="background-color: #eeeeff">
-<td width="37%" align="left" valign="top" style="border-style: none">
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-rt_sqrt_Us32En10_Ys16E_7VJYwqF9
-</a>
-</span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-10
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-10
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-18
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-25
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-4
-</td>
-
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-
-</table>
-
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-
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-
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-
-</td>
-
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-<tr>
-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2" border="0">
-<tr style="background-color: #ffffff">
-<td width="37%" align="left" valign="top" style="border-style: none">
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-Low_Pass_Filter
-</a>
-</span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-4
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-4
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-23
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-55
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-5
-</td>
-
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-
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-
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-
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-
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-
-</td>
-
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-<tr>
-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
-<tr>
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-plook_u16s16_evencka
-</a>
-</span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-2
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-2
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-11
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-24
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-3
-</td>
-
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-
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-
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-
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-
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-
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-
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-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
-<tr>
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-RateInit
-</a>
-</span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-2
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-2
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-18
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-40
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-4
-</td>
-
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-
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-
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-
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-
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-
-</td>
-
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-<tr>
-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="3" id="3" border="0">
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2" border="0">
-<tr style="background-color: #eeeeff">
-<td width="37%" align="left" valign="top" style="border-style: none">
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-div_nde_s32_floor
-</a>
-</span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-0
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-0
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-2
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-5
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-2
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-<tr>
-<td align="left" valign="top">
-<table style="border-style: none" width="100%" cellpadding="0" cellspacing="0" name="" id="" border="0">
-<tr>
-<td align="left" valign="top">
-<table width="100%" cellpadding="2" border="0">
-<tr style="background-color: #ffffff">
-<td width="37%" align="left" valign="top" style="border-style: none">
-<span style="white-space:nowrap"><span name="button_13" id="button_13" title="Click to shrink or expand tree" style="cursor:pointer;font-family:monospace;font-weight:normal;" onclick ="if (rtwTableShrink) rtwTableShrink(window.document, this, '13', true)"><span class="shrink-button">[+]</span></span>&#160;<b><a href="PMSM_Controller_c.html#fcn_PMSM_Controller_initialize" title="PMSM_Controller_initialize" class="code2code">
-PMSM_Controller_initialize
-</a>
-</b></span>
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-12
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-12
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-18
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-67
-</td>
-<td width="12%" align="right" valign="top" style="border-style: none">
-1
-</td>
-
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-
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-
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-
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-<tr>
-<td align="left" valign="top">
-<table style="display: none; border-style: none" width="100%" cellpadding="0" cellspacing="0" name="13" id="13" border="0">
-<tr>
-<td align="left" valign="top">
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-24
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-18
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-67
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-134
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-923
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-<td width="11%" align="right" valign="top" style="border-style: none">
-2652
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-155
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-2
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-2
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-18
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-<td width="11%" align="right" valign="top" style="border-style: none">
-40
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-4
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-
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-2
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-<td width="11%" align="right" valign="top" style="border-style: none">
-2
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-<td width="11%" align="right" valign="top" style="border-style: none">
-11
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-<td width="11%" align="right" valign="top" style="border-style: none">
-24
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-3
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-
-</tr>
-
-</table>
-
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-10
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-10
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-18
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-25
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-4
-</td>
-
-</tr>
-<tr style="background-color: #eeeeff">
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-
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-
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-
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-<td width="11%" align="right" valign="top" style="border-style: none">
-18
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-<td width="11%" align="right" valign="top" style="border-style: none">
-18
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-20
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-27
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-4
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-
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-<tr style="background-color: #ffffff">
-<td width="22%" align="left" valign="top" style="border-style: none">
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-PMSM_Controller_step
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-
-</tr>
-
-</table>
-
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-14
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-14
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-20
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-27
-</td>
-<td width="11%" align="right" valign="top" style="border-style: none">
-4
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
-</td>
-
-</tr>
-
-</table>
-
+<img src="hilite_warning.png" />Static Code Metrics report is not generated. On the <b>Configuration Parameters &gt; Code Generation &gt; Report</b> pane, select <b>Generate static code metrics</b>.  On the model diagram window, select <b>Code &gt; C/C++ Code &gt; Code Generation Report &gt; Open Model Report</b> or rebuild the model.
 </body>
 
 </html>

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_reducedblocks.html

@@ -33,7 +33,7 @@ Description
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S2&gt;/Scope
+&lt;S19&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -42,52 +42,16 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S8&gt;/Scope
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="even">
-<td align="left" valign="top">
-&lt;S10&gt;/Scope
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="odd">
-<td align="left" valign="top">
-&lt;S11&gt;/Scope
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="even">
-<td align="left" valign="top">
 &lt;S3&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
 </td>
 
-</tr>
-<tr class="odd">
-<td align="left" valign="top">
-&lt;S14&gt;/Logical Operator4
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S20&gt;/Abs2
+&lt;S20&gt;/Logical Operator4
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -96,7 +60,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S20&gt;/Add
+&lt;S29&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -105,7 +69,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S22&gt;/Compare
+&lt;S20&gt;/Scope1
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -114,7 +78,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S22&gt;/Constant
+&lt;S20&gt;/Scope2
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -123,7 +87,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S20&gt;/Sum7
+&lt;S46&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -132,7 +96,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S20&gt;/UnitDelay4
+&lt;S39&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -141,7 +105,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S20&gt;/UnitDelay6
+&lt;S49&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -150,7 +114,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S20&gt;/UnitDelay7
+&lt;S40&gt;/Constant1
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -159,7 +123,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S20&gt;/UnitDelay8
+&lt;S40&gt;/Min
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -168,7 +132,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S20&gt;/dz_cntTrnsDet
+&lt;S50&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -177,7 +141,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S14&gt;/Scope1
+&lt;S50&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -186,7 +150,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S14&gt;/Scope2
+&lt;S51&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -195,7 +159,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S4&gt;/Scope
+&lt;S51&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -204,7 +168,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S26&gt;/Scope
+&lt;S52&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -213,7 +177,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S34&gt;/Data Type Duplicate
+&lt;S61&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -222,7 +186,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S34&gt;/Data Type Propagation
+&lt;S42&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -231,7 +195,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S1&gt;/Scope2
+&lt;S71&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -240,7 +204,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S55&gt;/Scope
+&lt;S71&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -249,7 +213,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S48&gt;/Scope
+&lt;S74&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -258,7 +222,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S58&gt;/Scope
+&lt;S76&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -267,7 +231,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S59&gt;/Data Type Duplicate
+&lt;S76&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -276,7 +240,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S59&gt;/Data Type Propagation
+&lt;S77&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -285,7 +249,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S60&gt;/Scope
+&lt;S77&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -294,7 +258,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S69&gt;/Scope
+&lt;S83&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -303,43 +267,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S6&gt;/Scope12
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="odd">
-<td align="left" valign="top">
-&lt;S51&gt;/Scope
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="even">
-<td align="left" valign="top">
-&lt;S79&gt;/Data Type Duplicate
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="odd">
-<td align="left" valign="top">
-&lt;S79&gt;/Data Type Propagation
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="even">
-<td align="left" valign="top">
-&lt;S82&gt;/Scope
+&lt;S83&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -366,7 +294,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S85&gt;/Data Type Duplicate
+&lt;S93&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -375,7 +303,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S85&gt;/Data Type Propagation
+&lt;S93&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -384,7 +312,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S91&gt;/Data Type Duplicate
+&lt;S95&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -393,7 +321,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S91&gt;/Data Type Propagation
+&lt;S95&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -402,7 +330,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S94&gt;/Data Type Duplicate
+&lt;S45&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -411,7 +339,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S94&gt;/Data Type Propagation
+&lt;S100&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -420,7 +348,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S103&gt;/Data Type Duplicate
+&lt;S100&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -429,7 +357,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S103&gt;/Data Type Propagation
+&lt;S107&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -438,7 +366,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S105&gt;/Data Type Duplicate
+&lt;S107&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -447,7 +375,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S105&gt;/Data Type Propagation
+&lt;S4&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -456,7 +384,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S54&gt;/Scope
+&lt;S37&gt;/Scope
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -465,7 +393,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S110&gt;/Data Type Duplicate
+&lt;S117&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -474,7 +402,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S110&gt;/Data Type Propagation
+&lt;S117&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -483,7 +411,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S117&gt;/Data Type Duplicate
+&lt;S121&gt;/Data Type Duplicate
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -492,7 +420,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S117&gt;/Data Type Propagation
+&lt;S121&gt;/Data Type Propagation
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -501,16 +429,16 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S10&gt;/Manual Switch
+&lt;S1&gt;/Data Type Conversion4
 </td>
 <td align="left" valign="top">
-Eliminated due to constant selection input
+Eliminate redundant data type conversion
 </td>
 
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S26&gt;/Data Type Conversion
+&lt;S1&gt;/Data Type Conversion6
 </td>
 <td align="left" valign="top">
 Eliminate redundant data type conversion
@@ -519,7 +447,7 @@ Eliminate redundant data type conversion
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S6&gt;/Data Type Conversion
+&lt;S1&gt;/Data Type Conversion7
 </td>
 <td align="left" valign="top">
 Eliminate redundant data type conversion
@@ -528,7 +456,7 @@ Eliminate redundant data type conversion
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S78&gt;/Data Type Conversion1
+&lt;S70&gt;/Data Type Conversion1
 </td>
 <td align="left" valign="top">
 Eliminate redundant data type conversion
@@ -537,7 +465,7 @@ Eliminate redundant data type conversion
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S80&gt;/Data Type Conversion
+&lt;S72&gt;/Data Type Conversion
 </td>
 <td align="left" valign="top">
 Eliminate redundant data type conversion
@@ -546,34 +474,16 @@ Eliminate redundant data type conversion
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S10&gt;/Constant
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="even">
-<td align="left" valign="top">
-&lt;S20&gt;/Divide14
-</td>
-<td align="left" valign="top">
-Unused code path elimination
-</td>
-
-</tr>
-<tr class="odd">
-<td align="left" valign="top">
-&lt;S20&gt;/smooth
+&lt;S36&gt;/Data Type Conversion
 </td>
 <td align="left" valign="top">
-Unused code path elimination
+Eliminate redundant data type conversion
 </td>
 
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S74&gt;/Constant1
+&lt;S66&gt;/Constant1
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -582,7 +492,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S99&gt;/Add
+&lt;S89&gt;/Add
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -591,7 +501,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S99&gt;/Constant1
+&lt;S89&gt;/Constant1
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -600,7 +510,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S99&gt;/Constant3
+&lt;S89&gt;/Constant3
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -609,7 +519,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S99&gt;/Constant4
+&lt;S89&gt;/Constant4
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -618,7 +528,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S99&gt;/Constant5
+&lt;S89&gt;/Constant5
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -627,7 +537,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S99&gt;/Constant6
+&lt;S89&gt;/Constant6
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -636,7 +546,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S99&gt;/Divide
+&lt;S89&gt;/Divide
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -645,7 +555,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S99&gt;/Divide1
+&lt;S89&gt;/Divide1
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -654,7 +564,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S99&gt;/Divide2
+&lt;S89&gt;/Divide2
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -663,7 +573,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S99&gt;/Divide4
+&lt;S89&gt;/Divide4
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -672,7 +582,7 @@ Unused code path elimination
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S99&gt;/Gain
+&lt;S89&gt;/Gain
 </td>
 <td align="left" valign="top">
 Unused code path elimination
@@ -681,7 +591,7 @@ Unused code path elimination
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S95&gt;/Gain
+&lt;S85&gt;/Gain
 </td>
 <td align="left" valign="top">
 Unused code path elimination

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_replacements.html

@@ -12,7 +12,7 @@ Code replacements in PMSM_Controller
 <div>
 
 </div>
-<img src="hilite_warning.png" />Code replacements report not generated. Select <a href="matlab:configset.highlightParameter('MotorController_FOC', 'GenerateCodeReplacementReport')">'Summarize which blocks triggered code replacements'</a>.
+<img src="hilite_warning.png" />Code replacements report not generated. Select <a href="matlab:configset.highlightParameter('MotorController_FOC_hall', 'GenerateCodeReplacementReport')">'Summarize which blocks triggered code replacements'</a>.
 </body>
 
 </html>

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_subsystems.html

@@ -69,13 +69,13 @@ Outcome Diagnostic
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S56&gt;
+&lt;S24&gt;
 </td>
 <td align="left" valign="top">
-Reusable Function
+Auto
 </td>
 <td align="left" valign="top">
-<A HREF="PMSM_Controller_c.html#fcn_Low_Pass_Filter" TARGET="rtwreport_document_frame">Reusable Function(S56)</A>
+<A HREF="PMSM_Controller_c.html#fcn_wrapper" TARGET="rtwreport_document_frame">Reusable Function(S24)</A>
 </td>
 <td align="left" valign="top">
 <FONT COLOR="green">normal</FONT>
@@ -84,13 +84,13 @@ Reusable Function
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S83&gt;
+&lt;S33&gt;
 </td>
 <td align="left" valign="top">
-Reusable Function
+Auto
 </td>
 <td align="left" valign="top">
-<A HREF="PMSM_Controller_c.html#fcn_Low_Pass_Filter" TARGET="rtwreport_document_frame">Reusable Function(S56)</A>
+<A HREF="PMSM_Controller_c.html#fcn_wrapper" TARGET="rtwreport_document_frame">Reusable Function(S24)</A>
 </td>
 <td align="left" valign="top">
 <FONT COLOR="green">normal</FONT>
@@ -99,13 +99,13 @@ Reusable Function
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S89&gt;
+&lt;S47&gt;
 </td>
 <td align="left" valign="top">
 Reusable Function
 </td>
 <td align="left" valign="top">
-<A HREF="PMSM_Controller_c.html#fcn_PI_backCalc_fixdt" TARGET="rtwreport_document_frame">Reusable Function(S89)</A>
+<A HREF="PMSM_Controller_c.html#fcn_Low_Pass_Filter" TARGET="rtwreport_document_frame">Reusable Function(S47)</A>
 </td>
 <td align="left" valign="top">
 <FONT COLOR="green">normal</FONT>
@@ -114,13 +114,13 @@ Reusable Function
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S100&gt;
+&lt;S75&gt;
 </td>
 <td align="left" valign="top">
 Reusable Function
 </td>
 <td align="left" valign="top">
-<A HREF="PMSM_Controller_c.html#fcn_PI_backCalc_fixdt_o" TARGET="rtwreport_document_frame">Reusable Function(S100)</A>
+<A HREF="PMSM_Controller_c.html#fcn_Low_Pass_Filter" TARGET="rtwreport_document_frame">Reusable Function(S47)</A>
 </td>
 <td align="left" valign="top">
 <FONT COLOR="green">normal</FONT>
@@ -129,13 +129,13 @@ Reusable Function
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S101&gt;
+&lt;S81&gt;
 </td>
 <td align="left" valign="top">
 Reusable Function
 </td>
 <td align="left" valign="top">
-<A HREF="PMSM_Controller_c.html#fcn_PI_backCalc_fixdt_o" TARGET="rtwreport_document_frame">Reusable Function(S100)</A>
+<A HREF="PMSM_Controller_c.html#fcn_PI_backCalc_fixdt" TARGET="rtwreport_document_frame">Reusable Function(S81)</A>
 </td>
 <td align="left" valign="top">
 <FONT COLOR="green">normal</FONT>
@@ -144,13 +144,13 @@ Reusable Function
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S109&gt;
+&lt;S90&gt;
 </td>
 <td align="left" valign="top">
-Auto
+Reusable Function
 </td>
 <td align="left" valign="top">
-<A HREF="PMSM_Controller_c.html#fcn_RateInit" TARGET="rtwreport_document_frame">Reusable Function(S109)</A>
+<A HREF="PMSM_Controller_c.html#fcn_PI_backCalc_fixdt_i" TARGET="rtwreport_document_frame">Reusable Function(S90)</A>
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+&lt;S91&gt;
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-<A HREF="PMSM_Controller_c.html#fcn_RateInit" TARGET="rtwreport_document_frame">Reusable Function(S109)</A>
+<A HREF="PMSM_Controller_c.html#fcn_PI_backCalc_fixdt_i" TARGET="rtwreport_document_frame">Reusable Function(S90)</A>
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+&lt;S99&gt;
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 <td align="left" valign="top">
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-Inline
+<A HREF="PMSM_Controller_c.html#fcn_RateInit" TARGET="rtwreport_document_frame">Reusable Function(S99)</A>
 </td>
 <td align="left" valign="top">
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+&lt;S106&gt;
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 <td align="left" valign="top">
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 </td>
 <td align="left" valign="top">
-Inline
+<A HREF="PMSM_Controller_c.html#fcn_RateInit" TARGET="rtwreport_document_frame">Reusable Function(S99)</A>
 </td>
 <td align="left" valign="top">
 <FONT COLOR="green">normal</FONT>
@@ -204,13 +204,13 @@ Inline
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
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+&lt;S116&gt;
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 <td align="left" valign="top">
 Auto
 </td>
 <td align="left" valign="top">
-Inline
+<A HREF="PMSM_Controller_c.html#fcn_RateInit_a" TARGET="rtwreport_document_frame">Reusable Function(S116)</A>
 </td>
 <td align="left" valign="top">
 <FONT COLOR="green">normal</FONT>
@@ -219,13 +219,13 @@ Inline
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 <tr class="even">
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+&lt;S120&gt;
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 <td align="left" valign="top">
 Auto
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 <td align="left" valign="top">
-Inline
+<A HREF="PMSM_Controller_c.html#fcn_RateInit_a" TARGET="rtwreport_document_frame">Reusable Function(S116)</A>
 </td>
 <td align="left" valign="top">
 <FONT COLOR="green">normal</FONT>
@@ -234,7 +234,7 @@ Inline
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 <tr class="odd">
 <td align="left" valign="top">
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+&lt;S11&gt;
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@@ -249,7 +249,7 @@ Inline
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+&lt;S9&gt;
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 Auto
@@ -264,7 +264,7 @@ Inline
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-&lt;S19&gt;
+&lt;S8&gt;
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 <tr class="even">
 <td align="left" valign="top">
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@@ -294,7 +294,7 @@ Inline
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+&lt;S25&gt;
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 <td align="left" valign="top">
 Auto
@@ -324,7 +324,7 @@ Inline
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 <tr class="odd">
 <td align="left" valign="top">
-&lt;S33&gt;
+&lt;S26&gt;
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 <td align="left" valign="top">
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@@ -339,7 +339,7 @@ Inline
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 <tr class="even">
 <td align="left" valign="top">
-&lt;S29&gt;
+&lt;S16&gt;
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 <td align="left" valign="top">
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@@ -354,7 +354,7 @@ Inline
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 <tr class="odd">
 <td align="left" valign="top">
-&lt;S30&gt;
+&lt;S28&gt;
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 <td align="left" valign="top">
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@@ -369,7 +369,7 @@ Inline
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 <tr class="even">
 <td align="left" valign="top">
-&lt;S28&gt;
+&lt;S32&gt;
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@@ -384,7 +384,7 @@ Inline
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 <tr class="odd">
 <td align="left" valign="top">
-&lt;S43&gt;
+&lt;S29&gt;
 </td>
 <td align="left" valign="top">
 Auto
@@ -399,7 +399,7 @@ Inline
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 <tr class="even">
 <td align="left" valign="top">
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+&lt;S55&gt;
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@@ -414,7 +414,7 @@ Inline
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 <tr class="odd">
 <td align="left" valign="top">
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+&lt;S72&gt;
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 <tr class="even">
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@@ -444,7 +444,7 @@ Inline
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 <td align="left" valign="top">
-&lt;S80&gt;
+&lt;S79&gt;
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 <tr class="even">
 <td align="left" valign="top">
-&lt;S81&gt;
+&lt;S80&gt;
 </td>
 <td align="left" valign="top">
 Auto
@@ -474,7 +474,7 @@ Inline
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S87&gt;
+&lt;S62&gt;
 </td>
 <td align="left" valign="top">
 Auto
@@ -489,7 +489,7 @@ Inline
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 <tr class="even">
 <td align="left" valign="top">
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+&lt;S85&gt;
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@@ -504,7 +504,7 @@ Inline
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 <tr class="odd">
 <td align="left" valign="top">
-&lt;S88&gt;
+&lt;S86&gt;
 </td>
 <td align="left" valign="top">
 Auto
@@ -519,7 +519,7 @@ Inline
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 <tr class="even">
 <td align="left" valign="top">
-&lt;S70&gt;
+&lt;S97&gt;
 </td>
 <td align="left" valign="top">
 Auto
@@ -534,7 +534,7 @@ Inline
 </tr>
 <tr class="odd">
 <td align="left" valign="top">
-&lt;S95&gt;
+&lt;S104&gt;
 </td>
 <td align="left" valign="top">
 Auto
@@ -549,7 +549,7 @@ Inline
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S96&gt;
+&lt;S110&gt;
 </td>
 <td align="left" valign="top">
 Auto
@@ -564,7 +564,7 @@ Inline
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 <tr class="odd">
 <td align="left" valign="top">
-&lt;S107&gt;
+&lt;S111&gt;
 </td>
 <td align="left" valign="top">
 Auto
@@ -579,21 +579,6 @@ Inline
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-&lt;S114&gt;
-</td>
-<td align="left" valign="top">
-Auto
-</td>
-<td align="left" valign="top">
-Inline
-</td>
-<td align="left" valign="top">
-<FONT COLOR="green">normal</FONT>
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-
-</tr>
-<tr class="odd">
-<td align="left" valign="top">
 &lt;S1&gt;
 </td>
 <td align="left" valign="top">

Simulink/PMSM_Controller_ert_rtw/html/PMSM_Controller_survey.html

@@ -1,8 +1,6 @@
 <html>
 <head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><link rel="stylesheet" type="text/css" href="rtwreport.css" /><script language="JavaScript" type="text/javascript" src="rtwcodemetricsreport_utils.js"></script>
-<script language="JavaScript" id="metrics.js" type="text/javascript" src="metrics.js"></script>
-<title>
+<meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><link rel="stylesheet" type="text/css" href="rtwreport.css" /><title>
 Code Generation Report for 'PMSM_Controller'
 </title>
 
@@ -39,7 +37,7 @@ kevin
 Model Version
 </td>
 <td align="left" valign="top">
-1.1460
+1.1529
 </td>
 
 </tr>
@@ -108,7 +106,7 @@ Simulink Coder Version
 Timestamp of Generated Source Code
 </td>
 <td align="left" valign="top">
-Sat May 28 14:25:47 2022
+Tue Aug  2 19:43:20 2022
 </td>
 
 </tr>
@@ -132,15 +130,6 @@ Subsystem
 </tr>
 <tr class="even">
 <td align="left" valign="top">
-<span id="metricsLocationTitle"> Memory Information </span>
-</td>
-<td align="left" valign="top">
-<span id="metricsLocation"><script>document.write("Code Metrics not yet available"); getCodeMetricsByPolling();</script></span>
-</td>
-
-</tr>
-<tr class="odd">
-<td align="left" valign="top">
 Objectives Specified
 </td>
 <td align="left" valign="top">

Simulink/PMSM_Controller_ert_rtw/html/define.js

@@ -8,33 +8,35 @@ this.def["ert_main.c:rtU"] = {file: "ert_main_c.html",line:28,type:"var"};
 this.def["ert_main.c:rtY"] = {file: "ert_main_c.html",line:29,type:"var"};
 this.def["rt_OneStep"] = {file: "ert_main_c.html",line:43,type:"fcn"};
 this.def["main"] = {file: "ert_main_c.html",line:80,type:"fcn"};
-this.def["plook_u16s16_evencka"] = {file: "PMSM_Controller_c.html",line:98,type:"fcn"};
-this.def["div_nde_s32_floor"] = {file: "PMSM_Controller_c.html",line:123,type:"fcn"};
-this.def["Low_Pass_Filter"] = {file: "PMSM_Controller_c.html",line:134,type:"fcn"};
-this.def["PI_backCalc_fixdt_Init"] = {file: "PMSM_Controller_c.html",line:191,type:"fcn"};
-this.def["PI_backCalc_fixdt"] = {file: "PMSM_Controller_c.html",line:198,type:"fcn"};
-this.def["PI_backCalc_fixdt_p_Init"] = {file: "PMSM_Controller_c.html",line:324,type:"fcn"};
-this.def["PI_backCalc_fixdt_o"] = {file: "PMSM_Controller_c.html",line:335,type:"fcn"};
-this.def["RateInit"] = {file: "PMSM_Controller_c.html",line:457,type:"fcn"};
-this.def["rt_sqrt_Us32En6_Ys16En_1bhh77n4"] = {file: "PMSM_Controller_c.html",line:498,type:"fcn"};
-this.def["rt_sqrt_Us32En10_Ys16E_7VJYwqF9"] = {file: "PMSM_Controller_c.html",line:526,type:"fcn"};
-this.def["rt_sqrt_Uu16En14_Yu16E_WMwW1mku"] = {file: "PMSM_Controller_c.html",line:552,type:"fcn"};
-this.def["PMSM_Controller_step"] = {file: "PMSM_Controller_c.html",line:581,type:"fcn"};
-this.def["PMSM_Controller_initialize"] = {file: "PMSM_Controller_c.html",line:3235,type:"fcn"};
+this.def["PMSM_Controller.c:plook_u16s16_evencka"] = {file: "PMSM_Controller_c.html",line:101,type:"fcn"};
+this.def["PMSM_Controller.c:div_nde_s32_floor"] = {file: "PMSM_Controller_c.html",line:126,type:"fcn"};
+this.def["PMSM_Controller.c:wrapper"] = {file: "PMSM_Controller_c.html",line:137,type:"fcn"};
+this.def["PMSM_Controller.c:Low_Pass_Filter"] = {file: "PMSM_Controller_c.html",line:151,type:"fcn"};
+this.def["PMSM_Controller.c:PI_backCalc_fixdt_Init"] = {file: "PMSM_Controller_c.html",line:208,type:"fcn"};
+this.def["PMSM_Controller.c:PI_backCalc_fixdt"] = {file: "PMSM_Controller_c.html",line:215,type:"fcn"};
+this.def["PMSM_Controller.c:PI_backCalc_fixdt_g_Init"] = {file: "PMSM_Controller_c.html",line:343,type:"fcn"};
+this.def["PMSM_Controller.c:PI_backCalc_fixdt_i"] = {file: "PMSM_Controller_c.html",line:354,type:"fcn"};
+this.def["PMSM_Controller.c:RateInit"] = {file: "PMSM_Controller_c.html",line:476,type:"fcn"};
+this.def["PMSM_Controller.c:RateInit_a"] = {file: "PMSM_Controller_c.html",line:522,type:"fcn"};
+this.def["rt_sqrt_Us32En6_Ys16En5_Is64En10_f_s"] = {file: "PMSM_Controller_c.html",line:563,type:"fcn"};
+this.def["rt_sqrt_Us32En10_Ys16En5_Is32En10_s_s"] = {file: "PMSM_Controller_c.html",line:591,type:"fcn"};
+this.def["rt_sqrt_Uu16En14_Yu16En14_Iu32En28_s_s"] = {file: "PMSM_Controller_c.html",line:617,type:"fcn"};
+this.def["PMSM_Controller_step"] = {file: "PMSM_Controller_c.html",line:646,type:"fcn"};
+this.def["PMSM_Controller_initialize"] = {file: "PMSM_Controller_c.html",line:3226,type:"fcn"};
 this.def["RT_MODEL"] = {file: "PMSM_Controller_h.html",line:40,type:"type"};
 this.def["DW_Low_Pass_Filter"] = {file: "PMSM_Controller_h.html",line:45,type:"type"};
 this.def["DW_PI_backCalc_fixdt"] = {file: "PMSM_Controller_h.html",line:52,type:"type"};
 this.def["ZCE_PI_backCalc_fixdt"] = {file: "PMSM_Controller_h.html",line:57,type:"type"};
-this.def["DW_PI_backCalc_fixdt_i"] = {file: "PMSM_Controller_h.html",line:64,type:"type"};
-this.def["ZCE_PI_backCalc_fixdt_e"] = {file: "PMSM_Controller_h.html",line:69,type:"type"};
-this.def["DW"] = {file: "PMSM_Controller_h.html",line:150,type:"type"};
-this.def["PrevZCX"] = {file: "PMSM_Controller_h.html",line:159,type:"type"};
-this.def["ConstP"] = {file: "PMSM_Controller_h.html",line:181,type:"type"};
-this.def["ExtU"] = {file: "PMSM_Controller_h.html",line:202,type:"type"};
-this.def["ExtY"] = {file: "PMSM_Controller_h.html",line:216,type:"type"};
-this.def["P"] = {file: "PMSM_Controller_h.html",line:312,type:"type"};
+this.def["DW_PI_backCalc_fixdt_j"] = {file: "PMSM_Controller_h.html",line:64,type:"type"};
+this.def["ZCE_PI_backCalc_fixdt_n"] = {file: "PMSM_Controller_h.html",line:69,type:"type"};
+this.def["DW"] = {file: "PMSM_Controller_h.html",line:157,type:"type"};
+this.def["PrevZCX"] = {file: "PMSM_Controller_h.html",line:165,type:"type"};
+this.def["ConstP"] = {file: "PMSM_Controller_h.html",line:187,type:"type"};
+this.def["ExtU"] = {file: "PMSM_Controller_h.html",line:205,type:"type"};
+this.def["ExtY"] = {file: "PMSM_Controller_h.html",line:219,type:"type"};
+this.def["P"] = {file: "PMSM_Controller_h.html",line:302,type:"type"};
 this.def["rtP"] = {file: "PMSM_Controller_data_c.html",line:21,type:"var"};
-this.def["rtConstP"] = {file: "PMSM_Controller_data_c.html",line:165,type:"var"};
+this.def["rtConstP"] = {file: "PMSM_Controller_data_c.html",line:144,type:"var"};
 this.def["int8_T"] = {file: "rtwtypes_h.html",line:49,type:"type"};
 this.def["uint8_T"] = {file: "rtwtypes_h.html",line:50,type:"type"};
 this.def["int16_T"] = {file: "rtwtypes_h.html",line:51,type:"type"};

Simulink/PMSM_Controller_ert_rtw/html/ert_main_c.html

@@ -21,11 +21,11 @@
 <tr name="5" id="5">
 <td><a id="l5" class='ln'>5</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="6" id="6">
-<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1460</span></td></tr>
+<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1529</span></td></tr>
 <tr name="7" id="7">
 <td><a id="l7" class='ln'>7</a></td><td><span class="ct"> * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020</span></td></tr>
 <tr name="8" id="8">
-<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Sat May 28 14:25:47 2022</span></td></tr>
+<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Tue Aug  2 19:43:20 2022</span></td></tr>
 <tr name="9" id="9">
 <td><a id="l9" class='ln'>9</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="10" id="10">

Simulink/PMSM_Controller_ert_rtw/html/metrics.js

@@ -1,58 +0,0 @@
-function CodeMetrics() {
-	 this.metricsArray = {};
-	 this.metricsArray.var = new Array();
-	 this.metricsArray.fcn = new Array();
-	 this.metricsArray.var["rtP"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller_data.c",
-	size: 56};
-	 this.metricsArray.fcn["Low_Pass_Filter"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 4,
-	stackTotal: 4};
-	 this.metricsArray.fcn["PI_backCalc_fixdt"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 20,
-	stackTotal: 20};
-	 this.metricsArray.fcn["PI_backCalc_fixdt_Init"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 0,
-	stackTotal: 0};
-	 this.metricsArray.fcn["PI_backCalc_fixdt_o"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 24,
-	stackTotal: 24};
-	 this.metricsArray.fcn["PI_backCalc_fixdt_p_Init"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 0,
-	stackTotal: 0};
-	 this.metricsArray.fcn["PMSM_Controller_initialize"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 12,
-	stackTotal: 12};
-	 this.metricsArray.fcn["PMSM_Controller_step"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 134,
-	stackTotal: 158};
-	 this.metricsArray.fcn["RateInit"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 2,
-	stackTotal: 2};
-	 this.metricsArray.fcn["div_nde_s32_floor"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 0,
-	stackTotal: 0};
-	 this.metricsArray.fcn["plook_u16s16_evencka"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 2,
-	stackTotal: 2};
-	 this.metricsArray.fcn["rt_sqrt_Us32En10_Ys16E_7VJYwqF9"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 10,
-	stackTotal: 10};
-	 this.metricsArray.fcn["rt_sqrt_Us32En6_Ys16En_1bhh77n4"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 18,
-	stackTotal: 18};
-	 this.metricsArray.fcn["rt_sqrt_Uu16En14_Yu16E_WMwW1mku"] = {file: "E:\\works\\mcu\\MC100\\Simulink\\PMSM_Controller_ert_rtw\\PMSM_Controller.c",
-	stack: 14,
-	stackTotal: 14};
-	 this.getMetrics = function(token) { 
-		 var data;
-		 data = this.metricsArray.var[token];
-		 if (!data) {
-			 data = this.metricsArray.fcn[token];
-			 if (data) data.type = "fcn";
-		 } else { 
-			 data.type = "var";
-		 }
-	 return data; }; 
-	 this.codeMetricsSummary = '<a href="PMSM_Controller_metrics.html">Global Memory: 56(bytes) Maximum Stack: 134(bytes)</a>';
-	}
-CodeMetrics.instance = new CodeMetrics();

Simulink/PMSM_Controller_ert_rtw/html/rtwcodemetricsreport_utils.js

@@ -1,49 +0,0 @@
-// Copyright 2016 The MathWorks, Inc.
-
-//Poll for metrics.js on 5 second intervals
-function getCodeMetricsByPolling(ctThreshold, intervalPeriod){
-    if(ctThreshold === undefined){
-        ctThreshold = 1000;
-    }
-    if(intervalPeriod === undefined){
-        intervalPeriod = 5000;
-    }
-    var intervalId;
-    var ct=0;
-    //function to get code metrics
-    function getCodeMetrics(){
-        cm = CodeMetrics.instance;
-        var alink = document.getElementById("metricsLocation");
-        alink.innerHTML = cm.codeMetricsSummary;
-    }
-    if (typeof CodeMetrics !== "undefined"){
-        getCodeMetrics();
-    }
-    else{
-        intervalId = window.setInterval(function(){
-            //Try reinclude metrics to check if CodeMetrics are available
-            ct = ct + 1;
-            if (ct > ctThreshold){
-                // Clear if elapsed time is 1000x5 seconds
-                clearInterval(intervalId);
-                var alink = document.getElementById("metricsLocation");
-                alink.innerHTML = 'Error generating code metrics';
-            }
-            else{
-                var metricsScript = document.getElementById('metrics');
-                if(metricsScript !== null){
-                    metricsScript.parentNode.removeChild(metricsScript);
-                }
-                var jsElm = document.createElement("script");
-                jsElm.type = "application/javascript";
-                jsElm.src = "metrics.js";
-                jsElm.id = "metrics";
-                document.getElementsByTagName('head')[0].appendChild(jsElm);
-                if (typeof CodeMetrics !== "undefined"){
-                    clearInterval(intervalId);
-                    getCodeMetrics();
-                }
-            }
-        }, intervalPeriod);
-	}
- }

Simulink/PMSM_Controller_ert_rtw/html/rtwtypes_h.html

@@ -21,11 +21,11 @@
 <tr name="5" id="5">
 <td><a id="l5" class='ln'>5</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="6" id="6">
-<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1460</span></td></tr>
+<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1529</span></td></tr>
 <tr name="7" id="7">
 <td><a id="l7" class='ln'>7</a></td><td><span class="ct"> * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020</span></td></tr>
 <tr name="8" id="8">
-<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Sat May 28 14:25:47 2022</span></td></tr>
+<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Tue Aug  2 19:43:20 2022</span></td></tr>
 <tr name="9" id="9">
 <td><a id="l9" class='ln'>9</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="10" id="10">

Simulink/PMSM_Controller_ert_rtw/html/zero_crossing_types_h.html

@@ -21,11 +21,11 @@
 <tr name="5" id="5">
 <td><a id="l5" class='ln'>5</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="6" id="6">
-<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1460</span></td></tr>
+<td><a id="l6" class='ln'>6</a></td><td><span class="ct"> * Model version                  : 1.1529</span></td></tr>
 <tr name="7" id="7">
 <td><a id="l7" class='ln'>7</a></td><td><span class="ct"> * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020</span></td></tr>
 <tr name="8" id="8">
-<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Sat May 28 14:25:47 2022</span></td></tr>
+<td><a id="l8" class='ln'>8</a></td><td><span class="ct"> * C/C++ source code generated on : Tue Aug  2 19:43:20 2022</span></td></tr>
 <tr name="9" id="9">
 <td><a id="l9" class='ln'>9</a></td><td><span class="ct"> *</span></td></tr>
 <tr name="10" id="10">

Simulink/PMSM_Controller_ert_rtw/rtwtypes.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'PMSM_Controller'.
  *
- * Model version                  : 1.1460
+ * Model version                  : 1.1529
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Sat May 28 14:25:47 2022
+ * C/C++ source code generated on : Tue Aug  2 19:43:20 2022
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: ARM Compatible->ARM Cortex-M

Simulink/PMSM_Controller_ert_rtw/setup_msvc.bat

@@ -1,2 +0,0 @@
-set "VSCMD_START_DIR=%CD%"
-"d:\Program Files (x86)\Microsoft Visual Studio\2019\Community\VC\Auxiliary\Build\VCVARSALL.BAT " amd64

Simulink/PMSM_Controller_ert_rtw/zero_crossing_types.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'PMSM_Controller'.
  *
- * Model version                  : 1.1460
+ * Model version                  : 1.1529
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Sat May 28 14:25:47 2022
+ * C/C++ source code generated on : Tue Aug  2 19:43:20 2022
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: ARM Compatible->ARM Cortex-M

Simulink/init_model.m

@@ -8,15 +8,11 @@ Ts                  = 1e-6;                         % [s] Model sampling time (2
 f_ctrl              = 20e3;                         % [Hz] Controller frequency = 1/Ts_ctrl (20 kHz)
 Ts_ctrl             = 1/f_ctrl;                     % [s] Controller sampling time (50us)5e-5
 f_speed_ctrl        = 500;                          % [Hz] Speed/torque Controller frequency = (500 Hz)
-speed_ctrl          = f_ctrl/f_speed_ctrl;         % [count] Delay for f_speed_ctrl of the FOC controller
+n_spdctl_count      = f_ctrl/f_speed_ctrl;         % [count] Delay for f_speed_ctrl of the FOC controller
 i_pwm_count         = 3000;
 n_hall_count_ps     = 1/Ts;    % counts of per second
-
+n_ramp_count        = f_ctrl/100; %10ms
 %Current sample hw parameters
-n_adc_max = 4096;
-n_resistance = 0.0005;
-n_ref_vol = 3.3;
-n_gain    = 17.1;
 f_adc_curr_ceof = 0.0942;
 f_lpf_idq  = 0.4; %Phase Current LowPass filter
 f_lpf_vdq    = 0.01; %DC link current limit LowPass filter