uart独立工作，logger使用can输出

Signed-off-by: huhui <huhui@sharkgulf.com>

Applications/app/app.c

@@ -26,7 +26,7 @@ static void _can_report_info(void) {
 	current_samp_t *s = foc_get_current_sample();
 	can_report_phase_current(0x45, F2I(s->Ia * 1000), F2I(s->Ib * 1000), F2I(s->Ic * 1000));
 	//sys_debug("phase current %f %f %f\n", s->Ia, s->Ib, s->Ic);
-	//sys_debug("phase offset %d %d %d\n", s->adc_offset_a, s->adc_offset_b, s->adc_offset_c);
+	sys_debug("phase offset %d %d %d %d\n", s->adc_offset_a, s->adc_offset_b, s->adc_offset_c, s->adc_offset_ivbus);
 }
 
 extern void hall_debug_log(void);
@@ -34,7 +34,7 @@ static void _app_low_task(void *args) {
 	while(1) {
 		wdog_reload();
 		_can_report_info();
-		//sys_debug("foc exec time %d, intval %d, max %d, error %d\n", g_meas_foc.exec_time, g_meas_foc.intval_time, g_meas_foc.exec_max_error_time, g_meas_foc.intval_time_error);
+		sys_debug("foc exec time %d, intval %d, max %d, error %d\n", g_meas_foc.exec_time, g_meas_foc.intval_time, g_meas_foc.exec_max_error_time, g_meas_foc.intval_time_error);
 		//sys_debug("hall exec time %d, intval %d\n", g_meas_hall.exec_time, g_meas_hall.intval_time);
 		//sys_debug("vbus voltage: %f\n", foc_get_vbus_voltage());
 		//hall_debug_log();

Applications/bsp/adc.c

@@ -5,6 +5,7 @@
 static void _gpio_init(void);
 
 void adc_init(void){
+	rcu_adc_clock_config(RCU_AF);
 	/* init adc input gpio */
 	_gpio_init();
     /* config ADC clock */
@@ -27,13 +28,21 @@ void adc_init(void){
     /* configure ADC inserted channel length */
     adc_channel_length_config(ADC0, ADC_INSERTED_CHANNEL, 1);
     /* configure ADC inserted channel trigger */
-    adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC0_1_2_EXTTRIG_INSERTED_NONE);
+    adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC_TRIGGER_NONE);
     /* configure ADC inserted channel length */
     adc_channel_length_config(ADC1, ADC_INSERTED_CHANNEL, 1);
     /* configure ADC inserted channel */
     adc_inserted_channel_config(ADC0, 0, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
     adc_inserted_channel_config(ADC1, 0, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
 
+	adc_update_insert_sample_time(ADC0, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
+	adc_update_insert_sample_time(ADC0, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
+	adc_update_insert_sample_time(ADC0, W_PHASE_I_CHAN, ADC_SAMPLE_TIME);
+
+	adc_update_insert_sample_time(ADC1, U_PHASE_I_CHAN, ADC_SAMPLE_TIME);
+	adc_update_insert_sample_time(ADC1, V_PHASE_I_CHAN, ADC_SAMPLE_TIME);
+	adc_update_insert_sample_time(ADC1, W_PHASE_I_CHAN, ADC_SAMPLE_TIME);
+
     /* ADC external trigger enable */
     adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
     adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
@@ -65,14 +74,17 @@ static void _gpio_init(void) {
 
 
 void adc_start_insert_convert(void) {
+	int drop = 5;
     /* clear the ADC flag */
     adc_flag_clear(ADC0, ADC_FLAG_EOIC);
     adc_flag_clear(ADC1, ADC_FLAG_EOIC);
 
-	while ((adc_flag_get(ADC0, ADC_FLAG_EOIC) == RESET) || (adc_flag_get(ADC1, ADC_FLAG_EOIC) == RESET));
-	adc_flag_clear(ADC0, ADC_FLAG_EOIC);
-	adc_flag_clear(ADC1, ADC_FLAG_EOIC);
-	
+	adc_enable_ext_trigger();
+	while(drop-- > 0) {
+		while ((adc_flag_get(ADC0, ADC_FLAG_EOIC) == RESET) || (adc_flag_get(ADC1, ADC_FLAG_EOIC) == RESET));
+		adc_flag_clear(ADC0, ADC_FLAG_EOIC);
+		adc_flag_clear(ADC1, ADC_FLAG_EOIC);
+	}
     /* enable ADC interrupt */
     adc_interrupt_enable(ADC0, ADC_INT_EOIC);
 }
@@ -89,6 +101,7 @@ void adc_stop_insert_convert(void) {
 
 
 s32 adc_sample_regular_channel(int channel, int times) {
+#if 1
 	u32 adc_device = ADC0;
 	int value = 0;
 	int count = 0;
@@ -121,5 +134,8 @@ restart:
 		return value/times;
 	}
 	return (value - min - max)/(times-2);
+#else
+	return 0;
+#endif
 }
 

Applications/bsp/adc.h

@@ -23,55 +23,45 @@ inserted ADC 由timer0 ch3触发，
 
 #define ADC_SAMPLE_TIME ADC_SAMPLETIME_7POINT5
 #define ADC_TRIGGER_PHASE ADC0_1_EXTTRIG_INSERTED_T0_CH3
+#define ADC_TRIGGER_NONE  ADC0_1_2_EXTTRIG_INSERTED_NONE
 #define ADC_TRIGGER_VBUS ADC0_1_EXTTRIG_INSERTED_T1_CH0
 
 //#define ADC_RANK_CHANNEL(c1, c2, l) ((c1)<<ISQ2_OFFSET | (c2)<<ISO3_OFFSET | (l)<<IL_OFFSET)
 #define ADC_RANK_CHANNEL(c)  ((c)<<ISO3_OFFSET | (0)<<IL_OFFSET) 
 #define ADC_CALI_RANK_CHANEL(c)  ((c)<<ISO3_OFFSET | (0)<<IL_OFFSET) 
 static u32 adc0_rank_channels[6] = {
-	ADC_RANK_CHANNEL(U_PHASE_I_CHAN),//1, UW, AC
+	ADC_RANK_CHANNEL(V_PHASE_I_CHAN),//1, UW, AC
 	ADC_RANK_CHANNEL(V_PHASE_I_CHAN),//2, VW, BC
-	ADC_RANK_CHANNEL(V_PHASE_I_CHAN),//3, VU, BA
+	ADC_RANK_CHANNEL(W_PHASE_I_CHAN),//3, VU, BA
 	ADC_RANK_CHANNEL(W_PHASE_I_CHAN),//4, WU, CA
-	ADC_RANK_CHANNEL(W_PHASE_I_CHAN),//5, WV, CB
+	ADC_RANK_CHANNEL(U_PHASE_I_CHAN),//5, WV, CB
 	ADC_RANK_CHANNEL(U_PHASE_I_CHAN),//6, UV, AB
 };
 static u32 adc1_rank_channels[6] = {
-	ADC_RANK_CHANNEL(W_PHASE_I_CHAN),
-	ADC_RANK_CHANNEL(W_PHASE_I_CHAN),
 	ADC_RANK_CHANNEL(U_PHASE_I_CHAN),
 	ADC_RANK_CHANNEL(U_PHASE_I_CHAN),
 	ADC_RANK_CHANNEL(V_PHASE_I_CHAN),
 	ADC_RANK_CHANNEL(V_PHASE_I_CHAN),
+	ADC_RANK_CHANNEL(W_PHASE_I_CHAN),
+	ADC_RANK_CHANNEL(W_PHASE_I_CHAN),
 };
 
-static u32 adc0_cali_rank_channels[3] = {
-	ADC_CALI_RANK_CHANEL(U_PHASE_I_CHAN),
-	ADC_CALI_RANK_CHANEL(V_PHASE_I_CHAN),
-	ADC_CALI_RANK_CHANEL(W_PHASE_I_CHAN),
-};
-static u32 adc1_cali_rank_channels[3] = {
-	ADC_CALI_RANK_CHANEL(VBUS_I_CHAN),
-	ADC_CALI_RANK_CHANEL(VBUS_I_CHAN),
-	ADC_CALI_RANK_CHANEL(VBUS_I_CHAN),
-};
 
-#define PHASE_I_ADC ADC0
 static u32 volatile * adc_phase_reg1[6] = {
 	&ADC_IDATA0(ADC0),//1, U
 	&ADC_IDATA0(ADC0),//2, V
 	&ADC_IDATA0(ADC0),//3, V
-	&ADC_IDATA0(ADC1),//4, U
-	&ADC_IDATA0(ADC1),//5, V 
-	&ADC_IDATA0(ADC1),//6, V
+	&ADC_IDATA0(ADC0),//4, U
+	&ADC_IDATA0(ADC0),//5, V 
+	&ADC_IDATA0(ADC0),//6, V
 };
 static u32 volatile * adc_phase_reg2[6] = {
 	&ADC_IDATA0(ADC1),//1, W
 	&ADC_IDATA0(ADC1),//2, W
 	&ADC_IDATA0(ADC1),//3, U
-	&ADC_IDATA0(ADC0),//4, W
-	&ADC_IDATA0(ADC0),//5, W
-	&ADC_IDATA0(ADC0),//6, U
+	&ADC_IDATA0(ADC1),//4, W
+	&ADC_IDATA0(ADC1),//5, W
+	&ADC_IDATA0(ADC1),//6, U
 };
 
 static void __inline adc_phase_current_read(u8 sector, s32 *v1, s32 *v2) {
@@ -79,29 +69,21 @@ static void __inline adc_phase_current_read(u8 sector, s32 *v1, s32 *v2) {
 	*v2 = (s32)(*adc_phase_reg2[sector]) ;
 }
 
-static void __inline adc_cali_current_read(s32 *v1, s32 *v2) {
-	*v1 = (s32)ADC_IDATA0(ADC0);
-	*v2 = (s32)ADC_IDATA0(ADC1);
-}
-
 
-static void __inline adc_phase_inserted_config(u8 sector) {
+static void __inline adc_current_sample_config(u8 sector) {
 	ADC_ISQ(ADC0) = adc0_rank_channels[sector];
 	ADC_ISQ(ADC1) = adc1_rank_channels[sector];
 }
 
 
-static void __inline adc_cali_inserted_config(u8 invert) {
-	ADC_ISQ(ADC0) = adc0_cali_rank_channels[invert];
-	ADC_ISQ(ADC1) = adc1_cali_rank_channels[invert];
-}
-
 static void __inline adc_disable_ext_trigger(void) {   
 	ADC_CTL1(ADC0) &= ~ADC_CTL1_ETEIC;
+	//ADC_CTL1(ADC1) &= ~ADC_CTL1_ETEIC;
 }
 
 static void __inline adc_enable_ext_trigger(void) {	
 	ADC_CTL1(ADC0) |= ADC_CTL1_ETEIC;
+	//ADC_CTL1(ADC1) |= ADC_CTL1_ETEIC;
 }
 
 static bool __inline adc_is_trigged_vbus(void) {
@@ -152,8 +134,8 @@ static __inline__ bool adc_eoic_interrupt(void)
 	return false;
 }
 
-static __inline__ void adc_clear_eoic_flags(void) {
-	ADC_STAT(ADC0) &= ~((u32) ADC_STAT_EOIC);
+static __inline__ void adc_clear_irq_flags(void) {
+	ADC_STAT(ADC0) &= ~((u32) ADC_INT_FLAG_EOIC);
 }
 
 

Applications/bsp/bsp.h

@@ -24,7 +24,7 @@
 #define ADC_CLOCK_MHz (30)
 #define NS_PER_TCLK (8) /* (1/120000000 * 1000000000) */
 #define NS_2_TCLK(ns) ((ns/NS_PER_TCLK) + 1) //ns תΪpwmʹ�õ��Ǹ�TIM��clk count
-#define FOC_PWM_FS (15 * 1000)
+#define FOC_PWM_FS (16 * 1000)
 #define FOC_PWM_period (TIM_CLOCK/FOC_PWM_FS)
 #define FOC_PWM_Half_Period (FOC_PWM_period/2)
 

Applications/bsp/mc_irqs.c

@@ -83,11 +83,11 @@ extern void foc_pwm_up_handler(void);
 
 void ADC0_1_IRQHandler(void)
 {
-	if (adc_eoic_interrupt()) {//phase I samples
-		mc_phase_current_irq();
-    	/* clear the ADC flag */
-		adc_clear_eoic_flags();
-	}	
+	adc_disable_ext_trigger();
+	mc_phase_current_irq();
+	adc_enable_ext_trigger();
+    /* clear the ADC flag */
+	adc_clear_irq_flags();	
 }
 
 void TIMER0_UP_IRQHandler(void) {

Applications/bsp/pwm.c

@@ -89,6 +89,8 @@ static void _init_pwm_timer(void) {
     timer_initpara.clockdivision    = TIMER_CKDIV_DIV1;
     timer_initpara.repetitioncounter = 0;
     timer_init(timer,&timer_initpara);
+    /* auto-reload preload enable */
+    timer_auto_reload_shadow_enable(timer);
 
     /* CH1,CH2 and CH3 configuration in PWM mode */
     timer_ocintpara.outputstate  = TIMER_CCX_ENABLE;
@@ -96,7 +98,7 @@ static void _init_pwm_timer(void) {
     timer_ocintpara.ocpolarity   = TIMER_OC_POLARITY_LOW;
     timer_ocintpara.ocnpolarity  = TIMER_OCN_POLARITY_LOW;
     timer_ocintpara.ocidlestate  = TIMER_OC_IDLE_STATE_HIGH;
-    timer_ocintpara.ocnidlestate = TIMER_OC_IDLE_STATE_HIGH;
+    timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_HIGH;
 
     timer_channel_output_config(timer,TIMER_CH_0,&timer_ocintpara);
     timer_channel_output_pulse_value_config(timer,TIMER_CH_0,half_period);
@@ -116,6 +118,9 @@ static void _init_pwm_timer(void) {
     timer_ocintpara.outputstate  = TIMER_CCX_ENABLE;
     timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE;
     timer_ocintpara.ocpolarity   = TIMER_OC_POLARITY_HIGH;
+	timer_ocintpara.ocnpolarity  = TIMER_OCN_POLARITY_HIGH;
+    timer_ocintpara.ocidlestate  = TIMER_OC_IDLE_STATE_LOW;
+    timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
 
     /* chan3 trigger adc O3CPRE is alwary active high, adc trigger is rising */
     timer_channel_output_config(timer,TIMER_CH_3,&timer_ocintpara);
@@ -151,8 +156,6 @@ static void _init_pwm_timer(void) {
 	}
 	pwm_enable_channel();
 	//timer_primary_output_config(timer,ENABLE);
-    /* auto-reload preload enable */
-    timer_auto_reload_shadow_enable(timer);
 
 	timer_interrupt_disable(timer, TIMER_INT_UP);
 	timer_interrupt_flag_clear(timer, TIMER_INT_FLAG_UP);
@@ -247,7 +250,7 @@ static void _init_aux_timer(void) {
 
 
 void pwm_start(void){
-	pwm_update_duty(FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2, FOC_PWM_Half_Period-5);
+	pwm_update_duty(0, 0, 0, FOC_PWM_Half_Period-1);
 	/* wait for a new PWM period to flush last HF task */
 	timer_flag_clear(pwm_timer, TIMER_FLAG_UP);
 	while ( timer_flag_get(pwm_timer, TIMER_FLAG_UP) == RESET )
@@ -271,6 +274,14 @@ void pwm_stop(void){
 	timer_flag_clear(pwm_timer, TIMER_FLAG_UP);
 }
 
+void pwm_enable_output(bool enable) {
+	if (enable) {
+		timer_primary_output_config(pwm_timer,ENABLE);
+	}else {
+		timer_primary_output_config(pwm_timer,DISABLE);
+	}
+}
+
 /*open low side of the mosfet*/
 void pwm_turn_on_low_side(void)
 {  

Applications/bsp/pwm.h

@@ -38,6 +38,7 @@ void pwm_3phase_init(void);
 void pwm_start(void);
 void pwm_stop(void);
 void pwm_turn_on_low_side(void);
+void pwm_enable_output(bool enable);
 
 #endif  /*_PWM_H__*/
 

Applications/bsp/uart.c

@@ -4,37 +4,29 @@
 #include "libs/logger.h"
 #include "libs/utils.h"
 
-#define SHARK_UART_BAUDRATE				500000
+#define SHARK_UART_BAUDRATE				921600
 
-#define SHARK_UART0_com					UART3
+#define SHARK_UART0_com					USART2
 #define SHARK_UART0_tx_port				GPIOB
 #define SHARK_UART0_tx_pin				GPIO_PIN_10
 #define SHARK_UART0_rx_port				GPIOB
 #define SHARK_UART0_rx_pin				GPIO_PIN_11
-#define SHARK_UART0_irq					UART3_IRQn
-#define SHARK_UART0_clk					RCU_UART3
+#define SHARK_UART0_irq					USART2_IRQn
+#define SHARK_UART0_clk					RCU_USART2
 #define SHARK_UART0_tx_gpio_clk			RCU_GPIOB
 #define SHARK_UART0_rx_gpio_clk			RCU_GPIOB
-#define SHARK_UART0_tx_dma				DMA1
-#define SHARK_UART0_tx_dma_ch			DMA_CH4
-#define SHARK_UART0_tx_dma_clk			RCU_DMA1
-#define SHARK_UART0_rx_dma				DMA1
+#define SHARK_UART0_tx_dma				DMA0
+#define SHARK_UART0_tx_dma_ch			DMA_CH1
+#define SHARK_UART0_tx_dma_clk			RCU_DMA0
+#define SHARK_UART0_rx_dma				DMA0
 #define SHARK_UART0_rx_dma_ch			DMA_CH2
-#define SHARK_UART0_rx_dma_clk			RCU_DMA1
+#define SHARK_UART0_rx_dma_clk			RCU_DMA0
 
 
 // ================================================================================
 #define ENABLE_RX_DMA 1
-#define UART_NUM 1
 static u8 shark_uart0_tx_cache[SHARK_UART_TX_MEM_SIZE];
-#if UART_NUM==2
-static u8 shark_uart1_tx_cache[SHARK_UART_TX_MEM_SIZE];
-#endif
-
 static u8 shark_uart0_rx_cache[SHARK_UART_RX_MEM_SIZE];
-#if UART_NUM==2
-static u8 shark_uart1_rx_cache[SHARK_UART_RX_MEM_SIZE];
-#endif
 
 static shark_uart_t _shark_uart[1];
 ///static bool uart_no_data = false;
@@ -46,7 +38,7 @@ static shark_uart_t _shark_uart[1];
 
 // ================================================================================
 static uart_enum_t _uart_index(uint32_t com){
-	return com == SHARK_UART0_com?SHARK_UART0:SHARK_UART1;
+	return SHARK_UART0;
 }
 static bool shark_uart_on_rx_frame(shark_uart_t *uart)
 {
@@ -154,6 +146,7 @@ static void shark_uart_write(shark_uart_t *uart, const u8 *buff, u16 size)
 		shark_uart_dma_tx(uart);
 		buff += length;
 		size -= length;
+		co_task_schedule();
 	}
 }
 
@@ -163,9 +156,19 @@ static void shark_uart_write_byte(shark_uart_t *uart, u8 value)
 }
 
 
+void shark_uart_write_log(char *buffer){
+	int len = strlen(buffer);
+	shark_uart_t *uart = (_shark_uart+SHARK_UART0);
+	if (len > byte_queue_get_free(&uart->tx_queue)){
+		return;
+	}
+	byte_queue_write(&uart->tx_queue, (const u8 *)buffer, len);
+	shark_uart_dma_tx(uart);
+}
+
 static void shark_uart_tx_dma_init(shark_uart_t *uart){
 	dma_parameter_struct dma_init_struct;
-	rcu_periph_clock_enable(_uart_index(uart->uart_com)== SHARK_UART0?SHARK_UART0_tx_dma_clk:SHARK_UART0_tx_dma_clk);
+	rcu_periph_clock_enable(SHARK_UART0_tx_dma_clk);
 	dma_deinit(SHARK_UART0_tx_dma, uart->tx_dma_ch);
 	dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
 	dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
@@ -191,7 +194,7 @@ static void shark_uart_tx_dma_init(shark_uart_t *uart){
 #if ENABLE_RX_DMA==1
 static void shark_uart_rx_dma_init(shark_uart_t *uart){
 	dma_parameter_struct dma_init_struct;
-	rcu_periph_clock_enable(_uart_index(uart->uart_com)== SHARK_UART0?SHARK_UART0_rx_dma_clk:SHARK_UART0_rx_dma_clk);
+	rcu_periph_clock_enable(SHARK_UART0_rx_dma_clk);
 	dma_deinit(SHARK_UART0_rx_dma, uart->rx_dma_ch);
 	dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
 	dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
@@ -213,7 +216,8 @@ static void shark_uart_pin_init(shark_uart_t *uart){
 	rcu_periph_clock_enable(SHARK_UART0_clk);
 	rcu_periph_clock_enable(SHARK_UART0_rx_gpio_clk);
 	rcu_periph_clock_enable(SHARK_UART0_tx_gpio_clk);
-	gpio_init(SHARK_UART0_tx_port, GPIO_MODE_OUT_PP,GPIO_OSPEED_50MHZ,SHARK_UART0_tx_pin);
+	rcu_periph_clock_enable(RCU_AF);
+	gpio_init(SHARK_UART0_tx_port, GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,SHARK_UART0_tx_pin);
 	gpio_init(SHARK_UART0_rx_port, GPIO_MODE_IN_FLOATING,GPIO_OSPEED_50MHZ,SHARK_UART0_rx_pin);
 }
 
@@ -263,15 +267,7 @@ void shark_uart_flush(void){
 		while(!byte_queue_empty(&uart->tx_queue)) {
 			shark_uart_dma_tx(uart);
 		}
-	}
-#if UART_NUM==2	
-	uart = _shark_uart + SHARK_UART1;
-	if (uart->uart_com != 0) {
-		while(!byte_queue_empty(&uart->tx_queue)) {
-			shark_uart_dma_tx(uart);
-		}
-	}
-#endif	
+	}	
 }
 
 
@@ -294,19 +290,11 @@ void DMA_Channel3_4_IRQHandler(void){
 #endif
 
 static u8 *tx_cache_addr(uart_enum_t uart_no){
-#if UART_NUM==2
-	return (uart_no == SHARK_UART0)?shark_uart0_tx_cache:shark_uart1_tx_cache;
-#else
 	return shark_uart0_tx_cache;
-#endif
 }
 
 static u8 *rx_cache_addr(uart_enum_t uart_no){
-#if UART_NUM==2
-	return (uart_no == SHARK_UART0)?shark_uart0_rx_cache:shark_uart1_rx_cache;
-#else
 	return shark_uart0_rx_cache;
-#endif
 }
 
 
@@ -315,22 +303,16 @@ void shark_uart_deinit(uart_enum_t uart_no){
 	if (uart->uart_com != 0) {
 		usart_disable(uart->uart_com);
 		usart_deinit(uart->uart_com);
-		rcu_periph_clock_disable(uart_no == SHARK_UART0?SHARK_UART0_clk:SHARK_UART0_clk);
+		rcu_periph_clock_disable(SHARK_UART0_clk);
 		dma_channel_disable(SHARK_UART0_rx_dma, uart->rx_dma_ch);
 		dma_channel_disable(SHARK_UART0_tx_dma, uart->tx_dma_ch);
-		rcu_periph_clock_disable(uart_no == SHARK_UART0?SHARK_UART0_tx_dma_clk:SHARK_UART0_tx_dma_clk);
-		rcu_periph_clock_disable(uart_no == SHARK_UART0?SHARK_UART0_rx_dma_clk:SHARK_UART0_rx_dma_clk);
+		rcu_periph_clock_disable(SHARK_UART0_tx_dma_clk);
+		rcu_periph_clock_disable(SHARK_UART0_rx_dma_clk);
 		shark_uart_pin_deinit(uart);
 	}
-	if (uart_no == SHARK_UART0) {
 #if ENABLE_RX_DMA==0
-		nvic_irq_disable(USART0_IRQn);
+	nvic_irq_disable(SHARK_UART0_irq);	
 #endif
-	}else {
-#if ENABLE_RX_DMA==0
-		nvic_irq_disable(USART1_IRQn);
-#endif
-	}
 }
 
 
@@ -347,13 +329,13 @@ void shark_uart_init(uart_enum_t uart_no)
 	uart->escape = false;
 	uart->rx_length = 0;
 	uart->tx_length = 0;
-	uart->uart_com = (uart_no == SHARK_UART0)?SHARK_UART0_com:SHARK_UART0_com;
+	uart->uart_com = SHARK_UART0_com;
 
 	circle_buffer_init(&uart->rx_queue, rx_cache_addr(uart_no), SHARK_UART_RX_MEM_SIZE);
 	byte_queue_init(&uart->tx_queue,tx_cache_addr(uart_no), SHARK_UART_TX_MEM_SIZE);
 
-	uart->rx_dma_ch = (uart_no == SHARK_UART0)?SHARK_UART0_rx_dma_ch:SHARK_UART0_rx_dma_ch;
-	uart->tx_dma_ch = (uart_no == SHARK_UART0)?SHARK_UART0_tx_dma_ch:SHARK_UART0_tx_dma_ch;
+	uart->rx_dma_ch = SHARK_UART0_rx_dma_ch;
+	uart->tx_dma_ch = SHARK_UART0_tx_dma_ch;
 
 	shark_uart_pin_init(uart);
 	shark_uart_device_init(uart);
@@ -364,15 +346,9 @@ void shark_uart_init(uart_enum_t uart_no)
 	usart_enable(uart->uart_com);
 
 	co_task_create(shark_uart_task, uart, 256);
-	if (uart_no == SHARK_UART0) {
 #if ENABLE_RX_DMA==0
-		nvic_irq_enable(UART3_IRQn, 3, 0);
+	nvic_irq_enable(SHARK_UART0_irq, 3, 0);
 #endif
-	}else {
-#if ENABLE_RX_DMA==0
-		nvic_irq_enable(USART1_IRQn, 3, 0);
-#endif
-	}
 	uart->uart_no_data = false;
 }
 
@@ -461,9 +437,8 @@ void shark_uart_write_bytes(uart_enum_t uart_no, u8 *buff, u16 size){
 	shark_uart_write(_shark_uart + uart_no, buff, size);
 }
 
-#if LOG_UART==1
 int fputc(int c, FILE *fp){
 	shark_uart_write_byte(_shark_uart+SHARK_UART0, (u8)c);
 	return 1;
 }
-#endif
+

Applications/foc/foc_api.c

@@ -135,12 +135,7 @@ void foc_current_calibrate(void){
 	g_foc.current_samp.adc_offset_a = 0;
 	g_foc.current_samp.adc_offset_b = 0;
 	g_foc.current_samp.adc_offset_c = 0;
-	g_foc.current_samp.adc_offset_ivbus = 0;
 
-	foc_pwm_start(false);
-
-	cpu_udelay(100);
-	
 	phase_current_init(&g_foc.current_samp);
 	g_foc.current_samp.is_calibrating_offset = true;
 	g_foc.current_samp.sector = SECTOR_1;

Applications/foc/foc_core.c

@@ -164,7 +164,7 @@ void do_motor_foc(motor_foc_t *foc){
 	/* 电流环，输出电压给SVPWM */
 	foc_calc_voltage(foc, &sample_dq, &v_dq);
 	/* 确保电压在6个扇区的内切圆中 */
-	circle_limitation(&v_dq, foc->vbus, 1.0f);
+	circle_limitation(&v_dq, foc->vbus, 0.95f);
 	/* d-q坐标系到alpha-beta坐标系，输出给svpwm */
 	Rev_Park(&v_dq, foc->motor_stat.theta, &pwm_ab);
 	/* SVPWM，获取三相逆变器的开关时间，用的是pwm1模式，如果是pwm2模式，这个函数需要修改 */
@@ -176,6 +176,8 @@ void do_motor_foc(motor_foc_t *foc){
 	/* 更新 TIM1的CCR0-2，生成互补pwm, 相电流更新采样点 */
 	pwm_update_duty(phase_time.A, phase_time.B, phase_time.C, sample_point);
 
+	adc_current_sample_config(c_sample->sector);
+
 	Debug_Log(foc);
 
 	Debug_dq(&sample_dq);
@@ -228,8 +230,8 @@ void mc_phase_current_irq(void) {
 	time_measure_start(&g_meas_foc);
 	do_motor_foc(&g_foc);
 	time_measure_end(&g_meas_foc);
-	if (g_meas_foc.intval_time < 32 || g_meas_foc.intval_time > 34) {
-		//log_chan_value(1, g_meas_foc.intval_time);
+	if (g_meas_foc.intval_time < 66 || g_meas_foc.intval_time > 66) {
+		log_chan_value(1, g_meas_foc.intval_time);
 	}
 }
 
@@ -254,7 +256,7 @@ static void foc_measure_task(void *args){
 	while(1) {
 		vbus_sample_voltage();
 		ntc_sensor_sample();
-		//g_foc.vbus = vbus_get_filted_voltage();
+		g_foc.vbus = vbus_get_filted_voltage();
 		wdog_reload();
 		co_task_yield();
 	}

Applications/foc/hall_sensor.c

@@ -157,6 +157,8 @@ float hall_sensor_get_theta(void){
 
 	rand_angle(_sensor_hander.estimate_el_angle);
 
+	//log_chan_value(1, (int)_sensor_hander.estimate_el_angle);
+
 	return _sensor_hander.estimate_el_angle;
 }
 

Applications/foc/phase_current.c

@@ -2,39 +2,33 @@
 #include "foc_type.h"
 #include "libs/utils.h"
 #include "libs/logger.h"
-#define MOS_Rds_Calibrate 1
 
 #define NB_OFFSET_SAMPLES 32
 
 #define Rvbus  0.0005f
 #define Gvbus (13.1f) //母线电流的运放 
-#define Rds_Defualt  0.00263f//欧
+#define Rds_Defualt  0.005f//欧
 #define Gmos  (1.7f)//mos 电流的运放
 #define Sample_R Rds_Defualt
 #define Lower_Pass_p 0.2f
 
-#define VBUS_VOL(adc) ((adc) * 3.3f / 4096.0f / Gvbus)
-#define MOSds_VOL(adc) ((adc) * 3.3f / 4096.0f / Gmos)
+#define VBUS_VOL(adc) (((float)(adc)) * 3.3f / 4096.0f / Gvbus)
+#define MOSds_VOL(adc) (((float)(adc)) * 3.3f / 4096.0f / Gmos)
 
 #define current_i(v, r) ((v)/(r))
 
 void phase_current_init(current_samp_t *cs) {
 	cs->offset_sample_count = NB_OFFSET_SAMPLES;
-	cs->adc_offset_a = 0;
-	cs->adc_offset_b = 0;
-	cs->adc_offset_c = 0;
 }
 
 
 void phase_current_offset(current_samp_t *cs) {
+#if 1
 	s32 phase_current1, phase_current2;
-
-	adc_disable_ext_trigger();
-
 	adc_phase_current_read(cs->sector, &phase_current1, &phase_current2);
 	if (cs->offset_sample_count > 0) {
 		cs->offset_sample_count--;
-		if (cs->sector == SECTOR_1 && cs->offset_sample_count >= 0) {
+		if (cs->sector == SECTOR_5 && cs->offset_sample_count >= 0) {
 			cs->adc_offset_a += phase_current1;
 			cs->adc_offset_c += phase_current2;
 			if (cs->offset_sample_count == 0) {
@@ -42,39 +36,45 @@ void phase_current_offset(current_samp_t *cs) {
 				cs->adc_offset_c = cs->adc_offset_c / NB_OFFSET_SAMPLES;
 			}
 		}
-		if (cs->sector == SECTOR_5 && cs->offset_sample_count >= 0) {
+		if (cs->sector == SECTOR_1 && cs->offset_sample_count >= 0) {
 			cs->adc_offset_b += phase_current1;
 			if (cs->offset_sample_count == 0) {
 				cs->adc_offset_b = cs->adc_offset_b / NB_OFFSET_SAMPLES;
 			}
 		}
 	}
+#else
+	cs->adc_offset_a = adc_sample_regular_channel(U_PHASE_I_CHAN, 16);
+	cs->adc_offset_a = adc_sample_regular_channel(U_PHASE_I_CHAN, 64);
+
+	cs->adc_offset_b = adc_sample_regular_channel(V_PHASE_I_CHAN, 64);
+	cs->adc_offset_c = adc_sample_regular_channel(W_PHASE_I_CHAN, 64);
+#endif
 }
 
 void phase_current_sample(current_samp_t *cs){
 	s32 phase_current1, phase_current2;
-
-	adc_disable_ext_trigger();
 	adc_phase_current_read(cs->sector, &phase_current1, &phase_current2);
-	if (cs->sector == SECTOR_3 || cs->sector == SECTOR_6) {
+	if (cs->sector == SECTOR_1 || cs->sector == SECTOR_2) {
 		/* Current on Phase C is not accessible */
 		/* Ia = PhaseAOffset - ADC converted value) */
 		cs->Ib = current_i(MOSds_VOL(phase_current1 - cs->adc_offset_b), Sample_R);
 		cs->Ia = current_i(MOSds_VOL(phase_current2 - cs->adc_offset_a), Sample_R);
 		cs->Ic = -(cs->Ia + cs->Ib);
-	}else if (cs->sector == SECTOR_2 || cs->sector == SECTOR_5) {
+	}else if (cs->sector == SECTOR_3 || cs->sector == SECTOR_4) {
 		/* Current on Phase A is not accessible 	*/
 		/* Ib = PhaseBOffset - ADC converted value) */
-		cs->Ib = current_i(MOSds_VOL(phase_current1 - cs->adc_offset_b), Sample_R);
-		cs->Ic = current_i(MOSds_VOL(phase_current2 - cs->adc_offset_c), Sample_R);
+		cs->Ic = current_i(MOSds_VOL(phase_current1 - cs->adc_offset_c), Sample_R);
+		cs->Ib = current_i(MOSds_VOL(phase_current2 - cs->adc_offset_b), Sample_R);
 		cs->Ia = -(cs->Ib + cs->Ic);
-	}else if (cs->sector == SECTOR_1 || cs->sector == SECTOR_4) {
+	}else if (cs->sector == SECTOR_5 || cs->sector == SECTOR_6) {
 		/* Current on Phase B is not accessible 	*/
 		/* Ia = PhaseAOffset - ADC converted value) */
 		cs->Ia = current_i(MOSds_VOL(phase_current1 - cs->adc_offset_a), Sample_R);
 		cs->Ic = current_i(MOSds_VOL(phase_current2 - cs->adc_offset_c), Sample_R);
 		cs->Ib = -(cs->Ia + cs->Ic);
 	}
+	//log_chan_value(1, (int)(cs->Ia * 1000));
 }
 
 
@@ -86,6 +86,7 @@ u32 get_phase_sample_point(current_samp_t *cs, phase_time_t *time, u8 sector){
 		cs->sector = SECTOR_1;
 		return FOC_PWM_Half_Period - 1;
 	}else {
+		log_chan_value(2, 111);
 		u32 low_side_mid_duty = FOC_PWM_Half_Period - time->midle;
 		u32 delta_duty = low_side_mid_duty - low_side_low_duty;
 		if (delta_duty > low_side_low_duty * 2) {
@@ -101,12 +102,8 @@ u32 get_phase_sample_point(current_samp_t *cs, phase_time_t *time, u8 sector){
 	}
 }
 
-u32 get_vbus_sample_point(current_samp_t *cs, phase_time_t *time){
-	return 0;
-}
-
 void phase_current_adc_triger(current_samp_t *cs){
-	adc_phase_inserted_config(cs->sector);
-	adc_enable_ext_trigger();
+	
+	//adc_enable_ext_trigger();
 }
 

Applications/libs/logger.c

@@ -6,20 +6,29 @@
 #include "os/queue.h"
 
 static uint32_t level_data[2];
+static char log_cache[128];
 static co_queue_t log_queue = NULL;
+int can_fputc(char c);
 
 static void log_co_task(void *args) {
 	log_chan_t log_v;
 	while(1) {
 		if (queue_get(log_queue, &log_v)){
-			sys_debug("%d: %d\n", log_v.id, log_v.value);
+			if (log_v.id != 1) {
+				sys_debug("%d: %d\n", log_v.id, log_v.value);
+			}else {
+				extern void shark_uart_write_log(char *buffer);
+				char buffer[128] = {0};
+				sprintf(buffer, "$%d;", log_v.value);
+				shark_uart_write_log(buffer);
+			}
 		}
 		co_task_yield();
 	}
 }
 
 void log_start_task(void) {
-	log_queue = queue_create(1000, sizeof(log_chan_t));
+	log_queue = queue_create(5000, sizeof(log_chan_t));
 	co_task_create(log_co_task, NULL, 512);
 }
 
@@ -43,9 +52,9 @@ void set_log_level(int mod, int l){
 }
 
 static void log_out(char *fmt, va_list args){
-	vprintf(fmt, args);
-	if (fmt[strlen(fmt) - 1] != '\n'){
-		printf("\n");
+	int len = vsnprintf(log_cache, sizeof(log_cache), fmt, args);
+	for (int i = 0; i < len; i++) {
+		can_fputc(log_cache[i]);
 	}
 }
 
@@ -75,11 +84,10 @@ void log_error(int mod, char *fmt, ...){
 		va_end(args);
 	}
 }
-//rewrite the fputc, so that the printf,vprintf can log the info the can
-#if LOG_UART==0
+
 static char log_buffer[8];
 static int log_index = 0;
-int fputc(int c, FILE *fp){
+int can_fputc(char c){
 	can_id_t frame_id;
 	frame_id.id=0;
 	frame_id.src 	= CAN_MY_ADDRESS;
@@ -101,5 +109,4 @@ int fputc(int c, FILE *fp){
 	}
 	return 1;
 }
-#endif
 

Applications/libs/logger.h

@@ -32,8 +32,6 @@ void log_chan_value(u16 id, s32 value) ;
 #define MOD_BLE      3 //for ble
 #define MOD_SYSTEM    4
 
-#define LOG_UART 0
-
 extern void set_log_level(int mod, int l);
 extern void log_debug(int mod, char *fmt, ...);
 extern void log_warning(int mod, char *fmt, ...);