加入雅特力MCU的支持

Signed-off-by: huhui <huhui@sharkgulf.com>

Applications/app/app.c

@@ -105,7 +105,6 @@ void app_start(void){
 	extern void key_init(void);
 	key_init();
 #endif
-	gpio_led1_enable(true);
 	shark_task_create(_app_low_task, NULL);
 	shark_task_create(_app_report_task, NULL);
 	shark_task_create(_app_plot_task, NULL);
@@ -130,8 +129,8 @@ static u32 _app_report_task(void *p) {
 		sys_debug("FOC time err %d %d\n", g_meas_foc.intval_time_h_error, g_meas_foc.intval_time_l_error);
 		sys_debug("acc vol %d\n", get_acc_vol());
 		sys_debug("throttle %f\n", get_throttle_float());
-		sys_debug("deadtime 0x%x\n", get_deadtime());
 		sys_debug("ADC Vref %f, %f\n", get_adc_vref(), adc_5vref_compesion());
+		sys_debug("dead time %d\n", get_deadtime());
 		//sys_debug("Vdq in %f, %f\n", PMSM_FOC_Get()->in.s_targetVdq.d, PMSM_FOC_Get()->in.s_targetVdq.q);
 		//sys_debug("Vdq out %f, %f\n", PMSM_FOC_Get()->out.s_OutVdq.d, PMSM_FOC_Get()->out.s_OutVdq.q);
 		//sys_debug("target current %f\n", PMSM_FOC_Get()->in.s_targetCurrent);

Applications/bsp/at32/adc.c

@@ -0,0 +1,427 @@
+#include "bsp/bsp_driver.h"
+#include "libs/utils.h"
+#include "os/os_task.h"
+#include "libs/logger.h"
+#include "math/fast_math.h"
+
+
+#ifdef CONFIG_BOARD_MCXXX
+#if (CONFIG_HW_VERSION==2)
+#define ADC01_NUM (8)
+#define ADC2_NUM 4
+
+#define MOS_TEMP_BUFF_IDX 0
+#define VREF5v_BUFF_IDX 1
+#define VBUS_I_BUFF_IDX 2
+#define U_VOL_BUFF_IDX 3
+#define V_VOL_BUFF_IDX 4
+#define W_VOL_BUFF_IDX 5
+#define VREF_BUFF_IDX 7
+
+#define VBUS_V_BUFF_IDX 8
+#define ACC_V_BUFF_IDX 9
+#define THROTTLE_BUFF_IDX 10
+#define MOTOR_TEMP_BUFF_IDX 11
+
+#elif (CONFIG_HW_VERSION==3)
+#define ADC1_NUM (12)
+#define ADC2_NUM 5
+
+#define MOS_TEMP_BUFF_IDX 0
+#define MOTOR_TEMP_BUFF_IDX 1
+#define THROTTLE_BUFF_IDX 2
+#define THROTTLE2_BUFF_IDX 3
+#define THROTTLE_5V_BUFF_IDX 5
+#define THROTTLE2_5V_BUFF_IDX 6
+#define U_VOL_BUFF_IDX 7
+#define VREF_BUFF_IDX 9
+#define VREF5v_BUFF_IDX 11
+
+#define VBUS_V_BUFF_IDX 12
+#define ACC_V_BUFF_IDX 13
+#define VBUS_I_BUFF_IDX 14
+#define V_VOL_BUFF_IDX 15
+#define W_VOL_BUFF_IDX 16
+#endif
+#endif
+#define REG_CHAN_NUM (ADC1_NUM + ADC2_NUM)
+s16 adc_buffer[REG_CHAN_NUM];
+float vref_adc = 1408.0f;
+float vref_5v_adc = 2047.0f;
+
+#define VREF_ADC_DATA 1509.0F //1498, 1.21/3.3*4095
+
+static void analog_gpio_init(gpio_type *gpiox, u32 pin) {
+	gpio_init_type gpio_init_struct = {0};
+	/* gpio configuration */
+	gpio_default_para_init(&gpio_init_struct);
+	gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
+	gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
+	gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+	gpio_init_struct.gpio_pins = pin;
+	gpio_init(gpiox, &gpio_init_struct);
+}
+
+static void adc01_dma_init(void)
+{
+    dma_init_type dma_init_struct;
+	/* dma clock configuration */
+	crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
+
+	/* dma configuration */
+	dma_reset(DMA1_CHANNEL1);
+	dma_default_para_init(&dma_init_struct);
+	dma_init_struct.buffer_size = REG_CHAN_NUM;
+	dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
+	dma_init_struct.memory_base_addr = (uint32_t)adc_buffer;
+	dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_HALFWORD;
+	dma_init_struct.memory_inc_enable = TRUE;
+	dma_init_struct.peripheral_base_addr = (uint32_t)&(ADC1->odt);
+	dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_HALFWORD;
+	dma_init_struct.peripheral_inc_enable = FALSE;
+	dma_init_struct.priority = DMA_PRIORITY_HIGH;
+	dma_init_struct.loop_mode_enable = TRUE;
+	dma_init(DMA1_CHANNEL1, &dma_init_struct);
+	
+	/* Flexible Mode Channel Cofig */
+	dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_ADC1);
+	
+	dma_channel_enable(DMA1_CHANNEL1, TRUE);
+
+}
+
+
+static void adc0_init(void){
+	adc_base_config_type adc_base_struct;
+	
+	/* adc clock configuration */
+	crm_adc_clock_div_set(CRM_ADC_DIV_4);								  /* PCLK2 Max. CLK = 100M Hz, ADC_CLK = 100/4 = 25M Hz */
+	crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
+
+	/* select adc mster-slave mode */
+	adc_combine_mode_select(ADC_ORDINARY_SMLT_PREEMPT_INTERLTRIG_MODE);
+
+	adc_base_struct.sequence_mode = TRUE;
+	adc_base_struct.repeat_mode = FALSE;
+	adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
+	adc_base_struct.ordinary_channel_length = ADC1_NUM;
+	adc_base_config(ADC1, &adc_base_struct);
+
+	/* ordinary channel configuration */
+	adc_ordinary_channel_set(ADC1, MOS_TEMP_ADC_CHAN, 0, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC1, MOTOR_TEMP_ADC_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC1, THROTTLE_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC1, THROTTLE2_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC1, ZERO_ADC_CHAN, 4, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
+	adc_ordinary_channel_set(ADC1, THROTTLE_5V_CHAN, 5, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC1, THROTTLE2_5V_CHAN, 6, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC1, U_VOL_ADC_CHAN, 7, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC1, ZERO_ADC_CHAN, 8, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
+	adc_ordinary_channel_set(ADC1, ADC_CHANNEL_17, 9, ADC_REGCHAN_SAMPLE_TIME); //mcu内部vref
+	adc_ordinary_channel_set(ADC1, ZERO_ADC_CHAN, 10, ADC_REGCHAN_SAMPLE_TIME); //insert zero vol
+	adc_ordinary_channel_set(ADC1, DC5V_ADC_CHAN, 11, ADC_REGCHAN_SAMPLE_TIME);
+
+	adc_ordinary_conversion_trigger_set(ADC1, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
+
+	adc_preempt_channel_length_set(ADC1, 1);
+	adc_preempt_channel_set(ADC1, V_PHASE_I_CHAN, 0, ADC_SAMPLE_TIME);
+	/* adc prempt trigger source */
+	adc_preempt_conversion_trigger_set(ADC1, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
+
+	adc_tempersensor_vintrv_enable(TRUE);
+
+	/* ADC enable and calibration */
+	if(ADC1->ctrl2_bit.adcen != TRUE)
+	{
+	  adc_enable(ADC1, TRUE);
+	  adc_calibration_init(ADC1);
+	  while(adc_calibration_init_status_get(ADC1));
+	  adc_calibration_start(ADC1);
+	  while(adc_calibration_status_get(ADC1));
+	}
+	nvic_irq_enable(ADC1_2_IRQn, ADC_IRQ_PRIORITY, 0);
+
+	adc_disable_ext_trigger();
+
+}
+
+static void adc1_init(void){
+
+	adc_base_config_type adc_base_struct;
+	
+	/* adc clock configuration */
+	crm_periph_clock_enable(CRM_ADC2_PERIPH_CLOCK, TRUE);
+
+	adc_base_struct.sequence_mode = TRUE;
+	adc_base_struct.repeat_mode = FALSE;
+	adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
+	adc_base_struct.ordinary_channel_length = ADC2_NUM;
+	adc_base_config(ADC2, &adc_base_struct);
+
+	/* ordinary channel configuration */
+	adc_ordinary_channel_set(ADC2, VBUS_V_CHAN, 0, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC2, ACC_V_CHAN, 1, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC2, VBUS_I_CHAN, 2, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC2, V_VOL_ADC_CHAN, 3, ADC_REGCHAN_SAMPLE_TIME);
+	adc_ordinary_channel_set(ADC2, W_VOL_ADC_CHAN, 4, ADC_REGCHAN_SAMPLE_TIME);
+
+	adc_ordinary_conversion_trigger_set(ADC2, ADC12_ORDINARY_TRIG_SOFTWARE, TRUE);
+
+
+	adc_preempt_channel_length_set(ADC2, 1);
+	adc_preempt_channel_set(ADC2, W_PHASE_I_CHAN, 0, ADC_SAMPLE_TIME);
+	/* adc prempt trigger source */
+	adc_preempt_conversion_trigger_set(ADC2, ADC12_PREEMPT_TRIG_TMR1CH4, TRUE);
+
+	/* ADC enable and calibration */
+	if(ADC2->ctrl2_bit.adcen != TRUE)
+	{
+	  adc_enable(ADC2, TRUE);
+	  adc_calibration_init(ADC2);
+	  while(adc_calibration_init_status_get(ADC2));
+	  adc_calibration_start(ADC2);
+	  while(adc_calibration_status_get(ADC2));
+	}
+}
+
+
+static void adc_gpio_init(void) {
+
+	/* configure ADC pin, current sampling -- ADC_IN1(PA1) ADC_IN12(PC2) ADC_IN13(PC3) */
+#ifdef U_PHASE_ADC_GROUP
+	crm_periph_clock_enable(U_PHASE_ADC_RCU, TRUE);
+	analog_gpio_init(U_PHASE_ADC_GROUP, U_PHASE_ADC_PIN);
+#endif
+#ifdef V_PHASE_ADC_GROUP
+	crm_periph_clock_enable(V_PHASE_ADC_RCU, TRUE);
+	analog_gpio_init(V_PHASE_ADC_GROUP, V_PHASE_ADC_PIN);
+#endif
+#ifdef W_PHASE_ADC_GROUP
+	crm_periph_clock_enable(W_PHASE_ADC_RCU, TRUE);
+	analog_gpio_init(W_PHASE_ADC_GROUP, W_PHASE_ADC_PIN);
+#endif
+
+#ifdef VBUS_V_ADC_GROUP
+	crm_periph_clock_enable(VBUS_V_ADC_RCU, TRUE);
+	/* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
+	analog_gpio_init(VBUS_V_ADC_GROUP, VBUS_V_ADC_PIN);
+#endif
+
+#ifdef VBUS_I_ADC_GROUP
+	crm_periph_clock_enable(VBUS_I_ADC_RCU, TRUE);
+	/* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
+	analog_gpio_init(VBUS_I_ADC_GROUP, VBUS_I_ADC_PIN);
+#endif
+
+
+#ifdef ACC_V_ADC_GROUP
+	crm_periph_clock_enable(ACC_V_ADC_RCU, TRUE);
+	/* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
+	analog_gpio_init(ACC_V_ADC_GROUP, ACC_V_ADC_PIN);
+#endif
+
+#ifdef THROTTLE_V_ADC_GROUP
+	crm_periph_clock_enable(THROTTLE_V_ADC_RCU, TRUE);
+	/* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
+	analog_gpio_init(THROTTLE_V_ADC_GROUP, THROTTLE_V_ADC_PIN);
+#endif
+#ifdef THROTTLE2_V_ADC_GROUP
+	crm_periph_clock_enable(THROTTLE2_V_ADC_RCU, TRUE);
+	analog_gpio_init(THROTTLE2_V_ADC_GROUP, THROTTLE2_V_ADC_PIN);
+#endif
+
+#ifdef THROTTLE_5V_ADC_GROUP
+	crm_periph_clock_enable(THROTTLE_5V_ADC_RCU, TRUE);
+	/* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
+	analog_gpio_init(THROTTLE_5V_ADC_GROUP, THROTTLE_5V_ADC_PIN);
+#endif
+#ifdef THROTTLE2_5V_ADC_GROUP
+	crm_periph_clock_enable(THROTTLE2_5V_ADC_RCU, TRUE);
+	/* configure ADC pin, bus voltage sampling -- ADC_IN0(PA0) */
+	analog_gpio_init(THROTTLE2_5V_ADC_GROUP, THROTTLE2_5V_ADC_PIN);
+#endif
+
+#ifdef U_VOL_ADC_GROUP
+	crm_periph_clock_enable(U_VOL_ADC_RCU, TRUE);
+	analog_gpio_init(U_VOL_ADC_GROUP,  U_VOL_ADC_PIN);
+#endif
+#ifdef V_VOL_ADC_GROUP
+	crm_periph_clock_enable(V_VOL_ADC_RCU, TRUE);
+	analog_gpio_init(V_VOL_ADC_GROUP, V_VOL_ADC_PIN);
+#endif
+#ifdef W_VOL_ADC_GROUP
+	crm_periph_clock_enable(W_VOL_ADC_RCU, TRUE);
+	analog_gpio_init(W_VOL_ADC_GROUP, W_VOL_ADC_PIN);
+#endif
+#ifdef MOS_TEMP_ADC_GROUP
+	crm_periph_clock_enable(MOS_TEMP_ADC_RCU, TRUE);
+	analog_gpio_init(MOS_TEMP_ADC_GROUP, MOS_TEMP_ADC_PIN);
+#endif
+#ifdef MOS_TEMP1_ADC_GROUP
+	crm_periph_clock_enable(MOS_TEMP1_ADC_RCU, TRUE);
+	analog_gpio_init(MOS_TEMP1_ADC_GROUP, MOS_TEMP1_ADC_PIN);
+#endif
+
+#ifdef MOTOR_TEMP_ADC_GROUP
+	crm_periph_clock_enable(MOTOR_TEMP_ADC_RCU, TRUE);
+	analog_gpio_init(MOTOR_TEMP_ADC_GROUP, MOTOR_TEMP_ADC_PIN);
+#endif
+
+#ifdef ZERO_ADC_GROUP
+	crm_periph_clock_enable(ZERO_ADC_RCU, TRUE);
+	analog_gpio_init(ZERO_ADC_GROUP, ZERO_ADC_PIN);
+#endif
+
+}
+
+void adc_init(void) {
+	adc_gpio_init();
+	adc01_dma_init();
+	adc0_init();
+	adc1_init();
+	adc_current_sample_config(0);
+}
+
+void adc_set_vref_calc(float v) {
+	vref_adc = v;
+}
+
+void adc_set_5vref_calc(float v) {
+	vref_5v_adc = v;
+}
+
+#define VREF_COMP_LFP_CEOF (0.0001F)
+static float vref_compestion_filter = 1.0f;
+#define VREF_3V3_COMPESTION() (vref_adc/(float)adc_buffer[VREF_BUFF_IDX])
+void adc_3v3ref_filter(void) {
+	float value = VREF_3V3_COMPESTION();
+	LowPass_Filter(vref_compestion_filter, value, VREF_COMP_LFP_CEOF);
+}
+
+float adc_vref_compesion(void) {
+	return vref_compestion_filter;
+}
+
+static float vref_5v_compestion_filter = 1.0f;
+#define VREF_5V_COMPESTION() (vref_5v_adc/(float)adc_buffer[VREF5v_BUFF_IDX])
+void adc_5vref_filter(void) {
+	float value = VREF_5V_COMPESTION();
+	LowPass_Filter(vref_5v_compestion_filter, value, VREF_COMP_LFP_CEOF);
+}
+
+float adc_5vref_compesion(void) {
+	return vref_5v_compestion_filter;
+}
+
+void adc_vref_filter(void) {
+	adc_3v3ref_filter();
+	adc_5vref_filter();
+}
+
+u16 adc_get_vbus(void) {
+	return (float)adc_buffer[VBUS_V_BUFF_IDX] * VREF_3V3_COMPESTION();
+}
+
+u16 adc_get_acc(void) {
+#ifdef CONFIG_BOARD_MCXXX
+	return (float)adc_buffer[ACC_V_BUFF_IDX] * VREF_3V3_COMPESTION();
+#else
+	return adc_get_vbus();
+#endif
+}
+
+u16 adc_get_ibus(void) {
+#ifdef CONFIG_BOARD_MCXXX
+	return (float)adc_buffer[VBUS_I_BUFF_IDX] * VREF_5V_COMPESTION();
+#else
+	return 0;
+#endif
+}
+
+u16 adc_get_throttle(void) {
+	return adc_buffer[THROTTLE_BUFF_IDX] * VREF_3V3_COMPESTION();
+}
+
+u16 adc_get_throttle2(void) {
+#ifdef THROTTLE2_BUFF_IDX
+	return adc_buffer[THROTTLE2_BUFF_IDX] * VREF_3V3_COMPESTION();
+#else
+	return adc_get_throttle();
+#endif
+}
+
+u16 adc_get_thro_5v(void) {
+#ifdef THROTTLE_5V_BUFF_IDX
+	return adc_buffer[THROTTLE_5V_BUFF_IDX] * VREF_3V3_COMPESTION();
+#else
+	return 0;
+#endif
+}
+
+u16 adc_get_thro2_5v(void) {
+#ifdef THROTTLE2_5V_BUFF_IDX
+	return adc_buffer[THROTTLE2_5V_BUFF_IDX] * VREF_3V3_COMPESTION();
+#else
+	return 0;
+#endif
+}
+
+void adc_get_uvw_phaseV(u16 *uvw) {
+	uvw[0] = adc_buffer[U_VOL_BUFF_IDX];
+	uvw[1] = adc_buffer[V_VOL_BUFF_IDX];
+	uvw[2] = adc_buffer[W_VOL_BUFF_IDX];
+}
+
+u16 adc_get_mos_temp(void) {
+	return adc_buffer[MOS_TEMP_BUFF_IDX];
+}
+
+u16 adc_get_motor_temp(void) {
+	return adc_buffer[MOTOR_TEMP_BUFF_IDX];
+}
+
+u16 adc_get_vref(void) {
+#ifdef CONFIG_BOARD_MCXXX
+	return adc_buffer[VREF_BUFF_IDX];
+#else
+	return 0;
+#endif
+}
+
+u16 adc_get_5v_ref(void) {
+#ifdef CONFIG_BOARD_MCXXX
+	return adc_buffer[VREF5v_BUFF_IDX];
+#else
+	return 0;
+#endif
+}
+
+void adc_start_convert(void) {
+	int drop = 2;
+    /* clear the ADC flag */
+    adc_flag_clear(ADC1, ADC_PCCE_FLAG);
+    adc_flag_clear(ADC2, ADC_PCCE_FLAG);
+
+	adc_enable_ext_trigger();
+	while(drop-- > 0) {
+		while (adc_flag_get(ADC1, ADC_PCCE_FLAG) == RESET);
+		adc_flag_clear(ADC1, ADC_PCCE_FLAG);
+	}
+    /* enable ADC interrupt */
+
+	adc_interrupt_enable(ADC1, ADC_PCCE_INT, TRUE);
+
+	adc_update_ext_trigger(ADC_TRIGGER_PHASE);
+}
+
+void adc_stop_convert(void) {
+	adc_disable_ext_trigger();
+    /* disable ADC interrupt */
+
+	adc_interrupt_enable(ADC1, ADC_PCCE_INT, FALSE);
+
+    /* clear the ADC flag */
+    adc_flag_clear(ADC1, ADC_PCCE_FLAG);
+	adc_flag_clear(ADC2, ADC_PCCE_FLAG);
+}
+

Applications/bsp/at32/adc.h

@@ -0,0 +1,76 @@
+#ifndef _ADC_H__
+#define _ADC_H__
+#include "bsp/bsp.h"
+#include "os/os_types.h"
+
+float adc_vref_compesion(void);
+float adc_5vref_compesion(void);
+
+/*
+inserted ADC 由timer0 ch3触发，
+注意：adc所有外部触发都是下降沿触发 
+*/
+#define ISQ0_OFFSET 0
+#define ISQ1_OFFSET 5
+#define ISQ2_OFFSET 10
+#define ISQ3_OFFSET 15
+#define IL_OFFSET   20
+
+#define ADC_REGCHAN_SAMPLE_TIME ADC_SAMPLETIME_239_5
+#define ADC_SAMPLE_TIME ADC_SAMPLETIME_13_5
+#define ADC_TRIGGER_PHASE ADC12_PREEMPT_TRIG_TMR1CH4
+
+#define PHASE_AB 0
+#define PHASE_AC 1
+#define PHASE_BC 2
+
+
+static void __inline adc_phase_current_read(u8 phases, s32 *v1, s32 *v2) {
+	*v1 = (s32)((float)ADC1->pdt1_bit.pdt1 * adc_5vref_compesion());
+	*v2 = (s32)((float)ADC2->pdt1_bit.pdt1 * adc_5vref_compesion());
+}
+
+
+static void __inline adc_current_sample_config(u8 phases) {
+	ADC1->psq_bit.psn3 = V_PHASE_I_CHAN;
+	ADC2->psq_bit.psn3 = W_PHASE_I_CHAN;
+}
+
+static void __inline adc_disable_ext_trigger(void) {   
+	ADC1->ctrl2_bit.octen = FALSE;
+}
+
+static void __inline adc_enable_ext_trigger(void) {	
+	ADC1->ctrl2_bit.octen = TRUE;
+}
+
+static __inline__ void adc_clear_irq_flags(void) {
+    /* clear the ADC flag */
+    adc_flag_clear(ADC1, ADC_PCCE_FLAG);
+	adc_flag_clear(ADC2, ADC_PCCE_FLAG);
+}
+
+
+#define adc_update_ext_trigger(trigger) \
+	adc_preempt_conversion_trigger_set(ADC1, trigger, TRUE)
+
+void adc_init(void);
+void adc_start_convert(void);
+void adc_stop_convert(void);
+u16 adc_get_vbus(void);
+u16 adc_get_acc(void);
+u16 adc_get_throttle(void);
+void adc_get_uvw_phaseV(u16 *uvw);
+u16 adc_get_mos_temp(void);
+u16 adc_get_motor_temp(void);
+u16 adc_get_ibus(void);
+u16 adc_get_vref(void);
+void adc_set_vref_calc(float v);
+void adc_vref_filter(void);
+u16 adc_get_5v_ref(void);
+void adc_set_5vref_calc(float v);
+u16 adc_get_throttle2(void);
+u16 adc_get_thro_5v(void);
+u16 adc_get_thro2_5v(void);
+
+#endif /* _ADC_H__ */

Applications/bsp/at32/board_at_mc100_v1.h

@@ -0,0 +1,352 @@
+#ifndef _BOARD_MC_V1_H__
+#define _BOARD_MC_V1_H__
+#if defined (GD32F30X_HD) || defined (GD32F30X_XD) || defined (GD32F30X_CL)
+#include "gd32f30x.h"
+#elif defined GD32E10x
+#include "gd32e10x.h"
+#endif
+
+#define CONFIG_MOS_MAX_VOL 145.0F
+#define CONFIG_MAX_DC_VOL 110.0F
+#define CONFIG_RATED_DC_VOL (96.0f)   /* 母线最大电压 V*/
+#define CONFIG_MIN_DC_VOL   (36.0f)
+
+#define CONFIG_MAX_VBUS_CURRENT 200.0f
+#define CONFIG_MAX_MOT_RPM      9000.0f
+#define CONFIG_MAX_PHASE_CURR   500.0F
+#define CONFIG_MAX_PHASE_VOL    (CONFIG_MOS_MAX_VOL - 20.0F)
+#define CONFIG_MAX_TORQUE       CONFIG_MAX_PHASE_CURR
+#define CONFIG_MAX_LOCK_TORQUE  20
+
+//#define CONFIG_BEEP 
+#define CONFIG_STALL_MAX_CURRENT 100.0f //最大堵转相电流电流
+#define CONFIG_STALL_MAX_TIME    3000   //ms, 超过最大堵转电流持续时间，判断堵转
+#define CONFIG_UNDER_VOL_RPM     1000
+#define CONFIG_UNDER_VOL_PHASE_CURR 100.0F
+#define CONFIG_UNDER_VOL_DC_CURR 15.0F
+
+#define CONFIG_CURR_LP_WC (600.0F)
+
+#define CONFIG_CURR_LP_CEOF (CONFIG_CURR_LP_WC*2*3.14F/(float)FOC_PWM_FS)
+
+#define CONFIG_96V_MODE_VOL (60.0F)
+
+#define CONFIG_SMO_OBSERVER 1
+#define CONFIG_SPEED_LADRC  1
+
+#define SCHED_TIMER TIMER5
+#define SCHED_TIMER_RCU RCU_TIMER5
+#define SCHED_TIMER_IRQ TIMER5_IRQn
+#define SCHED_TIMER_IRQHandler TIMER5_IRQHandler
+
+#define PWM_DEAD_TIME_NS 400u
+#define HW_DEAD_TIME_NS  200u
+#define HW_RISE_TIME_NS  500u
+#define HW_NOISE_TIME_NS 300u
+
+#define TDead NS_2_TCLK(HW_DEAD_TIME_NS + PWM_DEAD_TIME_NS)/* ����ʱ�� */ 
+#define TRise NS_2_TCLK(HW_RISE_TIME_NS)/* MOS ����ʱ��*/
+#define TNoise NS_2_TCLK(HW_NOISE_TIME_NS)/* MOS��������Ŀ�������ʱ�� */
+#define TADC  ((uint16_t)((ADC_TRIG_CONV_LATENCY_CYCLES + ADC_SAMPLING_CYCLES) *2 * TIM_CLOCK_MHz) / ADC_CLOCK_MHz + 1u)/* ADC ����ʱ�� */
+#define TSampleMIN (TDead + TRise + TADC) //采样需要的总时间
+#define TSampleBefore (TDead + TRise) //采样开始前需要等待的时间
+
+#define ADC_REFERENCE_VOLTAGE  (3.3F)
+#define ADC_FULL_MAX          (4095.0F)
+
+/* MOS驱动 */
+#define pwm_timer TIMER0
+#define PWM_MODE TIMER_OC_MODE_PWM0
+#define PWM_U_P_GROUP 	GPIOA
+#define PWM_U_P_PIN 	GPIO_PIN_8
+#define PWM_U_P_RCU 	RCU_GPIOA
+#define PWM_U_P_MODE 	GPIO_MODE_AF_PP
+
+#define PWM_U_N_GROUP 	GPIOB
+#define PWM_U_N_PIN 	GPIO_PIN_13
+#define PWM_U_N_RCU 	RCU_GPIOB
+#define PWM_U_N_MODE 	GPIO_MODE_AF_PP
+
+#define PWM_V_P_GROUP 	GPIOA
+#define PWM_V_P_PIN 	GPIO_PIN_9
+#define PWM_V_P_RCU 	RCU_GPIOA
+#define PWM_V_P_MODE 	GPIO_MODE_AF_PP
+
+#define PWM_V_N_GROUP 	GPIOB
+#define PWM_V_N_PIN 	GPIO_PIN_14
+#define PWM_V_N_RCU 	RCU_GPIOB
+#define PWM_V_N_MODE 	GPIO_MODE_AF_PP
+
+#define PWM_W_P_GROUP 	GPIOA
+#define PWM_W_P_PIN 	GPIO_PIN_10
+#define PWM_W_P_RCU 	RCU_GPIOA
+#define PWM_W_P_MODE 	GPIO_MODE_AF_PP
+
+#define PWM_W_N_GROUP 	GPIOB
+#define PWM_W_N_PIN 	GPIO_PIN_15
+#define PWM_W_N_RCU 	RCU_GPIOB
+#define PWM_W_N_MODE 	GPIO_MODE_AF_PP
+
+#define PWM_BRAKE_GROUP 	GPIOB
+#define PWM_BRAKE_PIN 	GPIO_PIN_12
+#define PWM_BRAKE_RCU 	RCU_GPIOB
+#define PWM_BRAKE_MODE 	GPIO_MODE_IN_FLOATING
+
+#define HALL_SENSOR_CEOF 0.32F
+
+/* 高边电流传感器采样 */
+#define HIGH_SIDE_CURRENT_SENSOR
+
+#define V_PHASE_I_CHAN  ADC_CHANNEL_5
+#define W_PHASE_I_CHAN  ADC_CHANNEL_6
+
+#define V_PHASE_ADC_GROUP 	GPIOA
+#define V_PHASE_ADC_PIN 	GPIO_PIN_5
+#define V_PHASE_ADC_RCU 	RCU_GPIOA
+#define V_PHASE_ADC_MODE 	GPIO_MODE_AIN
+
+#define W_PHASE_ADC_GROUP 	GPIOA
+#define W_PHASE_ADC_PIN 	GPIO_PIN_6
+#define W_PHASE_ADC_RCU 	RCU_GPIOA
+#define W_PHASE_ADC_MODE 	GPIO_MODE_AIN
+
+#define ADC_TO_CURR_ceof1  (HALL_SENSOR_CEOF)
+#define ADC_TO_CURR_ceof2  (HALL_SENSOR_CEOF)
+
+#define CONFIG_PWM_UV_SWAP 1
+
+//#define CONFIG_HW_MUTISAMPLE ADC_OVERSAMPLING_RATIO_MUL8
+//#define CONFIG_HW_MUTISAMPLE_SHIFT ADC_OVERSAMPLING_SHIFT_3B
+//#define CONFIG_SW_MUTISAMPLE 1
+
+/* 母线电压采集 */
+#define VBUS_V_CHAN 		ADC_CHANNEL_3  //adc012
+#define VBUS_V_ADC_GROUP 	GPIOA
+#define VBUS_V_ADC_PIN 		GPIO_PIN_3
+#define VBUS_V_ADC_RCU 		RCU_GPIOA
+#define VBUS_V_ADC_MODE 	GPIO_MODE_AIN
+#define VBUS_VOL_CEOF 		(ADC_REFERENCE_VOLTAGE*41/ADC_FULL_MAX)
+
+#define ACC_V_CHAN 		ADC_CHANNEL_2    //adc012
+#define ACC_V_ADC_GROUP 	GPIOA
+#define ACC_V_ADC_PIN 		GPIO_PIN_2
+#define ACC_V_ADC_RCU 		RCU_GPIOA
+#define ACC_V_ADC_MODE 	GPIO_MODE_AIN
+#define ACC_VOL_CEOF 		(ADC_REFERENCE_VOLTAGE*41/ADC_FULL_MAX)
+
+#define VBUS_I_CHAN 		ADC_CHANNEL_4
+#define VBUS_I_ADC_GROUP 	GPIOA
+#define VBUS_I_ADC_PIN 		GPIO_PIN_4
+#define VBUS_I_ADC_RCU 		RCU_GPIOA
+#define VBUS_I_ADC_MODE 	GPIO_MODE_AIN
+#define VBUS_I_CEOF         (HALL_SENSOR_CEOF)
+
+
+/* MOS 温度采集 */
+#define MOS_TEMP_ADC_CHAN    ADC_CHANNEL_14
+#define MOS_TEMP_ADC_GROUP 	 GPIOC
+#define MOS_TEMP_ADC_PIN 	 GPIO_PIN_4
+#define MOS_TEMP_ADC_RCU 	 RCU_GPIOC
+#define MOS_TEMP_ADC_MODE 	 GPIO_MODE_AIN
+
+#define MOS_TEMP1_ADC_CHAN   ADC_CHANNEL_15
+#define MOS_TEMP1_ADC_GROUP  GPIOC
+#define MOS_TEMP1_ADC_PIN 	 GPIO_PIN_5
+#define MOS_TEMP1_ADC_RCU 	 RCU_GPIOC
+#define MOS_TEMP1_ADC_MODE 	 GPIO_MODE_AIN
+#define MOS_TEMP_R(adc) ((adc)/ADC_FULL_MAX / ((1.0f - (adc)/ADC_FULL_MAX)/(10.0f*1000.0f)))
+
+/* 电机温度采集 */
+#define MOTOR_TEMP_ADC_CHAN     ADC_CHANNEL_0 //adc012
+#define MOTOR_TEMP_ADC_GROUP 	GPIOA
+#define MOTOR_TEMP_ADC_PIN 	GPIO_PIN_0
+#define MOTOR_TEMP_ADC_RCU 	RCU_GPIOA
+#define MOTOR_TEMP_ADC_MODE 	GPIO_MODE_AIN
+#define MOTOR_TEMP_R(adc) ((adc)/ADC_FULL_MAX / ((1.0f - (adc)/ADC_FULL_MAX)/2000.0f))
+
+/* 是否有母线电流采集 */
+//#define NO_SAMPLE_IDC //如果硬件没有采集母线电流，定义一下
+
+/* 转把电压采集 */
+#define THROTTLE_CHAN           ADC_CHANNEL_1 //转把信号 adc012
+#define THROTTLE_V_ADC_GROUP 	GPIOA
+#define THROTTLE_V_ADC_PIN 		GPIO_PIN_1
+#define THROTTLE_V_ADC_RCU 		RCU_GPIOA
+#define THROTTLE_V_ADC_MODE 	GPIO_MODE_AIN
+#define THROTTLE_VOL_CEOF (ADC_REFERENCE_VOLTAGE*(15.1f/10.0f)/ADC_FULL_MAX)
+
+/* UVW三相对地电压采集 */
+#define U_VOL_ADC_CHAN     ADC_CHANNEL_9
+#define U_VOL_ADC_GROUP 	GPIOB
+#define U_VOL_ADC_PIN 	GPIO_PIN_1
+#define U_VOL_ADC_RCU 	RCU_GPIOB
+#define U_VOL_ADC_MODE 	GPIO_MODE_AIN
+
+#define V_VOL_ADC_CHAN     ADC_CHANNEL_8
+#define V_VOL_ADC_GROUP 	GPIOB
+#define V_VOL_ADC_PIN 	GPIO_PIN_0
+#define V_VOL_ADC_RCU 	RCU_GPIOB
+#define V_VOL_ADC_MODE 	GPIO_MODE_AIN
+
+#define W_VOL_ADC_CHAN     ADC_CHANNEL_7
+#define W_VOL_ADC_GROUP 	GPIOA
+#define W_VOL_ADC_PIN 	GPIO_PIN_7
+#define W_VOL_ADC_RCU 	RCU_GPIOA
+#define W_VOL_ADC_MODE 	GPIO_MODE_AIN
+#define UVW_VOL_CEOF (ADC_REFERENCE_VOLTAGE*(41.0f)/ADC_FULL_MAX)
+
+/* 刹车手把输入 */
+#define GPIO_BRAKE_IN_GROUP 	GPIOB
+#define GPIO_BRAKE_IN_PIN 	GPIO_PIN_3
+#define GPIO_BRAKE_IN_RCU 	RCU_GPIOB
+#define GPIO_BRAKE_IN_MODE 	GPIO_MODE_IN_FLOATING
+#define GPIO_BRAKE_IRQ  EXTI3_IRQn
+#define GPIO_BRAKE_EXTI EXTI_3
+#define GPIO_BRAKE_EXIT_SRC_GROUP GPIO_PORT_SOURCE_GPIOB
+#define GPIO_BRAKE_EXIT_SRC_PIN GPIO_PIN_SOURCE_3
+
+/* 前刹 */
+#define GPIO_BRAKE1_IN_GROUP 	GPIOD
+#define GPIO_BRAKE1_IN_PIN 	GPIO_PIN_2
+#define GPIO_BRAKE1_IN_RCU 	RCU_GPIOD
+#define GPIO_BRAKE1_IN_MODE 	GPIO_MODE_IN_FLOATING
+#define GPIO_BRAKE1_IRQ  EXTI2_IRQn
+#define GPIO_BRAKE1_EXTI EXTI_2
+#define GPIO_BRAKE1_EXIT_SRC_GROUP GPIO_PORT_SOURCE_GPIOD
+#define GPIO_BRAKE1_EXIT_SRC_PIN GPIO_PIN_SOURCE_2
+#define GPIO_BREAK_MODE GPIO_LOW_BRK_MODE      
+
+/* 锁电机线,  使用查询模式 */
+#define GPIO_MLOCK_IN_GROUP GPIOC
+#define GPIO_MLOCK_IN_PIN GPIO_PIN_13
+#define GPIO_MLOCK_IN_RCU RCU_GPIOC
+#define GPIO_MLOCK_IN_MODE 	GPIO_MODE_IN_FLOATING
+
+/* 触发U相检测 */
+#define GPIO_UDEC_OUT_GROUP 	GPIOB
+#define GPIO_UDEC_OUT_PIN 	GPIO_PIN_9
+#define GPIO_UDEC_OUT_RCU 	RCU_GPIOB
+#define GPIO_UDEC_OUT_MODE 	GPIO_MODE_OUT_PP
+
+/* 风扇 PWM */
+#define GPIO_FAN_OUT_GROUP 	GPIOC
+#define GPIO_FAN_OUT_PIN 	GPIO_PIN_8
+#define GPIO_FAN_OUT_RCU 	RCU_GPIOC
+#define GPIO_FAN_OUT_MODE 	GPIO_MODE_AF_PP
+#define FAN_PWM_TIMER TIMER7
+#define FAN_PWM_CHAN  TIMER_CH_2
+#define FAN_TIMER_RCU  RCU_TIMER7
+
+/* 风扇1检测 */
+#define GPIO_FAN1_IN_GROUP 	GPIOC
+#define GPIO_FAN1_IN_PIN 	GPIO_PIN_10
+#define GPIO_FAN1_IN_RCU 	RCU_GPIOC
+#define GPIO_FAN1_IN_MODE 	GPIO_MODE_IN_FLOATING
+#define GPIO_FAN1_IRQ  EXTI10_15_IRQn
+#define GPIO_FAN1_EXTI EXTI_10
+#define GPIO_FAN1_EXIT_SRC_GROUP GPIO_PORT_SOURCE_GPIOC
+#define GPIO_FAN1_EXIT_SRC_PIN GPIO_PIN_SOURCE_10
+
+/* 风扇2检测 */
+#define GPIO_FAN2_IN_GROUP 	GPIOC
+#define GPIO_FAN2_IN_PIN 	GPIO_PIN_11
+#define GPIO_FAN2_IN_RCU 	RCU_GPIOC
+#define GPIO_FAN2_IN_MODE 	GPIO_MODE_IN_FLOATING
+#define GPIO_FAN2_IRQ  EXTI10_15_IRQn
+#define GPIO_FAN2_EXTI EXTI_11
+#define GPIO_FAN2_EXIT_SRC_GROUP GPIO_PORT_SOURCE_GPIOC
+#define GPIO_FAN2_EXIT_SRC_PIN GPIO_PIN_SOURCE_11
+
+/* CAN 定义 */
+#define CAN_TX_GROUP GPIOA
+#define CAN_TX_PIN   GPIO_PIN_12
+#define CAN_RX_GROUP GPIOA
+#define CAN_RX_PIN   GPIO_PIN_11
+#define CAN_PIN_RCU  RCU_GPIOA
+
+
+/* 是否用编码器 */
+#define USE_ENCODER_ABI
+#define ENCODER_TYPE ENCODER_MT
+
+/* 编码器 */
+#define ENC_A_GROUP GPIOB
+#define ENC_A_PIN GPIO_PIN_4
+#define ENC_A_RCU RCU_GPIOB
+#define ENC_A_MODE GPIO_MODE_IN_FLOATING
+
+#define ENC_B_GROUP GPIOB
+#define ENC_B_PIN GPIO_PIN_5
+#define ENC_B_RCU RCU_GPIOB
+#define ENC_B_MODE GPIO_MODE_IN_FLOATING
+
+#define TIMER2_PB4_PB5_REMAP GPIO_TIMER2_PARTIAL_REMAP
+
+#define ENC_PWM_GROUP GPIOA
+#define ENC_PWM_PIN GPIO_PIN_15
+#define ENC_PWM_RCU RCU_GPIOA
+#define ENC_PWM_MODE GPIO_MODE_IN_FLOATING
+#define TIMER1_PA15_REMAP GPIO_TIMER1_PARTIAL_REMAP0
+
+#define ENC_I_GROUP GPIOB     /*测量编码器的ABI的I信号，360度同步一次*/
+#define ENC_I_PIN GPIO_PIN_8
+#define ENC_I_RCU RCU_GPIOB
+#define ENC_I_MODE GPIO_MODE_IPU
+#define ENC_I_IRQ  EXTI5_9_IRQn
+#define ENC_I_EXTI EXTI_8
+#define ENC_I_EXIT_SRC_GROUP GPIO_PORT_SOURCE_GPIOB
+#define ENC_I_EXIT_SRC_PIN GPIO_PIN_SOURCE_8
+
+#define ENC_TIMER TIMER2  /* 测量编码器的ABI信号的AB信号 */
+#define ENC_TIMER_RCU RCU_TIMER2
+#define ENC_TIMER_IRQ TIMER2_IRQn
+#define ENC_TIMER_IRQHandler TIMER2_IRQHandler
+
+#define ENC_PWM_TIMER TIMER1    /* 测量绝对编码器PWM输出的占空比，获取转子angle*/
+#define ENC_PWM_TIMER_RCU RCU_TIMER1
+#define ENC_PWM_TIMER_IRQ TIMER1_IRQn
+#define ENC_PWM_TIMER_CHAN  TIMER_CH_0
+#define ENC_PWM_TIMER_IRQ_CH TIMER_INT_CH0
+#define ENC_PWM_TIMER_INT_FLG TIMER_INT_FLAG_CH0
+#define ENC_PWM_IRQHandler TIMER1_IRQHandler
+
+#define ENC_MAX_interpolation 1.0F
+
+#define ENC_FILTER_NR          15
+#ifdef CONFIG_PWM_UV_SWAP
+#define ENCODER_CC_INVERT 1
+#endif
+/* 编码器参数      */
+#define ENC_MAX_RES  4096.0f
+#define ENC_Duty_2_Pluse_Nr(duty) (duty * ENC_MAX_RES) //通过占空比计算有几个脉冲
+#define ENC_Pluse_Nr_2_angle(Nr) (360.0f/(float)ENC_MAX_RES * (Nr))
+#define ENC_PWM_Min_P 0.0f//(1.0f/(131.0f + 1.0f))
+#define ENC_PWM_Max_P  1.0f
+
+#if ENCODER_TYPE==ENCODER_MPS
+#define ENC_Duty(d, t) ((1.0f/128.0f) * (130.0f * (d)/(t) - 1.0f))
+#elif ENCODER_TYPE==ENCODER_MT
+/*min. 994 hz*/
+#define ENC_PWM_MAX_RES    4119.0F
+#define ENC_PWM_INIT_WIDTH 16.0F //PWM 起始宽度
+#define ENC_PWM_END_WIDTH   8.0F
+//#define ENC_PWM_Min_P      (ENC_PWM_INIT_WIDTH/(ENC_PWM_MAX_RES + 1.0f))
+//#define ENC_PWM_Max_P      ((ENC_PWM_MAX_RES-ENC_PWM_END_WIDTH)/(ENC_PWM_MAX_RES - 1.0f))
+#define PWM_Duty(d, t) ((d)/(t))
+#define ENC_Duty(d, t) ((PWM_Duty(d, t)*ENC_PWM_MAX_RES - ENC_PWM_INIT_WIDTH)/(ENC_PWM_MAX_RES - ENC_PWM_END_WIDTH - ENC_PWM_INIT_WIDTH))
+#else
+#error "Postion sensor ERROR"
+
+#endif
+#define DEBUG_PORT_UART2
+
+#define CONFIG_MOT_TYPE MOTOR_BLUESHARK_A1
+
+#if (CONFIG_MOT_TYPE==MOTOR_BLUESHARK_A1)
+#define CONFIG_FORCE_96V_MODE 1
+#endif
+
+//#define CONFIG_DQ_STEP_RESPONSE
+
+#endif /*_BOARD_MC_V1_H__ */
+

Applications/bsp/at32/board_at_mc105_v3.h

@@ -0,0 +1,372 @@
+#ifndef _BOARD_MC_V3_H__
+#define _BOARD_MC_V3_H__
+#if defined (GD32F30X_HD) || defined (GD32F30X_XD) || defined (GD32F30X_CL)
+#include "gd32f30x.h"
+#elif defined GD32E10x
+#include "gd32e10x.h"
+#endif
+
+#define CONFIG_MOS_MAX_VOL 145.0F
+#define CONFIG_MAX_DC_VOL 110.0F
+#define CONFIG_RATED_DC_VOL (96.0f)   /* 母线最大电压 V*/
+#define CONFIG_MIN_DC_VOL   (36.0f)
+
+#define CONFIG_MAX_VBUS_CURRENT 120.0f
+#define CONFIG_MAX_MOT_RPM      9000.0f
+#define CONFIG_MAX_PHASE_CURR   500.0F
+#define CONFIG_MAX_PHASE_VOL    (CONFIG_MOS_MAX_VOL - 20.0F)
+#define CONFIG_MAX_TORQUE       CONFIG_MAX_PHASE_CURR
+#define CONFIG_MAX_LOCK_TORQUE  20
+
+//#define CONFIG_BEEP 
+#define CONFIG_STALL_MAX_CURRENT 100.0f //最大堵转相电流电流
+#define CONFIG_STALL_MAX_TIME    3000   //ms, 超过最大堵转电流持续时间，判断堵转
+#define CONFIG_UNDER_VOL_RPM     1000
+#define CONFIG_UNDER_VOL_PHASE_CURR 100.0F
+#define CONFIG_UNDER_VOL_DC_CURR 15.0F
+
+#define CONFIG_CURR_LP_WC (600.0F)
+
+#define CONFIG_CURR_LP_CEOF (CONFIG_CURR_LP_WC*2*3.14F/(float)FOC_PWM_FS)
+
+#define CONFIG_96V_MODE_VOL (60.0F)
+
+#define CONFIG_SMO_OBSERVER 1
+#define CONFIG_SPEED_LADRC  1
+//#define CONFIG_FORCE_96V_MODE 1
+
+#define SCHED_TIMER TMR5
+#define SCHED_TIMER_RCU CRM_TMR5_PERIPH_CLOCK
+#define SCHED_TIMER_IRQ TMR5_GLOBAL_IRQn
+#define SCHED_TIMER_IRQHandler TMR5_GLOBAL_IRQHandler
+
+#define PWM_DEAD_TIME_NS 400u
+#define HW_DEAD_TIME_NS  200u
+#define HW_RISE_TIME_NS  500u
+#define HW_NOISE_TIME_NS 300u
+
+#define TDead NS_2_TCLK(HW_DEAD_TIME_NS + PWM_DEAD_TIME_NS)/* ����ʱ�� */ 
+#define TRise NS_2_TCLK(HW_RISE_TIME_NS)/* MOS ����ʱ��*/
+#define TNoise NS_2_TCLK(HW_NOISE_TIME_NS)/* MOS��������Ŀ�������ʱ�� */
+#define TADC  ((uint16_t)((ADC_TRIG_CONV_LATENCY_CYCLES + ADC_SAMPLING_CYCLES) *2 * TIM_CLOCK_MHz) / ADC_CLOCK_MHz + 1u)/* ADC ����ʱ�� */
+#define TSampleMIN (TDead + TRise + TADC) //采样需要的总时间
+#define TSampleBefore (TDead + TRise) //采样开始前需要等待的时间
+
+#define ADC_REFERENCE_VOLTAGE  (3.3F)
+#define ADC_FULL_MAX          (4095.0F)
+
+/* MOS驱动 */
+#define pwm_timer 		TMR1
+#define PWM_MODE 		TMR_OUTPUT_CONTROL_PWM_MODE_A
+#define PWM_CRM_CLK     CRM_TMR1_PERIPH_CLOCK
+#define PWM_U_P_GROUP 	GPIOA
+#define PWM_U_P_PIN 	GPIO_PINS_8
+#define PWM_U_P_RCU 	CRM_GPIOA_PERIPH_CLOCK
+#define PWM_U_P_MODE 	GPIO_MODE_MUX
+
+#define PWM_U_N_GROUP 	GPIOB
+#define PWM_U_N_PIN 	GPIO_PINS_13
+#define PWM_U_N_RCU 	CRM_GPIOB_PERIPH_CLOCK
+#define PWM_U_N_MODE 	GPIO_MODE_MUX
+
+#define PWM_V_P_GROUP 	GPIOA
+#define PWM_V_P_PIN 	GPIO_PINS_9
+#define PWM_V_P_RCU 	CRM_GPIOA_PERIPH_CLOCK
+#define PWM_V_P_MODE 	GPIO_MODE_MUX
+
+#define PWM_V_N_GROUP 	GPIOB
+#define PWM_V_N_PIN 	GPIO_PINS_14
+#define PWM_V_N_RCU 	CRM_GPIOB_PERIPH_CLOCK
+#define PWM_V_N_MODE 	GPIO_MODE_MUX
+
+#define PWM_W_P_GROUP 	GPIOA
+#define PWM_W_P_PIN 	GPIO_PINS_10
+#define PWM_W_P_RCU 	CRM_GPIOA_PERIPH_CLOCK
+#define PWM_W_P_MODE 	GPIO_MODE_MUX
+
+#define PWM_W_N_GROUP 	GPIOB
+#define PWM_W_N_PIN 	GPIO_PINS_15
+#define PWM_W_N_RCU 	CRM_GPIOB_PERIPH_CLOCK
+#define PWM_W_N_MODE 	GPIO_MODE_MUX
+
+#define PWM_BRAKE_GROUP GPIOB
+#define PWM_BRAKE_PIN 	GPIO_PINS_12
+#define PWM_BRAKE_RCU 	CRM_GPIOB_PERIPH_CLOCK
+#define PWM_BRAKE_MODE 	GPIO_MODE_MUX
+
+#define HALL_SENSOR_CEOF 0.32F
+
+/* 高边电流传感器采样 */
+#define HIGH_SIDE_CURRENT_SENSOR
+
+#define V_PHASE_I_CHAN  			ADC_CHANNEL_14
+#define W_PHASE_I_CHAN  			ADC_CHANNEL_10
+
+#define V_PHASE_ADC_GROUP 			GPIOC
+#define V_PHASE_ADC_PIN 			GPIO_PINS_4
+#define V_PHASE_ADC_RCU 			CRM_GPIOC_PERIPH_CLOCK
+#define V_PHASE_ADC_MODE 			GPIO_MODE_ANALOG
+
+#define W_PHASE_ADC_GROUP 			GPIOC
+#define W_PHASE_ADC_PIN 			GPIO_PINS_0
+#define W_PHASE_ADC_RCU 			CRM_GPIOC_PERIPH_CLOCK
+#define W_PHASE_ADC_MODE 			GPIO_MODE_ANALOG
+
+#define ADC_TO_CURR_ceof1  			(HALL_SENSOR_CEOF)
+#define ADC_TO_CURR_ceof2 			(HALL_SENSOR_CEOF)
+
+#define CONFIG_PWM_UV_SWAP 		   	1
+
+//#define CONFIG_HW_MUTISAMPLE ADC_OVERSAMPLING_RATIO_MUL8
+//#define CONFIG_HW_MUTISAMPLE_SHIFT ADC_OVERSAMPLING_SHIFT_3B
+//#define CONFIG_SW_MUTISAMPLE 1
+
+/* 母线电压采集 */
+#define VBUS_V_CHAN 				ADC_CHANNEL_12  //adc012
+#define VBUS_V_ADC_GROUP 			GPIOC
+#define VBUS_V_ADC_PIN 				GPIO_PINS_2
+#define VBUS_V_ADC_RCU 				CRM_GPIOC_PERIPH_CLOCK
+#define VBUS_V_ADC_MODE 			GPIO_MODE_ANALOG
+#define VBUS_VOL_CEOF 				(ADC_REFERENCE_VOLTAGE*41/ADC_FULL_MAX)
+
+#define ACC_V_CHAN 					ADC_CHANNEL_11    //adc012
+#define ACC_V_ADC_GROUP 			GPIOC
+#define ACC_V_ADC_PIN 				GPIO_PINS_1
+#define ACC_V_ADC_RCU 				CRM_GPIOC_PERIPH_CLOCK
+#define ACC_V_ADC_MODE 				GPIO_MODE_ANALOG
+#define ACC_VOL_CEOF 				(ADC_REFERENCE_VOLTAGE*41/ADC_FULL_MAX)
+
+#define VBUS_I_CHAN 				ADC_CHANNEL_0 //adc012
+#define VBUS_I_ADC_GROUP 			GPIOA
+#define VBUS_I_ADC_PIN 				GPIO_PINS_0
+#define VBUS_I_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define VBUS_I_ADC_MODE 			GPIO_MODE_ANALOG
+#define VBUS_I_CEOF         		(HALL_SENSOR_CEOF)
+#define VBUS_I_POSITIVE     		1
+
+/* MOS 温度采集 */
+#define MOS_TEMP_ADC_CHAN    		ADC_CHANNEL_8
+#define MOS_TEMP_ADC_GROUP 	 		GPIOB
+#define MOS_TEMP_ADC_PIN 	 		GPIO_PINS_0
+#define MOS_TEMP_ADC_RCU 	 		CRM_GPIOB_PERIPH_CLOCK
+#define MOS_TEMP_ADC_MODE 	 		GPIO_MODE_ANALOG
+#define MOS_TEMP_R(adc) 			((adc)/ADC_FULL_MAX / ((1.0f - (adc)/ADC_FULL_MAX)/(10.0f*1000.0f)))
+
+/* 电机温度采集 */
+#define MOTOR_TEMP_ADC_CHAN     	ADC_CHANNEL_5
+#define MOTOR_TEMP_ADC_GROUP 		GPIOA
+#define MOTOR_TEMP_ADC_PIN 			GPIO_PINS_5
+#define MOTOR_TEMP_ADC_RCU 			CRM_GPIOA_PERIPH_CLOCK
+#define MOTOR_TEMP_ADC_MODE 		GPIO_MODE_ANALOG
+#define MOTOR_TEMP_R(adc) 			((adc)/ADC_FULL_MAX / ((1.0f - (adc)/ADC_FULL_MAX)/2000.0f))
+
+/* 是否有母线电流采集 */
+//#define NO_SAMPLE_IDC //如果硬件没有采集母线电流，定义一下
+
+/* 转把信号电压采集 */
+#define THROTTLE_CHAN           	ADC_CHANNEL_4
+#define THROTTLE_V_ADC_GROUP 		GPIOA
+#define THROTTLE_V_ADC_PIN 			GPIO_PINS_4
+#define THROTTLE_V_ADC_RCU 			CRM_GPIOA_PERIPH_CLOCK
+#define THROTTLE_V_ADC_MODE 		GPIO_MODE_ANALOG
+#define THROTTLE_VOL_CEOF 			(ADC_REFERENCE_VOLTAGE*(15.1f/10.0f)/ADC_FULL_MAX)
+
+/* 第二路转把信号电压采集 */
+#define THROTTLE2_CHAN           	ADC_CHANNEL_7
+#define THROTTLE2_V_ADC_GROUP 		GPIOA
+#define THROTTLE2_V_ADC_PIN 		GPIO_PINS_7
+#define THROTTLE2_V_ADC_RCU 		CRM_GPIOA_PERIPH_CLOCK
+#define THROTTLE2_V_ADC_MODE 		GPIO_MODE_ANALOG
+
+/* 转把供电5V电压采集 */
+#define THROTTLE_5V_CHAN            ADC_CHANNEL_6
+#define THROTTLE_5V_ADC_GROUP 		GPIOA
+#define THROTTLE_5V_ADC_PIN 		GPIO_PINS_6
+#define THROTTLE_5V_ADC_RCU 		CRM_GPIOA_PERIPH_CLOCK
+#define THROTTLE_5V_ADC_MODE 		GPIO_MODE_ANALOG
+
+/* 第二路供电5V电压采集 */
+#define THROTTLE2_5V_CHAN           ADC_CHANNEL_9
+#define THROTTLE2_5V_ADC_GROUP 		GPIOB
+#define THROTTLE2_5V_ADC_PIN 		GPIO_PINS_1
+#define THROTTLE2_5V_ADC_RCU 		CRM_GPIOB_PERIPH_CLOCK
+#define THROTTLE2_5V_ADC_MODE 		GPIO_MODE_ANALOG
+
+
+/* UVW三相对地电压采集 */
+#define U_VOL_ADC_CHAN     			ADC_CHANNEL_15
+#define U_VOL_ADC_GROUP 			GPIOC
+#define U_VOL_ADC_PIN 				GPIO_PINS_5
+#define U_VOL_ADC_RCU 				CRM_GPIOC_PERIPH_CLOCK
+#define U_VOL_ADC_MODE 				GPIO_MODE_ANALOG
+
+#define V_VOL_ADC_CHAN     			ADC_CHANNEL_1 //adc012
+#define V_VOL_ADC_GROUP 			GPIOA
+#define V_VOL_ADC_PIN 				GPIO_PINS_1
+#define V_VOL_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define V_VOL_ADC_MODE 				GPIO_MODE_ANALOG
+
+#define W_VOL_ADC_CHAN     			ADC_CHANNEL_2 //adc012
+#define W_VOL_ADC_GROUP 			GPIOA
+#define W_VOL_ADC_PIN 				GPIO_PINS_2
+#define W_VOL_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define W_VOL_ADC_MODE 				GPIO_MODE_ANALOG
+#define UVW_VOL_CEOF 				(ADC_REFERENCE_VOLTAGE*(41.0f)/ADC_FULL_MAX)
+
+/* 模拟5v电压采集 */
+#define DC5V_ADC_CHAN     			ADC_CHANNEL_3 //adc012
+#define DC5V_ADC_GROUP 				GPIOA
+#define DC5V_ADC_PIN 				GPIO_PINS_3
+#define DC5V_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define DC5V_ADC_MODE 				GPIO_MODE_ANALOG
+
+/* 0v电压采集，主要是用来给上一次的采集放电 */
+#define ZERO_ADC_CHAN    			ADC_CHANNEL_13 //adc012
+#define ZERO_ADC_GROUP 				GPIOC
+#define ZERO_ADC_PIN 				GPIO_PINS_3
+#define ZERO_ADC_RCU 				CRM_GPIOC_PERIPH_CLOCK
+#define ZERO_ADC_MODE 				GPIO_MODE_ANALOG
+
+/* 刹车手把输入 */
+#define GPIO_BREAK_MODE 			GPIO_LOW_BRK_MODE
+#define GPIO_BRAKE_IN_GROUP 		GPIOB
+#define GPIO_BRAKE_IN_PIN 			GPIO_PINS_3
+#define GPIO_BRAKE_IN_RCU 			CRM_GPIOC_PERIPH_CLOCK
+#define GPIO_BRAKE_IN_MODE 			GPIO_MODE_INPUT
+#define GPIO_BRAKE_IRQ  			EXINT3_IRQn
+#define GPIO_BRAKE_EXTI 			EXINT_LINE_3
+#define GPIO_BRAKE_EXIT_SRC_GROUP	GPIO_PORT_SOURCE_GPIOB
+#define GPIO_BRAKE_EXIT_SRC_PIN 	GPIO_PINS_SOURCE3
+#define GPIO_BRAKE_PIN_REMAP 		SWJTAG_CONF_010
+
+/* 锁电机线,  使用查询模式 */
+#define GPIO_MLOCK_IN_GROUP 		GPIOC
+#define GPIO_MLOCK_IN_PIN 			GPIO_PINS_13
+#define GPIO_MLOCK_IN_RCU 			CRM_GPIOC_PERIPH_CLOCK
+#define GPIO_MLOCK_IN_MODE 			GPIO_MODE_INPUT
+
+/* 触发U相检测 */
+#define GPIO_UDEC_OUT_GROUP 		GPIOB
+#define GPIO_UDEC_OUT_PIN 			GPIO_PINS_7
+#define GPIO_UDEC_OUT_RCU 			CRM_GPIOB_PERIPH_CLOCK
+#define GPIO_UDEC_OUT_MODE 			GPIO_MODE_OUTPUT
+
+/* 风扇 PWM */
+#define GPIO_FAN_OUT_GROUP 			GPIOC
+#define GPIO_FAN_OUT_PIN 			GPIO_PINS_8
+#define GPIO_FAN_OUT_RCU 			CRM_GPIOC_PERIPH_CLOCK
+#define GPIO_FAN_OUT_MODE 			GPIO_MODE_MUX
+#define FAN_PWM_TIMER 				TMR8
+#define FAN_PWM_CHAN  				TMR_SELECT_CHANNEL_3
+#define FAN_TIMER_RCU  				CRM_TMR8_PERIPH_CLOCK
+
+/* 风扇1检测 */
+#define GPIO_FAN1_IN_GROUP 			GPIOC
+#define GPIO_FAN1_IN_PIN 			GPIO_PINS_11
+#define GPIO_FAN1_IN_RCU 			CRM_GPIOC_PERIPH_CLOCK
+#define GPIO_FAN1_IN_MODE 			GPIO_MODE_INPUT
+#define GPIO_FAN1_IRQ  				EXINT15_10_IRQn
+#define GPIO_FAN1_EXTI 				EXINT_LINE_11
+#define GPIO_FAN1_EXIT_SRC_GROUP 	GPIO_PORT_SOURCE_GPIOC
+#define GPIO_FAN1_EXIT_SRC_PIN 		GPIO_PINS_SOURCE11
+
+/* LED 灯控制 */
+#define GPIO_LED_OUT_GROUP 			GPIOC
+#define GPIO_LED_OUT_PIN 			GPIO_PINS_14
+#define GPIO_LED_OUT_RCU 			CRM_GPIOC_PERIPH_CLOCK
+#define GPIO_LED_OUT_MODE 			GPIO_MODE_OUTPUT
+
+/* 刹车灯控制，能量回收的时候需要电量刹车灯 */
+#define GPIO_BRAKE_LIGHT_OUT_GROUP 	GPIOD
+#define GPIO_BRAKE_LIGHT_OUT_PIN 	GPIO_PINS_2
+#define GPIO_BRAKE_LIGHT_OUT_RCU 	CRM_GPIOD_PERIPH_CLOCK
+#define GPIO_BRAKE_LIGHT_OUT_MODE 	GPIO_MODE_OUTPUT
+
+/* CAN 定义 */
+#define CAN_TX_GROUP GPIOB
+#define CAN_TX_PIN   GPIO_PINS_9
+#define CAN_RX_GROUP GPIOB
+#define CAN_RX_PIN   GPIO_PINS_8
+#define CAN_PIN_RCU  CRM_GPIOB_PERIPH_CLOCK
+#define CAN_REMAP    CAN_MUX_10
+/* 是否用编码器 */
+#define USE_ENCODER_ABI
+#define ENCODER_TYPE ENCODER_MT
+
+/* 编码器 */
+#define ENC_A_GROUP 	GPIOB
+#define ENC_A_PIN 		GPIO_PINS_4
+#define ENC_A_RCU 		CRM_GPIOB_PERIPH_CLOCK
+#define ENC_A_MODE 		GPIO_MODE_INPUT
+
+#define ENC_B_GROUP 	GPIOB
+#define ENC_B_PIN 		GPIO_PINS_5
+#define ENC_B_RCU 		CRM_GPIOB_PERIPH_CLOCK
+#define ENC_B_MODE 		GPIO_MODE_INPUT
+#define TIMER2_PB4_PB5_REMAP TMR3_MUX_10
+
+#define ENC_PWM_GROUP 	GPIOA
+#define ENC_PWM_PIN 	GPIO_PINS_15
+#define ENC_PWM_RCU 	CRM_GPIOA_PERIPH_CLOCK
+#define ENC_PWM_MODE	GPIO_MODE_MUX
+#define TIMER1_PA15_REMAP TMR2_MUX_01
+
+#define ENC_I_GROUP 			GPIOB     /*测量编码器的ABI的I信号，360度同步一次*/
+#define ENC_I_PIN 				GPIO_PINS_6
+#define ENC_I_RCU 				CRM_GPIOB_PERIPH_CLOCK
+#define ENC_I_MODE 				GPIO_MODE_INPUT
+#define ENC_I_IRQ  				EXINT9_5_IRQn
+#define ENC_I_EXTI 				EXINT_LINE_6
+#define ENC_I_EXIT_SRC_GROUP 	GPIO_PORT_SOURCE_GPIOB
+#define ENC_I_EXIT_SRC_PIN 		GPIO_PINS_SOURCE6
+
+#define ENC_TIMER 				TMR3  /* 测量编码器的ABI信号的AB信号 */
+#define ENC_TIMER_RCU 			CRM_TMR3_PERIPH_CLOCK
+#define ENC_TIMER_IRQ 			TMR3_GLOBAL_IRQn
+#define ENC_TIMER_IRQHandler 	TMR3_GLOBAL_IRQHandler
+
+#define ENC_PWM_TIMER 			TMR2    /* 测量绝对编码器PWM输出的占空比，获取转子angle*/
+#define ENC_PWM_TIMER_RCU 		CRM_TMR2_PERIPH_CLOCK
+#define ENC_PWM_TIMER_IRQ 		TMR2_GLOBAL_IRQn
+#define ENC_PWM_TIMER_CHAN  	TMR_SELECT_CHANNEL_1
+#define ENC_PWM_TIMER_IRQ_CH 	TMR_C1_INT
+#define ENC_PWM_TIMER_INT_FLG 	TMR_C1_FLAG
+#define ENC_PWM_IRQHandler 		TMR2_GLOBAL_IRQHandler
+
+#define ENC_MAX_interpolation 1.0F
+
+#define ENC_FILTER_NR          15
+#ifdef CONFIG_PWM_UV_SWAP
+#define ENCODER_CC_INVERT 1
+#endif
+/* 编码器参数      */
+#define ENC_MAX_RES  4096.0f
+#define ENC_Duty_2_Pluse_Nr(duty) (duty * ENC_MAX_RES) //通过占空比计算有几个脉冲
+#define ENC_Pluse_Nr_2_angle(Nr) (360.0f/(float)ENC_MAX_RES * (Nr))
+#define ENC_PWM_Min_P 0.0f//(1.0f/(131.0f + 1.0f))
+#define ENC_PWM_Max_P  1.0f
+
+#if ENCODER_TYPE==ENCODER_MPS
+#define ENC_Duty(d, t) ((1.0f/128.0f) * (130.0f * (d)/(t) - 1.0f))
+#elif ENCODER_TYPE==ENCODER_MT
+/*min. 994 hz*/
+#define ENC_PWM_MAX_RES    4119.0F
+#define ENC_PWM_INIT_WIDTH 16.0F //PWM 起始宽度
+#define ENC_PWM_END_WIDTH   8.0F
+//#define ENC_PWM_Min_P      (ENC_PWM_INIT_WIDTH/(ENC_PWM_MAX_RES + 1.0f))
+//#define ENC_PWM_Max_P      ((ENC_PWM_MAX_RES-ENC_PWM_END_WIDTH)/(ENC_PWM_MAX_RES - 1.0f))
+#define PWM_Duty(d, t) ((d)/(t))
+#define ENC_Duty(d, t) ((PWM_Duty(d, t)*ENC_PWM_MAX_RES - ENC_PWM_INIT_WIDTH)/(ENC_PWM_MAX_RES - ENC_PWM_END_WIDTH - ENC_PWM_INIT_WIDTH))
+#else
+#error "Postion sensor ERROR"
+
+#endif
+#define DEBUG_PORT_UART2
+
+#define CONFIG_MOT_TYPE MOTOR_BLUESHARK_ZD_100
+
+//#define CONFIG_DQ_STEP_RESPONSE
+
+#endif /*_BOARD_MC_V3_H__ */
+
+

Applications/bsp/at32/bsp.c

@@ -0,0 +1,81 @@
+#include "bsp/bsp.h"
+#include "bsp/bsp_driver.h"
+#include "libs/logger.h"
+#include "os/os_types.h"
+#include "version.h"
+
+static void wdog_enable(void);
+
+void bsp_init(void){
+	wdog_enable();
+	debug_periph_mode_set(DEBUG_TMR1_PAUSE, TRUE);
+	systick_open();
+	task_ticks_enable();
+	gpio_pin_init();
+	shark_uart_init(SHARK_UART0);
+}
+
+
+void system_reboot(void){
+	NVIC_SystemReset();
+}
+
+void systick_close(void)
+{
+	SysTick->CTRL  &= ~SysTick_CTRL_ENABLE_Msk;
+}
+
+void systick_open(void)
+{
+	SysTick_Config(SystemCoreClock / 1000);
+}
+
+u8 mcu_chip_id(u8 *buff)
+{
+	u32 values[] = { REG32(0x1FFFF7E0), REG32(0x1FFFF7E8), REG32(0x1FFFF7EC), REG32(0x1FFFF7F0) };
+	memcpy(buff, values, sizeof(values));
+	return sizeof(values);
+}
+
+
+void wdog_reload(void){
+#if CONFIG_DEBUG == 0
+    wdt_counter_reload();
+#endif    
+}
+
+static void wdog_enable(void)
+{
+#if CONFIG_DEBUG == 0  
+	/* disable register write protection */
+	 wdt_register_write_enable(TRUE);
+	
+	 /* set the wdt divider value */
+	 wdt_divider_set(WDT_CLK_DIV_4);
+	
+	 /* set reload value
+	
+	  timeout = reload_value * (divider / lick_freq )	 (s)
+	
+	  lick_freq    = 40000 Hz
+	  divider	   = 4
+	  reload_value = 30000
+	
+	  timeout = 30000 * (4 / 40000 ) = 3s = 3000ms
+	 */
+	 wdt_reload_value_set(30000 - 1);
+	
+	 /* reload wdt counter */
+	 wdt_counter_reload();
+	 
+	 /* enable wdt */
+	 wdt_enable();
+#endif
+}
+
+int wdog_set_timeout(int wdog_time)
+{  
+	return 0;
+}
+
+

Applications/bsp/at32/bsp.h

@@ -0,0 +1,35 @@
+#ifndef __BSP_AT32_H__
+#define __BSP_AT32_H__
+#if defined AT32F413RCT7
+#include "at32f413.h"
+#endif
+#define BIT(x)        ((uint32_t)((uint32_t)0x01U<<(x)))
+
+#define SYSTEM_CLOCK (200000000u) //system clk 200M Hz
+#define TIM_CLOCK (SYSTEM_CLOCK) /*SystemClock_Config��TIM1��clk��sys PLL �������̶�2����PLLƵ��*/
+#define TIM_CLOCK_MHz (200u)
+#define ADC_CLOCK (25000000u)
+#define ADC_CLOCK_MHz (30u)
+#define NS_PER_TCLK (5u) /* (1/120000000 * 1000000000) */
+#define NS_2_TCLK(ns) (((ns)/NS_PER_TCLK) + 1u) //ns תΪpwmʹ�õ��Ǹ�TIM��clk count
+#define FOC_PWM_FS (16000u)
+#define FOC_PWM_period (TIM_CLOCK/FOC_PWM_FS)
+#define FOC_PWM_Half_Period (FOC_PWM_period/2)
+
+#define FOC_CTRL_US (1.0f/(float)FOC_PWM_FS)
+
+#define ADC_TRIG_CONV_LATENCY_CYCLES 12.5f
+#define ADC_SAMPLING_CYCLES 13.5f
+
+#if defined (MC100_HW_V1)
+#include "bsp/at32/board_mc100_v1.h"
+#define CONFIG_BOARD_MCXXX
+#define CONFIG_BOARD_NAME "MC100AT"
+#define CONFIG_HW_VERSION 2
+#elif defined (MC105_HW_V3)
+#include "bsp/at32/board_at_mc105_v3.h"
+#define CONFIG_BOARD_MCXXX
+#define CONFIG_BOARD_NAME "MC105AT"
+#define CONFIG_HW_VERSION 3
+#endif
+#endif /* __BSP_AT32_H__ */

Applications/bsp/at32/can.c

@@ -0,0 +1,255 @@
+#include <stdio.h>
+#include "os/queue.h"
+#include "bsp/bsp_driver.h"
+#include "libs/utils.h"
+#include "libs/circle_buffer.h"
+
+#define CAN_RX_MESSAGE_RX_ID 1
+#define CAN_SEND_QUEUE_SIZE 32
+#define RX_ID_OFFSET 16
+#define CAN_SEND_OK 0
+#define CAN_SEND_ERROR -1
+#define CAN_SEND_WAIT_TIMEOUT -2
+
+
+#define TX_NUM 64
+#define RX_NUM 64
+static c_buffer_t g_tx_circle;
+static c_buffer_t g_rx_circle;
+static uint8_t _g_tx_buffer[sizeof(can_tx_message_type) * TX_NUM + 1];
+static uint8_t _g_rx_buffer[sizeof(can_rx_message_type) * RX_NUM + 1];
+
+static int shark_send_can0_data(can_tx_message_type *P_message);
+static uint8_t can_get_mailbox(uint32_t can_periph);
+/* this function can be overide by app, which need recv the can frame */
+__weak void handle_can_frame(can_id_t id, uint8_t *data, int len){
+
+}
+
+void can_rx_poll(void){
+	can_rx_message_type message;
+	if (circle_get_data(&g_rx_circle, (uint8_t *)&message, sizeof(message)) != sizeof(message)) {
+		return;
+	}	
+	can_id_t can_id;
+	can_id.id = message.extended_id;
+	handle_can_frame(can_id, message.data, message.dlc); 
+	return ;
+}
+
+void can_tx_poll(void){
+	can_tx_message_type can_tr_m;
+	if (CAN1->ests_bit.bof){
+		shark_can0_reset();
+	}
+	while (can_get_mailbox((u32)CAN1) != CAN_TX_STATUS_NO_EMPTY) {
+		if (circle_get_data(&g_tx_circle, (uint8_t * )&can_tr_m, sizeof(can_tr_m)) != sizeof(can_tr_m)) {
+			break;
+		}
+		can_message_transmit(CAN1,&can_tr_m);
+	}
+}
+
+static u32 _can_poll_task(void *args) {
+	can_rx_poll();
+	can_tx_poll();
+	return 0;
+}
+
+static __inline__ void can_fifo_recv(can_rx_fifo_num_type fifo){
+	can_rx_message_type Rxmessage;
+
+	can_message_receive(CAN1, fifo, &Rxmessage);
+
+	circle_put_data(&g_rx_circle, (uint8_t *)&Rxmessage,  sizeof(Rxmessage));
+
+}
+
+void USBFS_L_CAN1_RX0_IRQHandler(void)
+{
+	can_fifo_recv(CAN_RX_FIFO0);
+}
+
+void CAN0_RX1_IRQHandler(void)
+{
+	can_fifo_recv(CAN_RX_FIFO1);
+}
+
+static void shark_can0_txrx_pin_config(void){
+	gpio_init_type gpio_init_struct;
+    /* enable can clock */
+    crm_periph_clock_enable(CAN_PIN_RCU, TRUE);
+
+#ifdef CAN_REMAP
+	gpio_pin_remap_config(CAN_REMAP,TRUE);
+#endif
+	
+	gpio_default_para_init(&gpio_init_struct);
+	
+	/* can tx pin */
+	gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+	gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+	gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
+	gpio_init_struct.gpio_pins = CAN_TX_PIN;
+	gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+	gpio_init(CAN_TX_GROUP, &gpio_init_struct);
+	
+	/* can rx pin */
+	gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+	gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
+	gpio_init_struct.gpio_pins = CAN_RX_PIN;
+	gpio_init_struct.gpio_pull = GPIO_PULL_UP;
+	gpio_init(CAN_RX_GROUP, &gpio_init_struct);
+}
+
+
+static void shark_can0_config(void)
+{
+	can_base_type can_base_struct;
+	can_baudrate_type can_baudrate_struct;
+	can_filter_init_type can_filter_init_struct;
+	
+	crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
+	/* can base init */
+	can_default_para_init(&can_base_struct);
+	can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
+	can_base_struct.ttc_enable = FALSE;
+	can_base_struct.aebo_enable = TRUE;
+	can_base_struct.aed_enable = TRUE;
+	can_base_struct.prsf_enable = FALSE;
+	can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
+	can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
+	can_base_init(CAN1, &can_base_struct);
+
+	//CAN0_SPEED==250 //250k bps
+	/* can baudrate, set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size)) */
+	can_baudrate_struct.baudrate_div = 45;
+	can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ;
+	can_baudrate_struct.bts1_size = CAN_BTS1_5TQ;
+	can_baudrate_struct.bts2_size = CAN_BTS2_3TQ;
+	can_baudrate_set(CAN1, &can_baudrate_struct);
+
+	/* can filter 0 config */
+	can_filter_init_struct.filter_activate_enable = TRUE;
+	can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
+	can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
+	can_filter_init_struct.filter_number = 0;
+	can_filter_init_struct.filter_bit = CAN_FILTER_32BIT;
+	can_filter_init_struct.filter_id_high = (((CAN_MY_ADDRESS << 3) >> 16) & 0xFFFF);	/* extended identifier is 29 bit */
+	can_filter_init_struct.filter_id_low = ((CAN_MY_ADDRESS << 3) & 0xFFFF) | 0x04;
+	can_filter_init_struct.filter_mask_high = ((CAN_FILTER_DEST_MASK << 3) >> 16) & 0xFFFF; /* extended identifier is 29 bit */
+	can_filter_init_struct.filter_mask_low = ((CAN_FILTER_DEST_MASK << 3) & 0xFFFF) | 0x04;
+	can_filter_init(CAN1, &can_filter_init_struct);
+
+//  	nvic_priority_group_set(NVIC_PRIGROUP_PRE4_SUB0);  
+  	nvic_irq_enable(USBFS_L_CAN1_RX0_IRQn,CAN_IRQ_PRIORITY,0);	
+    /* enable can receive FIFO0 not empty interrupt */
+    can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
+}
+
+
+static int shark_send_can0_data(can_tx_message_type *P_message){
+	can_tx_poll();
+	if (circle_put_data(&g_tx_circle, (u8 *)P_message, sizeof(can_tx_message_type))){
+		return CAN_SEND_OK;
+	}
+	return CAN_SEND_ERROR;
+}
+
+
+static uint8_t can_get_mailbox(uint32_t can_periph)
+{
+    uint8_t transmit_mailbox = CAN_TX_MAILBOX0;
+    can_type* can_x = CAN1;
+	
+	/* select one empty transmit mailbox */
+	if(can_x->tsts_bit.tm0ef)
+	{
+	  transmit_mailbox = CAN_TX_MAILBOX0;
+	}
+	else if(can_x->tsts_bit.tm1ef)
+	{
+	  transmit_mailbox = CAN_TX_MAILBOX1;
+	}
+	else if(can_x->tsts_bit.tm2ef)
+	{
+	  transmit_mailbox = CAN_TX_MAILBOX2;
+	}
+	else
+	{
+	  transmit_mailbox = CAN_TX_STATUS_NO_EMPTY;
+	}
+
+    /* return no mailbox empty */
+    if(CAN_TX_STATUS_NO_EMPTY == transmit_mailbox){
+        return CAN_TX_STATUS_NO_EMPTY;
+    }
+	return transmit_mailbox;
+}
+
+
+int shark_can0_send_message(uint32_t can_id, const void*buff, int len){
+	can_tx_message_type trasnmit_msg;
+	can_id_t can_frame_id;
+	u32 total_frames = ((len + 7) >> 3);
+	int send_len = len;
+	u32 frame_id = 1;
+	can_frame_id.id = can_id;
+	can_frame_id.total = total_frames;
+
+	while(send_len > 0){
+		can_frame_id.idx = frame_id;
+
+		trasnmit_msg.standard_id	= 0;
+		trasnmit_msg.extended_id	= can_frame_id.id;				
+		trasnmit_msg.frame_type	= CAN_TFT_DATA;
+		trasnmit_msg.id_type	= CAN_ID_EXTENDED;
+		trasnmit_msg.dlc = min(CAN_DATA_SIZE,send_len);
+		memcpy((char *)trasnmit_msg.data, (char *)buff + (len - send_len), trasnmit_msg.dlc);
+		send_len -= trasnmit_msg.dlc;
+		frame_id ++;
+		if (shark_send_can0_data(&trasnmit_msg) != CAN_SEND_OK){
+			return CAN_SEND_ERROR;
+		}
+	}
+
+	return CAN_SEND_OK;
+
+}
+
+int shark_can0_send_ext_message(uint32_t can_id, const void*buff, int len){
+	can_tx_message_type trasnmit_msg;
+	
+	trasnmit_msg.standard_id	= 0;
+	trasnmit_msg.extended_id	= can_id;				
+	trasnmit_msg.frame_type	= CAN_TFT_DATA;
+	trasnmit_msg.id_type	= CAN_ID_EXTENDED;
+	trasnmit_msg.dlc = min(CAN_DLC_LENGTH,len);
+	memcpy((char *)trasnmit_msg.data, (char *)buff, trasnmit_msg.dlc);
+
+	if (shark_send_can0_data(&trasnmit_msg) != CAN_SEND_OK){
+		return CAN_SEND_ERROR;
+	}
+	return CAN_SEND_OK;
+}
+
+
+void shark_can0_reset(void){
+	shark_can0_txrx_pin_config();
+	shark_can0_config();
+}
+
+void shark_can0_deinit(void){
+	can_reset(CAN1);
+	crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, FALSE);
+}
+
+void shark_can0_init(void){
+	circle_buffer_init(&g_tx_circle, _g_tx_buffer, sizeof(_g_tx_buffer));
+	circle_buffer_init(&g_rx_circle, _g_rx_buffer, sizeof(_g_rx_buffer));
+
+	shark_task_create(_can_poll_task, NULL);
+	shark_can0_txrx_pin_config();
+	shark_can0_config();
+}
+

Applications/bsp/at32/can.h

@@ -0,0 +1,76 @@
+#ifndef _Shark_Can0_h__
+#define _Shark_Can0_h__
+#include <stdio.h>
+#include "os/os_types.h"
+#include "config.h"
+//CAN DLC lenght
+#define   CAN_DLC_LENGTH     8
+
+
+#define CAN_EXTENDE_FRAME 1
+#ifdef CAN_EXTENDE_FRAME
+#define CAN_DATA_SIZE CAN_DLC_LENGTH
+#else
+#define CAN_DATA_SIZE 64
+#endif
+
+typedef union {
+	uint32_t id;
+	struct {
+		uint32_t	dest		:7; /*bit 0-6  */
+		uint32_t	src 			:7; /*bit 7-13 */
+		uint32_t	idx 			:5; /*bit 14-18 */
+		uint32_t	total		:5; /*bit 19-23 */
+		uint32_t	type		:2; /*bit 24-25 */ /*1:PT_REQ_NEED_RES ; 2:PT_RES 3:PT_REQ_NO_IND*/
+		uint32_t	retry		:3; /*bit 26-28 */
+		uint32_t	length 		:3; /*bit 29-13 */ //0-7:1-8
+	};
+}can_id_t;
+
+//CAN filter setting
+#ifdef CAN_COMMUNICATION_SPEC_V1P4
+//specification 1.4
+#define CAN_ID_FILTER_START_OFFSET       3
+#define CAN_ID_FILTER_FLAG_OFFSET         7
+#define CAN_ID_FILTER_FLAG                       0x7F
+#else
+//specification 1.3
+#define CAN_ID_FILTER_START_OFFSET       3
+#define CAN_ID_FILTER_FLAG_OFFSET         8
+#define CAN_ID_FILTER_FLAG                       0xFF
+#endif
+
+#define CAN_FILTER_DEST_MASK 0x7F
+
+#define ptype_beat_heart		0 // can heat heart
+#define ptype_request  	1 // can request with need response
+#define ptype_response			2 // can response of the request
+#define ptype_indicater	3 // can request with no need response
+
+
+#define  can_packet_priority_value       0x06
+#define  can_packet_quick_packet_value    0x01  
+
+//used when can recv
+static __inline__ uint16_t decoder_can_key(const void *buf){
+	uint8_t *key_buf = (uint8_t *)buf;
+	return key_buf[1]<<8 | key_buf[0];
+} 
+
+//used when can send
+static __inline__ void encoder_can_key(uint8_t *buff, uint16_t key) {
+	buff[0] = key & 0xFF;
+	buff[1] = (key >> 8) & 0xFF;
+}
+
+
+int shark_can0_send_message(uint32_t can_id, const void*buff, int len);
+void shark_can0_route_message(uint32_t can_id, const void *buff, int len);
+int shark_can0_send_ext_message(uint32_t can_id, const void*buff, int len);
+void shark_can0_init(void);
+void shark_can0_reset(void);
+void shark_can0_deinit(void);
+void can_rx_poll(void);
+
+#endif /* _Shark_Can0_h__ */
+

Applications/bsp/at32/enc_intf.c

@@ -0,0 +1,145 @@
+#include "bsp/bsp_driver.h"
+#include "libs/logger.h"
+
+static void enc_gpio_init(gpio_type *gpiox, gpio_mode_type mode, u32 pin) {
+	gpio_init_type gpio_init_struct = {0};
+	gpio_default_para_init(&gpio_init_struct);
+	gpio_init_struct.gpio_mode = mode;
+	gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+	gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+	gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+	
+	/* High-side, Phase A,B,C Config */
+	gpio_init_struct.gpio_pins = pin;
+	gpio_init(gpiox, &gpio_init_struct);
+}
+
+
+static void _io_init(void) {
+	crm_periph_clock_enable(ENC_A_RCU, TRUE);
+	crm_periph_clock_enable(ENC_B_RCU, TRUE);
+	crm_periph_clock_enable(ENC_PWM_RCU, TRUE);
+	crm_periph_clock_enable(ENC_I_RCU, TRUE);
+#ifdef TIMER2_PB4_PB5_REMAP
+	gpio_pin_remap_config(TIMER2_PB4_PB5_REMAP, TRUE);
+#endif
+#ifdef TIMER1_PA15_REMAP
+	gpio_pin_remap_config(TIMER1_PA15_REMAP, TRUE);
+#endif
+	enc_gpio_init(ENC_A_GROUP, ENC_A_MODE, ENC_A_PIN);
+	enc_gpio_init(ENC_B_GROUP, ENC_B_MODE, ENC_B_PIN);
+	enc_gpio_init(ENC_PWM_GROUP, ENC_PWM_MODE, ENC_PWM_PIN);
+	enc_gpio_init(ENC_I_GROUP, ENC_I_MODE, ENC_I_PIN);
+}
+
+static void _io_init_irq(void) {
+	exint_init_type exint_init_struct;
+
+	gpio_exint_line_config(ENC_I_EXIT_SRC_GROUP, ENC_I_EXIT_SRC_PIN);
+	
+	exint_default_para_init(&exint_init_struct);
+	exint_init_struct.line_enable = TRUE;
+	exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
+	exint_init_struct.line_select = ENC_I_EXTI;
+	exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
+	exint_init(&exint_init_struct);
+
+	nvic_irq_enable(ENC_I_IRQ, ENC_I_EXIT_IRQ_PRIORITY, 0U);
+}
+
+void enc_intf_init(u32 rate) {
+	_io_init();
+	enc_intf_pwm_counter();
+	enc_intf_quadrature_init(rate);
+	_io_init_irq();
+}
+
+void enc_intf_quadrature_init(u32 rate) {
+
+	tmr_type* timer = ENC_TIMER;
+
+	crm_periph_clock_enable(ENC_TIMER_RCU, TRUE);
+	tmr_reset(timer);
+
+	tmr_base_init(timer, rate -1 , 0);
+	tmr_cnt_dir_set(timer, TMR_COUNT_UP);
+	tmr_input_channel_filter_set(timer, TMR_SELECT_CHANNEL_1, ENC_FILTER_NR);
+	tmr_input_channel_filter_set(timer, TMR_SELECT_CHANNEL_2, ENC_FILTER_NR);
+	/* config encoder mode */
+	tmr_encoder_mode_config(timer, TMR_ENCODER_MODE_C, TMR_INPUT_FALLING_EDGE, TMR_INPUT_RISING_EDGE);
+	
+	/* enable tmr2 */
+	tmr_counter_enable(timer, TRUE);
+}
+
+void enc_intf_pwm_counter(void) {
+	tmr_input_config_type tmr_ic_init_structure;
+
+	tmr_type * timer = ENC_PWM_TIMER;
+
+	crm_periph_clock_enable(ENC_PWM_TIMER_RCU, TRUE);
+	tmr_reset(timer);
+
+	tmr_input_default_para_init(&tmr_ic_init_structure);
+	tmr_ic_init_structure.input_filter_value = ENC_FILTER_NR;
+	tmr_ic_init_structure.input_channel_select = ENC_PWM_TIMER_CHAN;
+	tmr_ic_init_structure.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
+	tmr_ic_init_structure.input_polarity_select = TMR_INPUT_RISING_EDGE;
+	
+	tmr_pwm_input_config(timer, &tmr_ic_init_structure, TMR_CHANNEL_INPUT_DIV_1);
+	
+	/* select the tmr3 input trigger: c2df2 */
+	tmr_trigger_input_select(timer, TMR_SUB_INPUT_SEL_C1DF1);
+	
+	/* select the sub mode: reset mode */
+	tmr_sub_mode_select(timer, TMR_SUB_RESET_MODE);
+	
+	/* enable the sub sync mode */
+	tmr_sub_sync_mode_set(timer, TRUE);
+	
+	/* tmr enable counter */
+	tmr_counter_enable(timer, TRUE);
+	
+	/* enable the c2 interrupt request */
+	tmr_interrupt_enable(timer, ENC_PWM_TIMER_IRQ_CH, TRUE);
+
+	nvic_irq_enable(ENC_PWM_TIMER_IRQ, ENC_PWM_IRQ_PRIORITY, 0);
+
+}
+
+__weak void ENC_TIMER_Overflow(void) {
+
+}
+
+void ENC_TIMER_IRQHandler(void) {
+	if (SET == tmr_flag_get(ENC_TIMER, TMR_OVF_FLAG)) {
+		tmr_flag_clear(ENC_TIMER, TMR_OVF_FLAG);
+		ENC_TIMER_Overflow();
+	}
+}
+
+
+__weak void ENC_ABI_IRQHandler(void) {
+
+}
+
+void ABI_I_IRQHandler(void) {
+	ENC_ABI_IRQHandler();
+}
+
+__weak void ENC_PWM_Duty_Handler(float t, float d) {
+
+}
+
+void ENC_PWM_IRQHandler(void) {
+    if(SET == tmr_flag_get(ENC_PWM_TIMER, ENC_PWM_TIMER_INT_FLG)){
+        /* clear channel 0 interrupt bit */
+        tmr_flag_clear(ENC_PWM_TIMER, ENC_PWM_TIMER_INT_FLG);
+        /* read channel 0 capture value */
+        u32 ic0value = tmr_channel_value_get(ENC_PWM_TIMER, TMR_SELECT_CHANNEL_1) + 1;
+		u32 ic1value = tmr_channel_value_get(ENC_PWM_TIMER, TMR_SELECT_CHANNEL_2) + 1;
+		float p_calc = ENC_PWM_Calc_P(ic0value);
+		float d_calc = ENC_PWM_Calc_P(ic1value);
+		ENC_PWM_Duty_Handler(p_calc, d_calc);
+    }
+}

Applications/bsp/at32/enc_intf.h

@@ -0,0 +1,26 @@
+#ifndef _ENC_INTF_H__
+#define _ENC_INTF_H__
+#include "os/os_types.h"
+#include "bsp/bsp.h"
+
+#define PWM_TIME_CLK 20000000U
+
+
+#define ENC_DIR_UP 1
+#define ENC_DIR_DOWN 2
+
+#define ENC_PWM_Calc_P(t) ((float)t / (float)PWM_TIME_CLK)
+
+#define ENC_COUNT (ENC_TIMER->cval)
+
+#define ENC_Direction() (((ENC_TIMER->ctrl1) & (0x10))?ENC_DIR_DOWN:ENC_DIR_UP)
+
+#define ENC_OverFlow() (((ENC_TIMER->ists) & TMR_OVF_FLAG)?true:false)
+#define ENC_ClearUpFlags() ((ENC_TIMER->ists) = (~(uint32_t)TMR_OVF_FLAG))
+
+void enc_intf_quadrature_init(u32 rate);
+void enc_intf_pwm_counter(void);
+void enc_intf_init(u32 rate);
+
+#endif /*_ENC_INTF_H__*/
+

Applications/bsp/at32/fan_pwm.c

@@ -0,0 +1,58 @@
+#include "fan_pwm.h"
+
+void fan_pwm_init(void){
+	tmr_output_config_type tmr_oc_init_structure;
+
+	/* compute the div value */
+	u16 div_value = (uint16_t)(system_core_clock / 1000000) - 1;
+	
+	/* tmr3 time base configuration */
+	tmr_base_init(FAN_PWM_TIMER, FAN_MAX_DUTY_COUNT, div_value);
+	tmr_cnt_dir_set(FAN_PWM_TIMER, TMR_COUNT_UP);
+	tmr_clock_source_div_set(FAN_PWM_TIMER, TMR_CLOCK_DIV1);
+
+	tmr_output_default_para_init(&tmr_oc_init_structure);
+	tmr_oc_init_structure.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
+	tmr_oc_init_structure.oc_idle_state = FALSE;
+	tmr_oc_init_structure.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
+	tmr_oc_init_structure.oc_output_state = TRUE;
+	tmr_output_channel_config(FAN_PWM_TIMER, FAN_PWM_CHAN, &tmr_oc_init_structure);
+	tmr_channel_value_set(FAN_PWM_TIMER, FAN_PWM_CHAN, FAN_MAX_DUTY_COUNT-1);
+	tmr_output_channel_buffer_enable(FAN_PWM_TIMER, FAN_PWM_CHAN, TRUE);
+
+	tmr_period_buffer_enable(FAN_PWM_TIMER, TRUE);
+
+	tmr_output_enable(FAN_PWM_TIMER, FALSE);
+	
+	/* tmr enable counter */
+	tmr_counter_enable(FAN_PWM_TIMER, TRUE);
+}
+
+
+void fan_stop(void) {
+	tmr_counter_enable(FAN_PWM_TIMER, FALSE);
+}
+
+void fan_set_duty(u8 duty) {
+	if (duty > 100) {
+		duty = 100;
+	}else if (duty > 0 && duty < 30) {
+		duty = 30;
+	}
+	u32 count = (float)duty * (float)FAN_MAX_DUTY_COUNT / 100.0f;
+	tmr_channel_value_set(FAN_PWM_TIMER,FAN_PWM_CHAN, count);
+	if (count == 0) {
+		tmr_output_enable(FAN_PWM_TIMER,FALSE);
+	}else {
+		tmr_output_enable(FAN_PWM_TIMER,TRUE);
+	}
+}
+
+
+bool fan_pwm_is_running(void) {
+	if (FAN_PWM_TIMER->ctrl1_bit.tmren == TRUE) {
+		return true;
+	}
+	return false;
+}
+

Applications/bsp/at32/fan_pwm.h

@@ -0,0 +1,23 @@
+#ifndef _FAN_PWM_H__
+#define _FAN_PWM_H__
+#include "bsp/bsp.h"
+#include "os/os_types.h"
+
+#define PWM_FREQ_HZ    200
+#define FAN_DUTY_COUNT (1000000/200)
+#define FAN_MAX_DUTY_COUNT (FAN_DUTY_COUNT/2)
+
+#ifdef CONFIG_BOARD_MCXXX
+void fan_pwm_init(void);
+void fan_stop(void);
+void fan_set_duty(u8 duty); //duty 0-100
+bool fan_pwm_is_running(void);
+#else
+static void fan_pwm_init(void) {}
+static void fan_stop(void) {}
+static void fan_set_duty(u8 duty) {}
+bool fan_pwm_is_running(void){return false;}
+
+#endif
+#endif /* _FAN_PWM_H__ */
+

Applications/bsp/at32/fmc_flash.c

@@ -0,0 +1,218 @@
+#include "bsp/bsp_driver.h"
+
+#if defined (GD32F30X_HD) || defined (GD32F30X_XD) || defined (GD32F30X_CL)
+#define FMC_FLAG_PGERR  FMC_FLAG_BANK0_PGERR
+#define FMC_FLAG_PGAERR  FMC_FLAG_BANK0_PGERR
+#define FMC_FLAG_WPERR  FMC_FLAG_BANK0_WPERR
+#define FMC_FLAG_END  FMC_FLAG_BANK0_END
+#endif
+
+
+static void _fmc_write_data(uint32_t addr, uint8_t *data, int len);
+static void _fmc_read_data(uint32_t addr, uint8_t *data, int len);
+static void _fmc_erase_addr(uint32_t addr, int len);
+static void _fmc_read_data(uint32_t addr, uint8_t *data, int len);
+static void _fmc_erase_write_data(uint32_t addr, uint8_t *data, int len);
+
+static uint32_t _sn_addr(void);
+static uint32_t _data_addr(int index);
+static uint32_t _maigc_addr(void);
+
+static uint32_t _nv_tbl_write_addr = 0;
+
+static u8 _nv_tbl_write_cache[4];
+static u8 _nv_tbl_write_remain;
+
+void fmc_write_sn(uint8_t *sn, int len){
+	_fmc_erase_write_data(_sn_addr(), sn, len);
+}
+
+void fmc_read_sn(uint8_t *sn, int len){
+	_fmc_read_data(_sn_addr(), sn, len);
+}
+
+void fmc_write_data(int index, uint8_t *data, int len){
+	_fmc_erase_write_data(_data_addr(index), data, len);
+}
+
+void fmc_read_data(int index, uint8_t *data, int len){
+	_fmc_read_data(_data_addr(index), data, len);
+}
+
+static __inline__ void _fmc_flag_clear(void) {
+	flash_flag_clear(FLASH_OBF_FLAG | FLASH_ODF_FLAG | FLASH_PRGMERR_FLAG | FLASH_EPPERR_FLAG);
+}
+
+
+void fmc_write_magic(uint32_t magic){
+	uint32_t address = _maigc_addr();
+	uint32_t length, checksum, value;
+
+	value = REG32(address + 8);
+	if (magic == value) {
+		return;
+	}
+
+	length = REG32(address);
+	checksum = REG32(address + 4);
+
+	flash_unlock();
+
+	if (value != 0xFFFFFFFF) {
+		_fmc_flag_clear();
+		flash_sector_erase(address);
+
+		_fmc_flag_clear();
+		flash_word_program(address, length);
+
+		_fmc_flag_clear();
+		flash_word_program(address + 4, checksum);
+	}
+
+	if (magic != 0xFFFFFFFF) {
+		_fmc_flag_clear();
+		flash_word_program(address + 8, magic);
+	}
+
+	flash_lock();
+}
+
+uint32_t fmc_read_magic(void){
+	uint32_t magic = 0x5555aaaa;
+	_fmc_read_data(_maigc_addr(), (uint8_t *)&magic, sizeof(magic));
+	return magic;
+}
+
+//if flash is lager than 256k, we just use the 256k
+static uint32_t __inline__ _flash_capatity(void){
+	uint32_t capacity;
+	capacity = (REG32(0x1FFFF7E0) & 0xFFFF) << 10;
+	if (capacity > (256 * 1024)){
+		capacity =  256 * 1024;
+	}
+	return capacity;
+}
+
+static uint32_t _sn_addr(void){
+	return 0x08000000 + (_flash_capatity() - one_page_size * sn_page_index);
+}
+
+static uint32_t _data_addr(int index){
+	return 0x08000000 + (_flash_capatity() - one_page_size * index);
+}
+
+static uint32_t _maigc_addr(void){
+	return 0x08000000 + (_flash_capatity() - one_page_size * magic_page_index);
+}
+
+static void _fmc_read_data(uint32_t addr, uint8_t *data, int len){
+	int i = 0;
+	for (i = 0; i < len; i++){
+		data[i] = REG8(addr + i);
+	}
+}
+
+uint32_t fmc_get_addr(int page) {
+	return 0x08000000 + (_flash_capatity() - one_page_size * page);
+}
+
+void fmc_erase_trq_table(int addr, int len){
+	_fmc_erase_addr(addr, len);
+	_nv_tbl_write_addr = 0;
+}
+void fmc_write_trq_table(int addr, uint8_t *data, int len){
+	_fmc_write_data(addr + _nv_tbl_write_addr, data, len);
+	_nv_tbl_write_addr += len;
+}
+
+void fmc_write_trq_table_begin(int addr)
+{
+	_nv_tbl_write_addr = addr;
+	_nv_tbl_write_remain = 0;
+}
+
+static void fmc_write_trq_table_flush(void)
+{
+	u32 value = *(u32 *) _nv_tbl_write_cache;
+
+	if ((_nv_tbl_write_addr % one_page_size) == 0) {
+		_fmc_flag_clear();
+		flash_sector_erase(_nv_tbl_write_addr);
+	}
+
+	_fmc_flag_clear();
+	flash_word_program(_nv_tbl_write_addr, value);
+
+	_nv_tbl_write_addr += _nv_tbl_write_remain;
+	_nv_tbl_write_remain = 0;
+}
+
+void fmc_write_trq_table_continue(const u8 *data, int len)
+{
+	const u8 *data_end;
+
+	flash_unlock();
+
+	for (data_end = data + len; data < data_end; data++) {
+		if (_nv_tbl_write_remain >= sizeof(_nv_tbl_write_cache)) {
+			fmc_write_trq_table_flush();
+		}
+
+		_nv_tbl_write_cache[_nv_tbl_write_remain] = *data;
+		_nv_tbl_write_remain++;
+	}
+
+	flash_lock();
+}
+
+void fmc_write_trq_table_end(void)
+{
+	if (_nv_tbl_write_remain > 0) {
+		flash_unlock();
+		fmc_write_trq_table_flush();
+		flash_lock();
+	}
+}
+
+extern void wdog_reload(void);
+static void _fmc_erase_addr(uint32_t addr, int len){
+	flash_unlock();
+	uint32_t pages = len/one_page_size + (((len % one_page_size) > 0)?1:0);
+	for (int i = 0; i < pages; i++){
+		_fmc_flag_clear();
+		flash_sector_erase(addr + i * one_page_size);
+		wdog_reload();
+	}
+	flash_lock();
+}
+
+static void _fmc_write_data(uint32_t addr, uint8_t *data, int len){
+	flash_unlock();
+	int total_words = len / 4;
+	uint32_t *p_u32_data = (uint32_t *)data;
+	int i;
+	for (i = 0; i < total_words; i++){
+		_fmc_flag_clear();
+		flash_word_program(addr, p_u32_data[i]);
+		data += 4;
+		addr += 4;
+	}
+
+	int remain_len = len - total_words * 4;
+	if (remain_len > 0){
+		uint32_t words = 0;
+		for (int i = 0; i < remain_len; i++){
+			words |= data[i] << (8*i);
+		}
+		_fmc_flag_clear();
+		flash_word_program(addr, words);
+	}
+	flash_lock();
+}
+
+
+static void _fmc_erase_write_data(uint32_t addr, uint8_t *data, int len){
+	_fmc_erase_addr(addr, len);
+	_fmc_write_data(addr, data, len);
+}
+

Applications/bsp/at32/fmc_flash.h

@@ -0,0 +1,25 @@
+#ifndef _FMC_FLASH_H__
+#define _FMC_FLASH_H__
+#include <stdint.h>
+
+#define one_page_size 2048
+
+#define data_bk_page_index 4
+#define data_page_index 3
+#define sn_page_index 2
+#define magic_page_index 1 //must is the last page in 256K eara
+
+void fmc_write_sn(uint8_t *sn, int len);
+void fmc_read_sn(uint8_t *sn, int len);
+
+void fmc_write_data(int index, uint8_t *data, int len);
+void fmc_read_data(int index, uint8_t *data, int len);
+void fmc_write_magic(uint32_t magic);
+uint32_t fmc_read_magic(void);
+uint32_t fmc_get_addr(int page);
+void fmc_write_trq_table_begin(int addr);
+void fmc_write_trq_table_continue(const u8 *data, int len);
+void fmc_write_trq_table_end(void);
+
+#endif /* _FMC_FLASH_H__ */
+

Applications/bsp/at32/gpio.c

@@ -0,0 +1,161 @@
+#include "bsp/bsp_driver.h"
+#include "libs/utils.h"
+
+/*
+* gpio.c
+* all pins used as gpio(in/out/irq) must be init&accessed here
+*/
+
+void gpio_pin_init(void){
+	crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
+    crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
+	crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
+	crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
+	crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
+	crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
+}
+
+
+void gpio_beep(u32 ms) {
+}
+
+void at32_gpio_init(gpio_type *gpiox, gpio_mode_type mode, gpio_output_type otype, gpio_pull_type pull, u32 pin) {
+	gpio_init_type gpio_init_struct = {0};
+	gpio_default_para_init(&gpio_init_struct);
+	gpio_init_struct.gpio_mode = mode;
+	gpio_init_struct.gpio_out_type = otype;
+	gpio_init_struct.gpio_pull = pull;
+	gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+	
+	/* High-side, Phase A,B,C Config */
+	gpio_init_struct.gpio_pins = pin;
+	gpio_init(gpiox, &gpio_init_struct);
+}
+
+
+void gpio_mc_brk_init(void) {
+#ifdef GPIO_BRAKE_IN_GROUP
+	crm_periph_clock_enable(GPIO_BRAKE_IN_RCU, TRUE);
+#ifdef GPIO_BRAKE_PIN_REMAP
+	gpio_pin_remap_config(GPIO_BRAKE_PIN_REMAP, TRUE);
+#endif
+	at32_gpio_init(GPIO_BRAKE_IN_GROUP, GPIO_BRAKE_IN_MODE, GPIO_OUTPUT_PUSH_PULL, GPIO_PULL_NONE, GPIO_BRAKE_IN_PIN);
+
+	exint_init_type exint_init_struct;
+
+	gpio_exint_line_config(GPIO_BRAKE_EXIT_SRC_GROUP, GPIO_BRAKE_EXIT_SRC_PIN);
+	
+	exint_default_para_init(&exint_init_struct);
+	exint_init_struct.line_enable = TRUE;
+	exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
+	exint_init_struct.line_select = GPIO_BRAKE_EXTI;
+	exint_init_struct.line_polarity = EXINT_TRIGGER_BOTH_EDGE;
+	exint_init(&exint_init_struct);
+	exint_flag_clear(GPIO_BRAKE_EXTI);
+	nvic_irq_enable(GPIO_BRAKE_IRQ, EBREAK_IRQ_PRIORITY, 0U);
+#endif
+}
+
+void gpio_mlock_init(void) {
+#ifdef GPIO_MLOCK_IN_GROUP
+	crm_periph_clock_enable(GPIO_MLOCK_IN_RCU, TRUE);
+	at32_gpio_init(GPIO_MLOCK_IN_GROUP, GPIO_MLOCK_IN_MODE, GPIO_OUTPUT_PUSH_PULL, GPIO_PULL_NONE, GPIO_MLOCK_IN_PIN);
+#endif
+}
+
+void gpio_fan_det_init(void) {
+#ifdef GPIO_FAN1_IN_GROUP
+	crm_periph_clock_enable(GPIO_FAN1_IN_RCU, TRUE);
+	at32_gpio_init(GPIO_FAN1_IN_GROUP, GPIO_FAN1_IN_MODE, GPIO_OUTPUT_PUSH_PULL, GPIO_PULL_NONE, GPIO_FAN1_IN_PIN);
+	exint_init_type exint_init_struct;
+
+	gpio_exint_line_config(GPIO_FAN1_EXIT_SRC_GROUP, GPIO_FAN1_EXIT_SRC_PIN);
+	
+	exint_default_para_init(&exint_init_struct);
+	exint_init_struct.line_enable = TRUE;
+	exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT;
+	exint_init_struct.line_select = GPIO_FAN1_EXTI;
+	exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE;
+	exint_init(&exint_init_struct);
+	exint_flag_clear(GPIO_FAN1_EXTI);	
+	nvic_irq_enable(GPIO_FAN1_IRQ, ENC_OTHER_IRQ_PRIORITY, 0U);
+#endif
+}
+
+void gpio_phase_u_detect(bool enable) {
+#ifdef GPIO_UDEC_OUT_GROUP
+	if (enable) {
+		at32_gpio_init(GPIO_UDEC_OUT_GROUP, GPIO_UDEC_OUT_MODE, GPIO_OUTPUT_PUSH_PULL, GPIO_PULL_NONE, GPIO_UDEC_OUT_PIN);
+	#ifdef GPIO_UDEC_OUT_REMAP_DISABLE
+		gpio_pin_remap_config(GPIO_UDEC_OUT_REMAP_DISABLE, ENABLE);
+	#endif
+		gpio_bits_write(GPIO_UDEC_OUT_GROUP, GPIO_UDEC_OUT_PIN, TRUE);
+	}else {
+		at32_gpio_init(GPIO_UDEC_OUT_GROUP, GPIO_MODE_INPUT, GPIO_OUTPUT_PUSH_PULL, GPIO_PULL_NONE, GPIO_UDEC_OUT_PIN);
+	#ifdef GPIO_UDEC_OUT_REMAP_ENABLE
+		gpio_pin_remap_config(GPIO_UDEC_OUT_REMAP_ENABLE, ENABLE);
+	#endif
+	}
+#endif
+}
+
+
+void gpio_led_init(void) {
+#ifdef GPIO_LED_OUT_GROUP
+	crm_periph_clock_enable(GPIO_LED_OUT_RCU, TRUE);
+	at32_gpio_init(GPIO_LED_OUT_GROUP, GPIO_LED_OUT_MODE, GPIO_OUTPUT_PUSH_PULL, GPIO_PULL_NONE, GPIO_LED_OUT_PIN);
+	gpio_bits_reset(GPIO_LED_OUT_GROUP, GPIO_LED_OUT_PIN);
+#endif
+}
+
+void gpio_brk_light_init(void) {
+#ifdef GPIO_BRAKE_LIGHT_OUT_GROUP
+	crm_periph_clock_enable(GPIO_BRAKE_LIGHT_OUT_RCU, TRUE);
+	at32_gpio_init(GPIO_BRAKE_LIGHT_OUT_GROUP, GPIO_BRAKE_LIGHT_OUT_MODE, GPIO_OUTPUT_PUSH_PULL, GPIO_PULL_NONE, GPIO_BRAKE_LIGHT_OUT_PIN);
+	gpio_bits_reset(GPIO_BRAKE_LIGHT_OUT_GROUP, GPIO_BRAKE_LIGHT_OUT_PIN);
+#endif
+}
+
+void mc_gpio_init(void) {
+	gpio_mlock_init();
+	gpio_mc_brk_init();
+	gpio_fan_det_init();
+	gpio_led_init();
+	gpio_brk_light_init();
+}
+
+
+void gpio_led_enable(bool enable) {
+#ifdef GPIO_LED_OUT_GROUP
+	gpio_bits_write(GPIO_BRAKE_LIGHT_OUT_GROUP, GPIO_BRAKE_LIGHT_OUT_PIN, enable?TRUE:FALSE);
+#endif
+}
+
+void gpio_brk_light_enable(bool enable) {
+#ifdef GPIO_BRAKE_LIGHT_OUT_GROUP
+	gpio_bits_write(GPIO_BRAKE_LIGHT_OUT_GROUP, GPIO_BRAKE_LIGHT_OUT_PIN, enable?TRUE:FALSE);
+#endif
+}
+
+
+bool mc_get_gpio_brake(void) {
+	return gpio_input_data_bit_read(GPIO_BRAKE_IN_GROUP, GPIO_BRAKE_IN_PIN) == SET;
+}
+
+bool mc_get_gpio_brake1(void) {
+#ifdef GPIO_BRAKE1_IN_GROUP
+	return gpio_input_data_bit_read(GPIO_BRAKE1_IN_GROUP, GPIO_BRAKE1_IN_PIN) == SET;
+#else
+	return mc_get_gpio_brake();
+#endif
+}
+
+
+bool gpio_motor_locked(void) {
+#ifdef GPIO_MLOCK_IN_GROUP
+	return gpio_input_data_bit_read(GPIO_MLOCK_IN_GROUP, GPIO_MLOCK_IN_PIN) == RESET;
+#else
+	return false;
+#endif
+}
+

Applications/bsp/at32/gpio.h

@@ -0,0 +1,35 @@
+
+
+#ifndef _GPIO_PIN_H__
+#define _GPIO_PIN_H__
+
+#include "bsp.h"
+#include "os/os_types.h"
+typedef struct {
+	uint32_t group;
+	uint32_t pin;
+	uint32_t mode;
+	uint32_t speed;
+	int init_value; //-1 input, 0 L, 1 H
+}gpio_pin_config_t;
+
+void gpio_pin_init(void);
+bool gpio_get_brake(void) ;
+void gpio_ir2136_enable(bool enable);
+void gpio_led1_enable(bool enable);
+void gpio_led2_enable(bool enable);
+void gpio_led3_enable(bool enable);
+int gpio_startkey_value(void);
+int gpio_stopkey_value(void);
+int gpio_funckey_value(void);
+void gpio_beep(u32 ms);
+void gpio_phase_u_detect(bool enable);
+void mc_brk_gpio_init(void);
+bool mc_get_gpio_brake(void);
+void mc_gpio_init(void);
+bool gpio_motor_locked(void);
+bool mc_get_gpio_brake1(void);
+void gpio_led_enable(bool enable);
+void gpio_brk_light_enable(bool enable);
+
+#endif /* _GPIO_PIN_H__ */

Applications/bsp/at32/mc_irqs.c

@@ -0,0 +1,191 @@
+#include <stdbool.h>
+#include "bsp/bsp.h"
+#include "bsp/bsp_driver.h"
+/*!
+    \brief      this function handles NMI exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void NMI_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles HardFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void HardFault_Handler(void){
+	while(1) {
+	}
+}
+
+/*!
+    \brief      this function handles MemManage exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void MemManage_Handler(void)
+{
+    /* if Memory Manage exception occurs, go to infinite loop */
+    while (1){
+    }
+}
+
+/*!
+    \brief      this function handles BusFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void BusFault_Handler(void)
+{
+    /* if Bus Fault exception occurs, go to infinite loop */
+    while (1){
+    }
+}
+
+/*!
+    \brief      this function handles UsageFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void UsageFault_Handler(void)
+{
+    /* if Usage Fault exception occurs, go to infinite loop */
+    while (1){
+    }
+}
+
+/*!
+    \brief      this function handles DebugMon exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void DebugMon_Handler(void)
+{
+}
+
+
+__weak void MC_Brake_IRQHandler(void) {
+
+}
+__weak void MC_Protect_IRQHandler(void) {
+
+}
+__weak void TIMER_UP_IRQHandler(void) {
+
+}
+
+__weak void ADC_IRQHandler(void) {
+
+}
+
+__weak void HALL_IRQHandler(void) {
+
+}
+
+__weak void ABI_I_IRQHandler(void) {
+
+}
+
+__weak void Fan_IRQHandler(int idx) {
+
+}
+
+void ADC1_2_IRQHandler(void)
+{
+	ADC_IRQHandler();
+	adc_clear_irq_flags();
+}
+
+void TMR1_OVF_TMR10_IRQHandler(void) {
+	if (tmr_flag_get(pwm_timer, TMR_OVF_FLAG)) {
+		tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+		TIMER_UP_IRQHandler();
+	}
+}
+
+void TMR1_BRK_TMR9_IRQHandler(void) {
+	if (tmr_flag_get(pwm_timer, TMR_BRK_FLAG)) {
+		tmr_flag_clear(pwm_timer, TMR_BRK_FLAG);
+		MC_Protect_IRQHandler();
+	}
+}
+
+void EXINT0_IRQHandler(void)
+{
+	if(RESET != exint_flag_get(EXINT_LINE_0)){
+		exint_flag_clear(EXINT_LINE_0);
+	}	
+}
+
+void EXINT2_IRQHandler(void)
+{
+	if(RESET != exint_flag_get(EXINT_LINE_2)){
+		exint_flag_clear(EXINT_LINE_2);
+		MC_Brake_IRQHandler();
+	}	
+}
+
+
+void EXINT3_IRQHandler(void)
+{
+	if(RESET != exint_flag_get(EXINT_LINE_3)){
+		exint_flag_clear(EXINT_LINE_3);
+	}
+}
+
+void EXINT4_IRQHandler(void)
+{
+	if(RESET != exint_flag_get(EXINT_LINE_4)){
+		exint_flag_clear(EXINT_LINE_4);
+		//MC_Brake_IRQHandler();
+	}	
+}
+
+void EXINT9_5_IRQHandler(void){
+	if(RESET != exint_flag_get(EXINT_LINE_5)){
+		exint_flag_clear(EXINT_LINE_5);
+	}
+	if(RESET != exint_flag_get(EXINT_LINE_6)){
+		exint_flag_clear(EXINT_LINE_6);
+		ABI_I_IRQHandler();
+	}	
+	if(RESET != exint_flag_get(EXINT_LINE_7)){
+		exint_flag_clear(EXINT_LINE_7);
+	}
+	if(RESET != exint_flag_get(EXINT_LINE_8)){
+		exint_flag_clear(EXINT_LINE_8);
+	}
+	if(RESET != exint_flag_get(EXINT_LINE_9)){
+		exint_flag_clear(EXINT_LINE_9);
+	}	
+}
+
+void EXINT15_10_IRQHandler(void){
+	if(RESET != exint_flag_get(EXINT_LINE_10)){
+		exint_flag_clear(EXINT_LINE_10);
+	}
+	if(RESET != exint_flag_get(EXINT_LINE_11)){
+		exint_flag_clear(EXINT_LINE_11);
+		Fan_IRQHandler(0);
+	}	
+	if(RESET != exint_flag_get(EXINT_LINE_12)){
+		exint_flag_clear(EXINT_LINE_12);
+	}
+	if(RESET != exint_flag_get(EXINT_LINE_13)){
+		exint_flag_clear((EXINT_LINE_13));
+	}
+	if(RESET != exint_flag_get(EXINT_LINE_14)){
+		exint_flag_clear(EXINT_LINE_14);
+	}
+	if(RESET != exint_flag_get(EXINT_LINE_15)){
+		exint_flag_clear(EXINT_LINE_15);
+	}	
+}

Applications/bsp/at32/pwm.c

@@ -0,0 +1,257 @@
+#include "bsp/bsp.h"
+#include "bsp/bsp_driver.h"
+#include "os/os_task.h"
+#include "libs/logger.h"
+/*
+以下主要是在某一相电路无法采集的时候，需要对这相的pwm挖坑处理
+timer 分配:
+timer0 -> ch0-2 互补pwm
+        ch4 event, update event 触发DMA(ch3,4)实现CCR的自更新
+timer1 -> 触发ADC采样，GD32不支持多channel 或方式触发输出，通过timer1的 ch0 compara 配置 TRGO触发ADC，但是需要在一个PWM周期内触发2次（单电阻）
+timer0 master --> timer1 slave/master 确保timer0，1同步开始，同频同相位
+
+DMA 分配：
+DMA0 ch4 -> timer0 update event
+    ch3 -> timer0 chan3 CC event
+
+    ch1 -> timer1 update event，需要更新CCR
+*/
+
+static void _init_pwm_timer(bool);
+static void _pwm_gpio_config(void);
+#ifndef PWM_BRAKE_GROUP
+static void _gpio_brakein_irq_enable(void);
+#endif
+
+static void pwm_gpio_init(gpio_type *gpiox, gpio_mode_type mode, gpio_output_type otype, gpio_pull_type pull, u32 pin) {
+	gpio_init_type gpio_init_struct = {0};
+	gpio_default_para_init(&gpio_init_struct);
+	gpio_init_struct.gpio_mode = mode;
+	gpio_init_struct.gpio_out_type = otype;
+	gpio_init_struct.gpio_pull = pull;
+	gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+	
+	/* High-side, Phase A,B,C Config */
+	gpio_init_struct.gpio_pins = pin;
+	gpio_init(gpiox, &gpio_init_struct);
+}
+
+void pwm_3phase_init(void){
+	_pwm_gpio_config();
+    _init_pwm_timer(true);
+}
+
+void pwm_3phase_sides(bool hon, bool lon) {
+	if (hon && lon) {
+		return;
+	}
+	tmr_reset(pwm_timer);
+	crm_periph_clock_enable(PWM_CRM_CLK, TRUE);
+    pwm_gpio_init(PWM_U_P_GROUP,GPIO_MODE_OUTPUT,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_NONE, PWM_U_P_PIN);
+    pwm_gpio_init(PWM_V_P_GROUP,GPIO_MODE_OUTPUT,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_NONE,PWM_V_P_PIN);
+    pwm_gpio_init(PWM_W_P_GROUP,GPIO_MODE_OUTPUT,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_NONE,PWM_W_P_PIN);
+
+    pwm_gpio_init(PWM_U_N_GROUP,GPIO_MODE_OUTPUT,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_NONE,PWM_U_N_PIN);
+    pwm_gpio_init(PWM_V_N_GROUP,GPIO_MODE_OUTPUT,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_NONE,PWM_V_N_PIN);
+    pwm_gpio_init(PWM_W_N_GROUP,GPIO_MODE_OUTPUT,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_NONE,PWM_W_N_PIN);
+
+	sys_debug("pwm_3phase_sides\n");
+	/* 开上桥或者下桥之前先关闭下桥或者上桥 */
+	if (hon) {
+		_pwm_gpio_config();
+		_init_pwm_timer(false);
+		delay_us(10);
+		pwm_start();
+		pwm_update_duty(FOC_PWM_Half_Period-200, FOC_PWM_Half_Period-200, FOC_PWM_Half_Period-200);
+	}else if (lon) {
+		gpio_bits_write(PWM_U_P_GROUP, PWM_U_P_PIN, FALSE);
+		gpio_bits_write(PWM_V_P_GROUP, PWM_V_P_PIN, FALSE);
+		gpio_bits_write(PWM_W_P_GROUP, PWM_W_P_PIN, FALSE);
+
+		delay_us(10);
+		gpio_bits_write(PWM_U_N_GROUP, PWM_U_N_PIN, TRUE);
+		gpio_bits_write(PWM_V_N_GROUP, PWM_V_N_PIN, TRUE);
+		gpio_bits_write(PWM_W_N_GROUP, PWM_W_N_PIN, TRUE);
+	}else {
+#if 0		
+		gpio_bit_write(PWM_U_P_GROUP, PWM_U_P_PIN, RESET);
+		gpio_bit_write(PWM_V_P_GROUP, PWM_V_P_PIN, RESET);
+		gpio_bit_write(PWM_W_P_GROUP, PWM_W_P_PIN, RESET);
+
+		gpio_bit_write(PWM_U_N_GROUP, PWM_U_N_PIN, RESET);
+		gpio_bit_write(PWM_V_N_GROUP, PWM_V_N_PIN, RESET);
+		gpio_bit_write(PWM_W_N_GROUP, PWM_W_N_PIN, RESET);
+#else
+		pwm_3phase_init();
+#endif
+	}
+}
+
+static void _pwm_gpio_config(void)
+{
+    crm_periph_clock_enable(PWM_U_P_RCU, TRUE);
+    crm_periph_clock_enable(PWM_V_P_RCU, TRUE);
+	crm_periph_clock_enable(PWM_W_P_RCU, TRUE);
+    crm_periph_clock_enable(PWM_U_N_RCU, TRUE);
+    crm_periph_clock_enable(PWM_V_N_RCU, TRUE);
+	crm_periph_clock_enable(PWM_W_N_RCU, TRUE);	
+
+    /*configure PA8 PA9 PA10(TIMER0 CH0 CH1 CH2) as alternate function*/
+    pwm_gpio_init(PWM_U_P_GROUP,PWM_U_P_MODE,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_DOWN,PWM_U_P_PIN);
+    pwm_gpio_init(PWM_V_P_GROUP,PWM_V_P_MODE,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_DOWN,PWM_V_P_PIN);
+    pwm_gpio_init(PWM_W_P_GROUP,PWM_W_P_MODE,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_DOWN,PWM_W_P_PIN);
+
+    /*configure PB13 PB14 PB15(TIMER0 CH0N CH1N CH2N) as alternate function*/
+    pwm_gpio_init(PWM_U_N_GROUP,PWM_U_N_MODE,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_UP,PWM_U_N_PIN);
+    pwm_gpio_init(PWM_V_N_GROUP,PWM_V_N_MODE,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_UP,PWM_V_N_PIN);
+    pwm_gpio_init(PWM_W_N_GROUP,PWM_W_N_MODE,GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_UP,PWM_W_N_PIN);
+
+	/*configure BRAKE IN*/
+#ifdef PWM_BRAKE_GROUP
+    /* TIMER0 BKIN */
+	crm_periph_clock_enable(PWM_BRAKE_RCU, TRUE);
+    pwm_gpio_init(PWM_BRAKE_GROUP, PWM_BRAKE_MODE, GPIO_OUTPUT_PUSH_PULL,GPIO_PULL_UP, PWM_BRAKE_PIN);
+#endif
+}
+
+static u8 _dead_time(u16 t) {
+	if (t < 128) {
+		return (u8 )t;
+	}else if (t <= (64 + 63) * 2) { //11 1111
+		return ((((u8)2<<6) + (t-64)/2));
+	}else if (t <= (32 + 31) * 8) {
+		return (((u8)3 << 6) + (t - 32)/8);
+	}else {
+		if ((t-32)/16 > 63) {
+			return 0xFF;
+		}
+		return (((u8)7<<3) + (t - 32)/16);
+	}
+}
+
+static void _init_pwm_timer(bool enable_brk) {
+	tmr_output_config_type tmr_output_struct;
+	tmr_brkdt_config_type tmr_brkdt_config_struct;
+
+	tmr_reset(pwm_timer);
+	crm_periph_clock_enable(PWM_CRM_CLK, TRUE);
+	tmr_repetition_counter_set(pwm_timer, 1); 		 /* the pwm cycle isr in underflow (high-side pwm on) */
+	tmr_base_init(pwm_timer, FOC_PWM_Half_Period, 0);
+	tmr_cnt_dir_set(pwm_timer, TMR_COUNT_TWO_WAY_1);	/* output compare interrupt flags are set only count-down */
+	/* set dead time clock */
+	tmr_clock_source_div_set(pwm_timer, TMR_CLOCK_DIV1);
+
+	/* channel 1,2,3,1C,2C,3C configuration in output mode */
+	tmr_channel_value_set(pwm_timer, TMR_SELECT_CHANNEL_1, FOC_PWM_Half_Period/2);
+	tmr_channel_value_set(pwm_timer, TMR_SELECT_CHANNEL_2, FOC_PWM_Half_Period/2);
+	tmr_channel_value_set(pwm_timer, TMR_SELECT_CHANNEL_3, FOC_PWM_Half_Period/2);
+
+	tmr_output_default_para_init(&tmr_output_struct);
+	tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
+	tmr_output_struct.oc_output_state = TRUE;
+	tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
+	tmr_output_struct.oc_idle_state = FALSE;
+	tmr_output_struct.occ_output_state = TRUE;
+	tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_LOW;
+	tmr_output_struct.occ_idle_state = TRUE;
+	
+	/* channel 1, 2, 3 */
+	tmr_output_channel_config(pwm_timer, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
+	tmr_output_channel_config(pwm_timer, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
+	tmr_output_channel_config(pwm_timer, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
+	
+	tmr_output_channel_buffer_enable(pwm_timer, TMR_SELECT_CHANNEL_1, TRUE);
+	tmr_output_channel_buffer_enable(pwm_timer, TMR_SELECT_CHANNEL_2, TRUE);
+	tmr_output_channel_buffer_enable(pwm_timer, TMR_SELECT_CHANNEL_3, TRUE);
+
+	tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
+	tmr_output_channel_config(pwm_timer, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
+	tmr_channel_value_set(pwm_timer, TMR_SELECT_CHANNEL_4, FOC_PWM_Half_Period-1);
+	tmr_output_channel_buffer_enable(pwm_timer, TMR_SELECT_CHANNEL_4, TRUE);
+#ifdef PWM_BRAKE_GROUP
+	/* automatic output enable, break, dead time and lock configuration */
+	tmr_brkdt_default_para_init(&tmr_brkdt_config_struct);
+	tmr_brkdt_config_struct.brk_enable = enable_brk?TRUE:FALSE;
+	tmr_brkdt_config_struct.auto_output_enable = FALSE;
+	tmr_brkdt_config_struct.deadtime = _dead_time(NS_2_TCLK(PWM_DEAD_TIME_NS));
+	tmr_brkdt_config_struct.fcsodis_state = TRUE;
+	tmr_brkdt_config_struct.fcsoen_state = TRUE;
+	tmr_brkdt_config_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW;
+	tmr_brkdt_config_struct.wp_level = TMR_WP_OFF;
+	tmr_brkdt_config(pwm_timer, &tmr_brkdt_config_struct);
+#endif
+	tmr_primary_mode_select(pwm_timer, TMR_PRIMARY_SEL_OVERFLOW);
+
+	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG | TMR_BRK_FLAG | TMR_C4_INT);
+	tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, TRUE);
+	tmr_interrupt_enable(pwm_timer, TMR_BRK_INT, TRUE);
+
+	/* disable single pulse mode */
+	tmr_one_cycle_mode_enable(pwm_timer, FALSE);
+
+	/* pwm timer output enable */
+	tmr_output_enable(pwm_timer, FALSE);
+
+	nvic_irq_enable(TMR1_BRK_TMR9_IRQn, EBREAK_IRQ_PRIORITY, 0);
+	nvic_irq_enable(TMR1_OVF_TMR10_IRQn, TIMER_UP_IRQ_PRIORITY, 0);
+
+	/* enable pwm timer */
+	tmr_counter_enable(pwm_timer, TRUE);
+}
+
+
+void pwm_start(void){
+	pwm_update_duty(FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2, FOC_PWM_Half_Period/2);
+	pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1);
+	/* wait for a new PWM period to flush last HF task */
+	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+
+	tmr_event_sw_trigger(pwm_timer, TMR_OVERFLOW_SWTRIG);
+	while ( tmr_flag_get(pwm_timer, TMR_OVF_FLAG) == RESET ){}
+	/* Clear Update Flag */
+	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+
+	tmr_output_enable(pwm_timer, TRUE);
+}
+
+void pwm_stop(void){
+	tmr_output_enable(pwm_timer, FALSE);
+
+	tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, FALSE);
+	/* wait for a new PWM period to flush last HF task */
+	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+	while ( tmr_flag_get(pwm_timer, TMR_OVF_FLAG) == RESET ){}
+	/* Clear Update Flag */
+	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+}
+
+void pwm_enable_output(bool enable) {
+	if (enable) {
+		tmr_output_enable(pwm_timer,TRUE);
+	}else {
+		tmr_output_enable(pwm_timer,FALSE);
+	}
+}
+
+/*open low side of the mosfet*/
+void pwm_turn_on_low_side(void)
+{
+	pwm_update_duty(0, 0, 0);
+	pwm_update_2smaples(FOC_PWM_Half_Period-1, FOC_PWM_Half_Period + 1);
+	tmr_flag_clear(pwm_timer, TMR_OVF_FLAG);
+	tmr_event_sw_trigger(pwm_timer, TMR_OVERFLOW_SWTRIG);
+  	while ( tmr_flag_get(pwm_timer, TMR_OVF_FLAG) == RESET ){}
+  	/* Main PWM Output Enable */
+  	tmr_output_enable(pwm_timer,TRUE);
+}
+
+void pwm_update_sample(u32 samp1, u32 samp2, u8 sector) {
+	if (samp1 < FOC_PWM_Half_Period) {
+		update_adc_trigger(samp1);
+		pwm_change_t3_mode(TMR_OUTPUT_CONTROL_PWM_MODE_B);
+	}else {
+		update_adc_trigger(samp2);
+		pwm_change_t3_mode(TMR_OUTPUT_CONTROL_PWM_MODE_A);
+	}
+	adc_current_sample_config(sector);
+}

Applications/bsp/at32/pwm.h

@@ -0,0 +1,98 @@
+#ifndef _PWM_H__
+#define _PWM_H__
+#include "bsp/bsp.h"
+#include "os/os_types.h"
+
+#define TIMER_CHCTL2_CH0EN               BIT(0)              /*!< channel 0 capture/compare function enable */
+#define TIMER_CHCTL2_CH0NEN              BIT(2)              /*!< channel 0 complementary output enable */
+#define TIMER_CHCTL2_CH1EN               BIT(4)              /*!< channel 1 capture/compare function enable  */
+#define TIMER_CHCTL2_CH1NEN              BIT(6)              /*!< channel 1 complementary output enable */
+#define TIMER_CHCTL2_CH2EN               BIT(8)              /*!< channel 2 capture/compare function enable  */
+#define TIMER_CHCTL2_CH2NEN              BIT(10)             /*!< channel 2 complementary output enable */
+#define TIMER_CHCTL2_CH3EN               BIT(12)             /*!< channel 3 capture/compare function enable  */
+
+#define TIMxCCER_MASK_CH012        ((uint16_t)  (TIMER_CHCTL2_CH0EN|TIMER_CHCTL2_CH0NEN|\
+                                                 TIMER_CHCTL2_CH1EN|TIMER_CHCTL2_CH1NEN|\
+                                                 TIMER_CHCTL2_CH2EN|TIMER_CHCTL2_CH2NEN))
+
+#define pwm_enable_channel() {pwm_timer->cctrl |= TIMxCCER_MASK_CH012;}
+#define pwm_disable_channel() {pwm_timer->cctrl &= ~TIMxCCER_MASK_CH012;}
+
+
+#define ch0_update_duty(duty) 	pwm_timer->c1dt = (uint32_t)duty
+#define ch1_update_duty(duty) 	pwm_timer->c2dt = (uint32_t)duty
+#define ch2_update_duty(duty) 	pwm_timer->c3dt = (uint32_t)duty
+#define update_adc_trigger(time) pwm_timer->c4dt = (uint32_t)time
+
+#ifdef CONFIG_PWM_UV_SWAP
+#define pwm_update_duty(dutyA, dutyB, dutyC) \
+	do {\
+		ch0_update_duty(dutyC);\
+		ch1_update_duty(dutyB);\
+		ch2_update_duty(dutyA);\
+	}while(0)
+
+#else
+#define pwm_update_duty(dutyA, dutyB, dutyC) \
+	do {\
+		ch0_update_duty(dutyA);\
+		ch1_update_duty(dutyB);\
+		ch2_update_duty(dutyC);\
+	}while(0)
+
+#endif
+
+#define pwm_update_2smaples(samp1, sampl2) \
+	do { \
+		pwm_timer->c4dt = (uint32_t)samp1; \
+	}while(0)
+
+
+#define pwm_clear_updata() \
+	tmr_flag_clear(pwm_timer, TMR_OVF_INT);
+
+#define pwm_wait_and_clear_updata() \
+	do { \
+		while ( tmr_flag_get(pwm_timer, TMR_OVF_INT) == RESET ); \
+		timer_flag_clear(pwm_timer, TMR_OVF_INT); \
+	}while(0)
+
+#define pwm_change_t3_mode(m) \
+	do { \
+		if (pwm_timer->cm2_output_bit.c4octrl != m) { \
+			pwm_timer->cm2_output_bit.c4octrl = m; \
+		} \
+	}while(0)
+
+#define pwm_brake_enable(n) \
+	do { \
+		if (n) { \
+			nvic_irq_enable(TMR1_BRK_TMR9_IRQn, EBREAK_IRQ_PRIORITY, 0); \
+		}else { \
+			nvic_irq_disable(TMR1_BRK_TMR9_IRQn); \
+		} \
+	}while(0)
+
+#define pwm_up_enable(n) \
+	do { \
+		if (n) { \
+			tmr_flag_clear(pwm_timer, TMR_OVF_INT); \
+			tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, TRUE); \
+		}else { \
+			tmr_flag_clear(pwm_timer, TMR_OVF_INT); \
+			tmr_interrupt_enable(pwm_timer, TMR_OVF_INT, FALSE); \
+		} \
+	}while(0)
+
+#define get_deadtime() (pwm_timer->brk_bit.dtc)
+
+void pwm_3phase_init(void);
+void pwm_3phase_sides(bool hon, bool lon);
+void pwm_start(void);
+void pwm_stop(void);
+void pwm_turn_on_low_side(void);
+void pwm_enable_output(bool enable);
+void pwm_update_sample(u32 samp1, u32 samp2, u8 sector);
+
+#endif  /*_PWM_H__*/
+

Applications/bsp/at32/sched_timer.c

@@ -0,0 +1,25 @@
+#include "bsp/bsp_driver.h"
+
+void sched_timer_enable(u32 us) {
+
+    crm_periph_clock_enable(SCHED_TIMER_RCU, TRUE);
+
+    tmr_reset(SCHED_TIMER);
+
+	tmr_base_init(SCHED_TIMER, us-1, TIM_CLOCK_MHz-1);
+	tmr_cnt_dir_set(SCHED_TIMER, TMR_COUNT_UP);
+	tmr_clock_source_div_set(SCHED_TIMER, TMR_CLOCK_DIV1);
+	tmr_counter_value_set(SCHED_TIMER, 0);
+
+	tmr_flag_clear(SCHED_TIMER, TMR_OVF_FLAG);
+	tmr_interrupt_enable(SCHED_TIMER, TMR_OVF_INT, TRUE);
+	nvic_irq_enable(SCHED_TIMER_IRQ, SCHED_TIMER_IRQ_PRIORITY, 0);
+	tmr_counter_enable(SCHED_TIMER, TRUE);
+}
+__weak void Sched_MC_mTask(void) {}
+void SCHED_TIMER_IRQHandler(void) {
+	if(SET == tmr_flag_get(SCHED_TIMER, TMR_OVF_FLAG)) {
+		tmr_flag_clear(SCHED_TIMER, TMR_OVF_FLAG);
+		Sched_MC_mTask();
+	}
+}

Applications/bsp/at32/sched_timer.h

@@ -0,0 +1,8 @@
+#ifndef _Sched_Timer_H__
+#define _Sched_Timer_H__
+#include "bsp/bsp.h"
+#include "os/os_types.h"
+
+void sched_timer_enable(u32 us);
+
+#endif /* _Sched_Timer_H__ */

Applications/bsp/at32/uart.c

@@ -0,0 +1,478 @@
+#include "uart.h"
+#include "os/os_task.h"
+#include "libs/crc16.h"
+#include "libs/logger.h"
+#include "libs/utils.h"
+
+#define SHARK_UART_BAUDRATE				230400
+
+#ifdef DEBUG_PORT_UART1
+#define SHARK_UART0_com					USART1
+#define SHARK_UART0_tx_port				GPIOA
+#define SHARK_UART0_tx_pin				GPIO_PIN_2
+#define SHARK_UART0_rx_port				GPIOA
+#define SHARK_UART0_rx_pin				GPIO_PIN_3
+#define SHARK_UART0_irq					USART1_IRQn
+#define SHARK_UART0_clk					RCU_USART1
+#define SHARK_UART0_tx_gpio_clk			RCU_GPIOA
+#define SHARK_UART0_rx_gpio_clk			RCU_GPIOA
+#define SHARK_UART0_tx_dma				DMA0
+#define SHARK_UART0_tx_dma_ch			DMA_CH6
+#define SHARK_UART0_tx_dma_clk			RCU_DMA0
+#define SHARK_UART0_rx_dma				DMA0
+#define SHARK_UART0_rx_dma_ch			DMA_CH5
+#define SHARK_UART0_rx_dma_clk			RCU_DMA0
+#define SHARK_UART0_DMA_TX_IRQ          DMA0_Channel6_IRQn
+#define UART_DMA_IRQHandler             DMA0_Channel6_IRQHandler
+#else
+#define SHARK_UART0_com					USART3
+#define SHARK_UART0_tx_port				GPIOB
+#define SHARK_UART0_tx_pin				GPIO_PINS_10
+#define SHARK_UART0_rx_port				GPIOB
+#define SHARK_UART0_rx_pin				GPIO_PINS_11
+#define SHARK_UART0_irq					USART3_IRQn
+#define SHARK_UART0_clk					CRM_USART3_PERIPH_CLOCK
+#define SHARK_UART0_tx_gpio_clk			CRM_GPIOB_PERIPH_CLOCK
+#define SHARK_UART0_rx_gpio_clk			CRM_GPIOB_PERIPH_CLOCK
+#define SHARK_UART0_tx_dma				DMA1
+#define SHARK_UART0_tx_dma_ch			DMA1_CHANNEL1
+#define SHARK_UART0_tx_dma_clk			CRM_DMA1_PERIPH_CLOCK
+#define SHARK_UART0_rx_dma				DMA1
+#define SHARK_UART0_rx_dma_ch			DMA1_CHANNEL2
+#define SHARK_UART0_rx_dma_clk			CRM_DMA1_PERIPH_CLOCK
+#define SHARK_UART0_DMA_TX_IRQ          DMA0_Channel1_IRQn
+#define UART_DMA_IRQHandler             DMA1_Channel2_IRQHandler
+#endif
+
+// ================================================================================
+#define ENABLE_RX_DMA 1
+static u8 shark_uart0_tx_cache[SHARK_UART_TX_MEM_SIZE];
+static u8 shark_uart0_rx_cache[SHARK_UART_RX_MEM_SIZE];
+
+static shark_uart_t _shark_uart[1];
+///static bool uart_no_data = false;
+#if ENABLE_RX_DMA==1
+#define update_dma_w_pos(uart) circle_update_write_position(&uart->rx_queue, SHARK_UART_RX_MEM_SIZE - SHARK_UART0_rx_dma_ch->dtcnt)
+#else
+#define update_dma_w_pos(uart){}
+#endif
+
+// ================================================================================
+static usart_type *_uart_index(usart_type* com){
+	return SHARK_UART0;
+}
+static bool shark_uart_on_rx_frame(shark_uart_t *uart)
+{
+	u16 crc0 = decode_u16(uart->rx_frame + uart->rx_length);
+	u16 crc1 = crc16_get(uart->rx_frame, uart->rx_length);
+
+	if (crc0 != crc1) {
+		return false;
+	}
+	//protocol_recv_frame(_uart_index(uart->uart_com), (char *)uart->rx_frame, uart->rx_length);
+	return true;
+}
+
+static void shark_uart_rx(shark_uart_t *uart){
+	while(1) {
+		u8 data = 0;
+		update_dma_w_pos(uart);
+		if (circle_get_one_data(&uart->rx_queue, &data) != 1) {
+			return;
+		}
+		switch(data){
+			case CH_START:
+				uart->rx_length = 0;
+				uart->escape = false;
+				uart->start = true;
+				break;
+			case CH_END:
+				if (uart->rx_length > 2 && uart->rx_length != 0xFFFF){
+					uart->rx_length -= 2; //skip crc
+					shark_uart_on_rx_frame(uart);
+				}
+				uart->rx_length = 0xFFFF;
+				uart->start = false;
+				break;
+			case CH_ESC:
+				uart->escape = true;
+				break;
+			default:
+				if (uart->escape) {
+					uart->escape = false;
+					switch (data) {
+						case CH_ESC_START:
+							data = CH_START;
+							break;
+
+						case CH_ESC_END:
+							data = CH_END;
+							break;
+
+						case CH_ESC_ESC:
+							data = CH_ESC;
+							break;
+
+						default:
+							data = 0xFF;
+					}
+				}
+
+				if (uart->rx_length < sizeof(uart->rx_frame)) {
+					uart->rx_frame[uart->rx_length] = data;
+					uart->rx_length++;
+				} else {
+					uart->rx_length = 0xFFFF;
+				}			
+		}
+	}
+}
+
+#define DMA_CHCTL(dma, dma_ch) ((dma_channel_type *)dma_ch)->ctrl
+#define DMA_CHMADDR(dma, dma_ch) ((dma_channel_type *)dma_ch)->maddr
+
+#define DMA_CHXCTL_CHEN        BIT(0)                  /*!< channel enable */
+
+static void shark_uart_dma_tx(shark_uart_t *uart)
+{
+	u32 value = DMA_CHCTL(SHARK_UART0_tx_dma, uart->tx_dma_ch);
+
+	if (value & DMA_CHXCTL_CHEN) {
+		if (SET != dma_flag_get(DMA1_FDT1_FLAG)) {
+			return;
+		}
+		dma_flag_clear(DMA1_FDT1_FLAG);
+		byte_queue_skip(&uart->tx_queue, uart->tx_length);
+		DMA_CHCTL(SHARK_UART0_tx_dma, uart->tx_dma_ch) = value & (~DMA_CHXCTL_CHEN);
+	}
+
+	uart->tx_length = byte_queue_peek(&uart->tx_queue);
+	if (uart->tx_length > 0) {
+		dma_data_number_set(uart->tx_dma_ch,  uart->tx_length);
+		DMA_CHMADDR(SHARK_UART0_tx_dma, uart->tx_dma_ch) = (u32) byte_queue_head(&uart->tx_queue);
+		DMA_CHCTL(SHARK_UART0_tx_dma, uart->tx_dma_ch) = value | DMA_CHXCTL_CHEN;
+	}
+}
+
+
+
+static void shark_uart_write(shark_uart_t *uart, const u8 *buff, u16 size)
+{
+	while (size > 0) {
+		u16 length = byte_queue_write(&uart->tx_queue, buff, size);
+
+		if (length == size) {
+			shark_uart_dma_tx(uart);
+			break;
+		}
+
+		shark_uart_dma_tx(uart);
+		buff += length;
+		size -= length;
+	}
+}
+
+static void shark_uart_write_byte(shark_uart_t *uart, u8 value)
+{
+	byte_queue_write(&uart->tx_queue, &value, 1);
+}
+
+
+void shark_uart_write_log(char *buffer){
+	int len = strlen(buffer);
+	shark_uart_t *uart = (_shark_uart+SHARK_UART0);
+	if (len > byte_queue_get_free(&uart->tx_queue)){
+		return;
+	}
+	byte_queue_write(&uart->tx_queue, (const u8 *)buffer, len);
+	shark_uart_dma_tx(uart);
+}
+
+static void shark_uart_tx_dma_init(shark_uart_t *uart){
+	dma_init_type dma_init_struct;
+	crm_periph_clock_enable(SHARK_UART0_tx_dma_clk, TRUE);
+	
+	dma_reset(uart->tx_dma_ch);
+	dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
+	dma_init_struct.memory_inc_enable = TRUE;
+	dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
+	dma_init_struct.peripheral_base_addr = (u32) &(((usart_type *)uart->uart_com)->dt);
+	dma_init_struct.peripheral_inc_enable = FALSE;
+	dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
+	dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
+	dma_init_struct.loop_mode_enable = FALSE;
+	dma_init(uart->tx_dma_ch, &dma_init_struct);
+	/* config flexible dma for usart2 tx */
+	dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_UART2_TX);
+
+	usart_dma_transmitter_enable(uart->uart_com, TRUE);
+}
+
+#if ENABLE_RX_DMA==1
+static void shark_uart_rx_dma_init(shark_uart_t *uart){
+	dma_init_type dma_init_struct;
+	crm_periph_clock_enable(SHARK_UART0_rx_dma_clk, TRUE);
+	/* dma1 channel2 for usart2 rx configuration */
+	dma_reset(uart->rx_dma_ch);
+	dma_default_para_init(&dma_init_struct);
+	dma_init_struct.buffer_size = SHARK_UART_RX_MEM_SIZE;
+	dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
+	dma_init_struct.memory_base_addr = (uint32_t)shark_uart0_rx_cache;
+	dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
+	dma_init_struct.memory_inc_enable = TRUE;
+	dma_init_struct.peripheral_base_addr = (u32) &(((usart_type *)uart->uart_com)->dt);
+	dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
+	dma_init_struct.peripheral_inc_enable = FALSE;
+	dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
+	dma_init_struct.loop_mode_enable = FALSE;
+	dma_init(uart->rx_dma_ch, &dma_init_struct);	
+	/* config flexible dma for usart2 rx */
+	dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_UART2_RX);
+
+	usart_dma_receiver_enable(uart->uart_com, TRUE);
+}
+#endif
+static void shark_uart_pin_init(shark_uart_t *uart){
+	crm_periph_clock_enable(SHARK_UART0_rx_gpio_clk, TRUE);
+	crm_periph_clock_enable(SHARK_UART0_tx_gpio_clk, TRUE);
+
+	gpio_init_type gpio_init_struct;
+	gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+	gpio_init_struct.gpio_out_type	= GPIO_OUTPUT_PUSH_PULL;
+	gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
+	gpio_init_struct.gpio_pins = SHARK_UART0_tx_pin;
+	gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+	gpio_init(SHARK_UART0_tx_port, &gpio_init_struct);
+	
+	/* configure the usart2 rx pin */
+	gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
+	gpio_init_struct.gpio_pins = SHARK_UART0_rx_pin;
+	gpio_init_struct.gpio_pull = GPIO_PULL_UP;
+	gpio_init(SHARK_UART0_rx_port, &gpio_init_struct);
+}
+
+static void shark_uart_pin_deinit(shark_uart_t *uart){
+	if (_uart_index(uart->uart_com) == SHARK_UART0) {
+		gpio_init_type gpio_init_struct;
+		gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+		gpio_init_struct.gpio_out_type	= GPIO_OUTPUT_PUSH_PULL;
+		gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
+		gpio_init_struct.gpio_pins = SHARK_UART0_tx_pin;
+		gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+		gpio_init(SHARK_UART0_tx_port, &gpio_init_struct);
+	
+		gpio_init_struct.gpio_pins = SHARK_UART0_rx_pin;
+		gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+		gpio_init(SHARK_UART0_rx_port, &gpio_init_struct);
+	}
+}
+
+
+static void shark_uart_device_init(shark_uart_t *uart){
+	crm_periph_clock_enable(SHARK_UART0_clk, TRUE);
+	usart_reset(uart->uart_com);
+	/* configure usart2 param */
+	usart_init(uart->uart_com, SHARK_UART_BAUDRATE, USART_DATA_8BITS, USART_STOP_1_BIT);
+	usart_transmitter_enable(uart->uart_com, TRUE);
+	usart_receiver_enable(uart->uart_com, TRUE);
+	usart_enable(uart->uart_com, TRUE);
+}
+
+static u32 shark_uart_task(void *args)
+{
+	shark_uart_t *uart = (shark_uart_t *)args;
+	if(uart->uart_com != 0) {
+		shark_uart_rx(uart);
+		shark_uart_dma_tx(uart);
+	}
+	return 0;
+}
+
+
+void shark_uart_flush(void){
+	shark_uart_t *uart = _shark_uart + SHARK_UART0;
+	if (uart->uart_com != 0) {
+		while(!byte_queue_empty(&uart->tx_queue)) {
+			shark_uart_dma_tx(uart);
+		}
+	}	
+}
+
+
+#if 0
+void DMA_Channel1_2_IRQHandler(void){
+	shark_uart_t *uart = _shark_uart + SHARK_UART0;
+	if (dma_interrupt_flag_get(uart->tx_dma_ch, DMA_INT_FLAG_FTF) != RESET){
+		shark_uart_dma_tx(uart);
+		dma_interrupt_flag_clear(uart->tx_dma_ch, DMA_INT_FLAG_FTF);
+	}
+}
+
+void DMA_Channel3_4_IRQHandler(void){
+	shark_uart_t *uart = _shark_uart + SHARK_UART1;
+	if (dma_interrupt_flag_get(uart->tx_dma_ch, DMA_INT_FLAG_FTF) != RESET){
+		shark_uart_dma_tx(uart);
+		dma_interrupt_flag_clear(uart->tx_dma_ch, DMA_INT_FLAG_FTF);
+	}
+}
+#endif
+
+static u8 *tx_cache_addr(uart_enum_t uart_no){
+	return shark_uart0_tx_cache;
+}
+
+static u8 *rx_cache_addr(uart_enum_t uart_no){
+	return shark_uart0_rx_cache;
+}
+
+
+void shark_uart_deinit(uart_enum_t uart_no){
+	shark_uart_t *uart = _shark_uart + uart_no;
+	if (uart->uart_com != 0) {
+		usart_enable(uart->uart_com, FALSE);
+		usart_reset(uart->uart_com);
+		crm_periph_clock_enable(SHARK_UART0_clk, FALSE);
+		dma_channel_enable(uart->rx_dma_ch, FALSE);
+		dma_channel_enable(uart->tx_dma_ch, FALSE);
+		crm_periph_clock_enable(SHARK_UART0_tx_dma_clk, FALSE);
+		crm_periph_clock_enable(SHARK_UART0_rx_dma_clk, FALSE);
+		shark_uart_pin_deinit(uart);
+	}
+#if ENABLE_RX_DMA==0
+	nvic_irq_disable(SHARK_UART0_irq);	
+#endif
+}
+
+
+bool shark_uart_timeout(void){
+#if UART_NUM==2	
+	return (_shark_uart[0].uart_no_data && _shark_uart[1].uart_no_data)?TRUE:FALSE;
+#else
+	return (_shark_uart[0].uart_no_data)?TRUE:FALSE;
+#endif
+}
+void shark_uart_init(uart_enum_t uart_no)
+{
+	shark_uart_t *uart = _shark_uart + uart_no;
+	uart->escape = false;
+	uart->rx_length = 0;
+	uart->tx_length = 0;
+	uart->uart_com = SHARK_UART0_com;
+
+	circle_buffer_init(&uart->rx_queue, rx_cache_addr(uart_no), SHARK_UART_RX_MEM_SIZE);
+	byte_queue_init(&uart->tx_queue,tx_cache_addr(uart_no), SHARK_UART_TX_MEM_SIZE);
+
+	uart->rx_dma_ch = SHARK_UART0_rx_dma_ch;
+	uart->tx_dma_ch = SHARK_UART0_tx_dma_ch;
+
+	shark_uart_pin_init(uart);
+	shark_uart_device_init(uart);
+#if ENABLE_RX_DMA==1
+	shark_uart_rx_dma_init(uart);
+#endif
+	shark_uart_tx_dma_init(uart);
+	usart_enable(uart->uart_com, TRUE);
+
+	shark_task_create(shark_uart_task, uart);
+#if ENABLE_RX_DMA==0
+	nvic_irq_enable(SHARK_UART0_irq, UART_IRQ_PRIORITY, 0);
+#endif
+	uart->uart_no_data = false;
+}
+
+#if ENABLE_RX_DMA==0
+void USART3_IRQHandler(void){
+	if(usart_flag_get(USART0, USART_FLAG_RBNE) == SET){
+		shark_uart_t *uart = _shark_uart + SHARK_UART0;
+		u8 c = usart_data_receive(USART0);
+		circle_put_one_data(&uart->rx_queue, c);
+	}
+}
+#endif
+
+
+void UART_DMA_IRQHandler(void) {
+	
+}
+
+static void shark_uart_write_byte_esc(shark_uart_t *uart, u8 value)
+{
+	switch (value) {
+	case CH_START:
+		shark_uart_write_byte(uart, CH_ESC);
+		value = CH_ESC_START;
+		break;
+
+	case CH_END:
+		shark_uart_write_byte(uart, CH_ESC);
+		value = CH_ESC_END;
+		break;
+
+	case CH_ESC:
+		shark_uart_write_byte(uart, CH_ESC);
+		value = CH_ESC_ESC;
+		break;
+	}
+
+	shark_uart_write_byte(uart, value);
+}
+
+static void shark_uart_write_esc(shark_uart_t *uart, const u8 *buff, u16 length)
+{
+	const u8 *buff_end;
+
+	for (buff_end = buff + length; buff < buff_end; buff++) {
+		shark_uart_write_byte_esc(uart, *buff);
+	}
+}
+
+static void shark_uart_tx_start(shark_uart_t *uart)
+{
+	shark_uart_write_byte(uart, CH_START);
+	uart->tx_crc16 = 0;
+}
+
+static void shark_uart_tx_continue(shark_uart_t *uart, const void *buff, u16 length)
+{
+	shark_uart_write_esc(uart, (const u8 *) buff, length);
+	uart->tx_crc16 = crc16_update(uart->tx_crc16, (const u8 *) buff, length);
+}
+
+static void shark_uart_tx_end(shark_uart_t *uart)
+{
+	shark_uart_write_esc(uart, (u8 *)&uart->tx_crc16, sizeof(uart->tx_crc16));
+	shark_uart_write_byte(uart, CH_END);
+}
+
+void shark_uart_write_frame(uart_enum_t uart_no, uint8_t *bytes, int len){
+	shark_uart_t *uart = _shark_uart + uart_no;
+	shark_uart_tx_start(uart);
+	shark_uart_tx_continue(uart, bytes, len);
+	shark_uart_tx_end(uart);
+	shark_uart_dma_tx(uart);
+}
+
+void shark_uart_frame_start(uart_enum_t uart_no, uint8_t *bytes, int len){
+	shark_uart_t *uart = _shark_uart + uart_no;
+	shark_uart_tx_start(uart);
+	shark_uart_tx_continue(uart, bytes, len);
+}
+
+void shark_uart_frame_continue(uart_enum_t uart_no, uint8_t *bytes, int len){
+	shark_uart_t *uart = _shark_uart + uart_no;
+	shark_uart_tx_continue(uart, bytes, len);
+}
+
+void shark_uart_frame_end(uart_enum_t uart_no){
+	shark_uart_tx_end(_shark_uart + uart_no);
+}
+
+void shark_uart_write_bytes(uart_enum_t uart_no, u8 *buff, u16 size){
+	shark_uart_write(_shark_uart + uart_no, buff, size);
+}
+
+int fputc(int c, FILE *fp){
+	shark_uart_write_byte(_shark_uart+SHARK_UART0, (u8)c);
+	return 1;
+}
+

Applications/bsp/at32/uart.h

@@ -0,0 +1,53 @@
+#pragma once
+#include "bsp/bsp.h"
+#include "os/os_task.h"
+#include "libs/byte_queue.h"
+#include "libs/circle_buffer.h"
+
+#define CH_START						0xF5
+#define CH_END							0xF6
+#define CH_ESC							0xF7
+#define CH_ESC_START					0x05
+#define CH_ESC_END						0x06
+#define CH_ESC_ESC						0x07
+
+#define SHARK_UART_TX_MEM_SIZE			(2 * 1024)
+#define SHARK_UART_RX_MEM_SIZE			512
+#define RX_FRAME_MAX_LEN 260
+#define RX_OLD_FRAME_MAX_LEN 256
+
+typedef enum {
+	SHARK_UART0 = 0,
+	SHARK_UART1,
+	SHARK_UART2,
+	SHARK_UART3,
+	SHARK_UART4,
+	SHARK_UART_COUNT
+} uart_enum_t;
+
+typedef struct {
+	byte_queue_t tx_queue;
+	c_buffer_t rx_queue;
+	dma_channel_type * rx_dma_ch;
+	dma_channel_type * tx_dma_ch;
+	uint16_t tx_length;
+	uint16_t tx_crc16;
+	usart_type *uart_com;//uart device
+	uint8_t rx_frame[RX_FRAME_MAX_LEN];
+	uint16_t rx_length;
+	bool escape;
+	bool start;
+	bool uart_no_data;
+}shark_uart_t;
+
+void shark_uart_init(uart_enum_t uart_no);
+void shark_uart_deinit(uart_enum_t uart_no);
+void shark_uart_write_frame(uart_enum_t uart_no, uint8_t *bytes, int len);
+void shark_uart_frame_start(uart_enum_t uart_no, uint8_t *bytes, int len);
+void shark_uart_frame_continue(uart_enum_t uart_no, uint8_t *bytes, int len);
+void shark_uart_frame_end(uart_enum_t uart_no);
+void shark_uart_write_bytes(uart_enum_t uart_no, u8 *buff, u16 size);
+void shark_uart_flush(void);
+bool shark_uart_timeout(void);
+void shark_uart_log(void);
+

Applications/bsp/bsp_driver.h

@@ -19,6 +19,19 @@
 #include "gd32e10x.h"
 #elif defined AT32F413RCT7
 #include "at32f413.h"
+#include "bsp/at32/gpio.h"
+//#include "bsp/at32/gd32_bkp.h"
+//#include "bsp/at32/gd32_rtc.h"
+#include "bsp/at32/can.h"
+//#include "bsp/at32/i2c.h"
+#include "bsp/at32/fmc_flash.h"
+#include "bsp/at32/can.h"
+#include "bsp/at32/pwm.h"
+#include "bsp/at32/adc.h"
+#include "bsp/at32/fan_pwm.h"
+#include "bsp/at32/enc_intf.h"
+#include "bsp/at32/sched_timer.h"
+#include "bsp/at32/uart.h"
 #endif
 #include "bsp/delay.h"
 

Applications/os/heap_4.c

@@ -38,7 +38,7 @@
 
 #define portBYTE_ALIGNMENT			8
 #define portBYTE_ALIGNMENT_MASK 	0x0007
-#define configTOTAL_HEAP_SIZE    (15*1024)
+#define configTOTAL_HEAP_SIZE    (10*1024)
 #define configASSERT(x)
 /* Block sizes must not get too small. */
 #define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )

Applications/os/os_types.h

@@ -7,6 +7,7 @@
 #include <stdbool.h>
 #include <math.h>
 
+#ifndef AT32F413RCT7
 #ifndef TRUE
 #define TRUE 1
 #endif
@@ -14,6 +15,8 @@
 #ifndef FALSE
 #define FALSE 0
 #endif
+#endif
+
 typedef uint8_t u8;
 typedef uint16_t u16;
 typedef uint32_t u24;

Librarys/AT32F41x_Drivers/inc/at32f413_tmr.h

@@ -655,7 +655,7 @@ typedef struct
     */
   union
   {
-    uint32_t cctrl;
+    __IO uint32_t cctrl;
     struct
     {
       __IO uint32_t c1en                 : 1; /* [0] */

Project/MC105AT_V3.uvoptx

@@ -0,0 +1,1068 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>AT32F413RC</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\Listings\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0AT32F413_256 -FL040000 -FS08000000 -FP0($$Device:-AT32F413RCT7$Flash\AT32F413_256.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
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Project/MC105AT_V3.uvprojx

@@ -0,0 +1,797 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>AT32F413RC</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>-AT32F413RCT7</Device>
+          <Vendor>ArteryTek</Vendor>
+          <PackID>ArteryTek.AT32F413_DFP.2.0.9</PackID>
+          <Cpu>IRAM(0x20000000,0x8000) IROM(0x08000000,0x40000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F413_256 -FS08000000 -FL040000 -FP0($$Device:-AT32F413RCT7$Flash\AT32F413_256.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:-AT32F413RCT7$Device\Include\at32f413.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:-AT32F413RCT7$SVD\AT32F413xx_v2.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\Objects\</OutputDirectory>
+          <OutputName>MC105AT</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\Listings\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>SharkFwVersion gen ..\Applications\version.h  .\version_mc105AT.cfg</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>1</RunUserProg2>
+            <UserProg1Name>fromelf --bin --output ./Output/MC105AT.bin ./Objects/MC105AT.axf</UserProg1Name>
+            <UserProg2Name>SharkFwVersion copy  ./Output/MC105AT.bin</UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> -REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> -MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x40000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x8000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>4</Optim>
+            <oTime>1</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>1</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>AT32F413RCT7,USE_STDPERIPH_DRIVER,BACK_TRACE,MC105_HW_V3,JTAG_DEBUG</Define>
+              <Undefine></Undefine>
+              <IncludePath>..\Librarys\CMSIS\Include,..\Librarys\CMSIS\AT32,..\Librarys\AT32F41x_Drivers\inc,..\Applications</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <ClangAsOpt>1</ClangAsOpt>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>app.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\app\app.c</FilePath>
+            </File>
+            <File>
+              <FileName>nv_storage.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\app\nv_storage.c</FilePath>
+            </File>
+            <File>
+              <FileName>factory.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\app\factory.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Foc</GroupName>
+          <Files>
+            <File>
+              <FileName>ramp_ctrl.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\core\ramp_ctrl.c</FilePath>
+            </File>
+            <File>
+              <FileName>commands.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\commands.c</FilePath>
+            </File>
+            <File>
+              <FileName>samples.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\samples.c</FilePath>
+            </File>
+            <File>
+              <FileName>e_ctrl.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\core\e_ctrl.c</FilePath>
+            </File>
+            <File>
+              <FileName>svpwm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\core\svpwm.c</FilePath>
+            </File>
+            <File>
+              <FileName>PMSM_FOC_Core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\core\PMSM_FOC_Core.c</FilePath>
+            </File>
+            <File>
+              <FileName>mc_error.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\mc_error.c</FilePath>
+            </File>
+            <File>
+              <FileName>limit.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\limit.c</FilePath>
+            </File>
+            <File>
+              <FileName>smo_observer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\core\smo_observer.c</FilePath>
+            </File>
+            <File>
+              <FileName>foc_observer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\core\foc_observer.c</FilePath>
+            </File>
+            <File>
+              <FileName>adrc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\core\adrc.c</FilePath>
+            </File>
+            <File>
+              <FileName>thro_torque.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\core\thro_torque.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Motor</GroupName>
+          <Files>
+            <File>
+              <FileName>encoder.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\motor\encoder.c</FilePath>
+            </File>
+            <File>
+              <FileName>motor.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\motor\motor.c</FilePath>
+            </File>
+            <File>
+              <FileName>ntc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\ntc.c</FilePath>
+            </File>
+            <File>
+              <FileName>current_ics.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\motor\current_ics.c</FilePath>
+            </File>
+            <File>
+              <FileName>motor_param.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\foc\motor\motor_param.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Proto</GroupName>
+          <Files>
+            <File>
+              <FileName>can_message.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\prot\can_message.c</FilePath>
+            </File>
+            <File>
+              <FileName>wait_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\prot\wait_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>can_pc_message.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\prot\can_pc_message.c</FilePath>
+            </File>
+            <File>
+              <FileName>can_foc_msg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\prot\can_foc_msg.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Math</GroupName>
+          <Files>
+            <File>
+              <FileName>fast_math.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\math\fast_math.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin_table.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\math\sin_table.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_cortexM4lf_math.lib</FileName>
+              <FileType>4</FileType>
+              <FilePath>..\Applications\math\arm_cortexM4lf_math.lib</FilePath>
+            </File>
+            <File>
+              <FileName>Fir.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\math\Fir.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>BSP</GroupName>
+          <Files>
+            <File>
+              <FileName>delay.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\delay.c</FilePath>
+            </File>
+            <File>
+              <FileName>adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>bsp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\bsp.c</FilePath>
+            </File>
+            <File>
+              <FileName>can.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\can.c</FilePath>
+            </File>
+            <File>
+              <FileName>enc_intf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\enc_intf.c</FilePath>
+            </File>
+            <File>
+              <FileName>fan_pwm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\fan_pwm.c</FilePath>
+            </File>
+            <File>
+              <FileName>fmc_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\fmc_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>mc_irqs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\mc_irqs.c</FilePath>
+            </File>
+            <File>
+              <FileName>pwm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\pwm.c</FilePath>
+            </File>
+            <File>
+              <FileName>sched_timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\sched_timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\bsp\at32\uart.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Libs</GroupName>
+          <Files>
+            <File>
+              <FileName>circle_buffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\libs\circle_buffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>logger.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\libs\logger.c</FilePath>
+            </File>
+            <File>
+              <FileName>crc16.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\libs\crc16.c</FilePath>
+            </File>
+            <File>
+              <FileName>byte_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\libs\byte_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>time_measure.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\libs\time_measure.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>OS</GroupName>
+          <Files>
+            <File>
+              <FileName>heap_4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\os\heap_4.c</FilePath>
+            </File>
+            <File>
+              <FileName>queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\os\queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>os_task.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Applications\os\os_task.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>AT32F4xx_Drivers</GroupName>
+          <Files>
+            <File>
+              <FileName>at32f413_acc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_acc.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_bpr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_bpr.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_can.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_can.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_debug.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_debug.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_exint.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_exint.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_misc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_misc.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_pwc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_pwc.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_rtc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_rtc.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_tmr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_tmr.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_usart.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_wdt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_wdt.c</FilePath>
+            </File>
+            <File>
+              <FileName>at32f413_crm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\AT32F41x_Drivers\src\at32f413_crm.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>StartUp</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_at32f413.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\Librarys\CMSIS\AT32\startup\mdk\startup_at32f413.s</FilePath>
+            </File>
+            <File>
+              <FileName>system_at32f413.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\Librarys\CMSIS\AT32\system_at32f413.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+  <LayerInfo>
+    <Layers>
+      <Layer>
+        <LayName>&lt;Project Info&gt;</LayName>
+        <LayDesc></LayDesc>
+        <LayUrl></LayUrl>
+        <LayKeys></LayKeys>
+        <LayCat></LayCat>
+        <LayLic></LayLic>
+        <LayTarg>0</LayTarg>
+        <LayPrjMark>1</LayPrjMark>
+      </Layer>
+    </Layers>
+  </LayerInfo>
+
+</Project>

Project/version_mc105AT.cfg

@@ -0,0 +1,3 @@
+project: MC105AT
+version: 01
+debug: 0