add at32 motor evk board

Signed-off-by: kevin <huhui@sharkgulf.com>

Applications/bsp/at32/board_at32_mc.h

@@ -0,0 +1,193 @@
+#ifndef _BOARD_AT32_MC_H__
+#define _BOARD_AT32_MC_H__
+
+#define CONFIG_HW_MAX_DC_CURRENT 10.0f
+#define CONFIG_HW_MAX_CHRG_CURRENT (-10.0f)
+#define CONFIG_HW_MAX_MOTOR_RPM      9000.0f
+#define CONFIG_HW_MAX_PHASE_CURR   45.0F
+#define CONFIG_HW_MAX_PHASE_VOL    50.0f
+#define CONFIG_MAX_TORQUE       CONFIG_HW_MAX_PHASE_CURR
+#define CONFIG_MAX_LOCK_TORQUE  30
+#define CONFIG_MAX_ACTIVE_EMF   5000.0F
+#define CONFIG_STALL_MAX_CURRENT 40.0f //最大堵转相电流电流
+#define CONFIG_STALL_MAX_TIME    3000   //ms, 超过最大堵转电流持续时间，判断堵转
+
+#define CONFIG_LADRC_OBSERVER
+//#define CONFIG_FORCE_HIGH_VOL_MODE
+#ifdef CONFIG_SENSORLESS_TOW_SAMPLES
+#define CONFIG_SENSORLESS_TS (FOC_CTRL_US/2.0f)
+#else
+#define CONFIG_SENSORLESS_TS FOC_CTRL_US
+#endif
+
+//#define CONFIG_FORCE_HIGH_VOL_MODE 1
+
+#define SCHED_TIMER TMR5
+#define SCHED_TIMER_RCU CRM_TMR5_PERIPH_CLOCK
+#define SCHED_TIMER_IRQ TMR5_GLOBAL_IRQn
+#define SCHED_TIMER_IRQHandler TMR5_GLOBAL_IRQHandler
+
+#define PWM_DEAD_TIME_NS 400u
+#define PWM_TOFF_DELAY_MAX 240u
+#define PWM_TON_DELAY_MIN 200u
+#define HW_DEAD_TIME_NS  210u
+#define HW_RISE_TIME_NS  150u
+#define HW_NOISE_TIME_NS 300u
+
+#define CONFIG_HW_DeadTime NS_2_TCLK(HW_DEAD_TIME_NS + PWM_DEAD_TIME_NS + (PWM_TOFF_DELAY_MAX - PWM_TON_DELAY_MIN))/* ����ʱ�� */
+#define TDead NS_2_TCLK(HW_DEAD_TIME_NS + PWM_DEAD_TIME_NS)/* ����ʱ�� */ 
+#define TRise NS_2_TCLK(HW_RISE_TIME_NS)/* MOS ����ʱ��*/
+#define TNoise NS_2_TCLK(HW_NOISE_TIME_NS)/* MOS��������Ŀ�������ʱ�� */
+#define TADC  ((uint16_t)((ADC_TRIG_CONV_LATENCY_CYCLES + ADC_SAMPLING_CYCLES) *2 * TIM_CLOCK_MHz) / ADC_CLOCK_MHz + 1u)/* ADC ����ʱ�� */
+#define TSampleMIN (TDead + TRise + TADC) //采样需要的总时间
+#define TSampleBefore (TDead + TRise) //采样开始前需要等待的时间
+
+#define ADC_REFERENCE_VOLTAGE  (3.3F)
+#define ADC_FULL_MAX          (4095.0F)
+
+/* MOS驱动 */
+#define MOS_PWM_TIMER 		TMR1
+#define PWM_MODE 		TMR_OUTPUT_CONTROL_PWM_MODE_A
+#define PWM_CRM_CLK     CRM_TMR1_PERIPH_CLOCK
+#define PWM_U_P_GROUP 	GPIOA
+#define PWM_U_P_PIN 	GPIO_PINS_8
+#define PWM_U_P_RCU 	CRM_GPIOA_PERIPH_CLOCK
+#define PWM_U_P_MODE 	GPIO_MODE_MUX
+
+#define PWM_U_N_GROUP 	GPIOB
+#define PWM_U_N_PIN 	GPIO_PINS_13
+#define PWM_U_N_RCU 	CRM_GPIOB_PERIPH_CLOCK
+#define PWM_U_N_MODE 	GPIO_MODE_MUX
+
+#define PWM_V_P_GROUP 	GPIOA
+#define PWM_V_P_PIN 	GPIO_PINS_9
+#define PWM_V_P_RCU 	CRM_GPIOA_PERIPH_CLOCK
+#define PWM_V_P_MODE 	GPIO_MODE_MUX
+
+#define PWM_V_N_GROUP 	GPIOB
+#define PWM_V_N_PIN 	GPIO_PINS_14
+#define PWM_V_N_RCU 	CRM_GPIOB_PERIPH_CLOCK
+#define PWM_V_N_MODE 	GPIO_MODE_MUX
+
+#define PWM_W_P_GROUP 	GPIOA
+#define PWM_W_P_PIN 	GPIO_PINS_10
+#define PWM_W_P_RCU 	CRM_GPIOA_PERIPH_CLOCK
+#define PWM_W_P_MODE 	GPIO_MODE_MUX
+
+#define PWM_W_N_GROUP 	GPIOB
+#define PWM_W_N_PIN 	GPIO_PINS_15
+#define PWM_W_N_RCU 	CRM_GPIOB_PERIPH_CLOCK
+#define PWM_W_N_MODE 	GPIO_MODE_MUX
+
+#define PWM_BRAKE_GROUP GPIOB
+#define PWM_BRAKE_PIN 	GPIO_PINS_12
+#define PWM_BRAKE_RCU 	CRM_GPIOB_PERIPH_CLOCK
+#define PWM_BRAKE_MODE 	GPIO_MODE_INPUT
+
+
+#define CONFIG_CURRENT_SENSOR_CEOF (ADC_REFERENCE_VOLTAGE/ADC_FULL_MAX/16.5F/0.002F) ///(3.3/4095/16.5/0.002)
+
+/* 高边电流传感器采样 */
+#define HIGH_SIDE_CURRENT_SENSOR
+
+#define U_PHASE_I_CHAN				ADC_CHANNEL_0
+#define V_PHASE_I_CHAN  			ADC_CHANNEL_1
+#define W_PHASE_I_CHAN  			ADC_CHANNEL_2
+
+#define U_PHASE_ADC_GROUP 			GPIOA
+#define U_PHASE_ADC_PIN 			GPIO_PINS_0
+#define U_PHASE_ADC_RCU 			CRM_GPIOA_PERIPH_CLOCK
+#define U_PHASE_ADC_MODE 			GPIO_MODE_ANALOG
+
+#define V_PHASE_ADC_GROUP 			GPIOA
+#define V_PHASE_ADC_PIN 			GPIO_PINS_1
+#define V_PHASE_ADC_RCU 			CRM_GPIOA_PERIPH_CLOCK
+#define V_PHASE_ADC_MODE 			GPIO_MODE_ANALOG
+
+#define W_PHASE_ADC_GROUP 			GPIOA
+#define W_PHASE_ADC_PIN 			GPIO_PINS_2
+#define W_PHASE_ADC_RCU 			CRM_GPIOA_PERIPH_CLOCK
+#define W_PHASE_ADC_MODE 			GPIO_MODE_ANALOG
+
+#define ADC_TO_CURR_ceof  			(CONFIG_CURRENT_SENSOR_CEOF)
+
+#define CONFIG_PWM_UV_SWAP 		   	1
+
+//#define CONFIG_HW_MUTISAMPLE ADC_OVERSAMPLING_RATIO_MUL8
+//#define CONFIG_HW_MUTISAMPLE_SHIFT ADC_OVERSAMPLING_SHIFT_3B
+//#define CONFIG_SW_MUTISAMPLE 1
+
+/* 母线电压采集 */
+#define VBUS_V_CHAN 				ADC_CHANNEL_7  //adc012
+#define VBUS_V_ADC_GROUP 			GPIOA
+#define VBUS_V_ADC_PIN 				GPIO_PINS_7
+#define VBUS_V_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define VBUS_V_ADC_MODE 			GPIO_MODE_ANALOG
+#define VBUS_VOL_CEOF 				(ADC_REFERENCE_VOLTAGE*(3.9F + 180.0F)/ADC_FULL_MAX)
+
+#define VBUS_I_CHAN 				ADC_CHANNEL_3 //adc012
+#define VBUS_I_ADC_GROUP 			GPIOA
+#define VBUS_I_ADC_PIN 				GPIO_PINS_3
+#define VBUS_I_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define VBUS_I_ADC_MODE 			GPIO_MODE_ANALOG
+#define VBUS_I_CEOF         		(ADC_REFERENCE_VOLTAGE/ADC_FULL_MAX/9.85F/0.005F)
+
+#define CONFIG_VBUS_I_POSITIVE     	1
+
+/* MOS 温度采集 */
+#define MOS_TEMP_ADC_CHAN    		ADC_CHANNEL_9
+#define MOS_TEMP_ADC_GROUP 	 		GPIOB
+#define MOS_TEMP_ADC_PIN 	 		GPIO_PINS_1
+#define MOS_TEMP_ADC_RCU 	 		CRM_GPIOB_PERIPH_CLOCK
+#define MOS_TEMP_ADC_MODE 	 		GPIO_MODE_ANALOG
+#define MOS_TEMP_R(adc) 			((adc)/ADC_FULL_MAX / ((1.0f - (adc)/ADC_FULL_MAX)/(10.0f*1000.0f)))
+
+/* 是否有母线电流采集 */
+//#define NO_SAMPLE_IDC //如果硬件没有采集母线电流，定义一下
+
+/* 转把信号电压采集 */
+#define THROTTLE_CHAN           	ADC_CHANNEL_10
+#define THROTTLE_V_ADC_GROUP 		GPIOC
+#define THROTTLE_V_ADC_PIN 			GPIO_PINS_0
+#define THROTTLE_V_ADC_RCU 			CRM_GPIOC_PERIPH_CLOCK
+#define THROTTLE_V_ADC_MODE 		GPIO_MODE_ANALOG
+#define THROTTLE_VOL_CEOF 			(ADC_REFERENCE_VOLTAGE/ADC_FULL_MAX)
+
+/* UVW三相对地电压采集 */
+#define U_VOL_ADC_CHAN     			ADC_CHANNEL_4
+#define U_VOL_ADC_GROUP 			GPIOA
+#define U_VOL_ADC_PIN 				GPIO_PINS_5
+#define U_VOL_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define U_VOL_ADC_MODE 				GPIO_MODE_ANALOG
+
+#define V_VOL_ADC_CHAN     			ADC_CHANNEL_5 //adc012
+#define V_VOL_ADC_GROUP 			GPIOA
+#define V_VOL_ADC_PIN 				GPIO_PINS_1
+#define V_VOL_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define V_VOL_ADC_MODE 				GPIO_MODE_ANALOG
+
+#define W_VOL_ADC_CHAN     			ADC_CHANNEL_6 //adc012
+#define W_VOL_ADC_GROUP 			GPIOA
+#define W_VOL_ADC_PIN 				GPIO_PINS_2
+#define W_VOL_ADC_RCU 				CRM_GPIOA_PERIPH_CLOCK
+#define W_VOL_ADC_MODE 				GPIO_MODE_ANALOG
+#define UVW_VOL_CEOF 				(ADC_REFERENCE_VOLTAGE*((37.4F + 3.9F)/3.9F)/ADC_FULL_MAX)
+
+/* 霍尔3线 */
+#define HALL1_PIN					GPIO_PINS_4
+#define HALL2_PIN					GPIO_PINS_5
+#define HALL3_PIN					GPIO_PINS_0
+#define HALL1_PIN_GROUP				GPIOB
+#define HALL2_PIN_GROUP				GPIOB
+#define HALL3_PIN_GROUP				GPIOB
+#define HALL1_PIN_RCU				CRM_GPIOB_PERIPH_CLOCK
+#define HALL2_PIN_RCU				CRM_GPIOB_PERIPH_CLOCK
+#define HALL3_PIN_RCU				CRM_GPIOB_PERIPH_CLOCK
+#define HALL_TIMER 					TMR3
+#define HALL_TIMER_RCU				CRM_TMR3_PERIPH_CLOCK
+//#define CONFIG_DQ_STEP_RESPONSE
+
+#endif /*_BOARD_AT32_MC_H__ */
+
+
+

Applications/bsp/at32/board_at_mc105_v3.h

@@ -1,10 +1,5 @@
 #ifndef _BOARD_MC_V3_H__
 #define _BOARD_MC_V3_H__
-#if defined (GD32F30X_HD) || defined (GD32F30X_XD) || defined (GD32F30X_CL)
-#include "gd32f30x.h"
-#elif defined GD32E10x
-#include "gd32e10x.h"
-#endif
 
 #define CONFIG_MOS_MAX_VOL 145.0F
 #define CONFIG_HW_MAX_DC_VOLTAGE 110.0F

Applications/bsp/at32/uart.c

@@ -4,34 +4,17 @@
 #include "libs/logger.h"
 #include "libs/utils.h"
 
-#define SHARK_UART_BAUDRATE				230400
+#define SHARK_UART_BAUDRATE				500000
 
-#ifdef DEBUG_PORT_UART1
 #define SHARK_UART0_com					USART1
-#define SHARK_UART0_tx_port				GPIOA
-#define SHARK_UART0_tx_pin				GPIO_PIN_2
-#define SHARK_UART0_rx_port				GPIOA
-#define SHARK_UART0_rx_pin				GPIO_PIN_3
-#define SHARK_UART0_irq					USART1_IRQn
-#define SHARK_UART0_clk					RCU_USART1
-#define SHARK_UART0_tx_gpio_clk			RCU_GPIOA
-#define SHARK_UART0_rx_gpio_clk			RCU_GPIOA
-#define SHARK_UART0_tx_dma				DMA0
-#define SHARK_UART0_tx_dma_ch			DMA_CH6
-#define SHARK_UART0_tx_dma_clk			RCU_DMA0
-#define SHARK_UART0_rx_dma				DMA0
-#define SHARK_UART0_rx_dma_ch			DMA_CH5
-#define SHARK_UART0_rx_dma_clk			RCU_DMA0
-#define SHARK_UART0_DMA_TX_IRQ          DMA0_Channel6_IRQn
-#define UART_DMA_IRQHandler             DMA0_Channel6_IRQHandler
-#else
-#define SHARK_UART0_com					USART3
 #define SHARK_UART0_tx_port				GPIOB
-#define SHARK_UART0_tx_pin				GPIO_PINS_10
+#define SHARK_UART0_tx_pin				GPIO_PINS_6
 #define SHARK_UART0_rx_port				GPIOB
-#define SHARK_UART0_rx_pin				GPIO_PINS_11
-#define SHARK_UART0_irq					USART3_IRQn
-#define SHARK_UART0_clk					CRM_USART3_PERIPH_CLOCK
+#define SHARK_UART0_rx_pin				GPIO_PINS_7
+#define SHARK_UART0_IOMUX               USART1_GMUX_0001
+
+#define SHARK_UART0_irq					USART0_IRQn
+#define SHARK_UART0_clk					CRM_USART1_PERIPH_CLOCK
 #define SHARK_UART0_tx_gpio_clk			CRM_GPIOB_PERIPH_CLOCK
 #define SHARK_UART0_rx_gpio_clk			CRM_GPIOB_PERIPH_CLOCK
 #define SHARK_UART0_tx_dma				DMA1
@@ -40,9 +23,13 @@
 #define SHARK_UART0_rx_dma				DMA1
 #define SHARK_UART0_rx_dma_ch			DMA1_CHANNEL3
 #define SHARK_UART0_rx_dma_clk			CRM_DMA1_PERIPH_CLOCK
-#define SHARK_UART0_DMA_TX_IRQ          DMA0_Channel3_IRQn
-#define UART_DMA_IRQHandler             DMA1_Channel3_IRQHandler
-#endif
+#define DMA_UART_TX_FLEX_CHANNEL		FLEX_CHANNEL2
+#define DMA_UART_TX_FLEX				DMA_FLEXIBLE_UART1_TX
+#define DMA_UART_RX_FLEX_CHANNEL		FLEX_CHANNEL3
+#define DMA_UART_RX_FLEX				DMA_FLEXIBLE_UART1_RX
+#define DMA_UART_TX_FDT_FLAG          DMA1_FDT2_FLAG
+#define SHARK_UART_DMA_CHCNT_RX() (SHARK_UART0_rx_dma_ch->dtcnt)
+
 
 // ================================================================================
 #define ENABLE_RX_DMA 1
@@ -61,6 +48,12 @@ static shark_uart_t _shark_uart[1];
 static usart_type *_uart_index(usart_type* com){
 	return SHARK_UART0;
 }
+
+__weak void shark_uart_on_frame_received(u8 *data, u16 lenght){
+
+}
+
+
 static bool shark_uart_on_rx_frame(shark_uart_t *uart)
 {
 	u16 crc0 = decode_u16(uart->rx_frame + uart->rx_length);
@@ -69,17 +62,13 @@ static bool shark_uart_on_rx_frame(shark_uart_t *uart)
 	if (crc0 != crc1) {
 		return false;
 	}
-	//protocol_recv_frame(_uart_index(uart->uart_com), (char *)uart->rx_frame, uart->rx_length);
+	shark_uart_on_frame_received(uart->rx_frame, uart->rx_length);
 	return true;
 }
 
-static void shark_uart_rx(shark_uart_t *uart){
-	while(1) {
-		u8 data = 0;
-		update_dma_w_pos(uart);
-		if (circle_get_one_data(&uart->rx_queue, &data) != 1) {
-			return;
-		}
+static void shark_uart_rx_data(shark_uart_t *uart, u8 *buff, u16 size){
+	for (u8 *buff_end = buff + size; buff < buff_end; buff++) {
+		u8 data = *buff;
 		switch(data){
 			case CH_START:
 				uart->rx_length = 0;
@@ -128,9 +117,23 @@ static void shark_uart_rx(shark_uart_t *uart){
 	}
 }
 
+void shark_uart_dma_rx(shark_uart_t *uart)
+{
+	u16 index = uart->rx_index;
+
+	uart->rx_index = SHARK_UART_RX_MEM_SIZE - SHARK_UART_DMA_CHCNT_RX();
+
+	if (uart->rx_index < index) {
+		shark_uart_rx_data(uart, uart->rx_cache + index, SHARK_UART_RX_MEM_SIZE - index);
+		shark_uart_rx_data(uart, uart->rx_cache, uart->rx_index);
+	} else {
+		shark_uart_rx_data(uart, uart->rx_cache + index, uart->rx_index - index);
+	}
+}
+
+
 #define DMA_CHCTL(dma, dma_ch) ((dma_channel_type *)dma_ch)->ctrl
 #define DMA_CHMADDR(dma, dma_ch) ((dma_channel_type *)dma_ch)->maddr
-
 #define DMA_CHXCTL_CHEN        BIT(0)                  /*!< channel enable */
 
 static void shark_uart_dma_tx(shark_uart_t *uart)
@@ -138,10 +141,10 @@ static void shark_uart_dma_tx(shark_uart_t *uart)
 	u32 value = DMA_CHCTL(SHARK_UART0_tx_dma, uart->tx_dma_ch);
 
 	if (value & DMA_CHXCTL_CHEN) {
-		if (SET != dma_flag_get(DMA1_FDT1_FLAG)) {
+		if (SET != dma_flag_get(DMA_UART_TX_FDT_FLAG)) {
 			return;
 		}
-		dma_flag_clear(DMA1_FDT1_FLAG);
+		dma_flag_clear(DMA_UART_TX_FDT_FLAG);
 		byte_queue_skip(&uart->tx_queue, uart->tx_length);
 		DMA_CHCTL(SHARK_UART0_tx_dma, uart->tx_dma_ch) = value & (~DMA_CHXCTL_CHEN);
 	}
@@ -154,8 +157,6 @@ static void shark_uart_dma_tx(shark_uart_t *uart)
 	}
 }
 
-
-
 static void shark_uart_write(shark_uart_t *uart, const u8 *buff, u16 size)
 {
 	while (size > 0) {
@@ -202,8 +203,8 @@ static void shark_uart_tx_dma_init(shark_uart_t *uart){
 	dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
 	dma_init_struct.loop_mode_enable = FALSE;
 	dma_init(uart->tx_dma_ch, &dma_init_struct);
-	/* config flexible dma for usart2 tx */
-	//dma_flexible_config(DMA1, FLEX_CHANNEL1, DMA_FLEXIBLE_UART2_TX);
+  	/* config flexible dma for usart1 tx */
+  	dma_flexible_config(SHARK_UART0_tx_dma, DMA_UART_TX_FLEX_CHANNEL, DMA_UART_TX_FLEX);
 
 	usart_dma_transmitter_enable(uart->uart_com, TRUE);
 }
@@ -226,9 +227,8 @@ static void shark_uart_rx_dma_init(shark_uart_t *uart){
 	dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
 	dma_init_struct.loop_mode_enable = FALSE;
 	dma_init(uart->rx_dma_ch, &dma_init_struct);	
-	/* config flexible dma for usart2 rx */
-	//dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_UART2_RX);
-
+	/* config flexible dma for usart1 rx */
+	dma_flexible_config(SHARK_UART0_rx_dma, DMA_UART_RX_FLEX_CHANNEL, DMA_UART_RX_FLEX);
 	usart_dma_receiver_enable(uart->uart_com, TRUE);
 }
 #endif
@@ -249,6 +249,8 @@ static void shark_uart_pin_init(shark_uart_t *uart){
 	gpio_init_struct.gpio_pins = SHARK_UART0_rx_pin;
 	gpio_init_struct.gpio_pull = GPIO_PULL_UP;
 	gpio_init(SHARK_UART0_rx_port, &gpio_init_struct);
+	/* remap usart1 tx and rx pins */
+  	gpio_pin_remap_config(SHARK_UART0_IOMUX, TRUE);
 }
 
 static void shark_uart_pin_deinit(shark_uart_t *uart){
@@ -282,7 +284,7 @@ static u32 shark_uart_task(void *args)
 {
 	shark_uart_t *uart = (shark_uart_t *)args;
 	if(uart->uart_com != 0) {
-		shark_uart_rx(uart);
+		shark_uart_dma_rx(uart);
 		shark_uart_dma_tx(uart);
 	}
 	return 0;
@@ -299,24 +301,6 @@ void shark_uart_flush(void){
 }
 
 
-#if 0
-void DMA_Channel1_2_IRQHandler(void){
-	shark_uart_t *uart = _shark_uart + SHARK_UART0;
-	if (dma_interrupt_flag_get(uart->tx_dma_ch, DMA_INT_FLAG_FTF) != RESET){
-		shark_uart_dma_tx(uart);
-		dma_interrupt_flag_clear(uart->tx_dma_ch, DMA_INT_FLAG_FTF);
-	}
-}
-
-void DMA_Channel3_4_IRQHandler(void){
-	shark_uart_t *uart = _shark_uart + SHARK_UART1;
-	if (dma_interrupt_flag_get(uart->tx_dma_ch, DMA_INT_FLAG_FTF) != RESET){
-		shark_uart_dma_tx(uart);
-		dma_interrupt_flag_clear(uart->tx_dma_ch, DMA_INT_FLAG_FTF);
-	}
-}
-#endif
-
 static u8 *tx_cache_addr(uart_enum_t uart_no){
 	return shark_uart0_tx_cache;
 }
@@ -343,14 +327,6 @@ void shark_uart_deinit(uart_enum_t uart_no){
 #endif
 }
 
-
-bool shark_uart_timeout(void){
-#if UART_NUM==2	
-	return (_shark_uart[0].uart_no_data && _shark_uart[1].uart_no_data)?TRUE:FALSE;
-#else
-	return (_shark_uart[0].uart_no_data)?TRUE:FALSE;
-#endif
-}
 void shark_uart_init(uart_enum_t uart_no)
 {
 	shark_uart_t *uart = _shark_uart + uart_no;
@@ -358,8 +334,8 @@ void shark_uart_init(uart_enum_t uart_no)
 	uart->rx_length = 0;
 	uart->tx_length = 0;
 	uart->uart_com = SHARK_UART0_com;
+	uart->rx_cache = rx_cache_addr(uart_no);
 
-	circle_buffer_init(&uart->rx_queue, rx_cache_addr(uart_no), SHARK_UART_RX_MEM_SIZE);
 	byte_queue_init(&uart->tx_queue,tx_cache_addr(uart_no), SHARK_UART_TX_MEM_SIZE);
 
 	uart->rx_dma_ch = SHARK_UART0_rx_dma_ch;
@@ -391,10 +367,6 @@ void USART3_IRQHandler(void){
 #endif
 
 
-void UART_DMA_IRQHandler(void) {
-	
-}
-
 static void shark_uart_write_byte_esc(shark_uart_t *uart, u8 value)
 {
 	switch (value) {

Applications/bsp/at32/uart.h

@@ -11,10 +11,9 @@
 #define CH_ESC_END						0x06
 #define CH_ESC_ESC						0x07
 
-#define SHARK_UART_TX_MEM_SIZE			(2 * 1024)
-#define SHARK_UART_RX_MEM_SIZE			512
+#define SHARK_UART_TX_MEM_SIZE			(1024)
+#define SHARK_UART_RX_MEM_SIZE			(256+128)
 #define RX_FRAME_MAX_LEN 260
-#define RX_OLD_FRAME_MAX_LEN 256
 
 typedef enum {
 	SHARK_UART0 = 0,
@@ -27,7 +26,7 @@ typedef enum {
 
 typedef struct {
 	byte_queue_t tx_queue;
-	c_buffer_t rx_queue;
+	u8 * rx_cache;
 	dma_channel_type * rx_dma_ch;
 	dma_channel_type * tx_dma_ch;
 	uint16_t tx_length;
@@ -35,6 +34,7 @@ typedef struct {
 	usart_type *uart_com;//uart device
 	uint8_t rx_frame[RX_FRAME_MAX_LEN];
 	uint16_t rx_length;
+	u16      rx_index;
 	bool escape;
 	bool start;
 	bool uart_no_data;