    1/*

    2 * rtGetNaN.c

    3 *

    4 * Code generation for model "PWM_sf".

    5 *

    6 * Model version              : 1.825

    7 * Simulink Coder version : 9.4 (R2020b) 29-Jul-2020

    8 * C source code generated on : Fri Apr 14 12:53:29 2023

    9 *

    10 * Target selection: rtwsfcn.tlc

    11 * Note: GRT includes extra infrastructure and instrumentation for prototyping

    12 * Embedded hardware selection: ARM Compatible->ARM Cortex-M

    13 * Emulation hardware selection:

    14 *    Differs from embedded hardware (MATLAB Host)

    15 * Code generation objectives:

    16 *    1. Execution efficiency

    17 *    2. RAM efficiency

    18 * Validation result: Not run

    19 */

    20

    21/*

    22 * Abstract:

    23 *      Function to initialize non-finite, NaN

    24 */

    25#include "rtGetNaN.h"

    26#define NumBitsPerChar                 8U

    27

    28/*

    29 * Initialize rtNaN needed by the generated code.

    30 * NaN is initialized as non-signaling. Assumes IEEE.

    31 */

    32real_T rtGetNaN(void)

    33{

    34  size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);

    35  real_T nan = 0.0;

    36  if (bitsPerReal == 32U) {

    37    nan = rtGetNaNF();

    38  } else {

    39    uint16_T one = 1U;

    40    enum {

    41      LittleEndian,

    42      BigEndian

    43    } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian;

    44    switch (machByteOrder) {

    45     case LittleEndian:

    46      {

    47        union {

    48          LittleEndianIEEEDouble bitVal;

    49          real_T fltVal;

    50        } tmpVal;

    51

    52        tmpVal.bitVal.words.wordH = 0xFFF80000U;

    53        tmpVal.bitVal.words.wordL = 0x00000000U;

    54        nan = tmpVal.fltVal;

    55        break;

    56      }

    57

    58     case BigEndian:

    59      {

    60        union {

    61          BigEndianIEEEDouble bitVal;

    62          real_T fltVal;

    63        } tmpVal;

    64

    65        tmpVal.bitVal.words.wordH = 0x7FFFFFFFU;

    66        tmpVal.bitVal.words.wordL = 0xFFFFFFFFU;

    67        nan = tmpVal.fltVal;

    68        break;

    69      }

    70    }

    71  }

    72

    73  return nan;

    74}

    75

    76/*

    77 * Initialize rtNaNF needed by the generated code.

    78 * NaN is initialized as non-signaling. Assumes IEEE.

    79 */

    80real32_T rtGetNaNF(void)

    81{

    82  IEEESingle nanF = { { 0 } };

    83

    84  uint16_T one = 1U;

    85  enum {

    86    LittleEndian,

    87    BigEndian

    88  } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian;

    89  switch (machByteOrder) {

    90   case LittleEndian:

    91    {

    92      nanF.wordL.wordLuint = 0xFFC00000U;

    93      break;

    94    }

    95

    96   case BigEndian:

    97    {

    98      nanF.wordL.wordLuint = 0x7FFFFFFFU;

    99      break;

    100    }

    101  }

    102

    103  return nanF.wordL.wordLreal;

    104}

    105