1



2



3    /*



4  * rt_nonfinite.h



5  *



6    * Code generation for model "PWM_sf".



7  *



8  * Model version              : 1.825



9  * Simulink Coder version : 9.4 (R2020b) 29-Jul-2020



10  * C source code generated on : Fri Apr 14 12:53:29 2023



11 * 



12 * Target selection: rtwsfcn.tlc



13 * Note: GRT includes extra infrastructure and instrumentation for prototyping



14 * Embedded hardware selection: ARM Compatible->ARM Cortex-M



15 * Emulation hardware selection: 



16 *    Differs from embedded hardware (MATLAB Host)



17 * Code generation objectives: 



18 *    1. Execution efficiency



19 *    2. RAM efficiency



20 * Validation result: Not run



21  */



22



23



24  #ifndef RTW_HEADER_rt_nonfinite_h_



25  #define RTW_HEADER_rt_nonfinite_h_



26  



27



28    



29



30  



31#include <stddef.h>



32  #include "rtwtypes.h"



33



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67



68  extern real_T rtInf;



69



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72



73



74  extern real_T rtMinusInf;



75



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79



80  extern real_T rtNaN;



81



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85



86  extern real32_T rtInfF;



87



88



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90



91



92  extern real32_T rtMinusInfF;



93



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97



98  extern real32_T rtNaNF;



99



100



101



102    extern void rt_InitInfAndNaN(size_t realSize);



103      extern boolean_T rtIsInf(real_T value);



104      extern boolean_T rtIsInfF(real32_T value);



105      extern boolean_T rtIsNaN(real_T value);



106      extern boolean_T rtIsNaNF(real32_T value);



107    



108  typedef struct {



109    struct {



110        uint32_T wordH;



111        uint32_T wordL;



112    } words;



113  } BigEndianIEEEDouble;



114  



115



116  typedef struct {



117    struct {



118        uint32_T wordL;



119        uint32_T wordH;



120    } words;



121  } LittleEndianIEEEDouble;



122



123  



124  typedef struct {



125    union {



126      real32_T wordLreal;



127      uint32_T wordLuint;



128    } wordL;



129  } IEEESingle;



130  



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145    #endif /* RTW_HEADER_rt_nonfinite_h_ */



146