1/*
2 * File: PMSM_Controller.h
3 *
4 * Code generated for Simulink model 'PMSM_Controller'.
5 *
6 * Model version : 1.1529
7 * Simulink Coder version : 9.4 (R2020b) 29-Jul-2020
8 * C/C++ source code generated on : Tue Aug 2 19:43:20 2022
9 *
10 * Target selection: ert.tlc
11 * Embedded hardware selection: ARM Compatible->ARM Cortex-M
12 * Code generation objectives:
13 * 1. Execution efficiency
14 * 2. RAM efficiency
15 * Validation result: Not run
16 */
17
18#ifndef RTW_HEADER_PMSM_Controller_h_
19#define RTW_HEADER_PMSM_Controller_h_
20#include "rtwtypes.h"
21#include "zero_crossing_types.h"
22#ifndef PMSM_Controller_COMMON_INCLUDES_
23#define PMSM_Controller_COMMON_INCLUDES_
24#include "rtwtypes.h"
25#include "zero_crossing_types.h"
26#endif /* PMSM_Controller_COMMON_INCLUDES_ */
27
28/* Model Code Variants */
29
30/* Macros for accessing real-time model data structure */
31#ifndef rtmGetErrorStatus
32#define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
33#endif
34
35#ifndef rtmSetErrorStatus
36#define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
37#endif
38
39/* Forward declaration for rtModel */
40typedef struct tag_RTM RT_MODEL;
41
42/* Block signals and states (default storage) for system '<S39>/Low_Pass_Filter' */
43typedef struct {
44 int32_T UnitDelay1_DSTATE[2]; /* '<S47>/UnitDelay1' */
45} DW_Low_Pass_Filter;
46
47/* Block signals and states (default storage) for system '<S79>/PI_Speed' */
48typedef struct {
49 int32_T UnitDelay_DSTATE; /* '<S81>/UnitDelay' */
50 int32_T ResettableDelay_DSTATE; /* '<S82>/Resettable Delay' */
51 uint8_T icLoad; /* '<S82>/Resettable Delay' */
52} DW_PI_backCalc_fixdt;
53
54/* Zero-crossing (trigger) state for system '<S79>/PI_Speed' */
55typedef struct {
56 ZCSigState ResettableDelay_Reset_ZCE_fm;/* '<S82>/Resettable Delay' */
57} ZCE_PI_backCalc_fixdt;
58
59/* Block signals and states (default storage) for system '<S85>/PI_backCalc_fixdt' */
60typedef struct {
61 int32_T UnitDelay_DSTATE; /* '<S90>/UnitDelay' */
62 int32_T ResettableDelay_DSTATE; /* '<S92>/Resettable Delay' */
63 uint8_T icLoad; /* '<S92>/Resettable Delay' */
64} DW_PI_backCalc_fixdt_j;
65
66/* Zero-crossing (trigger) state for system '<S85>/PI_backCalc_fixdt' */
67typedef struct {
68 ZCSigState ResettableDelay_Reset_ZCE;/* '<S92>/Resettable Delay' */
69} ZCE_PI_backCalc_fixdt_n;
70
71/* Block signals and states (default storage) for system '<Root>' */
72typedef struct {
73 DW_PI_backCalc_fixdt_j PI_backCalc_fixdt1;/* '<S85>/PI_backCalc_fixdt1' */
74 DW_PI_backCalc_fixdt_j PI_backCalc_fixdt_ig;/* '<S85>/PI_backCalc_fixdt' */
75 DW_PI_backCalc_fixdt PI_Speed; /* '<S79>/PI_Speed' */
76 DW_Low_Pass_Filter Low_Pass_Filter_e;/* '<S68>/Low_Pass_Filter' */
77 DW_Low_Pass_Filter Low_Pass_Filter_l;/* '<S39>/Low_Pass_Filter' */
78 int32_T Divide11; /* '<S29>/Divide11' */
79 int32_T UnitDelay_DSTATE_l; /* '<S69>/Unit Delay' */
80 int32_T ResettableDelay_DSTATE; /* '<S70>/Resettable Delay' */
81 uint32_T OutportBufferFordelta_count;
82 uint32_T i_count; /* '<S16>/i_count' */
83 uint32_T Switch4; /* '<S29>/Switch4' */
84 uint32_T UnitDelay1_DSTATE; /* '<S38>/UnitDelay1' */
85 uint32_T UnitDelay_DSTATE; /* '<S29>/Unit Delay' */
86 uint32_T UnitDelay2_DSTATE; /* '<S29>/UnitDelay2' */
87 uint32_T UnitDelay3_DSTATE; /* '<S29>/UnitDelay3' */
88 uint32_T UnitDelay5_DSTATE; /* '<S29>/UnitDelay5' */
89 uint32_T UnitDelay4_DSTATE; /* '<S20>/UnitDelay4' */
90 uint32_T UnitDelay4_DSTATE_o; /* '<S29>/UnitDelay4' */
91 int16_T Switch[2]; /* '<S111>/Switch' */
92 int16_T Merge_i[2]; /* '<S67>/Merge' */
93 int16_T UnitDelay_DSTATE_k[2]; /* '<S1>/Unit Delay' */
94 int16_T UnitDelay1_DSTATE_o[2]; /* '<S35>/UnitDelay1' */
95 int16_T UnitDelay_DSTATE_e[2]; /* '<S4>/Unit Delay' */
96 int16_T Divide; /* '<S120>/Divide' */
97 int16_T Divide_o; /* '<S116>/Divide' */
98 int16_T Max; /* '<S120>/Max' */
99 int16_T Max1; /* '<S120>/Max1' */
100 int16_T Max_l; /* '<S116>/Max' */
101 int16_T Max1_j; /* '<S116>/Max1' */
102 int16_T Max_p; /* '<S106>/Max' */
103 int16_T Max1_i; /* '<S106>/Max1' */
104 int16_T Max_i; /* '<S99>/Max' */
105 int16_T Max1_e; /* '<S99>/Max1' */
106 int16_T Merge; /* '<S65>/Merge' */
107 int16_T Switch_p; /* '<S68>/Switch' */
108 int16_T Switch2; /* '<S76>/Switch2' */
109 int16_T Divide_g; /* '<S106>/Divide' */
110 int16_T Divide_d; /* '<S99>/Divide' */
111 int16_T UnitDelay_DSTATE_l5; /* '<S96>/UnitDelay' */
112 int16_T UnitDelay1_DSTATE_j; /* '<S87>/Unit Delay1' */
113 int16_T UnitDelay_DSTATE_g; /* '<S102>/UnitDelay' */
114 int16_T UnitDelay_DSTATE_b; /* '<S98>/Unit Delay' */
115 int16_T UnitDelay_DSTATE_er; /* '<S103>/UnitDelay' */
116 int16_T UnitDelay1_DSTATE_p; /* '<S88>/Unit Delay1' */
117 int16_T UnitDelay_DSTATE_o; /* '<S109>/UnitDelay' */
118 int16_T UnitDelay_DSTATE_d; /* '<S105>/Unit Delay' */
119 int16_T UnitDelay_DSTATE_lz; /* '<S112>/UnitDelay' */
120 int16_T UnitDelay_DSTATE_j; /* '<S119>/UnitDelay' */
121 int16_T UnitDelay_DSTATE_h; /* '<S113>/Unit Delay' */
122 int16_T UnitDelay_DSTATE_n; /* '<S114>/UnitDelay' */
123 int16_T UnitDelay_DSTATE_ox; /* '<S123>/UnitDelay' */
124 int16_T UnitDelay_DSTATE_gt; /* '<S115>/Unit Delay' */
125 int16_T UnitDelay1_DSTATE_jp; /* '<S62>/Unit Delay1' */
126 int16_T Delay_DSTATE; /* '<S80>/Delay' */
127 int16_T UnitDelay_DSTATE_di; /* '<S79>/Unit Delay' */
128 uint16_T UnitDelay2_DSTATE_o; /* '<S28>/UnitDelay2' */
129 uint16_T UnitDelay3_DSTATE_p; /* '<S28>/UnitDelay3' */
130 uint16_T UnitDelay5_DSTATE_m; /* '<S28>/UnitDelay5' */
131 uint16_T UnitDelay_DSTATE_i; /* '<S13>/UnitDelay' */
132 uint16_T UnitDelay_DSTATE_m; /* '<S15>/UnitDelay' */
133 uint16_T UnitDelay1_DSTATE_pl; /* '<S66>/Unit Delay1' */
134 int8_T UnitDelay3; /* '<S16>/UnitDelay3' */
135 int8_T Switch2_o; /* '<S16>/Switch2' */
136 int8_T UnitDelay2_DSTATE_i; /* '<S16>/UnitDelay2' */
137 int8_T If_ActiveSubsystem_k; /* '<S65>/If' */
138 uint8_T Delay_DSTATE_p; /* '<S17>/Delay' */
139 uint8_T Delay1_DSTATE; /* '<S17>/Delay1' */
140 uint8_T Delay2_DSTATE; /* '<S17>/Delay2' */
141 uint8_T UnitDelay_DSTATE_p; /* '<S5>/UnitDelay' */
142 uint8_T UnitDelay_DSTATE_h3; /* '<S45>/Unit Delay' */
143 uint8_T UnitDelay_DSTATE_lv; /* '<S62>/Unit Delay' */
144 uint8_T UnitDelay1_DSTATE_k; /* '<S29>/Unit Delay1' */
145 uint8_T is_active_c11_PMSM_Controller;/* '<S36>/Control_Mode_Manager' */
146 uint8_T is_c11_PMSM_Controller; /* '<S36>/Control_Mode_Manager' */
147 uint8_T is_ACTIVE; /* '<S36>/Control_Mode_Manager' */
148 uint8_T icLoad; /* '<S70>/Resettable Delay' */
149 uint8_T icLoad_i; /* '<S80>/Delay' */
150 boolean_T UnitDelay_DSTATE_gv; /* '<S6>/UnitDelay' */
151 boolean_T UnitDelay_DSTATE_oy; /* '<S10>/UnitDelay' */
152 boolean_T UnitDelay_DSTATE_f; /* '<S7>/UnitDelay' */
153 boolean_T UnitDelay1_DSTATE_m; /* '<S29>/UnitDelay1' */
154 boolean_T n_SpeedCtrl_Mode; /* '<S36>/n_SpeedCtrl' */
155 boolean_T dz_cntTrnsDet_Mode; /* '<S29>/dz_cntTrnsDet' */
156 boolean_T n_commDeacv_Mode; /* '<S28>/n_commDeacv' */
157} DW;
158
159/* Zero-crossing (trigger) state */
160typedef struct {
161 ZCE_PI_backCalc_fixdt_n PI_backCalc_fixdt1;/* '<S85>/PI_backCalc_fixdt1' */
162 ZCE_PI_backCalc_fixdt_n PI_backCalc_fixdt_ig;/* '<S85>/PI_backCalc_fixdt' */
163 ZCSigState ResettableDelay_Reset_ZCE_f;/* '<S70>/Resettable Delay' */
164 ZCE_PI_backCalc_fixdt PI_Speed; /* '<S79>/PI_Speed' */
165} PrevZCX;
166
167/* Constant parameters (default storage) */
168typedef struct {
169 /* Pooled Parameter (Expression: r_sin_M1)
170 * Referenced by:
171 * '<S49>/r_sin_M1'
172 * '<S74>/r_sin_M1'
173 */
174 int16_T pooled12[361];
175
176 /* Pooled Parameter (Expression: r_cos_M1)
177 * Referenced by:
178 * '<S49>/r_cos_M1'
179 * '<S74>/r_cos_M1'
180 */
181 int16_T pooled13[361];
182
183 /* Computed Parameter: vec_hallToPos_Value
184 * Referenced by: '<S19>/vec_hallToPos'
185 */
186 int8_T vec_hallToPos_Value[8];
187} ConstP;
188
189/* External inputs (root inport signals with default storage) */
190typedef struct {
191 int16_T adc_Phase[3]; /* '<Root>/adc_Phase' */
192 uint8_T hall_abc[3]; /* '<Root>/hall_abc' */
193 int32_T spd_Target; /* '<Root>/spd_Target' */
194 int16_T idq_Target; /* '<Root>/idq_Target' */
195 int16_T vdq_Target[2]; /* '<Root>/vdq_Target' */
196 int16_T idq_Limit; /* '<Root>/idq_Limit' */
197 boolean_T b_motEna; /* '<Root>/b_motEna' */
198 boolean_T b_cruiseEna; /* '<Root>/b_cruiseEna' */
199 uint8_T n_ctrlMod; /* '<Root>/n_ctrlMod' */
200 int16_T iDC_Limit; /* '<Root>/iDC_Limit' */
201 int32_T spd_Limit; /* '<Root>/spd_Limit' */
202 int16_T vDC; /* '<Root>/vDC' */
203 uint32_T sys_ticks; /* '<Root>/sys_ticks' */
204 int16_T set_Angle; /* '<Root>/set_Angle' */
205} ExtU;
206
207/* External outputs (root outports fed by signals with default storage) */
208typedef struct {
209 int16_T n_Duty[3]; /* '<Root>/n_Duty' */
210 uint8_T n_Sector; /* '<Root>/n_Sector' */
211 uint8_T n_MotError; /* '<Root>/n_MotError' */
212 int16_T f_Vdq[2]; /* '<Root>/f_Vdq' */
213 int16_T f_Idq[2]; /* '<Root>/f_Idq' */
214 int16_T f_MotAngle; /* '<Root>/f_MotAngle' */
215 int32_T f_MotRPM; /* '<Root>/f_MotRPM' */
216 uint8_T n_hallStat; /* '<Root>/n_hallStat' */
217 uint8_T n_FocMode; /* '<Root>/n_FocMode' */
218 boolean_T b_advCtrl; /* '<Root>/b_advCtrl' */
219} ExtY;
220
221/* Parameters (default storage) */
222struct P_ {
223 int16_T cf_Fw_Kb; /* Variable: cf_Fw_Kb
224 * Referenced by: '<S66>/Constant5'
225 */
226 int16_T cf_Fw_Ki; /* Variable: cf_Fw_Ki
227 * Referenced by: '<S66>/Constant2'
228 */
229 int16_T cf_idKp; /* Variable: cf_idKp
230 * Referenced by: '<S85>/Constant3'
231 */
232 int16_T cf_iqKp; /* Variable: cf_iqKp
233 * Referenced by: '<S85>/Constant7'
234 */
235 int16_T cf_nKp; /* Variable: cf_nKp
236 * Referenced by: '<S79>/Constant4'
237 */
238 int16_T V_modulation; /* Variable: V_modulation
239 * Referenced by:
240 * '<S42>/Constant'
241 * '<S85>/Constant2'
242 * '<S66>/Constant3'
243 */
244 int16_T cf_idKb; /* Variable: cf_idKb
245 * Referenced by: '<S85>/Constant6'
246 */
247 int16_T cf_idKi; /* Variable: cf_idKi
248 * Referenced by: '<S85>/Constant4'
249 */
250 int16_T cf_iqKb; /* Variable: cf_iqKb
251 * Referenced by: '<S85>/Constant1'
252 */
253 int16_T cf_iqKi; /* Variable: cf_iqKi
254 * Referenced by: '<S85>/Constant8'
255 */
256 int16_T cf_nKb; /* Variable: cf_nKb
257 * Referenced by: '<S79>/Constant11'
258 */
259 int16_T cf_nKi; /* Variable: cf_nKi
260 * Referenced by: '<S79>/Constant1'
261 */
262 int16_T f_adc_curr_ceof; /* Variable: f_adc_curr_ceof
263 * Referenced by: '<S43>/Constant'
264 */
265 int16_T cf_lastIqGain; /* Variable: cf_lastIqGain
266 * Referenced by: '<S62>/Gain'
267 */
268 int16_T i_hall_offset; /* Variable: i_hall_offset
269 * Referenced by: '<S22>/Constant2'
270 */
271 int16_T i_dqMax; /* Variable: i_dqMax
272 * Referenced by:
273 * '<S68>/Constant1'
274 * '<S68>/Constant2'
275 * '<S68>/Constant3'
276 * '<S68>/Constant5'
277 * '<S79>/Constant6'
278 */
279 int16_T id_fieldWeakMax; /* Variable: id_fieldWeakMax
280 * Referenced by: '<S66>/Constant6'
281 */
282 int16_T dz_OpenStepVol; /* Variable: dz_OpenStepVol
283 * Referenced by:
284 * '<S111>/Constant1'
285 * '<S111>/Constant5'
286 */
287 uint16_T f_lpf_idq; /* Variable: f_lpf_idq
288 * Referenced by: '<S39>/Constant'
289 */
290 uint16_T f_lpf_vdq; /* Variable: f_lpf_vdq
291 * Referenced by: '<S68>/Constant'
292 */
293 uint16_T i_pwm_count; /* Variable: i_pwm_count
294 * Referenced by: '<S53>/Constant1'
295 */
296 uint8_T n_polePairs; /* Variable: n_polePairs
297 * Referenced by: '<S29>/polePairs'
298 */
299};
300
301/* Parameters (default storage) */
302typedef struct P_ P;
303
304/* Real-time Model Data Structure */
305struct tag_RTM {
306 const char_T * volatile errorStatus;
307 PrevZCX *prevZCSigState;
308 ExtU *inputs;
309 ExtY *outputs;
310 DW *dwork;
311};
312
313/* Block parameters (default storage) */
314extern P rtP;
315
316/* Constant parameters (default storage) */
317extern const ConstP rtConstP;
318
319/* Model entry point functions */
320extern void PMSM_Controller_initialize(RT_MODEL *const rtM);
321extern void PMSM_Controller_step(RT_MODEL *const rtM);
322
323/*-
324 * These blocks were eliminated from the model due to optimizations:
325 *
326 * Block '<S19>/Scope' : Unused code path elimination
327 * Block '<S3>/Scope' : Unused code path elimination
328 * Block '<S20>/Logical Operator4' : Unused code path elimination
329 * Block '<S29>/Scope' : Unused code path elimination
330 * Block '<S20>/Scope1' : Unused code path elimination
331 * Block '<S20>/Scope2' : Unused code path elimination
332 * Block '<S46>/Scope' : Unused code path elimination
333 * Block '<S39>/Scope' : Unused code path elimination
334 * Block '<S49>/Scope' : Unused code path elimination
335 * Block '<S40>/Constant1' : Unused code path elimination
336 * Block '<S40>/Min' : Unused code path elimination
337 * Block '<S50>/Data Type Duplicate' : Unused code path elimination
338 * Block '<S50>/Data Type Propagation' : Unused code path elimination
339 * Block '<S51>/Data Type Duplicate' : Unused code path elimination
340 * Block '<S51>/Data Type Propagation' : Unused code path elimination
341 * Block '<S52>/Scope' : Unused code path elimination
342 * Block '<S61>/Scope' : Unused code path elimination
343 * Block '<S42>/Scope' : Unused code path elimination
344 * Block '<S71>/Data Type Duplicate' : Unused code path elimination
345 * Block '<S71>/Data Type Propagation' : Unused code path elimination
346 * Block '<S74>/Scope' : Unused code path elimination
347 * Block '<S76>/Data Type Duplicate' : Unused code path elimination
348 * Block '<S76>/Data Type Propagation' : Unused code path elimination
349 * Block '<S77>/Data Type Duplicate' : Unused code path elimination
350 * Block '<S77>/Data Type Propagation' : Unused code path elimination
351 * Block '<S83>/Data Type Duplicate' : Unused code path elimination
352 * Block '<S83>/Data Type Propagation' : Unused code path elimination
353 * Block '<S84>/Data Type Duplicate' : Unused code path elimination
354 * Block '<S84>/Data Type Propagation' : Unused code path elimination
355 * Block '<S93>/Data Type Duplicate' : Unused code path elimination
356 * Block '<S93>/Data Type Propagation' : Unused code path elimination
357 * Block '<S95>/Data Type Duplicate' : Unused code path elimination
358 * Block '<S95>/Data Type Propagation' : Unused code path elimination
359 * Block '<S45>/Scope' : Unused code path elimination
360 * Block '<S100>/Data Type Duplicate' : Unused code path elimination
361 * Block '<S100>/Data Type Propagation' : Unused code path elimination
362 * Block '<S107>/Data Type Duplicate' : Unused code path elimination
363 * Block '<S107>/Data Type Propagation' : Unused code path elimination
364 * Block '<S4>/Scope' : Unused code path elimination
365 * Block '<S37>/Scope' : Unused code path elimination
366 * Block '<S117>/Data Type Duplicate' : Unused code path elimination
367 * Block '<S117>/Data Type Propagation' : Unused code path elimination
368 * Block '<S121>/Data Type Duplicate' : Unused code path elimination
369 * Block '<S121>/Data Type Propagation' : Unused code path elimination
370 * Block '<S1>/Data Type Conversion4' : Eliminate redundant data type conversion
371 * Block '<S1>/Data Type Conversion6' : Eliminate redundant data type conversion
372 * Block '<S1>/Data Type Conversion7' : Eliminate redundant data type conversion
373 * Block '<S70>/Data Type Conversion1' : Eliminate redundant data type conversion
374 * Block '<S72>/Data Type Conversion' : Eliminate redundant data type conversion
375 * Block '<S36>/Data Type Conversion' : Eliminate redundant data type conversion
376 * Block '<S66>/Constant1' : Unused code path elimination
377 * Block '<S89>/Add' : Unused code path elimination
378 * Block '<S89>/Constant1' : Unused code path elimination
379 * Block '<S89>/Constant3' : Unused code path elimination
380 * Block '<S89>/Constant4' : Unused code path elimination
381 * Block '<S89>/Constant5' : Unused code path elimination
382 * Block '<S89>/Constant6' : Unused code path elimination
383 * Block '<S89>/Divide' : Unused code path elimination
384 * Block '<S89>/Divide1' : Unused code path elimination
385 * Block '<S89>/Divide2' : Unused code path elimination
386 * Block '<S89>/Divide4' : Unused code path elimination
387 * Block '<S89>/Gain' : Unused code path elimination
388 * Block '<S85>/Gain' : Unused code path elimination
389 */
390
391/*-
392 * The generated code includes comments that allow you to trace directly
393 * back to the appropriate location in the model. The basic format
394 * is <system>/block_name, where system is the system number (uniquely
395 * assigned by Simulink) and block_name is the name of the block.
396 *
397 * Note that this particular code originates from a subsystem build,
398 * and has its own system numbers different from the parent model.
399 * Refer to the system hierarchy for this subsystem below, and use the
400 * MATLAB hilite_system command to trace the generated code back
401 * to the parent model. For example,
402 *
403 * hilite_system('MotorController_FOC_hall/PMSM_Controller') - opens subsystem MotorController_FOC_hall/PMSM_Controller
404 * hilite_system('MotorController_FOC_hall/PMSM_Controller/Kp') - opens and selects block Kp
405 *
406 * Here is the system hierarchy for this model
407 *
408 * '<Root>' : 'MotorController_FOC_hall'
409 * '<S1>' : 'MotorController_FOC_hall/PMSM_Controller'
410 * '<S2>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics'
411 * '<S3>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation'
412 * '<S4>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC'
413 * '<S5>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled'
414 * '<S6>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter'
415 * '<S7>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Edge'
416 * '<S8>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Default'
417 * '<S9>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification'
418 * '<S10>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Edge'
419 * '<S11>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification'
420 * '<S12>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter'
421 * '<S13>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Dequalification/Rst_Counter/rst_Delay1'
422 * '<S14>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter'
423 * '<S15>' : 'MotorController_FOC_hall/PMSM_Controller/Diagnostics/Diagnostics_Enabled/Debounce_Filter/Qualification/Rst_Counter/rst_Delay1'
424 * '<S16>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Direction_Detection'
425 * '<S17>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Edge_Detect'
426 * '<S18>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation'
427 * '<S19>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Hall_Angle_Raw'
428 * '<S20>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation'
429 * '<S21>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta'
430 * '<S22>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad'
431 * '<S23>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta/normal'
432 * '<S24>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/Delta/wrapper'
433 * '<S25>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem'
434 * '<S26>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem1'
435 * '<S27>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Electrical_Angle_Estimation/degree_rad/If Action Subsystem2'
436 * '<S28>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/AdvCtrlDetect'
437 * '<S29>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation'
438 * '<S30>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/AdvCtrlDetect/Compare To Constant'
439 * '<S31>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta'
440 * '<S32>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta/normal'
441 * '<S33>' : 'MotorController_FOC_hall/PMSM_Controller/Hall_Estimation/Speed_Estimation/Raw_Motor_Speed_Estimation/Delta/wrapper'
442 * '<S34>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Call_Schduler'
443 * '<S35>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core'
444 * '<S36>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Ctrl_Mode_Transition'
445 * '<S37>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale'
446 * '<S38>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Call_Schduler/counter'
447 * '<S39>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park'
448 * '<S40>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation'
449 * '<S41>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM'
450 * '<S42>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/circle_limiter'
451 * '<S43>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/current_sample'
452 * '<S44>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc'
453 * '<S45>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc'
454 * '<S46>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Clarke'
455 * '<S47>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Low_Pass_Filter'
456 * '<S48>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Park'
457 * '<S49>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Clarke_Park/Sine_Cosine_Approximation'
458 * '<S50>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation/Saturation Dynamic'
459 * '<S51>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/Motor_Limitation/Saturation Dynamic1'
460 * '<S52>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/Park_Transform_Inverse'
461 * '<S53>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM'
462 * '<S54>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen'
463 * '<S55>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/sector_select'
464 * '<S56>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector1'
465 * '<S57>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector2'
466 * '<S58>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector3'
467 * '<S59>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector4'
468 * '<S60>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector5'
469 * '<S61>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/SVM/SVPWM/duty_gen/sector6'
470 * '<S62>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc'
471 * '<S63>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/pid_schdule'
472 * '<S64>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign'
473 * '<S65>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get'
474 * '<S66>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc'
475 * '<S67>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc'
476 * '<S68>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter'
477 * '<S69>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl'
478 * '<S70>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Intergrator_z'
479 * '<S71>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/FW_Calc/FW_I_Ctrl/Saturation Dynamic'
480 * '<S72>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Calc'
481 * '<S73>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali'
482 * '<S74>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/MPTA_Calc/MTPA_Cali/Sine_Cosine_Approximation'
483 * '<S75>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Low_Pass_Filter'
484 * '<S76>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic1'
485 * '<S77>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/Saturation Dynamic3'
486 * '<S78>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Assign/iDC_Limiter/sqrtSum'
487 * '<S79>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode'
488 * '<S80>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/torque_mode'
489 * '<S81>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed'
490 * '<S82>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Rst_Integrator'
491 * '<S83>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/speed_mode/PI_Speed/Saturation Dynamic1'
492 * '<S84>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/idq_Calc/Do_Calc/idq_Get/torque_mode/Saturation Dynamic1'
493 * '<S85>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop'
494 * '<S86>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/OpenLoop'
495 * '<S87>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep'
496 * '<S88>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep'
497 * '<S89>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/FeedForward'
498 * '<S90>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt'
499 * '<S91>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1'
500 * '<S92>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Rst_Integrator'
501 * '<S93>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt/Saturation Dynamic1'
502 * '<S94>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Rst_Integrator'
503 * '<S95>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/CurrentLoop/PI_backCalc_fixdt1/Saturation Dynamic1'
504 * '<S96>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Edge'
505 * '<S97>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Enabled Subsystem'
506 * '<S98>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control'
507 * '<S99>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/RateInit'
508 * '<S100>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/Saturation Dynamic'
509 * '<S101>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/StepAdd'
510 * '<S102>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/idStep/Rate_Control/StepAdd/delayUnit'
511 * '<S103>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Edge'
512 * '<S104>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Enabled Subsystem'
513 * '<S105>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control'
514 * '<S106>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/RateInit'
515 * '<S107>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/Saturation Dynamic'
516 * '<S108>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/StepAdd'
517 * '<S109>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Core/vdq_Calc/iqStep/Rate_Control/StepAdd/delayUnit'
518 * '<S110>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Ctrl_Mode_Transition/Control_Mode_Manager'
519 * '<S111>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode'
520 * '<S112>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_dege'
521 * '<S113>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl'
522 * '<S114>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_edge'
523 * '<S115>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl'
524 * '<S116>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/RateInit'
525 * '<S117>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/Saturation Dynamic'
526 * '<S118>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/StepAdd'
527 * '<S119>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vd_rate_ctrl/StepAdd/delayUnit'
528 * '<S120>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/RateInit'
529 * '<S121>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/Saturation Dynamic'
530 * '<S122>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/StepAdd'
531 * '<S123>' : 'MotorController_FOC_hall/PMSM_Controller/PMSM_FOC/Target_Scale/open_mode/vq_rate_ctrl/StepAdd/delayUnit'
532 */
533#endif /* RTW_HEADER_PMSM_Controller_h_ */
534
535/*
536 * File trailer for generated code.
537 *
538 * [EOF]
539 */
540